Peter Maydell [Tue, 15 Dec 2020 16:58:27 +0000 (16:58 +0000)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201215' into staging
target-arm queue:
* gdbstub: Correct misparsing of vCont C/S requests
* openrisc: Move pic_cpu code into CPU object proper
* nios2: Move IIC code into CPU object proper
* Improve reporting of ROM overlap errors
* xlnx-versal: Add USB support
* hw/misc/zynq_slcr: Avoid #DIV/0! error
* Numonyx: Fix dummy cycles and check for SPI mode on cmds
* remotes/pmaydell/tags/pull-target-arm-20201215:
hw/block/m25p80: Fix Numonyx fast read dummy cycle count
hw/block/m25p80: Check SPI mode before running some Numonyx commands
hw/block/m25p80: Fix when VCFG XIP bit is set for Numonyx
hw/block/m25p80: Make Numonyx config field names more accurate
hw/misc/zynq_slcr: Avoid #DIV/0! error
arm: xlnx-versal: Connect usb to virt-versal
usb: xlnx-usb-subsystem: Add xilinx usb subsystem
usb: Add DWC3 model
usb: Add versal-usb2-ctrl-regs module
elf_ops.h: Be more verbose with ROM blob names
elf_ops.h: Don't truncate name of the ROM blobs we create
hw/core/loader.c: Improve reporting of ROM overlap errors
hw/core/loader.c: Track last-seen ROM in rom_check_and_register_reset()
target/nios2: Use deposit32() to update ipending register
target/nios2: Move nios2_check_interrupts() into target/nios2
target/nios2: Move IIC code into CPU object proper
target/openrisc: Move pic_cpu code into CPU object proper
hw/openrisc/openrisc_sim: Abstract out "get IRQ x of CPU y"
hw/openrisc/openrisc_sim: Use IRQ splitter when connecting IRQ to multiple CPUs
gdbstub: Correct misparsing of vCont C/S requests
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 15 Dec 2020 15:35:47 +0000 (15:35 +0000)]
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
Machine queue, 2020-12-15
* qdev code cleanup
* Convert some QOM instance properties to class properties
* Update git URLs on MAINTAINERS
# gpg: Signature made Tue 15 Dec 2020 15:18:47 GMT
# gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6
# gpg: issuer "ehabkost@redhat.com"
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/machine-next-pull-request: (25 commits)
MAINTAINERS: Update my git repository URLs
qdev: Move UUID property to qdev-properties-system.c
qdev: Make qdev_propinfo_get_uint16() static
qdev: Make error_set_from_qdev_prop_error() get Object* argument
qdev: Make check_prop_still_unset() get Object* argument
qdev: Make qdev_find_global_prop() get Object* argument
qdev: Make qdev_get_prop_ptr() get Object* arg
qdev: Make bit_prop_set() get Object* argument
qdev: Make PropertyInfo.print method get Object* argument
qdev: Don't use dev->id on set_size32() error message
sparc: Check dev->realized at sparc_set_nwindows()
qdev: Check dev->realized at set_size()
qdev: Move property code to qdev-properties.[ch]
cpu: Move cpu_common_props to hw/core/cpu.c
cs4231: Get rid of empty property array
netfilter: Use class properties
netfilter: Reorder functions
can_host: Use class properties
arm/cpu64: Register "aarch64" as class property
virt: Register "its" as class property
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Eduardo Habkost [Fri, 11 Dec 2020 22:05:11 +0000 (17:05 -0500)]
qdev: Move UUID property to qdev-properties-system.c
Only softmmu code uses DEFINE_PROP_UUID, and it currently depends
on error_set_from_qdev_prop_error(). Move it to
qdev-properties-system.c to get out of our way when refactoring
the qdev property system.
We can eventually move it back to the core property system later,
after removing usage of error_set_from_qdev_prop_error().
Eduardo Habkost [Fri, 11 Dec 2020 22:05:03 +0000 (17:05 -0500)]
qdev: Don't use dev->id on set_size32() error message
All other qdev property error messages use "<type>.<property>"
instead of "<id>.<property>". Change set_size32() for consistency,
and to make the code not specific to TYPE_DEVICE.
Eduardo Habkost [Fri, 11 Dec 2020 22:05:02 +0000 (17:05 -0500)]
sparc: Check dev->realized at sparc_set_nwindows()
sparc_set_nwindows() is one of the very few property setters that
don't check dev->realized, and there's no reason for it to be
special. Check dev->realized like the other setters.
Eduardo Habkost [Fri, 11 Dec 2020 22:05:01 +0000 (17:05 -0500)]
qdev: Check dev->realized at set_size()
This setter is one of the very few property setters that don't
check dev->realized, and there's no reason to make size
properties different from the rest. Add the missing check.
Eduardo Habkost [Wed, 11 Nov 2020 18:38:17 +0000 (13:38 -0500)]
virt: Register "its" as class property
Class properties make QOM introspection simpler and easier, as
they don't require an object to be instantiated.
Note: "its" is currently registered conditionally, but this makes
the feature be registered unconditionally. The only side effect
is that it will be now possible to set its=on on virt-2.7 and
older.
Eduardo Habkost [Wed, 11 Nov 2020 18:38:15 +0000 (13:38 -0500)]
i386: Register feature bit properties as class properties
Class properties make QOM introspection simpler and easier, as
they don't require an object to be instantiated.
Also, the hundreds of instance properties were having an impact
on QMP commands that create temporary CPU objects. On my
machine, run time of qmp_query_cpu_definitions() changed
from ~200ms to ~16ms after applying this patch.
Joe Komlodi [Mon, 16 Nov 2020 23:11:04 +0000 (15:11 -0800)]
hw/block/m25p80: Fix Numonyx fast read dummy cycle count
Numonyx chips determine the number of cycles to wait based on bits 7:4
in the volatile configuration register.
However, if these bits are 0x0 or 0xF, the number of dummy cycles to
wait is 10 for QIOR and QIOR4 commands or when in QIO mode, and otherwise 8 for
the currently supported fast read commands. [1]
Signed-off-by: Joe Komlodi <komlodi@xilinx.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Message-id: 1605568264-26376-5-git-send-email-komlodi@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Joe Komlodi [Mon, 16 Nov 2020 23:11:03 +0000 (15:11 -0800)]
hw/block/m25p80: Check SPI mode before running some Numonyx commands
Some Numonyx flash commands cannot be executed in DIO and QIO mode, such as
trying to do DPP or DOR when in QIO mode.
Signed-off-by: Joe Komlodi <komlodi@xilinx.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Message-id: 1605568264-26376-4-git-send-email-komlodi@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Joe Komlodi [Mon, 16 Nov 2020 23:11:02 +0000 (15:11 -0800)]
hw/block/m25p80: Fix when VCFG XIP bit is set for Numonyx
VCFG XIP is set (disabled) when the NVCFG XIP bits are all set (disabled).
Signed-off-by: Joe Komlodi <komlodi@xilinx.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Message-id: 1605568264-26376-3-git-send-email-komlodi@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Joe Komlodi [Mon, 16 Nov 2020 23:11:01 +0000 (15:11 -0800)]
hw/block/m25p80: Make Numonyx config field names more accurate
The previous naming of the configuration registers made it sound like that if
the bits were set the settings would be enabled, while the opposite is true.
Signed-off-by: Joe Komlodi <komlodi@xilinx.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Message-id: 1605568264-26376-2-git-send-email-komlodi@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Fixes: 38867cb7ec9 ("hw/misc/zynq_slcr: add clock generation for uarts") Reported-by: Gaoning Pan <pgn@zju.edu.cn> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Damien Hedde <damien.hedde@greensocs.com>
Message-id: 20201210141610.884600-1-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Vikram Garhwal [Thu, 3 Dec 2020 19:22:37 +0000 (00:52 +0530)]
arm: xlnx-versal: Connect usb to virt-versal
Connect VersalUsb2 subsystem to xlnx-versal SOC, its placed
in iou of lpd domain and configure it as dual port host controller.
Add the respective guest dts nodes for "xlnx-versal-virt" machine.
Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1607023357-5096-5-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Sai Pavan Boddu [Thu, 3 Dec 2020 19:22:36 +0000 (00:52 +0530)]
usb: xlnx-usb-subsystem: Add xilinx usb subsystem
This model is a top level integration wrapper for hcd-dwc3 and
versal-usb2-ctrl-regs modules, this is used by xilinx versal soc's and
future xilinx usb subsystems would also be part of it.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1607023357-5096-4-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Vikram Garhwal [Thu, 3 Dec 2020 19:22:35 +0000 (00:52 +0530)]
usb: Add DWC3 model
This patch adds skeleton model of dwc3 usb controller attached to
xhci-sysbus device. It defines global register space of DWC3 controller,
global registers control the AXI/AHB interfaces properties, external FIFO
support and event count support. All of which are unimplemented at
present,we are only supporting core reset and read of ID register.
Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1607023357-5096-3-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Sai Pavan Boddu [Thu, 3 Dec 2020 19:22:34 +0000 (00:52 +0530)]
usb: Add versal-usb2-ctrl-regs module
This module emulates control registers of versal usb2 controller, this is added
just to make guest happy. In general this module would control the phy-reset
signal from usb controller, data coherency of the transactions, signals
the host system errors received from controller.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1607023357-5096-2-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Sun, 29 Nov 2020 20:39:23 +0000 (20:39 +0000)]
elf_ops.h: Be more verbose with ROM blob names
Instead of making the ROM blob name something like:
phdr #0: /home/petmay01/linaro/qemu-misc-tests/ldmia-fault.axf
make it a little more self-explanatory for people who don't know
ELF format details:
/home/petmay01/linaro/qemu-misc-tests/ldmia-fault.axf ELF program header segment 0
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201129203923.10622-5-peter.maydell@linaro.org
Peter Maydell [Sun, 29 Nov 2020 20:39:22 +0000 (20:39 +0000)]
elf_ops.h: Don't truncate name of the ROM blobs we create
Currently the load_elf code assembles the ROM blob name into a
local 128 byte fixed-size array. Use g_strdup_printf() instead so
that we don't truncate the pathname if it happens to be long.
(This matters mostly for monitor 'info roms' output and for the
error messages if ROM blobs overlap.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201129203923.10622-4-peter.maydell@linaro.org
Peter Maydell [Sun, 29 Nov 2020 20:39:21 +0000 (20:39 +0000)]
hw/core/loader.c: Improve reporting of ROM overlap errors
In rom_check_and_register_reset() we report to the user if there is
a "ROM region overlap". This has a couple of problems:
* the reported information is not very easy to intepret
* the function just prints the overlap to stderr (and relies on
its single callsite in vl.c to do an error_report() and exit)
* only the first overlap encountered is diagnosed
Make this function use error_report() and error_printf() and
report a more user-friendly report with all the overlaps
diagnosed.
Sample old output:
rom: requested regions overlap (rom dtb. free=0x0000000000008000, addr=0x0000000000000000)
qemu-system-aarch64: rom check and register reset failed
Sample new output:
qemu-system-aarch64: Some ROM regions are overlapping
These ROM regions might have been loaded by direct user request or by default.
They could be BIOS/firmware images, a guest kernel, initrd or some other file loaded into guest memory.
Check whether you intended to load all this guest code, and whether it has been built to load to the correct addresses.
The following two regions overlap (in the cpu-memory-0 address space):
phdr #0: /home/petmay01/linaro/qemu-misc-tests/ldmia-fault.axf (addresses 0x0000000000000000 - 0x0000000000008000)
dtb (addresses 0x0000000000000000 - 0x0000000000100000)
The following two regions overlap (in the cpu-memory-0 address space):
phdr #1: /home/petmay01/linaro/qemu-misc-tests/bad-psci-call.axf (addresses 0x0000000040000000 - 0x0000000040000010)
phdr #0: /home/petmay01/linaro/qemu-misc-tests/bp-test.elf (addresses 0x0000000040000000 - 0x0000000040000020)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201129203923.10622-3-peter.maydell@linaro.org
Peter Maydell [Sun, 29 Nov 2020 20:39:20 +0000 (20:39 +0000)]
hw/core/loader.c: Track last-seen ROM in rom_check_and_register_reset()
In rom_check_and_register_reset() we detect overlaps by looking at
whether the ROM blob we're currently examining is in the same address
space and starts before the previous ROM blob ends. (This works
because the ROM list is kept sorted in order by AddressSpace and then
by address.)
Instead of keeping the AddressSpace and last address of the previous ROM
blob in local variables, just keep a pointer to it.
This will allow us to print more useful information when we do detect
an overlap.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201129203923.10622-2-peter.maydell@linaro.org
Peter Maydell [Sun, 29 Nov 2020 17:40:22 +0000 (17:40 +0000)]
target/nios2: Use deposit32() to update ipending register
In nios2_cpu_set_irq(), use deposit32() rather than raw shift-and-mask
operations to set the appropriate bit in the ipending register.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201129174022.26530-4-peter.maydell@linaro.org
Peter Maydell [Sun, 29 Nov 2020 17:40:21 +0000 (17:40 +0000)]
target/nios2: Move nios2_check_interrupts() into target/nios2
The function nios2_check_interrupts)() looks only at CPU-internal
state; it belongs in target/nios2, not hw/nios2. Move it into the
same file as its only caller, so it can just be local to that file.
This removes the only remaining code from cpu_pic.c, so we can delete
that file entirely.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201129174022.26530-3-peter.maydell@linaro.org Reviewed-by: Wentong Wu <wentong.wu@intel.com> Tested-by: Wentong Wu <wentong.wu@intel.com>
Peter Maydell [Sun, 29 Nov 2020 17:40:20 +0000 (17:40 +0000)]
target/nios2: Move IIC code into CPU object proper
The Nios2 architecture supports two different interrupt controller
options:
* The IIC (Internal Interrupt Controller) is part of the CPU itself;
it has 32 IRQ input lines and no NMI support. Interrupt status is
queried and controlled via the CPU's ipending and istatus
registers.
* The EIC (External Interrupt Controller) interface allows the CPU
to connect to an external interrupt controller. The interface
allows the interrupt controller to present a packet of information
containing:
- handler address
- interrupt level
- register set
- NMI mode
QEMU does not model an EIC currently. We do model the IIC, but its
implementation is split across code in hw/nios2/cpu_pic.c and
hw/intc/nios2_iic.c. The code in those two files has no state of its
own -- the IIC state is in the Nios2CPU state struct.
Because CPU objects now inherit (indirectly) from TYPE_DEVICE, they
can have GPIO input lines themselves, so we can implement the IIC
directly in the CPU object the same way that real hardware does.
Create named "IRQ" GPIO inputs to the Nios2 CPU object, and make the
only user of the IIC wire up directly to those instead.
Note that the old code had an "NMI" concept which was entirely unused
and also as far as I can see not architecturally correct, since only
the EIC has a concept of an NMI.
This fixes a Coverity-reported trivial memory leak of the IRQ array
allocated in nios2_cpu_pic_init().
Peter Maydell [Fri, 27 Nov 2020 22:51:27 +0000 (22:51 +0000)]
target/openrisc: Move pic_cpu code into CPU object proper
The openrisc code uses an old style of interrupt handling, where a
separate standalone set of qemu_irqs invoke a function
openrisc_pic_cpu_handler() which signals the interrupt to the CPU
proper by directly calling cpu_interrupt() and cpu_reset_interrupt().
Because CPU objects now inherit (indirectly) from TYPE_DEVICE, they
can have GPIO input lines themselves, and the neater modern way to
implement this is to simply have the CPU object itself provide the
input IRQ lines.
Create GPIO inputs to the OpenRISC CPU object, and make the only user
of cpu_openrisc_pic_init() wire up directly to those instead.
This allows us to delete the hw/openrisc/pic_cpu.c file entirely.
This fixes a trivial memory leak reported by Coverity of the IRQs
allocated in cpu_openrisc_pic_init().
Peter Maydell [Fri, 27 Nov 2020 22:51:26 +0000 (22:51 +0000)]
hw/openrisc/openrisc_sim: Abstract out "get IRQ x of CPU y"
We're about to refactor the OpenRISC pic_cpu code in a way that means
that just grabbing the whole qemu_irq[] array of inbound IRQs for a
CPU won't be possible any more. Abstract out a function for "return
the qemu_irq for IRQ x input of CPU y" so we can more easily replace
the implementation.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stafford Horne <shorne@gmail.com>
Message-id: 20201127225127.14770-3-peter.maydell@linaro.org
Peter Maydell [Fri, 27 Nov 2020 22:51:25 +0000 (22:51 +0000)]
hw/openrisc/openrisc_sim: Use IRQ splitter when connecting IRQ to multiple CPUs
openrisc_sim_net_init() attempts to connect the IRQ line from the
ethernet device to both CPUs in an SMP configuration by simply caling
sysbus_connect_irq() for it twice. This doesn't work, because the
second connection simply overrides the first.
Fix this by creating a TYPE_SPLIT_IRQ to split the IRQ in the SMP
case.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stafford Horne <shorne@gmail.com>
Message-id: 20201127225127.14770-2-peter.maydell@linaro.org
Peter Maydell [Sat, 21 Nov 2020 21:03:42 +0000 (21:03 +0000)]
gdbstub: Correct misparsing of vCont C/S requests
In the vCont packet, two of the command actions (C and S) take an
argument specifying the signal to be sent to the process/thread, which is
sent as an ASCII string of two hex digits which immediately follow the
'C' or 'S' character.
Our code for parsing this packet accidentally skipped the first of the
two bytes of the signal value, because it started parsing the hex string
at 'p + 1' when the preceding code had already moved past the 'C' or
'S' with "cur_action = *p++".
This meant that we would only do the right thing for signals below
10, and would misinterpret the rest. For instance, when the debugger
wants to send the process a SIGPROF (27 on x86-64) we mangle this into
a SIGSEGV (11).
Remove the accidental double increment.
Fixes: https://bugs.launchpad.net/qemu/+bug/1773743 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20201121210342.10089-1-peter.maydell@linaro.org
Volker Rümelin [Sun, 13 Dec 2020 13:05:27 +0000 (14:05 +0100)]
coreaudio: always stop audio playback on shut down
Always stop audio playback and remove the playback callback when
QEMU exits.
On shut down the function coreaudio_fini_out() destroys the
coreaudio mutex but fails to stop audio playback and to remove the
audio playback callback, because function audio_is_cleaning_up()
always returns true when called from coreaudio_fini_out(). Now
there is a time window from pthread_mutex_destroy() to program
exit where Core Audio may call the audio playback callback which
tries to lock the destroyed coreaudio mutex. This leads to the
following error.
coreaudio: Could not lock voice for audioDeviceIOProc
Reason: Invalid argument
This bug was reported on the qemu-discuss mailing list.
https://lists.nongnu.org/archive/html/qemu-discuss/2020-10/msg00018.html
Volker Rümelin [Sun, 13 Dec 2020 13:05:26 +0000 (14:05 +0100)]
coreaudio: don't start playback in init routine
Every emulated audio device has a way to enable audio playback. Don't
start playback until the guest enables the audio device to keep the
Core Audio device run state in sync with hw->enabled.
Volker Rümelin [Sun, 13 Dec 2020 13:05:25 +0000 (14:05 +0100)]
coreaudio: rename misnamed variable fake_as
While the variable once was used to fake audio settings, since
commit ed2a4a7941 "audio: proper support for float samples in
mixeng" this is no longer true. Rename the variable to obt_as.
This is the same naming scheme as in audio/sdlaudio.c
* remotes/vivier2/tags/trivial-branch-for-6.0-pull-request:
configure / meson: Move check for linux/btrfs.h to meson.build
configure / meson: Move check for sys/kcov.h to meson.build
configure / meson: Move check for sys/signal.h to meson.build
configure / meson: Move check for drm.h to meson.build
configure / meson: Move check for pty.h to meson.build
configure: Remove the obsolete check for ifaddrs.h
blockdev: Fix a memleak in drive_backup_prepare()
block/file-posix: fix a possible undefined behavior
elf2dmp/pdb: Plug memleak in pdb_init_from_file
elf2dmp/qemu_elf: Plug memleak in QEMU_Elf_init
configure: Test if $make actually exists
ads7846: moves from the hw/display folder to the hw/input folder.
CODING_STYLE.rst: Be less strict about 80 character limit
fsdev: open brace '{' following struct go on the same line
hw/pci-host/pam: Replace magic number by PAM_REGIONS_COUNT definition
hw/xen: Don't use '#' flag of printf format
MAINTAINERS: update my email address
qemu-options.hx: Fix minor issues in icount documentation
target/i386: tracing: format length values as hex
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 14 Dec 2020 16:31:15 +0000 (16:31 +0000)]
Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20201214' into staging
ppc patch queue 2020-12-14
Here's my first pull request for qemu-6.0, with a bunch of things
queued over the freeze. Highlights are:
* A bunch of cleanups to hotplug error paths from Greg Kurz
* A number of TCG fixes from new contributor Giuseppe Musacchio
* Added Greg Kurz as co-maintainer
* Assorted other bugfixes and cleanups
This supersedes ppc-for-6.0-20201211, the only change are some patch
authors to better match qemu conventions.
* remotes/dg-gitlab/tags/ppc-for-6.0-20201214: (30 commits)
spapr.c: set a 'kvm-type' default value instead of relying on NULL
spapr: Pass sPAPR machine state to some RTAS events handling functions
spapr: Don't use qdev_get_machine() in spapr_msi_write()
spapr: Pass sPAPR machine state down to spapr_pci_switch_vga()
target/ppc: Introduce an mmu_is_64bit() helper
ppc/translate: Use POWERPC_MMU_64 to detect 64-bit MMU models
ppc/e500: Free irqs array to avoid memleak
MAINTAINERS: Add Greg Kurz as co-maintainer for ppc
hw/ppc: Do not re-read the clock on pre_save if doing savevm
target/ppc: Remove "compat" property of server class POWER CPUs
spapr: spapr_drc_attach() cannot fail
spapr: Simplify error path of spapr_core_plug()
spapr: Abort if ppc_set_compat() fails for hot-plugged CPUs
spapr: Fix pre-2.10 dummy ICP hack
xive: Add trace events
hw/ppc/spapr_tpm_proxy: Fix hexadecimal format string specifier
ppc/translate: Rewrite gen_lxvdsx to use gvec primitives
ppc/translate: Raise exceptions after setting the cc
ppc/translate: Delay NaN checking after comparison
ppc/translate: Turn the helper macros into functions
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 14 Dec 2020 13:37:02 +0000 (13:37 +0000)]
tests/tcg/multiarch/Makefile.target: Disable run-gdbstub-sha1 test
Disable the run-gdbstub-sha1 test: it provokes an internal error
assertion failure in Ubuntu gdb 8.1.1-0ubuntu1 (Ubuntu gdb
8.1-0ubuntu3.2 also has this assert but we were previously skipping
this test because it doesn't support connection over local domain
sockets) :
timeout 60 /home/petmay01/linaro/qemu-for-merges/tests/guest-debug/run-test.py --gdb /usr/bin/gdb-multiar
/build/gdb-veKdC1/gdb-8.1.1/gdb/regcache.c:122: internal-error: void* init_regcache_descr(gdbarch*): Asser
A problem internal to GDB has been detected,
further debugging may prove unreliable.
This is a bug, please report it. For instructions, see:
<http://www.gnu.org/software/gdb/bugs/>.
Aborted (core dumped)
/home/petmay01/linaro/qemu-for-merges/tests/tcg/multiarch/Makefile.target:51: recipe for target 'run-gdbst
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20201214133702.24088-1-peter.maydell@linaro.org
spapr.c: set a 'kvm-type' default value instead of relying on NULL
spapr_kvm_type() is considering 'vm_type=NULL' as a valid input, where
the function returns 0. This is relying on the current QEMU machine
options handling logic, where the absence of the 'kvm-type' option
will be reflected as 'vm_type=NULL' in this function.
This is not robust, and will break if QEMU options code decides to propagate
something else in the case mentioned above (e.g. an empty string instead
of NULL).
Let's avoid this entirely by setting a non-NULL default value in case of
no user input for 'kvm-type'. spapr_kvm_type() was changed to handle 3 fixed
values of kvm-type: "auto", "hv", and "pr", with "auto" being the default
if no kvm-type was set by the user. This allows us to always be predictable
regardless of any enhancements/changes made in QEMU options mechanics.
While we're at it, let's also document in 'kvm-type' description the
already existing default mode, now named 'auto'. The information provided
about it is based on how the pseries kernel handles the KVM_CREATE_VM
ioctl(), where the default value '0' makes the kernel choose an available
KVM module to use, giving precedence to kvm_hv. This logic is described in
the kernel source file arch/powerpc/kvm/powerpc.c, function kvm_arch_init_vm().
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20201210145517.1532269-2-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org>
Greg Kurz [Wed, 9 Dec 2020 17:00:51 +0000 (18:00 +0100)]
spapr: Pass sPAPR machine state to some RTAS events handling functions
Some functions in hw/ppc/spapr_events.c get a pointer to the machine
state using qdev_get_machine(). Convert them to get it from their
caller when possible.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201209170052.1431440-6-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201209170052.1431440-5-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Wed, 9 Dec 2020 17:00:49 +0000 (18:00 +0100)]
spapr: Pass sPAPR machine state down to spapr_pci_switch_vga()
This allows to drop a user of qdev_get_machine().
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201209170052.1431440-4-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Wed, 9 Dec 2020 17:35:36 +0000 (18:35 +0100)]
target/ppc: Introduce an mmu_is_64bit() helper
Callers don't really need to know how 64-bit MMU model enums are
computed. Hide this in a helper.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201209173536.1437351-3-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
ppc/translate: Use POWERPC_MMU_64 to detect 64-bit MMU models
The ppc_tr_init_disas_context() function currently checks whether the
MMU is 64-bit by ANDing its model type with POWERPC_MMU_64B. This is
wrong : POWERPC_MMU_64B isn't a mask, it is the generic MMU model for
pre-PowerISA-2.03 64-bit CPUs (ie. PowerPC 970 in QEMU).
Use POWERPC_MMU_64 instead of POWERPC_MMU_64B. This should fix a
potential bug with some 32-bit CPUs for which 'need_access_type'
was mis-computed because (POWERPC_MMU_32B & POWERPC_MMU_64B)
happens to be equal to 1. The end result being a crash in
ppc_hash32_direct_store() because the access type isn't set:
cpu_abort(cs, "ERROR: instruction should not need "
"address translation\n");
This doesn't change anything for 'lazy_tlb_flush' since POWERPC_MMU_32B
is checked first.
Fixes: 5f2a6254522b ("ppc: Don't set access_type on all load/stores on hash64") Signed-off-by: Stephane Duverger <stephane.duverger@free.fr>
[groug: - extended patch to address another misuse of POWERPC_MMU_64B
- updated title and changelog accordingly] Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201209173536.1437351-2-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Gan Qixin [Fri, 4 Dec 2020 07:58:22 +0000 (15:58 +0800)]
ppc/e500: Free irqs array to avoid memleak
When running qom-test, a memory leak occurred in the ppce500_init function,
this patch free irqs array to fix it.
ASAN shows memory leak stack:
Direct leak of 40 byte(s) in 1 object(s) allocated from:
#0 0xfffc5ceee1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0)
#1 0xfffc5c806800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800)
#2 0xaaacf9999244 in ppce500_init qemu/hw/ppc/e500.c:859
#3 0xaaacf97434e8 in machine_run_board_init qemu/hw/core/machine.c:1134
#4 0xaaacf9c9475c in qemu_init qemu/softmmu/vl.c:4369
#5 0xaaacf94785a0 in main qemu/softmmu/main.c:49
Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Message-Id: <20201204075822.359832-1-ganqixin@huawei.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
David Gibson [Thu, 26 Nov 2020 04:09:16 +0000 (15:09 +1100)]
MAINTAINERS: Add Greg Kurz as co-maintainer for ppc
Greg has agreed to be co-maintainer of the ppc target and machines.
This should avoid repeats of the problem we had in qemu-5.2 where a
last minute fix was needed while I was on holiday.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Greg Kurz <groug@kaod.org>
Greg Kurz [Wed, 2 Dec 2020 17:28:26 +0000 (18:28 +0100)]
hw/ppc: Do not re-read the clock on pre_save if doing savevm
A guest with enough RAM, eg. 128G, is likely to detect savevm downtime
and to complain about stalled CPUs. This happens because we re-read
the timebase just before migrating it and we thus don't account for
all the time between VM stop and pre-save.
A very similar situation was already addressed for live migration of
paused guests (commit d14f33976282). Extend the logic to do the same
with savevm.
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1893787 Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <160693010619.1111945.632640981169395440.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Tue, 1 Dec 2020 13:11:03 +0000 (14:11 +0100)]
target/ppc: Remove "compat" property of server class POWER CPUs
This property has been deprecated since QEMU 5.0 by commit 22062e54bb68.
We only kept a legacy hack that internally converts "compat" into the
official "max-cpu-compat" property of the pseries machine type.
According to our deprecation policy, we could have removed it for QEMU 5.2
already. Do it now ; since ppc_cpu_parse_featurestr() now just calls the
generic parent_parse_features handler, drop it as well.
Users are supposed to use the "max-cpu-compat" property of the pseries
machine type instead.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201201131103.897430-1-groug@kaod.org> Reviewed-by: Ján Tomko <jtomko@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Tue, 1 Dec 2020 11:37:28 +0000 (12:37 +0100)]
spapr: spapr_drc_attach() cannot fail
All users are passing &error_abort already. Document the fact
that spapr_drc_attach() should only be passed a free DRC, which
is supposedly the case if appropriate checking is done earlier.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201201113728.885700-5-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Tue, 1 Dec 2020 11:37:27 +0000 (12:37 +0100)]
spapr: Simplify error path of spapr_core_plug()
spapr_core_pre_plug() already guarantees that the slot for the given core
ID is available. It is thus safe to assume that spapr_find_cpu_slot()
returns a slot during plug. Turn the error path into an assertion.
It is also safe to assume that no device is attached to the corresponding
DRC and that spapr_drc_attach() shouldn't fail.
Pass &error_abort to spapr_drc_attach() and simplify error handling.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201201113728.885700-4-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Tue, 1 Dec 2020 11:37:26 +0000 (12:37 +0100)]
spapr: Abort if ppc_set_compat() fails for hot-plugged CPUs
When a CPU is hot-plugged, we set its compat mode to match the boot
CPU, which was either set by machine reset or by CAS. This is currently
handled in the plug handler after the core got realized. Potential errors
of ppc_set_compat() are propagated to the hot-plug logic.
Handling errors this late in the hot-plug sequence is generally frown
upon. Ideally, we should do sanity checks in a pre-plug handler and pass
&error_abort to ppc_set_compat() in the plug handler.
We can filter out some error cases of ppc_set_compat() by calling
ppc_check_compat() at pre-plug. But ppc_set_compat() also sets the
compat register in KVM, and KVM doesn't provide any API that would
allow to check valid compat mode settings beforehand.
However, at this point we know that the compat mode was already
successfully set for the boot CPU. Since this all boils down to
setting a register with the very same value that was valid
for the boot CPU, it should definitely not fail for hot-plugged
CPUS.
Pass &error_abort to ppc_set_compat().
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201201113728.885700-3-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Tue, 1 Dec 2020 11:37:25 +0000 (12:37 +0100)]
spapr: Fix pre-2.10 dummy ICP hack
This hack registers dummy VMState entries of ICPs in order to
support migration of old pseries machine types that used to
create all smp.max_cpus possible ICPs at machine init.
Part of the work is to unregister the dummy entries when plugging
an actual vCPU core, and to register them back when unplugging the
core. The code that unregisters the dummy ICPs in spapr_core_plug()
is misplaced: if ppc_set_compat() fails afterwards, the hotplug
operation will be cancelled and the dummy ICPs won't be registered
back since the unplug handler isn't called.
Unregister the dummy ICPs at the end of spapr_core_plug().
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201201113728.885700-2-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
ppc/translate: Rewrite gen_lxvdsx to use gvec primitives
Make the implementation match the lxvwsx one.
The code is now shorter smaller and potentially faster as the
translation will use the host SIMD capabilities if available.
No functional change.
Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com>
Message-Id: <a463dea379da4cb3a22de49c678932f74fb15dd7.1604912739.git.thatlemon@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
ppc/translate: Raise exceptions after setting the cc
The PowerISA reference states that the comparison operators update the
FPCC, CR and FPSCR and, if VE=1, jump to the exception handler.
Moving the exception-triggering code after the CC update sequence solves
the problem.
Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201112230130.65262-5-thatlemon@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
ppc/translate: Delay NaN checking after comparison
Since we always perform a comparison between the two operands avoid
checking for NaN unless the result states they're unordered.
Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201112230130.65262-4-thatlemon@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
ppc/translate: Turn the helper macros into functions
Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201112230130.65262-3-thatlemon@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
According to the PowerISA v3.1 reference, Table 68 "Actions for xscmpudp
- Part 1: Compare Unordered", whenever one of the two operands is a NaN
the SO bit is set while the other three bits are cleared.
Apply the same change to xscmpuqp.
The respective ordered counterparts are unaffected.
Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com>
Message-Id: <20201112230130.65262-2-thatlemon@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Chen Qun [Mon, 16 Nov 2020 02:48:09 +0000 (10:48 +0800)]
ppc: Add a missing break for PPC6xx_INPUT_TBEN
When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning:
hw/ppc/ppc.c: In function ‘ppc6xx_set_irq’:
hw/ppc/ppc.c:118:16: warning: this statement may fall through [-Wimplicit-fallthrough=]
118 | if (level) {
| ^
hw/ppc/ppc.c:123:9: note: here
123 | case PPC6xx_INPUT_INT:
| ^~~~
According to the discussion, a break statement needs to be added here.
Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20201116024810.2415819-7-kuhn.chenqun@huawei.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Chen Qun [Mon, 16 Nov 2020 02:48:10 +0000 (10:48 +0800)]
target/ppc: replaced the TODO with LOG_UNIMP and add break for silence warnings
When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning:
target/ppc/mmu_helper.c: In function ‘dump_mmu’:
target/ppc/mmu_helper.c:1351:12: warning: this statement may fall through [-Wimplicit-fallthrough=]
1351 | if (ppc64_v3_radix(env_archcpu(env))) {
| ^
target/ppc/mmu_helper.c:1358:5: note: here
1358 | default:
| ^~~~~~~
Use "qemu_log_mask(LOG_UNIMP**)" instead of the TODO comment.
And add the break statement to fix it.
Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20201116024810.2415819-8-kuhn.chenqun@huawei.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Fri, 20 Nov 2020 23:42:07 +0000 (00:42 +0100)]
spapr: Do TPM proxy hotplug sanity checks at pre-plug
There can be only one TPM proxy at a time. This is currently
checked at plug time. But this can be detected at pre-plug in
order to error out earlier.
This allows to get rid of error handling in the plug handler.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201120234208.683521-9-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Fri, 20 Nov 2020 23:42:06 +0000 (00:42 +0100)]
spapr: Do PHB hoplug sanity check at pre-plug
We currently detect that a PHB index is already in use at plug time.
But this can be decteted at pre-plug in order to error out earlier.
This allows to pass &error_abort to spapr_drc_attach() and to end
up with a plug handler that doesn't need to report errors anymore.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201120234208.683521-8-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Fri, 20 Nov 2020 23:42:05 +0000 (00:42 +0100)]
spapr: Make PHB placement functions and spapr_pre_plug_phb() return status
Read documentation in "qapi/error.h" and changelog of commit e3fe3988d785 ("error: Document Error API usage rules") for
rationale.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201120234208.683521-7-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Fri, 20 Nov 2020 23:42:01 +0000 (00:42 +0100)]
spapr: Do NVDIMM/PC-DIMM device hotplug sanity checks at pre-plug only
Pre-plug of a memory device, be it an NVDIMM or a PC-DIMM, ensures
that the memory slot is available and that addresses don't overlap
with existing memory regions. The corresponding DRCs in the LMB
and PMEM namespaces are thus necessarily attachable at plug time.
Pass &error_abort to spapr_drc_attach() in spapr_add_lmbs() and
spapr_add_nvdimm(). This allows to greatly simplify error handling
on the plug path.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201120234208.683521-3-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Fri, 20 Nov 2020 23:42:00 +0000 (00:42 +0100)]
spapr: Do PCI device hotplug sanity checks at pre-plug only
The PHB acts as the hotplug handler for PCI devices. It does some
sanity checks on DR enablement, PCI bridge chassis numbers and
multifunction. These checks are currently performed at plug time,
but they would best sit in a pre-plug handler in order to error
out as early as possible.
Create a spapr_pci_pre_plug() handler and move all the checking
there. Add a check that the associated DRC doesn't already have
an attached device. This is equivalent to the slot availability
check performed by do_pci_register_device() upon realization of
the PCI device.
This allows to pass &error_abort to spapr_drc_attach() and to end
up with a plug handler that doesn't need to report errors anymore.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201120234208.683521-2-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Fri, 20 Nov 2020 17:46:43 +0000 (18:46 +0100)]
spapr/xics: Drop unused argument to xics_kvm_has_broken_disconnect()
Never used from the start.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201120174646.619395-6-groug@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg Kurz [Fri, 20 Nov 2020 17:46:39 +0000 (18:46 +0100)]
spapr/xive: Turn some sanity checks into assertions
The sPAPR XIVE device is created by the machine in spapr_irq_init().
The latter overrides any value provided by the user with -global for
the "nr-irqs" and "nr-ends" properties with strictly positive values.
It seems reasonable to assume these properties should never be 0,
which wouldn't make much sense by the way.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201120174646.619395-2-groug@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Thomas Huth [Wed, 18 Nov 2020 17:10:52 +0000 (18:10 +0100)]
configure / meson: Move check for linux/btrfs.h to meson.build
This check can be done in a much shorter way in meson.build. And while
we're at it, rename the #define to HAVE_BTRFS_H to match the other
HAVE_someheader_H symbols that we already have.
Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201118171052.308191-7-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Thomas Huth [Wed, 18 Nov 2020 17:10:51 +0000 (18:10 +0100)]
configure / meson: Move check for sys/kcov.h to meson.build
This check can be done in a much shorter way in meson.build. And while
we're at it, rename the #define to HAVE_SYS_KCOV_H to match the other
HAVE_someheader_H symbols that we already have.
Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201118171052.308191-6-thuth@redhat.com>
[lv: s/signal/kcov/] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Thomas Huth [Wed, 18 Nov 2020 17:10:47 +0000 (18:10 +0100)]
configure: Remove the obsolete check for ifaddrs.h
The code that used HAVE_IFADDRS_H has been removed in commit 0a27af918b ("io: use bind() to check for IPv4/6 availability"),
so we don't need this check in the configure script anymore.
Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201118171052.308191-2-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Roman Bolshakov [Tue, 25 Aug 2020 20:27:55 +0000 (23:27 +0300)]
configure: Test if $make actually exists
configure doesn't detect if $make is installed on the build host.
This is also helpful for hosts where an alias for make is used, i.e.
configure would fail if gmake is not present on macOS.
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20200825202755.50626-5-r.bolshakov@yadro.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
projects / thirdparty / qemu.git / log
