Bill Schmidt [Mon, 25 Apr 2016 22:29:49 +0000 (22:29 +0000)]
backport: re PR target/70098 (PowerPC64: eigen hits ICE following invalid register assignment)
[gcc]
2016-04-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
2016-03-14 Segher Boessenkool <segher@kernel.crashing.org>
PR target/70098
* config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2,
*ctr<mode>_internal5, *ctr<mode>_internal6): Also allow "d" as output.
(define_split for the GPR case): Use int_reg_operand instead of
gpc_reg_operand for the output.
[gcc/testsuite]
2016-04-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
2016-03-14 Segher Boessenkool <segher@kernel.crashing.org>
PR target/70098
* lib/target-supports.exp (check_effective_target_powerpc64_no_dm):
New function.
* g++.dg/pr70098.C: New testcase.
Andreas Krebbel [Thu, 21 Apr 2016 11:50:22 +0000 (11:50 +0000)]
PR70674: S/390: Add memory barrier to stack pointer restore
PR70674: S/390: Add memory barrier to stack pointer restore
from fpr.
This patches fixes a problem with stack variable accesses being
scheduled after the stack pointer restore instructions. In the
testcase this happened with the stack variable 'a' accessed through the
frame pointer.
The existing stack_tie we have in the backend is basically useless
when trying to block stack variable accesses from being scheduled
across an insn. The alias set of stack variables and the frame alias
set usually differ and hence aren't in conflict with each other. The
solution appears to be a magic MEM term with a scratch register which
is handled as a full memory barrier when analyzing scheduling
dependencies.
With the patch a (clobber (mem:BLK (scratch))) is being added to the
restore instruction in order to prevent any memory operations to be
scheduled across the insn. The patch does that only for the one case
where the stack pointer is restored from an FPR. Theoretically this
might happen also in the case where the stack pointer gets restored
using a load multiple. However, triggering that problem with
load-multiple appears to be much harder since the load-multiple will
restore the frame pointer as well. So in order to see the problem a
different call-clobbered register would need to be used as temporary
stack pointer.
Another case which needs to be handled some day is the stack pointer
allocation part. It needs to be a memory barrier as well.
gcc/ChangeLog:
2016-04-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Backport from mainline
2016-04-20 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/70674
* config/s390/s390.c (s390_restore_gprs_from_fprs): Pick the new
stack_restore_from_fpr pattern when restoring r15.
(s390_optimize_prologue): Strip away the memory barrier in the
parallel when trying to get rid of restore insns.
* config/s390/s390.md ("stack_restore_from_fpr"): New insn
definition for loading the stack pointer from an FPR. Compared to
the normal move insn this pattern includes a full memory barrier.
gcc/testsuite/ChangeLog:
2016-04-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Backport from mainline
2016-04-20 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/70674
* gcc.target/s390/pr70674.c: New test.
[ARM] PR target/70566 Check that condition register is dead in tst-imm -> lsls-imm Thumb2 peepholes
Backport from mainline
2016-04-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/70566
* config/arm/thumb2.md (tst + branch-> lsls + branch
peephole below *orsi_not_shiftsi_si): Require that condition
register is dead after the peephole.
(second peephole after the above): Likewise.
Alan Modra [Mon, 11 Apr 2016 13:47:40 +0000 (23:17 +0930)]
PR70117, ppc long double isinf
gcc/
PR target/70117
* builtins.c (fold_builtin_classify): For IBM extended precision,
look at just the high-order double to test for NaN.
(fold_builtin_interclass_mathfn): Similarly for Inf. For isnormal
test just the high double for Inf but both doubles for subnormal
limit.
gcc/testsuite/
* gcc.target/powerpc/pr70117.c: New.
predicates.md (integer_store_memory_operand): Accept REG+D operands with a large offset when reload_in_progress is true.
* config/pa/predicates.md (integer_store_memory_operand): Accept
REG+D operands with a large offset when reload_in_progress is true.
(floating_point_store_memory_operand): Likewise.
Bill Schmidt [Mon, 4 Apr 2016 15:47:51 +0000 (15:47 +0000)]
re PR middle-end/70457 (ICE (segfault) in gimple_expand_builtin_pow on powerpc64le-linux-gnu)
[gcc]
2016-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Jakub Jelinek <jakub@redhat.com>
PR middle-end/70457
* tree-inline.c (estimate_num_insn): Use gimple_call_builtin_p
to ensure a call statement is compatible with a built-in's
prototype.
* tree-ssa-math-opts.c (execute_cse_sincos_1): Likewise.
(execute_cse_sincos): Likewise.
(execute_optimize_widening_mul): Likewise.
[gcc/testsuite]
2016-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Jakub Jelinek <jakub@redhat.com>
Jakub Jelinek [Thu, 31 Mar 2016 13:21:43 +0000 (15:21 +0200)]
re PR rtl-optimization/70460 (Miscompilation of glibc on i686-linux starting with r234101)
PR rtl-optimization/70460
* ira.c (indirect_jump_optimize): Don't substitute LABEL_REF
with operand from REG_LABEL_OPERAND, instead substitute
SET_SRC or REG_EQUAL note content if it is a LABEL_REF.
Don't do anything for REG_NON_LOCAL_GOTO jumps.
Alan Modra [Thu, 31 Mar 2016 06:26:02 +0000 (16:56 +1030)]
[RS6000] reload_vsx_from_gprsf splitter
This is PR68973 part 2, caused by the reload_vsx_from_gprsf splitter
emitting an invalid move. Part 1 deferred for branch until it is
proven that the reload change is necessary.
Backport from mainline
2016-02-16 Alan Modra <amodra@gmail.com>
PR target/68973
* config/rs6000/rs6000.md (reload_vsx_from_gprsf): Rewrite splitter.
(p8_mtvsrd_df, p8_mtvsrd_sf): New.
(p8_mtvsrd_1, p8_mtvsrd_2): Delete.
(p8_mtvsrwz): New.
(p8_mtvsrwz_1, p8_mtvsrwz_2): Delete.
(p8_xxpermdi_<mode>): Take two DF inputs rather than one TF.
(p8_fmrgow_<mode>): Likewise.
(reload_vsx_from_gpr<mode>): Adjust for above. Use "wa" for
clobber constraint.
(reload_fpr_from_gpr<mode>): Adjust for above. Use "d" for
op0 constraint.
(reload_vsx_from_gprsf): Use p8_mtvsrd_sf rather than attempting
to use movdi_internal64. Remove op0_di.
* config/rs6000/vsx.md (vsx_xscvspdpn_directmove): Make op1 SFmode.
Uros Bizjak [Mon, 21 Mar 2016 22:20:08 +0000 (23:20 +0100)]
re PR target/70327 (ICE: in extract_insn, at recog.c:2287 (unrecognizable insn) with -mavx512ifma and v4ti argument)
PR target/70327
* config/i386/i386.md (movxi): Use ix86_expand_vector_move instead
of ix86_expand_move.
(movoi): Ditto.
(movti): Use general_operand for operand 1 predicate.
testsuite/ChangeLog:
PR target/70327
* gcc.target/i386/pr70327.c: New test.
projects / thirdparty / gcc.git / log
