Michael Meissner [Mon, 21 Nov 2016 20:35:21 +0000 (20:35 +0000)]
rs6000.md (movdi_internal32): Change constraints so that DImode can be allocated to FP/vector registers in...
[gcc]
2016-11-21 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.md (movdi_internal32): Change constraints
so that DImode can be allocated to FP/vector registers in more
cases, and we can avoid direct move operations. If the register
needs reloading, prefer GPRs over FP/vector registers. In the
case of FPR vs. Altivec registers, prefer FPR registers unless we
have the ISA 3.0 reg+offset scalar instructions.
(movdi_internal64): Likewise.
[gcc/testsuite]
2016-11-21 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/ppc-round2.c: Allow XSCVDPSXWS and XSCVDPUXWS
to be generated instead of FCTIWUZ or FCTIWZ.
Jakub Jelinek [Mon, 21 Nov 2016 18:55:11 +0000 (19:55 +0100)]
re PR c++/71973 (c++ handles built-in functions inconsistently)
PR c++/71973
* g++.dg/torture/pr53321.C (size_t): Use __SIZE_TYPE__ instead of
long unsigned int.
* g++.dg/torture/pr63512.C (::strlen): Use __SIZE_TYPE__ instead of
unsigned long.
Jeff Law [Mon, 21 Nov 2016 18:19:12 +0000 (11:19 -0700)]
re PR target/25128 ([m68k] Suboptimal comparisons against 65536)
PR target/25128
* config/m68k/predicates.md (swap_peephole_relational_operator): New
predicate.
* config/m68k/m68k.md (relational tests against 65535/65536): New
peephole2.
PR target/25128
* gcc.target/m68k/pr25128.c: New test.
struct s { int i; };
struct s f (int);
struct s g (void) { return f (1); }
We treated them both as sibcalls on x86 before the first patch for PR36326,
so I suppose this is a regression of sorts from 4.3.
The patch allows function returns to be local aggregate variables as well
as gimple registers.
gcc/
* tree-tailcall.c (process_assignment): Simplify the check for
a valid copy, allowing the source to be a local variable as
well as an SSA name.
(find_tail_calls): Allow copies between local variables to follow
the call. Allow the result to be stored in any local variable,
even if it's an aggregate.
(eliminate_tail_call): Check whether the result is an SSA name
before updating its SSA_NAME_DEF_STMT.
gcc/testsuite/
* gcc.dg/tree-ssa/tailcall-7.c: New test.
David Malcolm [Mon, 21 Nov 2016 15:50:38 +0000 (15:50 +0000)]
substring_loc info needs default track-macro-expansion (PR preprocessor/78324)
gcc/ChangeLog:
PR preprocessor/78324
* input.c (get_substring_ranges_for_loc): Fail gracefully if
-ftrack-macro-expansion has a value other than 2.
gcc/testsuite/ChangeLog:
PR preprocessor/78324
* gcc.dg/plugin/diagnostic-test-string-literals-1.c
(test_multitoken_macro): New function.
* gcc.dg/plugin/diagnostic-test-string-literals-3.c: New test
case.
* gcc.dg/plugin/diagnostic-test-string-literals-4.c: New test
case.
* gcc.dg/plugin/plugin.exp (plugin_test_list): Add the new test
cases.
* gcc.dg/tree-ssa/builtin-sprintf-warn-1.c (test_sprintf_note):
Move to...
* gcc.dg/tree-ssa/builtin-sprintf-warn-4.c: ...here. Drop
-ftrack-macro-expansion=0.
(test_sprintf_note): Remove "P" macro. Add
dg-begin/end-multiline-output directives.
(LINE, buffer, ptr): Copy from builtin-sprintf-warn-1.c.
shrink-wrap: Fix problem with DF checking (PR78400)
With my previous patch the compiler ICEs if you use --enable-checking=df.
This patch fixes it, by calling df_update_entry_exit_and_calls instead of
df_update_entry_block_defs and df_update_exit_block_uses.
PR rtl-optimization/78400
* shrink-wrap.c (try_shrink_wrapping_separate): Call
df_update_entry_exit_and_calls instead of df_update_entry_block_defs
and df_update_exit_block_uses.
PR c++/71973
* decl.c (duplicate_decls): Warn when a built-in function is redefined.
Don't overload builtin functions with C++ functions.
Handle const_tm_ptr_type_node like file_ptr_node.
Copy the TREE_NOTHROW flag unmodified to the old decl.
PR c++/71973
* g++.dg/pr71973-1.C: New test.
* g++.dg/pr71973-2.C: New test.
* g++.dg/pr71973-3.C: New test.
* g++.dg/lto/pr68811_0.C: Add -w to first lto-options.
* g++.dg/lookup/extern-c-redecl4.C: Adjust test expectations.
* g++.old-deja/g++.mike/p700.C: Add -Wno-builtin-declaration-mismatch
to dg-options.
* g++.old-deja/g++.other/realloc.C: Likewise.
* g++.old-deja/g++.other/builtins10.C: Adjust test expectations.
Jeff Law [Mon, 21 Nov 2016 05:29:36 +0000 (22:29 -0700)]
re PR target/48551 (Following source code crashes the c++ compiler on coldfire platform.)
2016-11-20 Jeff Law <law@redhat.com>
PR target/48551
* reload.h (struct target_reload): Make x_double_reg_address_ok
be per-mode rather.
* reload.c (find_reloads_address): Check if double_reg_address_ok
is true for the mode of the memory reference.
* reload1.c (init_reload): Initialize double_reg_address_ok for
each mode.
PR target/48551
* gcc.target/m68k/pr48551.c: New test.
Jakub Jelinek [Sat, 19 Nov 2016 18:57:56 +0000 (19:57 +0100)]
i386.c (ix86_can_inline_p): Use || instead of & when checking if callee's isa flags are subset of caller's...
* config/i386/i386.c (ix86_can_inline_p): Use || instead of &
when checking if callee's isa flags are subset of caller's isa flags.
Fix comment wording.
Jakub Jelinek [Sat, 19 Nov 2016 18:56:47 +0000 (19:56 +0100)]
i386.c (def_builtin, [...]): Formatting fixes.
* config/i386/i386.c (def_builtin, def_builtin2, def_builtin_const2,
ix86_add_new_builtins): Formatting fixes.
(ix86_expand_builtin): Use || instead of && for isa vs. isa2.
(ix86_get_builtin): Likewise.
* config/i386/i386.c (ix86_expand_builtin): Remove msk_mov variable,
don't initialize it, don't use it for the case where it isn't
provable %{z} nor using the same argument, instead move merge
argument into a new pseudo and use that as target. Formatting fixes.
Jakub Jelinek [Fri, 18 Nov 2016 22:21:31 +0000 (23:21 +0100)]
re PR middle-end/78419 (ICE with target_clone on invalid target)
PR middle-end/78419
* multiple_target.c (get_attr_len): Start with argnum and increment
argnum on every arg. Use strchr in a loop instead of counting commas
manually.
(get_attr_str): Increment argnum for every comma in the string.
(separate_attrs): Use for instead of while loop, simplify.
(expand_target_clones): Rename defenition argument to definition.
Free attrs and attr_str even when diagnosing errors. Temporarily
change input_location around targetm.target_option.valid_attribute_p
calls. Don't emit warning or errors if that function fails.
Jakub Jelinek [Fri, 18 Nov 2016 21:55:46 +0000 (22:55 +0100)]
re PR debug/78191 (ICE in calc_die_sizes)
* dwarf2out.c (size_of_discr_list): Fix typo in function comment.
PR debug/78191
* dwarf2out.c (abbrev_opt_base_type_end): New variable.
(die_abbrev_cmp): Sort dies with die_abbrev smaller than
abbrev_opt_base_type_end only by increasing die_abbrev, before
any other dies.
(optimize_abbrev_table): Don't change abbrev numbers of
base types and CU or optimize implicit consts in them if
calc_base_type_die_sizes has been called during build_abbrev_table.
(calc_base_type_die_sizes): If abbrev_opt_start, set
abbrev_opt_base_type_end to one plus largest base type's
die_abbrev.
Ian Lance Taylor [Fri, 18 Nov 2016 17:48:29 +0000 (17:48 +0000)]
runtime: move schedt type and sched var from C to Go
This doesn't change any actual code, it just starts using the Go
definition of the schedt type and the sched variable rather than the C
definitions.
The schedt type is tweaked slightly for gccgo. We aren't going to
release goroutine stacks, so we don't need separate gfreeStack and
gfreeNostack lists. We only have one size of defer function, so we
don't need a list of 5 different pools.
gcc/testsuite/
* gcc.target/arm/optional_thumb-1.c: New test.
* gcc.target/arm/optional_thumb-2.c: New test.
* gcc.target/arm/optional_thumb-3.c: New test.
Dominik Vogt [Fri, 18 Nov 2016 14:50:27 +0000 (14:50 +0000)]
S/390: Lower requirements for successful htm tests.
The attached patch makes the htm tests on s390 less sensitive to
spurious abort. Please check the commit comment for details. The
modified tests have been run once on a zEC12.
gcc/ChangeLog:
2016-11-18 Dominik Vogt <vogt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_stack_info): PR/77359: Properly align
local variables in functions calling alloca. Also update the ASCII
drawings
* config/rs6000/rs6000.h (STARTING_FRAME_OFFSET, STACK_DYNAMIC_OFFSET):
PR/77359: Likewise.
* config/rs6000/aix.h (STARTING_FRAME_OFFSET, STACK_DYNAMIC_OFFSET):
PR/77359: Copy AIX specific versions of the rs6000.h macros to aix.h.
Dominik Vogt [Fri, 18 Nov 2016 14:28:49 +0000 (14:28 +0000)]
RS6000: Fix PR 77359: Properly align local variables in functions calling alloca.
gcc/ChangeLog:
2016-11-18 Dominik Vogt <vogt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_stack_info): PR/77359: Properly align
local variables in functions calling alloca. Also update the ASCII
drawings
* config/rs6000/rs6000.h (STARTING_FRAME_OFFSET, STACK_DYNAMIC_OFFSET):
PR/77359: Likewise.
* config/rs6000/aix.h (STARTING_FRAME_OFFSET, STACK_DYNAMIC_OFFSET):
PR/77359: Copy AIX specific versions of the rs6000.h macros to aix.h.
This change makes the code less sensitive to the exact type of the mode,
i.e. it forces a conversion where necessary. This becomes important
when wrappers like scalar_int_mode and scalar_mode can also be used
instead of machine_mode.
Using rtx_mode_t also abstracts away the representation. The fact that
it's a std::pair rather than a custom class isn't important to users of
the interface.
gcc/
2016-11-18 Richard Sandiford <richard.sandiford@arm.com>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
This may no longer be necessary with the current version
of the SVE patches, but it does at least make things consistent
with the TYPE_MODE/SET_TYPE_MODE split.
gcc/ada/
2016-11-16 Richard Sandiford <richard.sandiford@arm.com>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* gcc-interface/utils.c (create_label_decl): Use SET_DECL_MODE.
gcc/c/
2016-11-16 Richard Sandiford <richard.sandiford@arm.com>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* c-decl.c (merge_decls): Use SET_DECL_MODE.
(make_label, finish_struct): Likewise.
gcc/cp/
2016-11-16 Richard Sandiford <richard.sandiford@arm.com>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
For code like the testcase in PR71785 GCC factors all the indirect branches
to a single dispatcher that then everything jumps to. This is because
having many indirect branches with each many jump targets does not scale
in large parts of the compiler. Very late in the pass pipeline (right
before peephole2) the indirect branches are then unfactored again, by
the duplicate_computed_gotos pass.
This pass works by replacing branches to such a common dispatcher by a
copy of the dispatcher. For code like this testcase this does not work
so well: most cases do a single addition instruction right before the
dispatcher, but not all, and we end up with only two indirect jumps: the
one without the addition, and the one with the addition in its own basic
block, and now everything else jumps _there_.
This patch rewrites the algorithm to deal with this. It also makes it
simpler: it does not need the "candidates" array anymore, it does not
need RTL layout mode, it does not need cleanup_cfg, and it does not
need to keep track of what blocks it already visited.
PR rtl-optimization/71785
* bb-reorder.c (maybe_duplicate_computed_goto): New function.
(duplicate_computed_gotos): New function.
(pass_duplicate_computed_gotos::execute): Rewrite.
Ian Lance Taylor [Fri, 18 Nov 2016 04:05:10 +0000 (04:05 +0000)]
Update libgo/configure to restore it to the master version.
Update a few binary files that were changed in the master gc repo,
copied into the gofrontend repo, but not correctly copied into the GCC
repo. The changes are all minor and do not affect any actual tests.
Two instances of "http" changed to "https", and two timestamps were
zeroed out.
Ian Lance Taylor [Fri, 18 Nov 2016 00:15:38 +0000 (00:15 +0000)]
runtime, reflect: rewrite Go to FFI type conversion in Go
As we move toward the Go 1.7 garbage collector, it's essential that all
allocation of values that can contain Go pointers be done using the
correct type descriptor. That is simplest if we do all such allocation
in Go code. This rewrites the code that converts from a Go type to a
libffi CIF into Go.
Jason Merrill [Thu, 17 Nov 2016 22:40:28 +0000 (17:40 -0500)]
PR c++/78193 - inherited ctor regressions on sparc32.
* call.c (build_over_call): Don't set CALL_FROM_THUNK_P here.
(build_call_a): Set it here, and don't insert EMPTY_CLASS_EXPR.
(convert_like_real) [ck_rvalue]: Also pass non-addressable
types along directly.
Andrew Burgess [Thu, 17 Nov 2016 22:40:05 +0000 (22:40 +0000)]
arc/nps400: New peephole2 pattern allow more cmem loads
In the case where we access a single bit from a value and use this in a
EQ/NE comparison, GCC will convert this into a sign-extend and GE/LT
comparison.
Normally this would be fine, however, if the value is in CMEM memory,
then we don't have a sign-extending load available (using the special
short CMEM load instructions), and instead we end up using a long form
load with LIMM, which is less efficient.
This peephole optimisation looks for the sign-extend followed by GE/LT
pattern and converts this back into a load and EQ/NE comparison.
gcc/ChangeLog:
* config/arc/arc.md (cmem bit/sign-extend peephole2): New peephole
to make better use of cmem loads in the case where a single bit is
being accessed.
* config/arc/predicates.md (ge_lt_comparison_operator): New
predicate.
gcc/testsuite/ChangeLog:
* gcc.target/arc/cmem-bit-1.c: New file.
* gcc.target/arc/cmem-bit-2.c: New file.
* gcc.target/arc/cmem-bit-3.c: New file.
* gcc.target/arc/cmem-bit-4.c: New file.
Michael Meissner [Thu, 17 Nov 2016 21:42:13 +0000 (21:42 +0000)]
re PR target/78101 (PowerPC 64-bit little endian fusion failure with -O3 -mcpu=power9)
[gcc]
2016-11-17 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78101
* config/rs6000/predicates.md (fusion_addis_mem_combo_load): Add
the appropriate checks for SFmode/DFmode load/stores in GPR
registers.
(fusion_addis_mem_combo_store): Likewise.
* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Rename
fusion_fpr_* to fusion_vsx_* and add in support for ISA 3.0 scalar
d-form instructions for traditional Altivec registers.
(emit_fusion_p9_load): Likewise.
(emit_fusion_p9_store): Likewise.
* config/rs6000/rs6000.md (p9 fusion store peephole2): Remove
early clobber from scratch register. Do not match if the register
being stored is the scratch register.
(fusion_vsx_<P:mode>_<FPR_FUSION:mode>_load): Rename fusion_fpr_*
to fusion_vsx_* and add in support for ISA 3.0 scalar d-form
instructions for traditional Altivec registers.
(fusion_fpr_<P:mode>_<FPR_FUSION:mode>_load): Likewise.
(fusion_vsx_<P:mode>_<FPR_FUSION:mode>_store): Likewise.
(fusion_fpr_<P:mode>_<FPR_FUSION:mode>_store): Likewise.
[gcc/testsuite]
2016-11-17 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78101
* gcc.target/powerpc/fusion4.c: New test.
Fix PR77933: stack corruption on ARM when using high registers and LR
2016-11-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
PR target/77933
* config/arm/arm.c (thumb1_expand_prologue): Distinguish between lr
being live in the function and lr needing to be saved. Distinguish
between already saved pushable registers and registers to push.
Check for LR being an available pushable register.
gcc/testsuite/
PR target/77933
* gcc.target/arm/pr77933-1.c: New test.
* gcc.target/arm/pr77933-2.c: Likewise.
* config/i386/i386.md (cmpstrnsi): New test to bail out if neither
string input is a string constant.
* builtins.c (expand_builtin_strncmp): Attempt expansion of strncmp
via cmpstrnsi even if neither string is constant.
Jakub Jelinek [Thu, 17 Nov 2016 17:09:13 +0000 (18:09 +0100)]
re PR middle-end/78201 (ICE in tree_to_shwi, at tree.h:4037 (seen both on ARM32 an AArch64))
PR middle-end/78201
* varasm.c (default_use_anchors_for_symbol_p): Fix a comment typo.
Don't test decl != NULL. Don't look at DECL_SIZE, but DECL_SIZE_UNIT
instead, return false if it is NULL, or doesn't fit into uhwi, or
is larger or equal to targetm.max_anchor_offset.
Pip Cet [Thu, 17 Nov 2016 16:16:38 +0000 (16:16 +0000)]
re PR rtl-optimization/78355 (LRA generates unaligned accesses when SLOW_UNALIGNED_ACCESS is 1)
PR rtl-optimization/78355
* doc/tm.texi.in (SLOW_UNALIGNED_ACCESS): Document that the macro only
needs to deal with unaligned accesses.
* doc/tm.texi: Regenerate.
* lra-constraints.c (simplify_operand_subreg): Only invoke
SLOW_UNALIGNED_ACCESS on innermode if the MEM is not aligned enough.
Co-Authored-By: Eric Botcazou <ebotcazou@adacore.com>
From-SVN: r242554
projects / thirdparty / gcc.git / log
