Rasmus Villemoes [Thu, 12 Mar 2026 10:01:06 +0000 (11:01 +0100)]
cmd: test: fix handling of single-argument form of test
POSIX states that
0 arguments:
Exit false (1).
1 argument:
Exit true (0) if $1 is not null; otherwise, exit false.
and at least bash and busybox sh behave that way.
The current 'argc < 3' does the right thing for a non-existing or
empty argv[1], but not for a non-empty argv[1]. Fix that and add
corresponding test cases.
Rasmus Villemoes [Thu, 12 Mar 2026 10:01:05 +0000 (11:01 +0100)]
test: add tests for left-bracket alias for 'test' command
Duplicate a few of the existing test cases, using the [ spelling, and
also ensure that the presence of a matching ] as a separate and last
argument is enforced.
Rasmus Villemoes [Thu, 12 Mar 2026 10:01:03 +0000 (11:01 +0100)]
cmd: test: allow using [ as alias for test
I often find myself writing something like
if [ "$somevar" = 123 ] ; then ...
only to realize that that syntax doesn't work in U-Boot shell, and
must be spelled
if test "$somevar" = 123 ; then
It only takes a few lines of code to support this POSIX-standardized
alias for test, and helps developers focus on their actual problems
instead of dealing with such unexpected quirks of the shell.
Shiva Tripathi [Wed, 25 Feb 2026 11:24:38 +0000 (16:54 +0530)]
arm: k3: Kconfig: Enable fTPM and RPMB support
Enable firmware TPM (fTPM) support via OP-TEE for K3 platforms with
MMC hardware. This provides TPM 2.0 functionality through
Microsoft's fTPM Trusted Application running in OP-TEE secure world,
using eMMC RPMB as persistent storage.
fTPM support in U-Boot provides the foundation for measured boot
and disk encryption use cases.
The ARM64 condition ensures these apply only to A53/A72 cores and the
MMC condition ensures fTPM is enabled only on platforms with eMMC
hardware support.
Signed-off-by: Shiva Tripathi <s-tripathi1@ti.com> Acked-by: Andrew Davis <afd@ti.com>
Add checkkconfigsymbols.py from Linux 7.0-rc1 (unchanged since v6.2).
This tool allows to identify the usage of symbols that are not defined
in Kconfig.
We removed configuration symbol CONFIG_DM_PCI with
commit 3232bdf0b30b ("pci: Drop DM_PCI").
Don't select it for TARGET_POMELO.
Fixes: b9d0f00a9d3f ("arm: add initial support for the Phytium Pomelo Board") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com>
The disk_read() and disk_write() functions of the FAT driver use the
blk_dread() and blk_dwrite() respectively. The blk_* APIs read and write
to the devices in terms of the device block size. However, the FAT
driver reads in terms of the device block size (from fat_set_blk_dev and
read_bootsectandvi) and sector size in the rest of the places.
This causes buffer overflows or partial reads when the FAT sector size
is not equal to device block size. Fix this by using blk_dread in
fat_set_blk_dev and read_bootsectandvi instead of disk_read. And update
disk_read/disk_write to handle FAT sector size and block size mismatch.
CI test results
---------------
https://github.com/u-boot/u-boot/pull/871
All checks have passed
93 successful checks
No conflicts with base branch
Code size change info
---------------------
arm: (for 1/1 boards) all +32.0 text +32.0
qemu_arm : all +32 text +32
u-boot: add: 0/0, grow: 2/0 bytes: 24/0 (24)
function old new delta
read_bootsectandvi 420 432 +12
fat_set_blk_dev 204 216 +12
aarch64: (for 1/1 boards) all +12.0 rodata -8.0 text +20.0
qemu_arm64 : all +12 rodata -8 text +20
u-boot: add: 0/0, grow: 2/0 bytes: 20/0 (20)
function old new delta
read_bootsectandvi 408 420 +12
fat_set_blk_dev 204 212 +8
The disk_read() and disk_write() functions of the FAT driver use the
blk_dread() and blk_dwrite() respectively. The blk_* APIs read and write
to the devices in terms of the device block size. However, the FAT
driver reads in terms of the device block size (from fat_set_blk_dev and
read_bootsectandvi) and sector size in the rest of the places.
This causes buffer overflows or partial reads when the FAT sector size
is not equal to device block size. Fix this by using blk_dread in
fat_set_blk_dev and read_bootsectandvi instead of disk_read. And update
disk_read/disk_write to handle FAT sector size and block size mismatch.
Jonas Karlman [Wed, 4 Feb 2026 21:29:20 +0000 (21:29 +0000)]
rockchip: Reduce size of ramboot usb472 payload
Booting into SPL using ramboot can take several seconds on some SoCs due
to the large size of the usb472 payload sent over USB to BootROM.
A large chunk of the usb472 payload, around 1-2 MiB, is padding used to
avoid overlapping when loading e.g. TF-A to 0x40000.
BootROM is likely wasting unnecessary time crc16 validating the padding
of the payload.
Place the FIT payload directly after SPL and memmove it to the expected
memory location, SPL_LOAD_FIT_ADDRESS, to avoid excessive padding and
help speed up ramboot.
Binman symbols are used to get the position and size of the FIT payload
that is initially loaded into DRAM by the BootROM.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Tue, 3 Feb 2026 09:58:06 +0000 (10:58 +0100)]
rockchip: rk3588: include all addressable DRAM in memory map
The ATAGS set by Rockchip DDR init blob[1] specify DRAM banks above the
first addressable 4GiB which we haven't done in the mem_map for RK3588
yet.
For 4GiB DRAM, the 256MiB missing from the first addressable 4GiB (due
to MMIO) are accessible at the end of the 8GiB address space. For 8GiB,
4-8GiB address space is used for the additional 4GiB and the missing
256MiB are at the end of 12GiB address space. For 12, 4-12GiB and the
missing 256MiB at the end of 20GiB address space. For 16GiB, 4-~16GiB
with two holes (reasons unknown) around 16GiB and the missing 256MiB is
at the end of 20GiB address space. For 32GiB, 4-16~GiB with two holes
and then 16GiB to 32GiB address space (so likely missing 256MiB from
MMIO address space).
(cherry picked from commit 516951213a82094f7f49f149cbf3c66dfb14c65d) Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sat, 31 Jan 2026 23:38:13 +0000 (23:38 +0000)]
rockchip: mkimage: Re-sort the spl_infos list alphanumerically
The first RK35xx SoC was initially appended to the end of the otherwise
alphanumerically sorted spl_infos list, possible because it was using a
new header structure.
Re-sort the spl_infos list to keep it alphanumerically ordered based
on imagename.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sat, 31 Jan 2026 23:38:12 +0000 (23:38 +0000)]
rockchip: spl: Add common handling of USB bootsource_id 0x81
Multiple newer Rockchip SoCs report 0x81 instead of 0xa when booting
from USB, i.e. on RK3576, RK3528, RK3506 and RV1106.
Move the bootsource_id 0x81 handling currently only used for RK3528 to
the common read_brom_bootsource_id() to reduce the need to override this
function when support for newer SoCs is introduced.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Johan Jonker [Fri, 16 Jan 2026 22:12:20 +0000 (23:12 +0100)]
ARM: dts: rockchip: move edp assigned-clocks to edp node on rk3288
The rk3288 power-controller node contains an assigned-clocks property
that conflicts with the bindings. From the git history it shows that they
wanted to assign the rk3288 EDP_24M clock input centrally before an edp
node was available. Move the edp assigned-clocks property to the edp node
to reduce dtbs_check output.
Johan Jonker [Fri, 16 Jan 2026 22:12:08 +0000 (23:12 +0100)]
ARM: dts: rockchip: Add spi_flash label to rk3288-veyron
The u-boot,spl-boot-order property requires a label at a boot
device node. In order to migrate to OF_UPSTREAM more easier
add a spi_flash label to the rk3288-veyron.dtsi file.
Quentin Schulz [Fri, 9 Jan 2026 11:17:48 +0000 (12:17 +0100)]
rockchip: tiger-rk3588: disable HS400
Tiger suffers from eMMC signal integrity issues which means we can only
run it at HS200 max.
The Device Tree has these properties removed since v6.18 (commit baa18d577cd4 ("arm64: dts: rockchip: disable HS400 on RK3588 Tiger")),
which has now merged in U-Boot.
Since the controller side doesn't support HS400 anymore, let's not
confuse users as to why HS400 is enabled in the config but not working
as we know it cannot work (and won't be used anyway since the controller
doesn't advertise support for it in the Device Tree).
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Thu, 8 Jan 2026 13:32:29 +0000 (13:32 +0000)]
rockchip: rk3576: Allow pmu sram access for non-secure masters
The firewall block access to pmu sram for non-secure masters by default
after reset (0xffffbfff).
Change the pmu lookup configuration to match the default lookup config
for ddr and system sram (0xffff3fff) to allow loading TF-A using DMA.
Mainline TF-A will re-configure the firewall to use an even less
restrictive lookup (0xbffe3ff0), so this change is not expected to have
any real security implication.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Tested-by: Alexey Charkov <alchark@gmail.com> # UFS Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Wed, 7 Jan 2026 23:07:41 +0000 (23:07 +0000)]
rockchip: rk3588s-rock-5c: Add support for ROCK 5C Lite variant
Add Kconfig option OF_SYSTEM_SETUP=y to support booting ROCK 5C Lite
boards with a RK3582 SoC. CPU and GPU cores are failed based on ip-state
and policy.
Tested on a ROCK 5C Lite v1.1:
cpu-code: 35 82
ip-state: 00 80 00 (otp)
ip-state: c0 9e 04 (policy)
remove cpu-map cluster2
fail gpu
fail rkvdec1
fail rkvenc1
fail cpu cpu@600
fail cpu cpu@700
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Fri, 6 Mar 2026 01:20:09 +0000 (18:20 -0700)]
boot: Add fit_config_get_hash_list() to build signed node list
The hashed-nodes property in a FIT signature node lists which FDT paths
are included in the signature hash. It is intended as a hint so should
not be used for verification.
Add a function to build the node list from scratch by iterating the
configuration's image references. Skip properties known not to be image
references. For each image, collect the path plus all hash and cipher
subnodes.
Use the new function in fit_config_check_sig() instead of reading
'hashed-nodes'.
Update the test_vboot kernel@ test case: fit_check_sign now catches the
attack at signature-verification time (the @-suffixed node is hashed
instead of the real one, causing a mismatch) rather than at
fit_check_format() time.
Update the docs to cover this. The FIT spec can be updated separately.
Signed-off-by: Simon Glass <simon.glass@canonical.com> Closes: https://lore.kernel.org/u-boot/20260302220937.3682128-1-trini@konsulko.com/ Reported-by: Apple Security Engineering and Architecture (SEAR) Tested-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 9 Mar 2026 15:12:43 +0000 (09:12 -0600)]
Merge patch series "64-bit PCIe for AM64, AM69, J7200, J722S and J784S4"
Siddharth Vadapalli <s-vadapalli@ti.com> says:
Since Linux device-tree has switched to 64-bit Address space for the
PCIe Controllers on TI SoCs, currently, U-Boot needs to support the
same. This series adds support for 64-bit addressing for PCIe along with
enabling Root-Complex mode of operation for AM69 and J784S4 SoCs.
configs: j722s_evm_a53_defconfig: enable 64-bit addressing for PCIe
The PCIe0 instance of PCIe on the J722S SoC uses the 4 GB Address Window
starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
configs: j7200_evm_a72_defconfig: enable 64-bit addressing for PCIe
The PCIe1 instance of PCIe on the J7200 SoC uses the 4 GB Address Window
starting from 0x41_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
configs: am64x_evm_a53_defconfig: enable 64-bit addressing for PCIe
The PCIe0 instance of PCIe on the AM64x SoC uses the 4 GB Address Window
starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
The PCIe Controllers on the J784S4 and AM69 SoCs support Root-Complex
mode of operation. PCIe0 instance of PCIe on both of the SoCs is brought
out on the Starter-Kit (AM69) and EVM (J784S4) boards. Hence, enable
the configs required for Root-Complex mode of operation.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
arm: mach-k3: arm64-mmu: add mapping for PCIe 4 GB Address Windows
The PCIe Controllers in the K3 SoCs have 4 GB Address Windows in the
64-bit address space to map System (CPU) Addresses to PCIe Bus Addresses.
The physical addresses for these Address Windows across PCIe instances
across SoCs is as follows:
+--------+----------------+----------------+----------------+----------------+
| SoC | PCIe0 | PCIe1 | PCIe2 | PCIe3 |
+--------+----------------+----------------+----------------+----------------+
| AM64 | 0x6_0000_0000 | NA | NA | NA |
| J722S | 0x6_0000_0000 | NA | NA | NA |
| AM68 | NA | 0x41_0000_0000 | NA | NA |
| J7200 | NA | 0x41_0000_0000 | NA | NA |
| J721S2 | NA | 0x41_0000_0000 | NA | NA |
| J742S2 | 0x40_0000_0000 | 0x41_0000_0000 | NA | NA |
| AM69 | 0x40_0000_0000 | 0x41_0000_0000 | 0x42_0000_0000 | 0x43_0000_0000 |
| J721E | 0x40_0000_0000 | 0x41_0000_0000 | 0x42_0000_0000 | 0x43_0000_0000 |
| J784S4 | 0x40_0000_0000 | 0x41_0000_0000 | 0x42_0000_0000 | 0x43_0000_0000 |
+--------+----------------+----------------+----------------+----------------+
Two regions for a 1:1 mapping from virtual addresses to physical addresses
catering to all of the above will be required, which are:
1. For AM64 and J722S SoCs
=> Start: 0x6_0000_0000 Size: 0x1_0000_0000
2. For AM68, AM69, J7200, J721E, J721S2, J742S2 and J784S4 SoCs
=> Start: 0x40_0000_0000 Size: 0x4_0000_0000
Since the 'Flash Peripherals' region from 0x5_0000_0000 to 0x8_7FFF_FFFF
includes the mapping for AM64 and J722S SoCs, only the second region
mentioned above needs to be added.
Hence, add the region to support 64-bit address space for PCIe.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
Drivers should extract device-tree data before probing via the
.of_to_plat hook.
Implement it for stm32_dsi driver. By doing so, it also solve a
variable shadowing in stm32_dsi_probe() where &clk was used as
peripheral clock and ref clock.
For readability some struct have been renamed such as:
Jonas Karlman [Tue, 6 Jan 2026 23:21:51 +0000 (23:21 +0000)]
rockchip: sdram: Add fallback that fixup DRAM gaps on RK3588
RK3588 has two known memory gaps when using 16+ GiB DRAM,
[0x3fc000000, 0x3fc500000) and [0x3fff00000, 0x400000000).
The vendor TPL blob encodes this information in the DDR_MEM tag data
passed to later boot phases. U-Boot proper will normally use this
information to configure the DRAM banks.
When a DDR_MEM tag cannot be found the fallback is to use the entire
range above 4 GiB. Something that will cause issues when OS try to use
memory from the two known memory gaps.
Add a weak dram init banksize fixup function and implement it for RK3588
to fix issues observed when trying to RAM boot RK3588 boards with 16+
GiB DRAM into Linux.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Martin Schwan [Wed, 18 Feb 2026 13:35:07 +0000 (14:35 +0100)]
test: boot: Add test for bootmeth_rauc
Add a simple unit test for testing the RAUC bootmethod. Provide only the
very basic tests for now, running a scan and list, to verify correct
detection of the RAUC bootmethod. More advanced boot tests of this
bootmethod can be added in a separate patch.
This requires another mmc image (mmc10) to contain the following
partitions:
1. boot A: contains a dummy boot.scr
2. root A: contains an empty root filesystem
3. boot B: contains a dummy boot.scr
4. root B: contains an empty root filesystem
The bootmeth_rauc scans all four partitions for existence and expects a
boot script in each boot partition.
Also add BOOTMETH_RAUC as a dependency on sandbox so that we can test
this with:
Signed-off-by: Martin Schwan <m.schwan@phytec.de> Reviewed-by: Simon Glass <simon.glass@canonical.com>
[trini: mmc9 is now in use, switch to mmc10] Signed-off-by: Tom Rini <trini@konsulko.com>
Ludwig Nussel [Tue, 24 Feb 2026 15:57:10 +0000 (16:57 +0100)]
bootm: fix booting kernel_noload image
FIT images don't work without having to explicitly specify physical
load addresses. Digging into that it looks like a flaw in
bootm_load_os().
It duplicates images->os for convenience. However, the code handling
"kernel_noload" images then updates the load address in the copy with
the value lmb_alloc_mem() returned. Later there's another call to
lmb_alloc_mem() that uses the old value. This leads to havoc due
to subsequent calls of lmb_alloc_mem() picking too low addresses.
The "fix" is to mark the local variable const to avoid accidental
assignments. This works but IMO the logic is still flawed somehow as
this leads to overlapping lmb reservations. I guess the fixed
reservation should only be done when the noload path wasn't hit.
Without the change:
+ bootm 0x40200000#qemu-arm 0x40200000#qemu-arm 0x40000000
Using 'qemu-arm' configuration
Verifying Hash Integrity ... OK
Trying 'kernel' kernel subimage
Description: Linux kernel
Created: 2026-02-24 14:10:09 UTC
Type: Kernel Image (no loading done)
Compression: gzip compressed
Data Start: 0x402000b8
Data Size: 12227440 Bytes = 11.7 MiB
Hash algo: sha256
Hash value: 7ea661fdecdd1127edd419cfbf8bff52e2d5ac55c...
Verifying Hash Integrity ... sha256+ OK
Using 'qemu-arm' configuration
Verifying Hash Integrity ... OK
Trying 'ramdisk' ramdisk subimage
Description: Initial ramdisk
Created: 2026-02-24 14:10:09 UTC
Type: RAMDisk Image
Compression: uncompressed
Data Start: 0x40da9528
Data Size: 1067114 Bytes = 1 MiB
Architecture: AArch64
OS: Linux
Load Address: unavailable
Entry Point: unavailable
Hash algo: sha256
Hash value: 2a711dcb5f58615187645ccec615c67eddcfbb3138...
Verifying Hash Integrity ... sha256+ OK
Booting using the fdt blob at 0x40000000
Working FDT set to 40000000
Uncompressing Kernel Image (no loading done) to 13a400000
Loading Ramdisk to 400fb000, end 401ff86a ... OK
device tree - allocation error
FDT creation failed!
resetting ...
Bloblist at 0 not found (err=-2)
alloc space exhausted ptr 400 limit 0
Bloblist at 0 not found (err=-2)
[reset]
After:
+ bootm 0x40200000#qemu-arm 0x40200000#qemu-arm 0x40000000
Using 'qemu-arm' configuration
Verifying Hash Integrity ... OK
Trying 'kernel' kernel subimage
Description: Linux kernel
Created: 2026-02-24 14:10:09 UTC
Type: Kernel Image (no loading done)
Compression: gzip compressed
Data Start: 0x402000b8
Data Size: 12227440 Bytes = 11.7 MiB
Hash algo: sha256
Hash value: 7ea661fdecdd1127edd419cfbf8bff52e2d5ac55ce...
Verifying Hash Integrity ... sha256+ OK
Using 'qemu-arm' configuration
Verifying Hash Integrity ... OK
Trying 'ramdisk' ramdisk subimage
Description: Initial ramdisk
Created: 2026-02-24 14:10:09 UTC
Type: RAMDisk Image
Compression: uncompressed
Data Start: 0x40da9528
Data Size: 1067114 Bytes = 1 MiB
Architecture: AArch64
OS: Linux
Load Address: unavailable
Entry Point: unavailable
Hash algo: sha256
Hash value: 2a711dcb5f58615187645ccec615c67eddcfbb3138...
Verifying Hash Integrity ... sha256+ OK
Booting using the fdt blob at 0x40000000
Working FDT set to 40000000
Uncompressing Kernel Image (no loading done) to 13a400000
Loading Ramdisk to 13a2fb000, end 13a3ff86a ... OK
Loading Device Tree to 000000013a1f8000, end 000000013a2fafff ... OK
Working FDT set to 13a1f8000
Starting kernel ...
Signed-off-by: Ludwig Nussel <ludwig.nussel@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 6 Mar 2026 16:32:50 +0000 (10:32 -0600)]
Merge patch series "fw_env: cleanup flash_write_buf()"
Rafał Miłecki <rafal@milecki.pl> says:
I found flash_write_buf() somehow more difficult to follow than needed.
Some code turned out to be inconsistent and some not really needed.
There is a set of 6 patches that should be small enough to make them easy
to review. I was wondering if I should squash patches 5 and 6 but ended up
with sending two smaller diffs.
Those changes shouldn't really change any behaviour (except for smaller mem
alloc). Let me know if there are any issues with this!
Rafał Miłecki [Sat, 21 Feb 2026 10:00:11 +0000 (11:00 +0100)]
fw_env: drop unneeded variables from flash_write_buf()
Recent cleanups made some variables redundant. Both: "blocklen" and
"erase_len" ended up being used as temporary variables used locally in
some short code paths.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Tom Rini <trini@konsulko.com>
Rafał Miłecki [Sat, 21 Feb 2026 10:00:10 +0000 (11:00 +0100)]
fw_env: move "erasesize" calculation up in a code
Calculate "erasesize" in the same place where other offsets and lengths
/ sizes are calculated. It makes code more consistent and will allow
further cleanups.
Rafał Miłecki [Sat, 21 Feb 2026 10:00:07 +0000 (11:00 +0100)]
fw_env: allocate buffer of proper size in flash_write_buf()
When dealing with env data not aligned to flash blocks flash_write_buf()
has to use an extra buffer. It reads existing flash content to it,
modifies required part and writes it back.
While reading and writing a size stored in "write_total" is used. It's
what should be used when allocating the buffer too.
In some cases allocating memory of "erase_len" size could result in
allocating too big buffer. That wouldn't break anything but it was
making code less intuitive.
Rafał Miłecki [Sat, 21 Feb 2026 10:00:06 +0000 (11:00 +0100)]
fw_env: use "erasesize" variable in writing loop
Use "erasesize" instead of "blocklen" in flash_write_buf()'s loop. This
change touches code executed for bad NAND blocks so it doesn't affect
any behaviour (for NAND flashes "blocklen" and "erasesize" are equal).
This just makes code a bit more consistent as "erasesize" is what is
used all around inside the writing loop.
The upstream devicetree am33xx.dtsi does not have a "ti,am33xx-usb"
compatible, it uses "ti,sysc-omap4" for the same node. The
implementation of ti-musb uses a wrapper driver that binds to
ti,am33xx-usb and creates new devices ti-musb-host and
ti-musb-peripheral depending on the dr_mode property.
To avoid this wrapper driver with the upstream devicetree, add
compatibles for "ti,musb-am33xx" to both ti-musb-host and
ti-musb-peripheral. Add a bind function that checks for the correct
dr_mode value and rejects binding if it is not the correct driver.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com> Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Tom Rini [Wed, 4 Mar 2026 20:25:30 +0000 (14:25 -0600)]
Merge patch series "MAINTAINERS: Update ADI ADSP platform maintainers"
Philip Molloy <philip@philipmolloy.com> says:
This series updates the maintainers for the ADI ADSP platform. It
follows Greg's series adding support for ADI ADSP SoCs.
Timesys spent years developing and maintaining Linux support for ADI
ADSP SoCs. The maintenance contract has ended and ADI has brought that
effort in-house. Additionally, Timesys was acquired by another company.
Thanks to everyone at Timesys for all of their hard work over the years!
Daniel Golle [Fri, 27 Feb 2026 01:50:46 +0000 (01:50 +0000)]
tools/atmelimage: add const qualifier to fix compiler warning
More strict checks in GCC 15 expose a new warning:
tools/atmelimage.c: In function ‘atmel_find_pmecc_parameter_in_token’:
tools/atmelimage.c:64:31: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers]
64 | param = strstr(token, "=");
| ^
cc1: all warnings being treated as errors
Add 'const' qualifier to variable 'param' to prevent build failing
due to -Werror.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Tom Rini [Wed, 4 Mar 2026 20:24:59 +0000 (14:24 -0600)]
Merge tag 'u-boot-ufs-20260304' of https://source.denx.de/u-boot/custodians/u-boot-ufs
A few fixes/missing changes for UFS:
- remove unused ufs_post_bind() declaration
- Disable UTP command timeout in slow mode
- Missing MediaTek UFS PHY Driver to be used with the UFS driver
Marek Vasut [Sun, 15 Feb 2026 14:04:55 +0000 (15:04 +0100)]
kbuild: Drop phandle from diff between base DT and U-Boot augmented DT if DEVICE_TREE_DEBUG=1
Remove the "phandle = <0x..>;" properties from the DT diff between
unpatched base DT and U-Boot augmented DT if DEVICE_TREE_DEBUG=1.
The phandle numbers are only generated by DTC, but not referenced
anywhere in the DT, because the original references are specifically
not replaced by phandle numbers when recent DTC is invoked with the
-I dts -O dts flags . The phandle number are therefore only a noise
in the diff, filter them out.
Simon Glass [Sat, 14 Feb 2026 02:47:34 +0000 (19:47 -0700)]
kbuild: unexport sub_make_done to fix child make invocations
The exported sub_make_done variable leaks into the environment of all
child processes. When make targets like tcheck spawn independent make
invocations with O=, those child makes inherit sub_make_done=1, skip
the KBUILD_OUTPUT setup and try to build in the source tree.
There is a workaround that resets sub_make_done to 0 for specific test
targets, but this isn't great since it has tolist every target that
spawns independent make invocations.
Instead, unexport sub_make_done once we are in the final make
invocation. The direct sub-make already has the value in its
environment from the export, and no further propagation is needed.
This also allows the per-target workaround to be removed.
Fixes: 27529f1cb02d ("kbuild: skip parsing pre sub-make code for recursion") Signed-off-by: Simon Glass <simon.glass@canonical.com>
Simon Glass [Fri, 13 Feb 2026 13:39:09 +0000 (06:39 -0700)]
menu: Move shortcut-key handling to bootmenu_loop()
The bootmenu_conv_key() function is shared with expo subsystem for key
input. Adding alphanumeric-to-BKEY_SHORTCUT conversion there causes expo
to swallow typed characters instead of inserting them as text, since
BKEY_SHORTCUT falls in the range that expo treats as a command key
rather than passing through.
Move the shortcut-key detection into bootmenu_loop() where it is
only used in the bootmenu context.
Fixes: 8c986521c3c9 ("cmd: bootmenu: permit to select bootmenu entry with a shortcut") Signed-off-by: Simon Glass <simon.glass@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Romain Gantois [Tue, 17 Feb 2026 09:27:52 +0000 (10:27 +0100)]
dm: core: Don't allow ofnode_to_fdt() to return NULL
The ofnode_to_fdt() function may return a NULL pointer in multiple cases.
Or, this function's return value is often passed directly to functions such
as fdt_getprop() which end up dereferencing it, thus causing a NULL pointer
exception.
Don't allow ofnode_to_fdt() to return NULL, to avoid a NULL pointer
dereference.
- Miscelanous improvements for Siemens Capricorn board.
- Convert i.MX6 IPUv3 driver to use clock framework.
- Skip voltage switching for fixed 1.8V regulator on fsl_esdhc_imx.
- Support printing imx8m pinmux.
- Enter fastboot on USB boot by default on phycore-imx93.
- Use arch override for env_get_location() on imx95.
common/memsize.c: Fix get_ram_size() original data restore
The get_ram_size() function fails to restore the original RAM data when
the data cache is enabled. This issue was observed on an AM625 R5 SPL
with 512MB of RAM and is a regression that became visible with
commit bc07851897bd ("board: ti: Pull redundant DDR functions to a common
location and Fixup DDR size when ECC is enabled").
Observed boot failure messages:
Warning: Did not detect image signing certificate. Skipping authentication to prevent boot failure. This will fail on Security Enforcing(HS-SE) devices
Authentication passed
Starting ATF on ARM64 core...
The system then hangs. This indicates that without a data cache flush,
data in the cache is not coherent with RAM, preventing the system from
booting. This was verified by printing the content of this address when
the issue occurs.
Add a data cache flush after each restore operation to resolve this
issue.
Fixes: bc07851897bd ("board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled") Fixes: 1c64b98c1ec4 ("common/memsize.c: Fix get_ram_size() when cache is enabled") Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com> Reviewed-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Tested-by: Francesco Dolcini <francesco.dolcini@toradex.com> # Toradex Verdin AM62
Padmarao Begari [Wed, 26 Nov 2025 15:06:41 +0000 (16:06 +0100)]
ufs: Disable UTP command timeout in slow mode
When the UFS controller is operating in slow (PWM) mode,
the driver is disabled the timeout for UTP send commands.
In high-speed mode, the timeout remains enabled to
detect stalled or failed transfers. This change ensures reliable
operation in slow mode, where command completion may take longer
and timeouts are not required.
arm: imx: imx95: Use arch override for env_get_location()
Like commit b9e48705e0b6 ("arm: imx: imx9: Use arch override for
env_get_location()"), use arch-level implementation here so that
env_get_location() can be used on board-level.
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Peng Fan [Wed, 25 Feb 2026 01:29:36 +0000 (09:29 +0800)]
pinctrl: nxp: imx9: Guard pinctrl match table with CONFIG_IMX9[X]
The i.MX9 pinctrl match table currently lists all SoC compatibles
unconditionally, which may lead to unused entries being included when
building for specific SoC variants. Guard each compatible entry with
the corresponding CONFIG_IMX9[X] option so only the required SoC
entries are compiled in, which reduces unnecessary data.
Peng Fan [Wed, 25 Feb 2026 01:29:35 +0000 (09:29 +0800)]
pinctrl: nxp: imx91: Support print pin muxing
Add support for printing pin names and current mux configuration on i.MX91
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX91
pads.
Peng Fan [Wed, 25 Feb 2026 01:29:33 +0000 (09:29 +0800)]
pinctrl: nxp: imx93: Rename to imx9
We are going to add pinctrl data support for both i.MX93 and i.MX91.
Since these SoCs share the same pinctrl driver structure, rename
pinctrl-imx93.c to a more generic pinctrl-imx9.c and update all related
variable and function names accordingly.
This prepares the driver for supporting additional i.MX9 family SoCs.
Peng Fan [Wed, 25 Feb 2026 01:29:32 +0000 (09:29 +0800)]
pinctrl: nxp: imx8m: Guard pinctrl match table with CONFIG_IMX8M[X]
The i.MX8M pinctrl match table currently lists all SoC compatibles
unconditionally, which may lead to unused entries being included when
building for specific SoC variants. Guard each compatible entry with
the corresponding CONFIG_IMX8M[X] option so only the required SoC
entries are compiled in, which reduces unnecessary data.
projects / thirdparty / u-boot.git / log
