backport: re PR middle-end/62103 (Incorrect folding of bitfield in a union on big endian targets)
2014-08-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
Backport from mainline
2014-08-12 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
PR middle-end/62103
* gimple-fold.c (fold_ctor_reference): Don't fold in presence of
bitfields, that is when size doesn't match the size of type or the
size of the constructor.
gcc/testsuite/
PR middle-end/62103
* gcc.c-torture/execute/bitfld-6.c: New test.
Michael Meissner [Tue, 12 Aug 2014 19:29:57 +0000 (19:29 +0000)]
backport: constraints.md (wh constraint): New constraint, for FP registers if direct move is available.
2014-08-12 Michael Meissner <meissner@linux.vnet.ibm.com>
Backport patch from mainline
2014-08-11 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/constraints.md (wh constraint): New constraint,
for FP registers if direct move is available.
(wi constraint): New constraint, for VSX/FP registers that can
handle 64-bit integers.
(wj constraint): New constraint for VSX/FP registers that can
handle 64-bit integers for direct moves.
(wk constraint): New constraint for VSX/FP registers that can
handle 64-bit doubles for direct moves.
(wy constraint): Make documentation match implementation.
* config/rs6000/rs6000.c (struct rs6000_reg_addr): Add
scalar_in_vmx_p field to simplify tests of whether SFmode or
DFmode can go in the Altivec registers.
(rs6000_hard_regno_mode_ok): Use scalar_in_vmx_p field.
(rs6000_setup_reg_addr_masks): Likewise.
(rs6000_debug_print_mode): Add debug support for scalar_in_vmx_p
field, and wh/wi/wj/wk constraints.
(rs6000_init_hard_regno_mode_ok): Setup scalar_in_vmx_p field, and
the wh/wi/wj/wk constraints.
(rs6000_preferred_reload_class): If SFmode/DFmode can go in the
upper registers, prefer VSX registers unless the operation is a
memory operation with REG+OFFSET addressing.
* config/rs6000/vsx.md (VSr mode attribute): Add support for
DImode. Change SFmode to use ww constraint instead of d to allow
SF registers in the upper registers.
(VSr2): Likewise.
(VSr3): Likewise.
(VSr5): Fix thinko in comment.
(VSa): New mode attribute that is an alternative to wa, that
returns the VSX register class that a mode can go in, but may not
be the preferred register class.
(VS_64dm): New mode attribute for appropriate register classes for
referencing 64-bit elements of vectors for direct moves and normal
moves.
(VS_64reg): Likewise.
(vsx_mov<mode>): Change wa constraint to <VSa> to limit the
register allocator to only registers the data type can handle.
(vsx_le_perm_load_<mode>): Likewise.
(vsx_le_perm_store_<mode>): Likewise.
(vsx_xxpermdi2_le_<mode>): Likewise.
(vsx_xxpermdi4_le_<mode>): Likewise.
(vsx_lxvd2x2_le_<mode>): Likewise.
(vsx_lxvd2x4_le_<mode>): Likewise.
(vsx_stxvd2x2_le_<mode>): Likewise.
(vsx_add<mode>3): Likewise.
(vsx_sub<mode>3): Likewise.
(vsx_mul<mode>3): Likewise.
(vsx_div<mode>3): Likewise.
(vsx_tdiv<mode>3_internal): Likewise.
(vsx_fre<mode>2): Likewise.
(vsx_neg<mode>2): Likewise.
(vsx_abs<mode>2): Likewise.
(vsx_nabs<mode>2): Likewise.
(vsx_smax<mode>3): Likewise.
(vsx_smin<mode>3): Likewise.
(vsx_sqrt<mode>2): Likewise.
(vsx_rsqrte<mode>2): Likewise.
(vsx_tsqrt<mode>2_internal): Likewise.
(vsx_fms<mode>4): Likewise.
(vsx_nfma<mode>4): Likewise.
(vsx_eq<mode>): Likewise.
(vsx_gt<mode>): Likewise.
(vsx_ge<mode>): Likewise.
(vsx_eq<mode>_p): Likewise.
(vsx_gt<mode>_p): Likewise.
(vsx_ge<mode>_p): Likewise.
(vsx_xxsel<mode>): Likewise.
(vsx_xxsel<mode>_uns): Likewise.
(vsx_copysign<mode>3): Likewise.
(vsx_float<VSi><mode>2): Likewise.
(vsx_floatuns<VSi><mode>2): Likewise.
(vsx_fix_trunc<mode><VSi>2): Likewise.
(vsx_fixuns_trunc<mode><VSi>2): Likewise.
(vsx_x<VSv>r<VSs>i): Likewise.
(vsx_x<VSv>r<VSs>ic): Likewise.
(vsx_btrunc<mode>2): Likewise.
(vsx_b2trunc<mode>2): Likewise.
(vsx_floor<mode>2): Likewise.
(vsx_ceil<mode>2): Likewise.
(vsx_<VS_spdp_insn>): Likewise.
(vsx_xscvspdp): Likewise.
(vsx_xvcvspuxds): Likewise.
(vsx_float_fix_<mode>2): Likewise.
(vsx_set_<mode>): Likewise.
(vsx_extract_<mode>_internal1): Likewise.
(vsx_extract_<mode>_internal2): Likewise.
(vsx_extract_<mode>_load): Likewise.
(vsx_extract_<mode>_store): Likewise.
(vsx_splat_<mode>): Likewise.
(vsx_xxspltw_<mode>): Likewise.
(vsx_xxspltw_<mode>_direct): Likewise.
(vsx_xxmrghw_<mode>): Likewise.
(vsx_xxmrglw_<mode>): Likewise.
(vsx_xxsldwi_<mode>): Likewise.
(vsx_xscvdpspn): Tighten constraints to only use register classes
the types use.
(vsx_xscvspdpn): Likewise.
(vsx_xscvdpspn_scalar): Likewise.
* config/rs6000/rs6000.h (enum rs6000_reg_class_enum): Add wh, wi,
wj, and wk constraints.
(GPR_REG_CLASS_P): New helper macro for register classes targeting
general purpose registers.
* config/rs6000/rs6000.md (f32_dm): Use wh constraint for SDmode
direct moves.
(zero_extendsidi2_lfiwz): Use wj constraint for direct move of
DImode instead of wm. Use wk constraint for direct move of DFmode
instead of wm.
(extendsidi2_lfiwax): Likewise.
(lfiwax): Likewise.
(lfiwzx): Likewise.
(movdi_internal64): Likewise.
* doc/md.texi (PowerPC and IBM RS6000): Document wh, wi, wj, and
wk constraints. Make the wy constraint documentation match them
implementation.
Jason Merrill [Fri, 1 Aug 2014 18:33:54 +0000 (14:33 -0400)]
re PR c++/59823 (conversion operator to const X& causes copy-construction of temporary)
PR c++/59823
Core DR 1138
* call.c (reference_binding): Pass LOOKUP_NO_TEMP_BIND for
list-initialization. A conversion to rvalue ref that involves
an lvalue-rvalue conversion is bad.
(convert_like_real): Give helpful error message.
Jason Merrill [Fri, 1 Aug 2014 18:33:47 +0000 (14:33 -0400)]
re PR c++/59956 (internal compiler error: unexpected expression ‘P_S’ of kind template_parm_index)
PR c++/59956
* friend.c (do_friend): Pass the TEMPLATE_DECL to add_friend if we
have a friend template in a class template.
* pt.c (tsubst_friend_function): Look through it.
(push_template_decl_real): A friend member template is
primary.
Jason Merrill [Fri, 1 Aug 2014 18:33:41 +0000 (14:33 -0400)]
re PR c++/60241 (internal compiler error: in finish_member_declaration, at cp/semantics.c:2617)
PR c++/60241
* pt.c (lookup_template_class_1): Update DECL_TEMPLATE_INSTANTIATIONS
of the partial instantiation, not the most general template.
(maybe_process_partial_specialization): Reassign everything on
that list.
Jason Merrill [Fri, 1 Aug 2014 18:33:35 +0000 (14:33 -0400)]
re PR c++/60361 (unexpected 'use of parameter outside function body' error)
PR c++/60361
* parser.c (cp_parser_template_id): Don't set up a CPP_TEMPLATE_ID
if re-parsing might succeed.
* semantics.c (finish_id_expression): Use of a parameter outside
the function body is a parse error.
backport: re PR tree-optimization/61375 (ICE in int_cst_value at -O3 in tree-ssa pass when compiling a reference to an __int128 value)
2014-08-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
Backport from mainline
2014-06-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
PR tree-optimization/61375
* tree-ssa-math-opts.c (find_bswap_or_nop_1): Cancel optimization if
symbolic number cannot be represented in an unsigned HOST_WIDE_INT.
(execute_optimize_bswap): Cancel optimization if CHAR_BIT != 8.
gcc/testsuite/
PR tree-optimization/61375
* gcc.c-torture/execute/pr61375-1.c: New test.
Richard Biener [Fri, 1 Aug 2014 07:40:01 +0000 (07:40 +0000)]
re PR tree-optimization/61964 (krb5 database propagation enters infinite loop; reduced test case)
2014-08-01 Richard Biener <rguenther@suse.de>
PR tree-optimization/61964
* tree-ssa-tail-merge.c (gimple_operand_equal_value_p): New
function merged from trunk.
(gimple_equal_p): Handle non-SSA LHS solely by structural
equality.
* gcc.dg/torture/pr61964.c: New testcase.
* gcc.dg/pr51879-18.c: XFAIL.
* config/rs6000/rs6000-protos.h (rs6000_special_adjust_field_align_p):
Add prototype.
* config/rs6000/rs6000.c (rs6000_special_adjust_field_align_p): New
function. Issue -Wpsabi warning if future GCC releases will use
different field alignment rules for this type.
* config/rs6000/sysv4.h (ADJUST_FIELD_ALIGN): Call it.
* config/rs6000/linux64.h (ADJUST_FIELD_ALIGN): Likewise.
* config/rs6000/freebsd64.h (ADJUST_FIELD_ALIGN): Likewise.
gcc/testsuite/
* gcc.target/powerpc/ppc64-abi-warn-3.c: New test.
rs6000.c (rs6000_function_arg_boundary): Issue -Wpsabi note when encountering a type where future GCC releases will...
gcc/
* config/rs6000/rs6000.c (rs6000_function_arg_boundary): Issue
-Wpsabi note when encountering a type where future GCC releases
will apply different alignment requirements.
gcc/testsuite/
* gcc.target/powerpc/ppc64-abi-warn-2.c: New test.
rs6000.c (rs6000_function_arg): If a float argument does not fit fully into floating-point registers...
gcc/
* config/rs6000/rs6000.c (rs6000_function_arg): If a float argument
does not fit fully into floating-point registers, and there is still
space in the register parameter area, issue -Wpsabi note that the ABI
will change in a future GCC release.
gcc/testsuite/
* gcc.target/powerpc/ppc64-abi-warn-1.c: New test.
Paul Thomas [Sat, 19 Jul 2014 14:31:06 +0000 (14:31 +0000)]
re PR fortran/61780 (Wrong code when shifting elements of a multidimensional array)
2014-07-19 Paul Thomas <pault@gcc.gnu.org>
PR fortran/61780
* dependency.c (gfc_dep_resolver): Index the 'reverse' array so
that elements are skipped. This then correctly aligns 'reverse'
with the scalarizer loops.
2014-07-19 Paul Thomas <pault@gcc.gnu.org>
PR fortran/61780
* gfortran.dg/dependency_44.f90 : New test
Richard Biener [Thu, 17 Jul 2014 07:49:44 +0000 (07:49 +0000)]
re PR rtl-optimization/61801 (sched2 miscompiles syscall sequence with -g)
2014-07-17 Richard Biener <rguenther@suse.de>
PR rtl-optimization/61801
* sched-deps.c (sched_analyze_2): For ASM_OPERANDS and
ASM_INPUT don't set reg_pending_barrier if it appears in a
debug-insn.
Jakub Jelinek [Fri, 4 Jul 2014 08:37:39 +0000 (10:37 +0200)]
re PR tree-optimization/61684 (ICE at -Os and above on x86_64-linux-gnu in tree check: expected ssa_name, have addr_expr in recognize_single_bit_test, at tree-ssa-ifcombine.c:238)
PR tree-optimization/61684
* tree-ssa-ifcombine.c (recognize_single_bit_test): Make sure
rhs1 of conversion is a SSA_NAME before using SSA_NAME_DEF_STMT on it.
2014-06-30 Thomas Preud'homme <thomas.preudhomme@arm.com>
Backport from mainline
2014-06-20 Jakub Jelinek <jakub@redhat.com>
2014-06-11 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
PR tree-optimization/61306
* tree-ssa-math-opts.c (struct symbolic_number): Store type of
expression instead of its size.
(do_shift_rotate): Adapt to change in struct symbolic_number. Return
false to prevent optimization when the result is unpredictable due to
arithmetic right shift of signed type with highest byte is set.
(verify_symbolic_number_p): Adapt to change in struct symbolic_number.
(find_bswap_1): Likewise. Return NULL to prevent optimization when the
result is unpredictable due to sign extension.
(find_bswap): Adapt to change in struct symbolic_number.
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