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3 weeks agoMerge tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 21 Jul 2025 15:04:38 +0000 (17:04 +0200)] 
Merge tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

STM32 DT for v6.17, round 1

Highlights:
----------

- MPU:
  - STM32MP13:
    -Add Ethernet MAC adress efuse support.

  - STMP32MP15:
    - Add stm32mp157f-DK2 board support. This board embedds the same
      conectivity devices, DDR ... than stm32mp157c-dk2.
      However there are two differences: STM32MP157F SoC which allows
      overdrive OPP and the SCMI support for system features like
      clocks and regulators.

  - STM32MP25:
    - Fix tick timer for low power use cases.
    - Add timer support.

* tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  arm64: dts: st: remove empty line in stm32mp251.dtsi
  arm64: dts: st: fix timer used for ticks
  arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver
  ARM: dts: stm32: add stm32mp157f-dk2 board support
  dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible
  ARM: dts: stm32: optee async notif interrupt for MP15 scmi variants
  ARM: dts: stm32: use internal regulators bindings for MP15 scmi variants
  dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers
  ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx
  ARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs
  ARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx
  arm64: defconfig: enable STM32 timers drivers
  arm64: dts: st: add timer nodes on stm32mp257f-ev1
  arm64: dts: st: add timer pins for stm32mp257f-ev1
  arm64: dts: st: add timer nodes on stm32mp251
  ARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses

Link: https://lore.kernel.org/r/b3e3363b-1ea5-457c-b244-2cbe26f7d6e4@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 weeks agoMerge tag 'v6.17-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Mon, 21 Jul 2025 15:03:14 +0000 (17:03 +0200)] 
Merge tag 'v6.17-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

New boards: ROC-RK3588S-PC, Luckfox Omni3576, Radxa Rock 5T,
Sakura Pi RK3308B - all of them have the used soc in their name.

New overlays: RockPro64 screen, optional Sige5 Wifi/BT module,
ethernet-switch addon for Jaguar.

Added peripherals on rk3528 (spi, power-domain controller, gpu)
and sdio controller on rk3576.

DSI display support for the Gameforce-ACE handheld, a fix for the
cover-detection (closed/open) on the PineNote, camera support for
the Haikou Video Demo overlay on PX30 Ringneck as well as a number
of other newly enabled peripherals on a number of boards.

* tag 'v6.17-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (40 commits)
  arm64: dts: rockchip: Enable eMMC HS200 mode on Radxa E20C
  arm64: dts: rockchip: Add bluetooth support to ArmSoM Sige7
  arm64: dts: rockchip: enable PCIe on ROCK 4D
  arm64: dts: rockchip: Enable HDMI receiver on CM3588
  arm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 on rk3576
  arm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576
  arm64: dts: rockchip: add DTs for Firefly ROC-RK3588S-PC
  dt-bindings: arm: rockchip: Add Firefly ROC-RK3588S-PC
  arm64: dts: rockchip: Enable GPU on Radxa E20C
  arm64: dts: rockchip: Add GPU node for RK3528
  arm64: dts: rockchip: support camera module on Haikou Video Demo on PX30 Ringneck
  arm64: dts: rockchip: add label to first port of ISP on px30
  arm64: dts: rockchip: fix endpoint dtc warning for PX30 ISP
  arm64: dts: rockchip: Add power controller for RK3528
  arm64: dts: rockchip: enable USB on Sige5
  arm64: dts: rockchip: add overlay for the WiFi/BT module on Sige5 v1.2
  arm64: dts: rockchip: add version-independent WiFi/BT nodes on Sige5
  arm64: dts: rockchip: add SDIO controller on RK3576
  arm64: dts: rockchip: Enable gpu on rk3576-evb1-v10
  arm64: dts: rockchip: Update the PinePhone Pro panel description
  ...

Link: https://lore.kernel.org/r/15465458.uLZWGnKmhe@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 weeks agoarm64: dts: nuvoton: npcm8xx: Drop the GIC "ppi-partitions" node
Rob Herring (Arm) [Thu, 10 Jul 2025 03:09:38 +0000 (12:39 +0930)] 
arm64: dts: nuvoton: npcm8xx: Drop the GIC "ppi-partitions" node

The Arm GIC "ppi-partitions" node is only relevant to GICv3 and makes no
sense for GICv2 implementations which the GIC-400 is. PPIs in GICv2 have
no CPU affinity.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250609203721.2852879-1-robh@kernel.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20250710-nuvoton-arm64-dt-v1-1-ec7db96ea507@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 weeks agoMerge tag 'aspeed-6.17-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Mon, 21 Jul 2025 15:01:43 +0000 (17:01 +0200)] 
Merge tag 'aspeed-6.17-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt

ASPEED devicetree updates for 6.17

Removed platforms:

- IBM's Swift BMC

New platforms:

- Meta's Santabarbara

  Santabarbara is a compute node with an accelerator module

- NVIDIA's GB200NVL BMC

  NVIDIA GB200 NVL72 connects 36 Grace CPUs and 72 Blackwell GPUs in an NVIDIA
  NVLink-connected, liquid-cooled, rack-scale design.

Updated BMC platforms:

- Bletchley (Meta): GPIO hog names, remove ethernet-phy node, USB PD negotiation
- Catalina (Meta): Various sensors added, MCTP support for NIC management
- Harma (Meta): Various sensors added
- System1 (IBM): IPMB and various GPIO-related updates
- Yosemite4 (Meta): GPIO names for UART mux select lines

The System1 series includes a devicetree binding patch for IPMI IPMB devices.

* tag 'aspeed-6.17-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: (34 commits)
  ARM: dts: aspeed: yosemite4: add gpio name for uart mux sel
  ARM: dts: aspeed: santabarbara: Add Meta Santabarbara BMC
  dt-bindings: arm: aspeed: add Meta Santabarbara board
  ARM: dts: aspeed: bletchley: enable USB PD negotiation
  ARM: dts: aspeed: lanyang: Fix 'lable' typo in LED nodes
  ARM: dts: aspeed: harma: add mmc health
  ARM: dts: aspeed: Harma: revise gpio bride pin for battery
  ARM: dts: aspeed: harma: add ADC128D818 for voltage monitoring
  ARM: dts: aspeed: harma: add fan board I/O expander
  ARM: dts: aspeed: harma: add E1.S power monitor
  ARM: dts: aspeed: catalina: Enable MCTP for frontend NIC management
  ARM: dts: aspeed: Add device tree for Nvidia's GB200NVL BMC
  dt-bindings: arm: aspeed: add Nvidia's GB200NVL BMC
  ARM: dts: aspeed: catalina: Enable MCTP support for NIC management
  ARM: dts: aspeed: catalina: Update CBC FRU EEPROM I2C bus and address
  ARM: dts: aspeed: catalina: Enable multi-master on additional I2C buses
  ARM: dts: aspeed: catalina: Remove INA238 and INA230 nodes
  ARM: dts: aspeed: catalina: Add second source HSC node support
  ARM: dts: aspeed: catalina: Add second source fan controller support
  ARM: dts: aspeed: catalina: Add fan controller support
  ...

Link: https://lore.kernel.org/r/36d50489cac1fbae01ec699b742f6c6c459a01cb.camel@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 weeks agoMerge tag 'renesas-dts-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Mon, 21 Jul 2025 15:00:32 +0000 (17:00 +0200)] 
Merge tag 'renesas-dts-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.17 (take two)

  - Add support for the Renesas Gray Hawk Single board with R-Car
    V4M-7 (R8A779H2),
  - Add eMMC and microSD expansion board support for the RZ/V2H and
    RZ/V2N EVK development boards,
  - Add GPIO keys and Ethernet support for the RZ/G3E SoM and SMARC
    Carrier-II EVK development board,
  - Add QSPI FLASH support for the RZ/V2H and RZ/V2N SoCs and their EVK
    development boards,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable serial NOR FLASH
  arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable serial NOR FLASH
  arm64: dts: renesas: r9a09g057: Add XSPI node
  arm64: dts: renesas: r9a09g056: Add XSPI node
  arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Fix pinctrl node name for GBETH1
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Fix pinctrl node name for GBETH1
  arm64: dts: renesas: r8a779g3-sparrow-hawk-fan-pwm: Add missing install target
  arm64: dts: renesas: rzg3e-smarc-som: Enable eth{0-1} (GBETH) interfaces
  arm64: dts: renesas: r9a09g047e57-smarc: Add gpio keys
  arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2H and RZ/V2N EVKs
  arm64: dts: renesas: r8a779h2: Add Gray Hawk Single support
  arm64: dts: renesas: Add Renesas R8A779H2 SoC support
  arm64: dts: renesas: Factor out Gray Hawk Single board support
  dt-bindings: clock: renesas,r9a09g056/57-cpg: Add XSPI core clock

Link: https://lore.kernel.org/r/cover.1752090401.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 weeks agoMerge tag 'renesas-dt-bindings-for-v6.17-tag2' of https://git.kernel.org/pub/scm...
Arnd Bergmann [Mon, 21 Jul 2025 15:00:03 +0000 (17:00 +0200)] 
Merge tag 'renesas-dt-bindings-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DT binding updates for v6.17 (take two)

  - Document support for the Renesas Gray Hawk Single board with R-Car
    V4M-7 (R8A779H2).

* tag 'renesas-dt-bindings-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: soc: renesas: Document R-Car V4M-7 Gray Hawk Single

Link: https://lore.kernel.org/r/cover.1752090400.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 weeks agoMerge tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 21 Jul 2025 14:59:37 +0000 (16:59 +0200)] 
Merge tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM64 changes for v6.17

1. New SoC - Exynos2200 SoC - with basic nodes, pin controllers,
   clock controllers and initial USB support.  Add board using it:
   Samsung Galaxy S22+ (SM-S906B), called G0S.

2. ExynosAutov920: Add CMU_HSI2 clock controller, remaining SPI nodes

3. Google GS101:
   - Prepare to switching to architected timer, instead of Exynos MCT as
     the primary one.
   - Add secondary Maxim MAX77759 PMIC to Pixel boards, managing USB Type-C and
     charger.
   - Add incomplete description of the primary Samsung S2MPG10 PMIC.
     Several bits, like regulators, are still missing, though.
   - Add also secondary reboot-mode, via MAX77759 NVMEM.
   - Switch the primary (SoC) reboot handler to Google specific
     google,gs101-reboot which gives additional GS101 features (cold and
     warm reboots).
     This change will affect other users of this DTS, but to our
     knowledge there is only Android, from which this change originates.

4. Exynos7870:
   - Fix speed problems in USB gadget mode.
   - Correct memory map to avoid crashes due to secure world.

* tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos7870-j6lte: reduce memory ranges to base amount
  arm64: dts: exynos7870-on7xelte: reduce memory ranges to base amount
  arm64: dts: exynos7870: add quirk to disable USB2 LPM in gadget mode
  arm64: dts: exynos: gs101: switch to gs101 specific reboot
  arm64: dts: exynos: gs101-pixel-common: add main PMIC node
  arm64: dts: exynos: gs101: ufs: add dma-coherent property
  arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-mode
  arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-mode
  arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC
  arm64: dts: exynos5433: Align i2c-gpio node names with dtschema
  arm64: dts: exynos: gs101: Add 'local-timer-stop' to cpuidle nodes
  arm64: dts: exynosautov920: Add DT node for all SPI ports
  arm64: dts: exynosautov920: add CMU_HSI2 clock DT nodes
  MAINTAINERS: add entry for Samsung Exynos2200 SoC
  arm64: dts: exynos: add initial support for Samsung Galaxy S22+
  arm64: dts: exynos: add initial support for exynos2200 SoC
  dt-bindings: arm: samsung: document g0s board binding

Link: https://lore.kernel.org/r/20250709191523.171359-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 weeks agoMerge tag 'samsung-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Arnd Bergmann [Mon, 21 Jul 2025 14:59:03 +0000 (16:59 +0200)] 
Merge tag 'samsung-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM changes for v6.17

Just few cleanups based on dtbs_check.

* tag 'samsung-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: s5pv210: Align i2c-gpio node names with dtschema
  ARM: dts: exynos: Align i2c-gpio node names with dtschema

Link: https://lore.kernel.org/r/20250709191523.171359-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 weeks agoMerge tag 'dt-vt8500-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Arnd Bergmann [Mon, 21 Jul 2025 14:58:30 +0000 (16:58 +0200)] 
Merge tag 'dt-vt8500-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt

VT8500 DTS ARM changes for v6.17

1. Several dtbs_check cleanups.
2. Add missing cache topology - L2 cache controller on WM8850/WM895.

* tag 'dt-vt8500-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
  ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950
  ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller
  ARM: dts: vt8500: Use generic node name for the SD/MMC controller
  ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size
  ARM: dts: vt8500: Add node address and reg in CPU nodes

Link: https://lore.kernel.org/r/20250709184800.168462-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 weeks agoarm64: dts: st: remove empty line in stm32mp251.dtsi
Patrick Delaunay [Thu, 15 May 2025 13:12:40 +0000 (15:12 +0200)] 
arm64: dts: st: remove empty line in stm32mp251.dtsi

Remove unnecessary empty line in stm32mp251.dtsi

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250515151238.2.Ia426b4ef1d1200247a950ef9abd54a94dc520acb@changeid
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
4 weeks agoarm64: dts: st: fix timer used for ticks
Patrick Delaunay [Thu, 15 May 2025 13:12:39 +0000 (15:12 +0200)] 
arm64: dts: st: fix timer used for ticks

Remove always-on on generic ARM timer as the clock source provided by
STGEN is deactivated in low power mode, STOP1 by example.

Fixes: 5d30d03aaf78 ("arm64: dts: st: introduce stm32mp25 SoCs family")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250515151238.1.I85271ddb811a7cf73532fec90de7281cb24ce260@changeid
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
4 weeks agoarm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable serial NOR FLASH
Lad Prabhakar [Fri, 4 Jul 2025 14:08:23 +0000 (15:08 +0100)] 
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable serial NOR FLASH

Enable MT25QU512ABB8E12 FLASH connected to XSPI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250704140823.163572-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable serial NOR FLASH
Lad Prabhakar [Fri, 4 Jul 2025 14:08:22 +0000 (15:08 +0100)] 
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable serial NOR FLASH

Enable MT25QU512ABB8E12 FLASH connected to XSPI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250704140823.163572-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: r9a09g057: Add XSPI node
Lad Prabhakar [Fri, 4 Jul 2025 14:08:21 +0000 (15:08 +0100)] 
arm64: dts: renesas: r9a09g057: Add XSPI node

Add XSPI node to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250704140823.163572-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: r9a09g056: Add XSPI node
Lad Prabhakar [Fri, 4 Jul 2025 14:08:20 +0000 (15:08 +0100)] 
arm64: dts: renesas: r9a09g056: Add XSPI node

Add XSPI node to RZ/V2N ("R9A09G056") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250704140823.163572-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoMerge tag 'renesas-r9a09g057-dt-binding-defs-tag4' into renesas-dts-for-v6.17
Geert Uytterhoeven [Tue, 8 Jul 2025 10:06:13 +0000 (12:06 +0200)] 
Merge tag 'renesas-r9a09g057-dt-binding-defs-tag4' into renesas-dts-for-v6.17

Renesas RZ/V2N and RZ/V2H XSPI Clock DT Binding Definitions

Expanded Serial Peripheral Interface (XSPI) clock DT binding definitions
for the Renesas RZ/V2N (R9A09G056) and RZ/V2H (R9A09G057) SoCs, shared
by driver and DT source files.

4 weeks agoarm64: dts: renesas: r9a09g056n48-rzv2n-evk: Fix pinctrl node name for GBETH1
Lad Prabhakar [Thu, 3 Jul 2025 23:55:44 +0000 (00:55 +0100)] 
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Fix pinctrl node name for GBETH1

Rename the GBETH1 pinctrl node from "eth0" to "eth1" to avoid duplicate
node names in the DT and correctly reflect the label "eth1_pins".

Fixes: f111192baa80 ("arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable GBETH")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250703235544.715433-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: r9a09g057h44-rzv2h-evk: Fix pinctrl node name for GBETH1
Lad Prabhakar [Thu, 3 Jul 2025 23:55:43 +0000 (00:55 +0100)] 
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Fix pinctrl node name for GBETH1

Rename the GBETH1 pinctrl node from "eth0" to "eth1" to avoid duplicate
node names in the DT and correctly reflect the label "eth1_pins".

Fixes: 802292ee27a7 ("arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable GBETH")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250703235544.715433-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: r8a779g3-sparrow-hawk-fan-pwm: Add missing install target
Niklas Söderlund [Tue, 1 Jul 2025 11:26:08 +0000 (13:26 +0200)] 
arm64: dts: renesas: r8a779g3-sparrow-hawk-fan-pwm: Add missing install target

The target to consider the dtbo file for installation is missing, add
it.

Fixes: a719915e76f2 ("arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20250701112612.3957799-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: rzg3e-smarc-som: Enable eth{0-1} (GBETH) interfaces
John Madieu [Wed, 2 Jul 2025 00:57:06 +0000 (02:57 +0200)] 
arm64: dts: renesas: rzg3e-smarc-som: Enable eth{0-1} (GBETH) interfaces

Enable the Gigabit Ethernet Interfaces (GBETH) populated on the RZ/G3E SMARC EVK

Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250702005706.1200059-5-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: r9a09g047e57-smarc: Add gpio keys
Biju Das [Wed, 2 Jul 2025 09:27:53 +0000 (10:27 +0100)] 
arm64: dts: renesas: r9a09g047e57-smarc: Add gpio keys

RZ/G3E SMARC EVK  has 3 user buttons called USER_SW1, USER_SW2 and
USER_SW3 and SLEEP button with NMI support. Add a DT node in device tree
to instantiate the gpio-keys driver for these buttons.

The system can enter into STR state by pressing the sleep button and
wakeup from STR is done by pressing power button. The USER_SW{1,2,3}
configured as wakeup-source, so it can wakeup the system during s2idle.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250702092755.70847-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 weeks agoarm64: dts: exynos7870-j6lte: reduce memory ranges to base amount
Kaustabh Chakraborty [Thu, 26 Jun 2025 07:32:58 +0000 (13:02 +0530)] 
arm64: dts: exynos7870-j6lte: reduce memory ranges to base amount

The device is available in multiple variants with differing RAM
capacities. The memory range defined in the 0x80000000 bank exceeds the
address range of the memory controller, which eventually leads to ARM
SError crashes. Reduce the bank size to a value which is available to
all devices.

The bootloader must be responsible for identifying the RAM capacity and
editing the memory node accordingly.

Fixes: d6f3a7f91fdb ("arm64: dts: exynos: add initial devicetree support for exynos7870")
Cc: stable@vger.kernel.org # v6.16
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Link: https://lore.kernel.org/r/20250626-exynos7870-dts-fixes-v1-3-349987874d9a@disroot.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
5 weeks agoarm64: dts: exynos7870-on7xelte: reduce memory ranges to base amount
Kaustabh Chakraborty [Thu, 26 Jun 2025 07:32:57 +0000 (13:02 +0530)] 
arm64: dts: exynos7870-on7xelte: reduce memory ranges to base amount

The device is available in multiple variants with differing RAM
capacities. The memory range defined in the 0x80000000 bank exceeds the
address range of the memory controller, which eventually leads to ARM
SError crashes. Reduce the bank size to a value which is available to
all devices.

The bootloader must be responsible for identifying the RAM capacity and
editing the memory node accordingly.

Fixes: d6f3a7f91fdb ("arm64: dts: exynos: add initial devicetree support for exynos7870")
Cc: stable@vger.kernel.org # v6.16
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Link: https://lore.kernel.org/r/20250626-exynos7870-dts-fixes-v1-2-349987874d9a@disroot.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
5 weeks agoarm64: dts: exynos7870: add quirk to disable USB2 LPM in gadget mode
Kaustabh Chakraborty [Thu, 26 Jun 2025 07:32:56 +0000 (13:02 +0530)] 
arm64: dts: exynos7870: add quirk to disable USB2 LPM in gadget mode

In gadget mode, USB connections are sluggish. The device won't send
packets to the host unless the host sends packets to the device. For
instance, SSH-ing through the USB network would apparently not work
unless you're flood-pinging the device's IP.

Add the property snps,usb2-gadget-lpm-disable to the dwc3 node, which
seems to solve this issue.

Fixes: d6f3a7f91fdb ("arm64: dts: exynos: add initial devicetree support for exynos7870")
Cc: stable@vger.kernel.org # v6.16
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Link: https://lore.kernel.org/r/20250626-exynos7870-dts-fixes-v1-1-349987874d9a@disroot.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
5 weeks agoarm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver
Patrice Chotard [Mon, 30 Jun 2025 08:44:53 +0000 (10:44 +0200)] 
arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver

Enable STM32 OctoSPI driver.
Enable STM32 Octo Memory Manager (OMM) driver which is needed
for OSPI usage on STM32MP257F-EV1 board.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20250630-upstream_omm_ospi_defconfig-v11-1-6e934fabe698@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: add stm32mp157f-dk2 board support
Amelie Delaunay [Tue, 3 Jun 2025 09:02:13 +0000 (11:02 +0200)] 
ARM: dts: stm32: add stm32mp157f-dk2 board support

STM32MP157F-DK2 board embeds a STM32MP157F SoC. This SoC contains the same
level of feature than a STM32MP157C SOC but A7 clock frequency can reach
800MHz, hence the inclusion of the newly introduced stm32mp15xf.dtsi.

As for other latest STM32 MPU families, STM32MP157F-DK2 relies on OP-TEE
SCMI services for SoC clock and reset controllers resources, and for PMIC,
now under OP-TEE control. That's why stm32mp157f-dk2-scmi.dtsi is
introduced, to move all clocks, resets and regulators to SCMI-based ones.

To "disable" SCMI, just need to comment stm32mp157f-dk2-scmi.dtsi inclusion
and to replace &scmi_v3v3 with &v3v3, then to disable arm_wdt and to enable
i2c4 and its subnodes for PMIC support by Linux. Reconfigure usbotg for
dual role with type-C support if needed.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-7-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agodt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible
Himanshu Bhavani [Tue, 3 Jun 2025 09:02:12 +0000 (11:02 +0200)] 
dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible

Add the "st,stm32mp157f-dk2" compatible string to the STM32 SoC
bindings. The MP157F is functionally similar to the MP157C.

Signed-off-by: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-6-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: optee async notif interrupt for MP15 scmi variants
Etienne Carriere [Tue, 3 Jun 2025 09:02:11 +0000 (11:02 +0200)] 
ARM: dts: stm32: optee async notif interrupt for MP15 scmi variants

Define the interrupt used by OP-TEE async notif on stm32mp15 scmi based
platforms.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-5-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: use internal regulators bindings for MP15 scmi variants
Amelie Delaunay [Tue, 3 Jun 2025 09:02:10 +0000 (11:02 +0200)] 
ARM: dts: stm32: use internal regulators bindings for MP15 scmi variants

Use the SCMI voltage domain bindings for internal regulators on stm32mp15.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-4-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agodt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers
Etienne Carriere [Tue, 3 Jun 2025 09:02:09 +0000 (11:02 +0200)] 
dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers

These bindings will be used for the SCMI voltage domain.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-3-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx
Amelie Delaunay [Tue, 3 Jun 2025 09:02:08 +0000 (11:02 +0200)] 
ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx

Adopt generic node name 'typec' for stusb1600, which is the USB Type-C
controller on stm32mp157x Discovery Kits.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-2-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs
Alexandre Torgue [Tue, 3 Jun 2025 09:02:07 +0000 (11:02 +0200)] 
ARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs

This commit creates new file to manage security features and supported OPP
on STM32MP15xF SOCs. On STM32MP15xY, "Y" gives information:
 -Y = A means no cryp IP and no secure boot + A7-CPU@650MHz.
 -Y = C means cryp IP + optee + secure boot + A7-CPU@650MHz.
 -Y = D means no cryp IP and no secure boot + A7-CPU@800MHz.
 -Y = F means cryp IP + optee + secure boot + A7-CPU@800MHz.

It fullfills the initial STM32MP15x SoC diversity introduced by
commit 0eda69b6c5f9 ("ARM: dts: stm32: Manage security diversity
for STM32M15x SOCs").

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-1-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx
Olivier Moysan [Wed, 21 May 2025 15:04:18 +0000 (17:04 +0200)] 
ARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx

The commit 5725bce709db
("ASoC: simple-card-utils: Unify clock direction by clk_direction")
corrupts the audio on STM32MP15 DK sound cards.
The parent clock is not correctly set, because set_sai_ck_rate() is not
executed in stm32_sai_set_sysclk() callback.
This occurs because set_sysclk() is called with the wrong direction,
SND_SOC_CLOCK_IN instead of SND_SOC_CLOCK_OUT.

Add system-clock-direction-out property in SAI2A endpoint node of
STM32MP15XX-DKX device tree, to specify the MCLK clock direction.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Link: https://lore.kernel.org/r/20250521150418.488152-1-olivier.moysan@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoarm64: defconfig: enable STM32 timers drivers
Fabrice Gasnier [Fri, 10 Jan 2025 09:19:19 +0000 (10:19 +0100)] 
arm64: defconfig: enable STM32 timers drivers

Enable the STM32 timer drivers: MFD, counter, PWM and trigger as module.
These drivers can be used on STM32MP25.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250110091922.980627-6-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoarm64: dts: st: add timer nodes on stm32mp257f-ev1
Fabrice Gasnier [Fri, 10 Jan 2025 09:19:22 +0000 (10:19 +0100)] 
arm64: dts: st: add timer nodes on stm32mp257f-ev1

Configure timer nodes on stm32mp257f-ev1:
- Timer3 CH2 is available on mikroBUS connector for PWM
- timer8 CH1, timer8 CH4, timer10 CH1 and timer12 CH2 are available
  on EXPANSION connector.
Timers are kept disabled by default, so the pins can be used for any
other purpose (and the timers can be assigned to any of the processors).
Arbitrary choice is to use all these timers as PWM (or counter on
internal clock signal), except for timer10 that is configured with
CH1 as an input (for capture).

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250110091922.980627-9-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoarm64: dts: st: add timer pins for stm32mp257f-ev1
Fabrice Gasnier [Fri, 10 Jan 2025 09:19:21 +0000 (10:19 +0100)] 
arm64: dts: st: add timer pins for stm32mp257f-ev1

Add timer pins available on stm32mp257f-ev1, configured for PWM:
- timer3 CH2 is available on mikroBUS connector
- timer8 CH1, timer8 CH4, timer10 CH1 and timer12 CH2 are available
  on EXPANSION connector
Arbitrary define all these pins to be used as PWM (output) channels,
except for timer10 CH1, to be used as counter input.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250110091922.980627-8-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoarm64: dts: st: add timer nodes on stm32mp251
Fabrice Gasnier [Fri, 10 Jan 2025 09:19:20 +0000 (10:19 +0100)] 
arm64: dts: st: add timer nodes on stm32mp251

Add timers support on STM32MP25 SoC. Use dedicated compatible to handle
new features and instances introduced with this SoC. STM32MP25 SoC has
various timer flavours, each group has its own specific feature list:
- Advanced-control timers (TIM1/TIM8/TIM20)
- General-purpose timers (TIM2/TIM3/TIM4/TIM5)
- Basic timers (TIM6/TIM7)
- General-purpose timers (TIM10/TIM11/TIM12/TIM13/TIM14)
- General purpose timers (TIM15/TIM16/TIM17)

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250110091922.980627-7-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses
Uwe Kleine-König [Fri, 28 Mar 2025 17:14:05 +0000 (18:14 +0100)] 
ARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses

The efuse device tree description already has the two labels pointing to
the efuse nodes that specify the mac-addresses to be used. Wire them up
to the ethernet nodes. This is enough to make barebox pick the right
mac-addresses and pass them to Linux.

Suggested-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://lore.kernel.org/r/20250328171406.3307778-2-u.kleine-koenig@baylibre.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: aspeed: yosemite4: add gpio name for uart mux sel
Marshall Zhan [Mon, 30 Jun 2025 07:31:37 +0000 (15:31 +0800)] 
ARM: dts: aspeed: yosemite4: add gpio name for uart mux sel

Add gpio line name to support multiplexed console

Signed-off-by: Marshall Zhan <marshall_zhan@wiwynn.com>
Link: https://patch.msgid.link/20250630073138.3315947-1-marshall_zhan@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: santabarbara: Add Meta Santabarbara BMC
Fred Chen [Wed, 25 Jun 2025 07:38:38 +0000 (15:38 +0800)] 
ARM: dts: aspeed: santabarbara: Add Meta Santabarbara BMC

Add linux device tree entry related to the Meta (Facebook) compute node
system using an AST2600 BMC.

This node is named "Santabarbara". It is a compute node with accelerator
module. The system monitors voltage and temperature for the CPU, switch,
and NIC components on the motherboard and switch board.

Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
Link: https://patch.msgid.link/20250625073847.4054971-3-fredchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agodt-bindings: arm: aspeed: add Meta Santabarbara board
Fred Chen [Wed, 25 Jun 2025 07:38:37 +0000 (15:38 +0800)] 
dt-bindings: arm: aspeed: add Meta Santabarbara board

Document the new compatibles used on Facebook Santabarbara.

Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
Link: https://patch.msgid.link/20250625073847.4054971-2-fredchen.openbmc@gmail.com
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: bletchley: enable USB PD negotiation
Cosmo Chou [Sun, 22 Jun 2025 03:42:47 +0000 (11:42 +0800)] 
ARM: dts: aspeed: bletchley: enable USB PD negotiation

- Enable USB Power Delivery with revision 2.0 for all sleds
- Configure dual power/data roles with sink preference

Signed-off-by: Cosmo Chou <chou.cosmo@gmail.com>
Link: https://patch.msgid.link/20250622034247.3985727-1-chou.cosmo@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: lanyang: Fix 'lable' typo in LED nodes
Ankit Chauhan [Thu, 12 Jun 2025 07:50:57 +0000 (13:20 +0530)] 
ARM: dts: aspeed: lanyang: Fix 'lable' typo in LED nodes

Fix an obvious spelling error in the DTS file for the Lanyang BMC
("lable" -> "label"). This was reported by bugzilla a few years ago
but never got fixed.

Reported-by: Jens Schleusener <Jens.Schleusener@fossies.org>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=205891
Signed-off-by: Ankit Chauhan <ankitchauhan2065@gmail.com>
Link: https://patch.msgid.link/20250612075057.80433-1-ankitchauhan2065@gmail.com
[arj: Replace U+2192 with '->']
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: harma: add mmc health
Peter Yin [Wed, 11 Jun 2025 08:05:14 +0000 (16:05 +0800)] 
ARM: dts: aspeed: harma: add mmc health

Add a GPIO expander node at address 0x13 on i2c11 bus
to monitor MMC health status via a dedicated GPIO line.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://patch.msgid.link/20250611080514.3123335-6-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: Harma: revise gpio bride pin for battery
Peter Yin [Wed, 11 Jun 2025 08:05:13 +0000 (16:05 +0800)] 
ARM: dts: aspeed: Harma: revise gpio bride pin for battery

Update the GPIO bridge pin configuration for the battery circuit
on the Harma platform to reflect the correct hardware design.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://patch.msgid.link/20250611080514.3123335-5-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: harma: add ADC128D818 for voltage monitoring
Peter Yin [Wed, 11 Jun 2025 08:05:12 +0000 (16:05 +0800)] 
ARM: dts: aspeed: harma: add ADC128D818 for voltage monitoring

Add the ADC128D818 device to I2C bus 29 to support voltage monitoring
on the Harma platform. This enables accurate measurement of system
voltages through the onboard ADC.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://patch.msgid.link/20250611080514.3123335-4-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: harma: add fan board I/O expander
Peter Yin [Wed, 11 Jun 2025 08:05:11 +0000 (16:05 +0800)] 
ARM: dts: aspeed: harma: add fan board I/O expander

Add GPIO I/O expander node for the fan board to detect and monitor
fan board status.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://patch.msgid.link/20250611080514.3123335-3-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: harma: add E1.S power monitor
Peter Yin [Wed, 11 Jun 2025 08:05:10 +0000 (16:05 +0800)] 
ARM: dts: aspeed: harma: add E1.S power monitor

Add the E1.S power monitor device node to the Harma device tree
to enable power monitoring functionality for E1.S drives.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://patch.msgid.link/20250611080514.3123335-2-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: catalina: Enable MCTP for frontend NIC management
Potin Lai [Tue, 10 Jun 2025 17:02:09 +0000 (01:02 +0800)] 
ARM: dts: aspeed: catalina: Enable MCTP for frontend NIC management

Add the `mctp-controller` property and MCTP nodes to enable support for
frontend NIC management via PLDM over MCTP.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250611-catalina-mctp-i2c-10-15-v1-1-2a882e461ed9@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoMerge tag 'arm-soc/for-6.17/devicetree-arm64' of https://github.com/Broadcom/stblinux...
Arnd Bergmann [Thu, 3 Jul 2025 15:12:48 +0000 (17:12 +0200)] 
Merge tag 'arm-soc/for-6.17/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt

This pull request contains Broadcom ARM64-based SoCs Device Tree updates
for 6.17, please pull the following:

- Linus updates the 64-bit BCMBCA SoCs Device Tree with the common
  peripherals that exit as well as correct IRQ assignments

- Andrea adds support for the RP1 companion chip on the Raspberry Pi 5
  systems with clocks, gpios, pinctrl, all of that using an overlay to
  describe those peripherals

- Rob drops the interrupt-parent property from the GICv2M node on
  Northstar2 SoCs

* tag 'arm-soc/for-6.17/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: northstar2: Drop GIC V2M "interrupt-parent"
  arm64: dts: broadcom: Add overlay for RP1 device
  arm64: dts: broadcom: Add board DTS for Rpi5 which includes RP1 node
  arm64: dts: bcm2712: Add external clock for RP1 chipset on Rpi5
  arm64: dts: rp1: Add support for RaspberryPi's RP1 device
  dt-bindings: misc: Add device specific bindings for RaspberryPi RP1
  dt-bindings: pinctrl: Add RaspberryPi RP1 gpio/pinctrl/pinmux bindings
  dt-bindings: clock: Add RaspberryPi RP1 clock bindings
  ARM64: dts: bcm63158: Add BCMBCA peripherals
  ARM64: dts: bcm6858: Add BCMBCA peripherals
  ARM64: dts: bcm6856: Add BCMBCA peripherals
  ARM64: dts: bcm4908: Add BCMBCA peripherals

Link: https://lore.kernel.org/r/20250630190216.1518354-3-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
5 weeks agoMAINTAINERS: Switch ASPEED tree to shared BMC repository
Andrew Jeffery [Wed, 2 Jul 2025 01:23:54 +0000 (10:53 +0930)] 
MAINTAINERS: Switch ASPEED tree to shared BMC repository

We now have a shared repo with write access provided to M:s for the
ASPEED SoCs.

Cc: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
5 weeks agoARM: dts: lpc32xx: Add #pwm-cells property to the two SoC PWMs
Uwe Kleine-König [Tue, 1 Jul 2025 14:58:03 +0000 (16:58 +0200)] 
ARM: dts: lpc32xx: Add #pwm-cells property to the two SoC PWMs

If these PWMs are to be used, a #pwm-cells property is necessary. The
right location for that is in the SoC's dtsi file to not make
machine.dts files repeat the value for each usage. Currently the
machines based on nxp/lpc/lpc32xx.dtsi don't make use of the PWMs, so
there are no properties to drop there.

Reviewed-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
5 weeks agoMerge tag 'arm-soc/for-6.17/devicetree' of https://github.com/Broadcom/stblinux into...
Arnd Bergmann [Thu, 3 Jul 2025 15:06:46 +0000 (17:06 +0200)] 
Merge tag 'arm-soc/for-6.17/devicetree' of https://github.com/Broadcom/stblinux into soc/dt

This pull request contains Broadcom ARM-based SoCs Device Tree updates
for 6.17, please pull the following:

- Linus makes a number of updates to the BCMBCA SoCs Device Tree files
  to correct UART interrupt numbers, add interrupts to the RNG block,
  and leverage the fact that all SoCs have the same peripherals at the
  same aperture

- Uwe corrects the Merakia MX6X DTS file to have #pwm-cells = 3 as per
  the binding

* tag 'arm-soc/for-6.17/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: bcm958625-meraki-mx6x: Use #pwm-cells = <3>
  ARM: dts: bcm63178: Add BCMBCA peripherals
  ARM: dts: bcm63148: Add BCMBCA peripherals
  ARM: dts: bcm63138: Add BCMBCA peripherals
  ARM: dts: bcm6878: Add BCMBCA peripherals
  ARM: dts: bcm6855: Add BCMBCA peripherals
  ARM: dts: bcm6846: Add interrupt to RNG
  dt-bindings: rng: r200: Add interrupt property
  ARM: dts: bcm6878: Correct UART0 IRQ number

Link: https://lore.kernel.org/r/20250630190216.1518354-2-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
5 weeks agoMerge tag 'renesas-dts-for-v6.17-tag1' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Thu, 3 Jul 2025 14:54:28 +0000 (16:54 +0200)] 
Merge tag 'renesas-dts-for-v6.17-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.17

  - Add SPI FLASH, camera, and Ethernet support on the RZ/G3E SoC and/or
    the RZ/G3E SoM and SMARC Carrier-II EVK development board,
  - Add Ethernet, USB2, and PMIC support on the RZ/V2H and RZ/V2N SoCs
    and EVK boards,
  - Add timer, I2C, watchdog, and GPU support on the RZ/V2N SoC and the
    RZ/V2N EVK board,
  - Add debug LED support for the RZN1D-DB development board,
  - Improve PCIe clock description on the Retronix Sparrow Hawk board,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.17-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
  arm64: dts: renesas: r9a09g047: Add GBETH nodes
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Rename fixed regulator node names
  arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add RAA215300 PMIC
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add RAA215300 PMIC
  arm64: dts: renesas: rcar-gen3: Add bootph-all to sysinfo EEPROMs
  arm64: dts: renesas: sparrow-hawk: Describe split PCIe clock
  arm64: dts: renesas: r8a779g0: Describe PCIe root ports
  arm64: dts: renesas: ebisu: Add CAN0 support
  ARM: dts: renesas: r9a06g032: Add second clock input to RTC
  arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB2.0 support
  arm64: dts: renesas: r9a09g056: Add USB2.0 support
  arm64: dts: renesas: r8a779g3-sparrow-hawk: Sort DTS
  ARM: dts: renesas: r9a06g032-rzn1d400-db: Describe debug LEDs
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB2.0 support
  PCI/pwrctrl: Add optional slot clock for PCI slots
  arm64: dts: renesas: r9a09g057: Add USB2.0 support
  arm64: dts: renesas: r9a09g047e57-smarc: Enable CRU, CSI support
  arm64: dts: renesas: renesas-smarc2: Enable I2C0 node
  arm64: dts: renesas: r9a09g047e57-smarc: Add I2C0 pincontrol
  arm64: dts: renesas: r9a09g047: Add CRU, CSI2 nodes
  ...

Link: https://lore.kernel.org/r/cover.1751026664.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
5 weeks agoMerge tag 'renesas-dt-bindings-for-v6.17-tag1' of https://git.kernel.org/pub/scm...
Arnd Bergmann [Thu, 3 Jul 2025 14:53:58 +0000 (16:53 +0200)] 
Merge tag 'renesas-dt-bindings-for-v6.17-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DT binding updates for v6.17

  - Document more board part numbers.

* tag 'renesas-dt-bindings-for-v6.17-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: soc: renesas: Document RZ/T2H Evaluation Board part number
  dt-bindings: soc: renesas: Document RZ/V2H EVK board part number

Link: https://lore.kernel.org/r/cover.1751026663.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
5 weeks agoarm64: dts: cavium: thunder2: Add missing PL011 "uartclk"
Rob Herring (Arm) [Mon, 9 Jun 2025 21:57:06 +0000 (16:57 -0500)] 
arm64: dts: cavium: thunder2: Add missing PL011 "uartclk"

The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The
Thunder2 SoC is missing the core "uartclk". In this case, the Linux
driver uses single clock for both clock inputs. Let's assume that's how
the h/w is wired and make the DT reflect that.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250609215706.3009692-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
5 weeks agoarm64: dts: lg: Add missing PL011 "uartclk"
Rob Herring (Arm) [Mon, 9 Jun 2025 21:54:57 +0000 (16:54 -0500)] 
arm64: dts: lg: Add missing PL011 "uartclk"

The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The
LG131x SoCs are missing the core "uartclk". In this case, the Linux
driver uses single clock for both clock inputs. Let's assume that's how
the h/w is wired and make the DT reflect that.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Chanho Min <chanho.min@lge.com>
Link: https://lore.kernel.org/r/20250609-dt-lg-fixes-v1-2-e210e797c2d7@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
5 weeks agoarm64: dts: lg: Refactor common LG1312 and LG1313 parts
Rob Herring (Arm) [Mon, 9 Jun 2025 21:54:56 +0000 (16:54 -0500)] 
arm64: dts: lg: Refactor common LG1312 and LG1313 parts

The LG1312 and LG1313 DT are almost identical with the exception of the
ethernet node. Refactor the common parts into a separate .dtsi file and
include it.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Chanho Min <chanho.min@lge.com>
Link: https://lore.kernel.org/r/20250609-dt-lg-fixes-v1-1-e210e797c2d7@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
5 weeks agoarm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2H and RZ/V2N EVKs
Lad Prabhakar [Fri, 27 Jun 2025 19:37:42 +0000 (20:37 +0100)] 
arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2H and RZ/V2N EVKs

Introduce device tree overlays for supporting the eMMC (RTK0EF0186B02000BJ)
and microSD (RTK0EF0186B01000BJ) sub-boards connected via the CN15
connector on the RZ/V2H and RZ/V2N evaluation kits.

These overlays enable SDHI0 with appropriate pin control settings, power
regulators, and GPIO handling. Both sub-boards are supported using shared
overlay files that can be applied to either EVK due to their identical
connector layout and interface support.

To support this, new DT overlay files are added:
- `rzv2-evk-cn15-emmc.dtso` for eMMC
- `rzv2-evk-cn15-sd.dtso` for microSD

Additionally, the base DTS files for both EVKs are updated to include a
fixed 1.8V regulator (`reg_1p8v`) needed by the eMMC sub-board and
potential future use cases such as HDMI output.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250627193742.110818-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 weeks agoarm64: dts: renesas: r8a779h2: Add Gray Hawk Single support
Geert Uytterhoeven [Thu, 26 Jun 2025 09:51:35 +0000 (11:51 +0200)] 
arm64: dts: renesas: r8a779h2: Add Gray Hawk Single support

The Gray Hawk Single board with R-Car V4M-7 (R8A779H2) uses an updated
version of the R-Car V4M (R8A779H0) SoC.

For now, there are no visible differences compared to the variant
equipped with an R-Car V4M (R8A779H0) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/d2e0e7b746063368b83148100aa553cff55b8b60.1750931027.git.geert+renesas@glider.be
5 weeks agoarm64: dts: renesas: Add Renesas R8A779H2 SoC support
Tam Nguyen [Thu, 26 Jun 2025 09:51:34 +0000 (11:51 +0200)] 
arm64: dts: renesas: Add Renesas R8A779H2 SoC support

Add support for the Renesas R-Car V4M-7 (R8A779H2) SoC, which is
an updated version of the R-Car V4M (R8A779H0) SoC.

Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/294ca4211c5a73942dc2ca04ae6d3c384d534f2b.1750931027.git.geert+renesas@glider.be
5 weeks agoarm64: dts: renesas: Factor out Gray Hawk Single board support
Geert Uytterhoeven [Thu, 26 Jun 2025 09:51:33 +0000 (11:51 +0200)] 
arm64: dts: renesas: Factor out Gray Hawk Single board support

Move the common parts for the Renesas Gray Hawk Single board to
gray-hawk-single.dtsi, to enable future reuse.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/a3e89836fde8073ac320734cec67f89ddfa8879a.1750931027.git.geert+renesas@glider.be
5 weeks agodt-bindings: soc: renesas: Document R-Car V4M-7 Gray Hawk Single
Geert Uytterhoeven [Thu, 26 Jun 2025 09:51:32 +0000 (11:51 +0200)] 
dt-bindings: soc: renesas: Document R-Car V4M-7 Gray Hawk Single

Document the compatible values for the Renesas R-Car V4M-7
(R8A779H2) SoC, as used on the Renesas Gray Hawk Single board.
R-Car V4M-7 is an updated version of R-Car V4M (R8A779H0).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/b4283a68aa01c82d4435ee8334093dcbdf5bd4d2.1750931027.git.geert+renesas@glider.be
5 weeks agodt-bindings: clock: renesas,r9a09g056/57-cpg: Add XSPI core clock
Lad Prabhakar [Fri, 27 Jun 2025 20:42:32 +0000 (21:42 +0100)] 
dt-bindings: clock: renesas,r9a09g056/57-cpg: Add XSPI core clock

Add XSPI core clock definitions to the clock bindings for the Renesas
R9A09G056 and R9A09G057 SoCs. These clocks IDs are used to support XSPI
interface.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250627204237.214635-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 weeks agoarm64: dts: rockchip: Enable eMMC HS200 mode on Radxa E20C
Jonas Karlman [Sat, 21 Jun 2025 16:58:30 +0000 (16:58 +0000)] 
arm64: dts: rockchip: Enable eMMC HS200 mode on Radxa E20C

eMMC HS200 mode (1.8V I/O) is supported by the MMC host controller on
RK3528 and works with the optional on-board eMMC module on Radxa E20C.

Be explicit about HS200 support in the device tree for Radxa E20C.

Fixes: 3a01b5f14a8a ("arm64: dts: rockchip: Enable onboard eMMC on Radxa E20C")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250621165832.2226160-1-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
6 weeks agoarm64: dts: rockchip: Add bluetooth support to ArmSoM Sige7
Jianfeng Liu [Sat, 21 Jun 2025 13:53:14 +0000 (21:53 +0800)] 
arm64: dts: rockchip: Add bluetooth support to ArmSoM Sige7

ArmSoM Sige7 has onboard AP6275P Wi-Fi6 (PCIe) and BT5 (UART) module
which is similar with Khadas Edge2. This commit enables bluetooth
at uart6.

Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Link: https://lore.kernel.org/r/20250621135319.61766-1-liujianfeng1994@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
6 weeks agoarm64: dts: rockchip: enable PCIe on ROCK 4D
Nicolas Frattaroli [Sat, 21 Jun 2025 14:37:55 +0000 (16:37 +0200)] 
arm64: dts: rockchip: enable PCIe on ROCK 4D

The RADXA ROCK 4D board has a PCIe controller connected to a flat flex
connector, compatible with the one the RPi5 uses.

Enable the associated combphy and pcie controller node, as well as add
the remaining pinctrl definition for the reset.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250621-rk3576-rock4d-pcie-v1-1-2b33c9f12955@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
6 weeks agoarm64: dts: rockchip: Enable HDMI receiver on CM3588
Valentin Hăloiu [Sun, 22 Jun 2025 18:58:12 +0000 (19:58 +0100)] 
arm64: dts: rockchip: Enable HDMI receiver on CM3588

Enable support for the HDMI input port found on FriendlyElec CM3588 and
CM3588 Plus.

Signed-off-by: Valentin Hăloiu <valentin.haloiu@gmail.com>
Link: https://lore.kernel.org/r/20250622185814.35031-1-valentin.haloiu@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
6 weeks agoarm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 on rk3576
Cristian Ciocaltea [Wed, 11 Jun 2025 21:47:49 +0000 (00:47 +0300)] 
arm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 on rk3576

Since commit c871a311edf0 ("phy: rockchip: samsung-hdptx: Setup TMDS
char rate via phy_configure_opts_hdmi"), the workaround of passing the
rate from DW HDMI QP bridge driver via phy_set_bus_width() became
partially broken, as it cannot reliably handle mode switches anymore.

Attempting to fix this up at PHY level would not only introduce
additional hacks, but it would also fail to adequately resolve the
display issues that are a consequence of the system CRU limitations.

Instead, proceed with the solution already implemented for RK3588: make
use of the HDMI PHY PLL as a better suited DCLK source for VOP2. This
will not only address the aforementioned problem, but it should also
facilitate the proper operation of display modes up to 4K@60Hz.

It's worth noting that anything above 4K@30Hz still requires high TMDS
clock ratio and scrambling support, which hasn't been mainlined yet.

Fixes: d74b842cab08 ("arm64: dts: rockchip: Add vop for rk3576")
Cc: stable@vger.kernel.org
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Tested-By: Detlev Casanova <detlev.casanova@collabora.com>
Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250612-rk3576-hdmitx-fix-v1-3-4b11007d8675@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
6 weeks agoarm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576
Cristian Ciocaltea [Wed, 11 Jun 2025 21:47:48 +0000 (00:47 +0300)] 
arm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576

As with the RK3588 SoC, the HDMI PHY PLL on RK3576 can be used as a more
accurate pixel clock source for VOP2, which is actually mandatory to
ensure proper support for display modes handling.

Add the missing #clock-cells property to allow using the clock provider
functionality of HDMI PHY.

Fixes: ad0ea230ab2a ("arm64: dts: rockchip: Add hdmi for rk3576")
Cc: stable@vger.kernel.org
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250612-rk3576-hdmitx-fix-v1-2-4b11007d8675@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
6 weeks agoarm64: dts: exynos: gs101: switch to gs101 specific reboot
André Draszik [Fri, 27 Jun 2025 13:29:32 +0000 (14:29 +0100)] 
arm64: dts: exynos: gs101: switch to gs101 specific reboot

gs101 (Google Pixel 6 and Pixel 6 Pro) supports cold- and warm-reboot.
Cold-reset is useful because it is more secure, e.g. wiping all RAM
contents, while the warm-reboot allows RAM contents to be retained
across the reboot, e.g. to collect potential crash information.

Add the required DT changes to switch to the gs101-specific reboot
method, which knows how to issue either reset as requested by the OS.

The PMIC plays a role in this as well, so mark it as
'system-power-controller', which in this case ensures that the device
will wake up again after a cold-reboot, ensuring the full power-cycle
is successful.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20250627-gs101-reboot3-v1-3-c3ae49657b1f@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
6 weeks agoarm64: dts: exynos: gs101-pixel-common: add main PMIC node
André Draszik [Fri, 27 Jun 2025 13:29:31 +0000 (14:29 +0100)] 
arm64: dts: exynos: gs101-pixel-common: add main PMIC node

On Pixel 6 (and Pro), a Samsung S2MPG10 is used as main PMIC, which
contains the following functional blocks:
    * common / speedy interface
    * regulators
    * 3 clock outputs
    * RTC
    * power meters
    * GPIO interfaces

This change enables the PMIC itself and the RTC. We're still working on
the remaining parts or waiting for bindings to be merged, hence only a
small subset of the functional is being enabled.

The regulators fall into the same category (still being finalised), but
since the binding requires a 'regulators' node, an empty node is being
added to avoid validation errors at this stage.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20250627-gs101-reboot3-v1-2-c3ae49657b1f@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
6 weeks agoarm64: dts: exynos: gs101: ufs: add dma-coherent property
Peter Griffin [Fri, 14 Mar 2025 15:38:02 +0000 (15:38 +0000)] 
arm64: dts: exynos: gs101: ufs: add dma-coherent property

ufs-exynos driver configures the sysreg shareability as
cacheable for gs101 so we need to set the dma-coherent
property so the descriptors are also allocated cacheable.

This fixes the UFS stability issues we have seen with
the upstream UFS driver on gs101.

Fixes: 4c65d7054b4c ("arm64: dts: exynos: gs101: Add ufs and ufs-phy dt nodes")
Cc: stable@vger.kernel.org
Suggested-by: Will McVicker <willmcvicker@google.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Tested-by: Will McVicker <willmcvicker@google.com>
Tested-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20250314-ufs-dma-coherent-v1-1-bdf9f9be2919@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
6 weeks agoarm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-mode
André Draszik [Sat, 24 May 2025 05:21:31 +0000 (06:21 +0100)] 
arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-mode

On gs101, the boot mode is stored both in a syscon register, and in
nvmem.

Add the dm-verity-device-corrupted reboot mode to the syscon-reboot-
based boot mode as well, as both (nvmem & syscon) modes should be in
sync.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20250524-b4-max77759-mfd-dts-v2-4-b479542eb97d@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
6 weeks agoarm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-mode
André Draszik [Sat, 24 May 2025 05:21:30 +0000 (06:21 +0100)] 
arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-mode

Add the 'nvmem-reboot-mode' which is used to communicate a requested
boot mode to the boot loader.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20250524-b4-max77759-mfd-dts-v2-3-b479542eb97d@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
6 weeks agoarm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC
André Draszik [Sat, 24 May 2025 05:21:29 +0000 (06:21 +0100)] 
arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC

On Pixel 6 (and Pro), a MAX77759 companion PMIC for USB Type-C
applications is used, which contains four functional blocks (at
distinct I2C addresses):
  * top (including GPIO & NVMEM)
  * charger
  * fuel gauge
  * TCPCi

This change adds the PMIC and the subnodes for the GPIO expander and
NVMEM, and defines the NVMEM layout.

The NVMEM layout is declared such that it matches downstream's
open-coded configuration [1].

Note:
The pinctrl nodes are kept sorted by the 'samsung,pins' property rather
than node name, as I think that makes it easier to look at and to add
new nodes unambiguously in the future. Its label is prefixed with 'if'
(for interface), because there are three PMICs in total in use on
Pixel 6 (Pro).

Link: https://android.googlesource.com/kernel/google-modules/bms/+/96e729a83817/max77759_maxq.c#67
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20250524-b4-max77759-mfd-dts-v2-2-b479542eb97d@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
6 weeks agoarm64: dts: renesas: r9a09g047: Add GBETH nodes
John Madieu [Mon, 23 Jun 2025 08:04:04 +0000 (10:04 +0200)] 
arm64: dts: renesas: r9a09g047: Add GBETH nodes

Add GBETH nodes to RZ/G3E (R9A09G047) SoC DTSI.

Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Link: https://lore.kernel.org/20250623080405.355083-3-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 weeks agoarm64: dts: renesas: r9a09g057h44-rzv2h-evk: Rename fixed regulator node names
Lad Prabhakar [Fri, 20 Jun 2025 12:10:44 +0000 (13:10 +0100)] 
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Rename fixed regulator node names

Rename "regulator0" to "regulator-0p8v" and "regulator1" to
"regulator-3p3v" for consistency as done in the RZ/V2N EVK.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250620121045.56114-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 weeks agoarm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add RAA215300 PMIC
Lad Prabhakar [Thu, 19 Jun 2025 13:55:39 +0000 (14:55 +0100)] 
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add RAA215300 PMIC

Add support for the Renesas RAA215300 PMIC to the RZ/V2N EVK. The PMIC is
connected to I2C8 and uses a 32.768kHz fixed clock source (x6).

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250619135539.207828-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 weeks agoarm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add RAA215300 PMIC
Lad Prabhakar [Thu, 19 Jun 2025 13:55:38 +0000 (14:55 +0100)] 
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add RAA215300 PMIC

Add support for the Renesas RAA215300 PMIC to the RZ/V2H EVK. The PMIC is
connected to I2C8 and uses a 32.768kHz fixed clock source (x6).

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250619135539.207828-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 weeks agoarm64: dts: exynos5433: Align i2c-gpio node names with dtschema
Krzysztof Kozlowski [Thu, 12 Jun 2025 09:55:50 +0000 (11:55 +0200)] 
arm64: dts: exynos5433: Align i2c-gpio node names with dtschema

New dtschema v2025.6 enforces different naming on I2C nodes thus new
dtbs_check warnings appeared for I2C GPIO nodes:

  exynos5433-tm2.dtb: i2c-gpio-0 (i2c-gpio):
    $nodename:0: 'i2c-gpio-0' does not match '^i2c(@.+|-[a-z0-9]+)?$'
  exynos5433-tm2.dtb: i2c-gpio-0 (i2c-gpio):
    Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'amplifier@31' were unexpected)

Rename the nodes to a generic i2c-[0-9]+ style with numbers continuing
the SoC I2C controller indexing (3 controllers) for simplicity and
obviousness, even if the SoC I2C controller is not enabled on given
board.  The names anyway would not conflict with SoC ones because of
unit addresses.

Verified with comparing two fdt (after fdtdump).

Reported-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Closes: https://lore.kernel.org/all/aCtD7BH5N_uPGkq7@shikoro/
Link: https://lore.kernel.org/r/20250612095549.77954-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
6 weeks agoARM: dts: s5pv210: Align i2c-gpio node names with dtschema
Krzysztof Kozlowski [Thu, 12 Jun 2025 09:48:09 +0000 (11:48 +0200)] 
ARM: dts: s5pv210: Align i2c-gpio node names with dtschema

New dtschema v2025.6 enforces different naming on I2C nodes thus new
dtbs_check warnings appeared for I2C GPIO nodes:

  s5pv210-fascinate4g.dtb: i2c-gpio-0 (i2c-gpio):
    $nodename:0: 'i2c-gpio-0' does not match '^i2c(@.+|-[a-z0-9]+)?$'
  s5pv210-fascinate4g.dtb: i2c-gpio-0 (i2c-gpio):
    Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'audio-codec@1a' were unexpected)

Rename the nodes to a generic i2c-[0-9]+ style with numbers continuing
the SoC I2C controller indexing (3 controllers) for simplicity and
obviousness, even if the SoC I2C controller is not enabled on given
board.  The names anyway would not conflict with SoC ones because of
unit addresses.

Verified with comparing two fdt (after fdtdump).

Reported-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Closes: https://lore.kernel.org/all/aCtD7BH5N_uPGkq7@shikoro/
Link: https://lore.kernel.org/r/20250612094807.62532-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
6 weeks agoARM: dts: exynos: Align i2c-gpio node names with dtschema
Krzysztof Kozlowski [Thu, 12 Jun 2025 09:48:08 +0000 (11:48 +0200)] 
ARM: dts: exynos: Align i2c-gpio node names with dtschema

New dtschema v2025.6 enforces different naming on I2C nodes thus new
dtbs_check warnings appeared for I2C GPIO nodes:

  exynos4212-tab3-lte8.dtb: i2c-gpio-3 (i2c-gpio):
    $nodename:0: 'i2c-gpio-3' does not match '^i2c(@.+|-[a-z0-9]+)?$'
  exynos4212-tab3-lte8.dtb: i2c-gpio-3 (i2c-gpio):
    Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'magnetometer@2e' were unexpected)

Rename the nodes to a generic i2c-[0-9]+ style with numbers continuing
the SoC I2C controller indexing (Exynos3250: 8 controllers, Exynos4: 9
controllers) for simplicity and obviousness, even if the SoC I2C
controller is not enabled on given board.  The names anyway would not
conflict with SoC ones because of unit addresses.

Verified with comparing two fdt (after fdtdump).

Reported-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Closes: https://lore.kernel.org/all/aCtD7BH5N_uPGkq7@shikoro/
Link: https://lore.kernel.org/r/20250612094807.62532-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
6 weeks agodt-bindings: soc: renesas: Document RZ/T2H Evaluation Board part number
Geert Uytterhoeven [Thu, 12 Jun 2025 15:17:35 +0000 (17:17 +0200)] 
dt-bindings: soc: renesas: Document RZ/T2H Evaluation Board part number

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/0703ecbc355164e35b90a9fe088438c821f13cd3.1749741263.git.geert+renesas@glider.be
7 weeks agoLinux 6.16-rc3 v6.16-rc3
Linus Torvalds [Sun, 22 Jun 2025 20:30:08 +0000 (13:30 -0700)] 
Linux 6.16-rc3

7 weeks agoMerge tag 'i2c-for-6.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa...
Linus Torvalds [Sun, 22 Jun 2025 17:50:36 +0000 (10:50 -0700)] 
Merge tag 'i2c-for-6.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c fixes from Wolfram Sang:

 - subsystem: convert drivers to use recent callbacks of struct
   i2c_algorithm A typical after-rc1 cleanup, which I couldn't send in
   time for rc2

 - tegra: fix YAML conversion of device tree bindings

 - k1: re-add a check which got lost during upstreaming

* tag 'i2c-for-6.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  i2c: k1: check for transfer error
  i2c: use inclusive callbacks in struct i2c_algorithm
  dt-bindings: i2c: nvidia,tegra20-i2c: Specify the required properties

7 weeks agoMerge tag 'x86_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 22 Jun 2025 17:30:44 +0000 (10:30 -0700)] 
Merge tag 'x86_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Borislav Petkov:

 - Make sure the array tracking which kernel text positions need to be
   alternatives-patched doesn't get mishandled by out-of-order
   modifications, leading to it overflowing and causing page faults when
   patching

 - Avoid an infinite loop when early code does a ranged TLB invalidation
   before the broadcast TLB invalidation count of how many pages it can
   flush, has been read from CPUID

 - Fix a CONFIG_MODULES typo

 - Disable broadcast TLB invalidation when PTI is enabled to avoid an
   overflow of the bitmap tracking dynamic ASIDs which need to be
   flushed when the kernel switches between the user and kernel address
   space

 - Handle the case of a CPU going offline and thus reporting zeroes when
   reading top-level events in the resctrl code

* tag 'x86_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/alternatives: Fix int3 handling failure from broken text_poke array
  x86/mm: Fix early boot use of INVPLGB
  x86/its: Fix an ifdef typo in its_alloc()
  x86/mm: Disable INVLPGB when PTI is enabled
  x86,fs/resctrl: Remove inappropriate references to cacheinfo in the resctrl subsystem

7 weeks agoMerge tag 'irq_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 22 Jun 2025 17:17:51 +0000 (10:17 -0700)] 
Merge tag 'irq_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq fixes from Borislav Petkov:

 - Fix missing prototypes warnings

 - Properly initialize work context when allocating it

 - Remove a method tracking when managed interrupts are suspended during
   hotplug, in favor of the code using a IRQ disable depth tracking now,
   and have interrupts get properly enabled again on restore

 - Make sure multiple CPUs getting hotplugged don't cause wrong tracking
   of the managed IRQ disable depth

* tag 'irq_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/ath79-misc: Fix missing prototypes warnings
  genirq/irq_sim: Initialize work context pointers properly
  genirq/cpuhotplug: Restore affinity even for suspended IRQ
  genirq/cpuhotplug: Rebalance managed interrupts across multi-CPU hotplug

7 weeks agoMerge tag 'perf_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 22 Jun 2025 17:11:45 +0000 (10:11 -0700)] 
Merge tag 'perf_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull perf fixes from Borislav Petkov:

 - Avoid a crash on a heterogeneous machine where not all cores support
   the same hw events features

 - Avoid a deadlock when throttling events

 - Document the perf event states more

 - Make sure a number of perf paths switching off or rescheduling events
   call perf_cgroup_event_disable()

 - Make sure perf does task sampling before its userspace mapping is
   torn down, and not after

* tag 'perf_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf/x86/intel: Fix crash in icl_update_topdown_event()
  perf: Fix the throttle error of some clock events
  perf: Add comment to enum perf_event_state
  perf/core: Fix WARN in perf_cgroup_switch()
  perf: Fix dangling cgroup pointer in cpuctx
  perf: Fix cgroup state vs ERROR
  perf: Fix sample vs do_exit()

7 weeks agoMerge tag 'locking_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 22 Jun 2025 17:09:23 +0000 (10:09 -0700)] 
Merge tag 'locking_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull locking fixes from Borislav Petkov:

 - Make sure the switch to the global hash is requested always under a
   lock so that two threads requesting that simultaneously cannot get to
   inconsistent state

 - Reject negative NUMA nodes earlier in the futex NUMA interface
   handling code

 - Selftests fixes

* tag 'locking_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  futex: Verify under the lock if hash can be replaced
  futex: Handle invalid node numbers supplied by user
  selftests/futex: Set the home_node in futex_numa_mpol
  selftests/futex: getopt() requires int as return value.

7 weeks agoMerge tag 'edac_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 22 Jun 2025 17:05:33 +0000 (10:05 -0700)] 
Merge tag 'edac_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras

Pull EDAC fixes from Borislav Petkov:

 - amd64: Correct the number of memory controllers on some AMD Zen
   clients

 - igen6: Handle firmware-disabled memory controllers properly

* tag 'edac_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
  EDAC/igen6: Fix NULL pointer dereference
  EDAC/amd64: Correct number of UMCs for family 19h models 70h-7fh

7 weeks agoMerge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Linus Torvalds [Sun, 22 Jun 2025 16:58:23 +0000 (09:58 -0700)] 
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull kvm fixes from Paolo Bonzini:
 "ARM:

   - Fix another set of FP/SIMD/SVE bugs affecting NV, and plugging some
     missing synchronisation

   - A small fix for the irqbypass hook fixes, tightening the check and
     ensuring that we only deal with MSI for both the old and the new
     route entry

   - Rework the way the shadow LRs are addressed in a nesting
     configuration, plugging an embarrassing bug as well as simplifying
     the whole process

   - Add yet another fix for the dreaded arch_timer_edge_cases selftest

  RISC-V:

   - Fix the size parameter check in SBI SFENCE calls

   - Don't treat SBI HFENCE calls as NOPs

  x86 TDX:

   - Complete API for handling complex TDVMCALLs in userspace.

     This was delayed because the spec lacked a way for userspace to
     deny supporting these calls; the new exit code is now approved"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: TDX: Exit to userspace for GetTdVmCallInfo
  KVM: TDX: Handle TDG.VP.VMCALL<GetQuote>
  KVM: TDX: Add new TDVMCALL status code for unsupported subfuncs
  KVM: arm64: VHE: Centralize ISBs when returning to host
  KVM: arm64: Remove cpacr_clear_set()
  KVM: arm64: Remove ad-hoc CPTR manipulation from kvm_hyp_handle_fpsimd()
  KVM: arm64: Remove ad-hoc CPTR manipulation from fpsimd_sve_sync()
  KVM: arm64: Reorganise CPTR trap manipulation
  KVM: arm64: VHE: Synchronize CPTR trap deactivation
  KVM: arm64: VHE: Synchronize restore of host debug registers
  KVM: arm64: selftests: Close the GIC FD in arch_timer_edge_cases
  KVM: arm64: Explicitly treat routing entry type changes as changes
  KVM: arm64: nv: Fix tracking of shadow list registers
  RISC-V: KVM: Don't treat SBI HFENCE calls as NOPs
  RISC-V: KVM: Fix the size parameter check in SBI SFENCE calls

7 weeks agoMerge tag 'v6.16-rc2-smb3-client-fixes-v2' of git://git.samba.org/sfrench/cifs-2.6
Linus Torvalds [Sun, 22 Jun 2025 16:46:11 +0000 (09:46 -0700)] 
Merge tag 'v6.16-rc2-smb3-client-fixes-v2' of git://git.samba.org/sfrench/cifs-2.6

Pull smb client fixes from Steve French:

 - Multichannel channel allocation fix for Kerberos mounts

 - Two reconnect fixes

 - Fix netfs_writepages crash with smbdirect/RDMA

 - Directory caching fix

 - Three minor cleanup fixes

 - Log error when close cached dirs fails

* tag 'v6.16-rc2-smb3-client-fixes-v2' of git://git.samba.org/sfrench/cifs-2.6:
  smb: minor fix to use SMB2_NTLMV2_SESSKEY_SIZE for auth_key size
  smb: minor fix to use sizeof to initialize flags_string buffer
  smb: Use loff_t for directory position in cached_dirents
  smb: Log an error when close_all_cached_dirs fails
  cifs: Fix prepare_write to negotiate wsize if needed
  smb: client: fix max_sge overflow in smb_extract_folioq_to_rdma()
  smb: client: fix first command failure during re-negotiation
  cifs: Remove duplicate fattr->cf_dtype assignment from wsl_to_fattr() function
  smb: fix secondary channel creation issue with kerberos by populating hostname when adding channels

7 weeks agoi2c: k1: check for transfer error
Alex Elder [Mon, 16 Jun 2025 12:51:36 +0000 (07:51 -0500)] 
i2c: k1: check for transfer error

If spacemit_i2c_xfer_msg() times out waiting for a message transfer to
complete, or if the hardware reports an error, it returns a negative
error code (-ETIMEDOUT, -EAGAIN, -ENXIO. or -EIO).

The sole caller of spacemit_i2c_xfer_msg() is spacemit_i2c_xfer(),
which is the i2c_algorithm->xfer callback function.  It currently
does not save the value returned by spacemit_i2c_xfer_msg().

The result is that transfer errors go unreported, and a caller
has no indication anything is wrong.

When this code was out for review, the return value *was* checked
in early versions.  But for some reason, that assignment got dropped
between versions 5 and 6 of the series, perhaps related to reworking
the code to merge spacemit_i2c_xfer_core() into spacemit_i2c_xfer().

Simply assigning the value returned to "ret" fixes the problem.

Fixes: 5ea558473fa31 ("i2c: spacemit: add support for SpacemiT K1 SoC")
Signed-off-by: Alex Elder <elder@riscstar.com>
Cc: <stable@vger.kernel.org> # v6.15+
Reviewed-by: Troy Mitchell <troymitchell988@gmail.com>
Link: https://lore.kernel.org/r/20250616125137.1555453-1-elder@riscstar.com
Signed-off-by: Andi Shyti <andi@smida.it>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
7 weeks agoarm64: dts: rockchip: add DTs for Firefly ROC-RK3588S-PC
Hsun Lai [Mon, 9 Jun 2025 11:30:44 +0000 (19:30 +0800)] 
arm64: dts: rockchip: add DTs for Firefly ROC-RK3588S-PC

The Firefly ROC-RK3588S-PC is a SBC based on the Rockchip RK3588s SoC.

Link: https://wiki.t-firefly.com/en/Station-M3/index.html
The device contains the following hardware that is tested/working:
 - 32 or 64GB eMMC
 - SDMMC card slot
 - Realtek USB WiFi 5/BT
 - NVME 2242 socket
 - 4 or 8GB of RAM
 - RTL8211 GbE
 - USB 3.0 port
 - USB 2.0 port
 - HDMI port

Signed-off-by: Hsun Lai <i@chainsx.cn>
Link: https://lore.kernel.org/r/20250609113044.8846-3-i@chainsx.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
7 weeks agodt-bindings: arm: rockchip: Add Firefly ROC-RK3588S-PC
Hsun Lai [Mon, 9 Jun 2025 11:30:43 +0000 (19:30 +0800)] 
dt-bindings: arm: rockchip: Add Firefly ROC-RK3588S-PC

This documents Firefly ROC-RK3588S-PC which is a SBC based on RK3588S SoC.

Link: https://wiki.t-firefly.com/en/Station-M3/index.html
Signed-off-by: Hsun Lai <i@chainsx.cn>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250609113044.8846-2-i@chainsx.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
7 weeks agoarm64: dts: rockchip: Enable GPU on Radxa E20C
Jonas Karlman [Sun, 18 May 2025 22:54:13 +0000 (22:54 +0000)] 
arm64: dts: rockchip: Enable GPU on Radxa E20C

Enable the Mali-450 MP2 GPU on the Radxa E20C.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250518225418.682182-4-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
7 weeks agoarm64: dts: rockchip: Add GPU node for RK3528
Jonas Karlman [Sun, 18 May 2025 22:54:12 +0000 (22:54 +0000)] 
arm64: dts: rockchip: Add GPU node for RK3528

Add a GPU node and a opp-table for the Mali-450 MP2 in the RK3528 SoC.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250518225418.682182-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
7 weeks agoMerge tag 'nfsd-6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/cel/linux
Linus Torvalds [Sat, 21 Jun 2025 16:20:15 +0000 (09:20 -0700)] 
Merge tag 'nfsd-6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/cel/linux

Pull nfsd fixes from Chuck Lever:

 - Two fixes for commits in the nfsd-6.16 merge

 - One fix for the recently-added NFSD netlink facility

 - One fix for a remote SunRPC crasher

* tag 'nfsd-6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/cel/linux:
  sunrpc: handle SVC_GARBAGE during svc auth processing as auth error
  nfsd: use threads array as-is in netlink interface
  SUNRPC: Cleanup/fix initial rq_pages allocation
  NFSD: Avoid corruption of a referring call list

7 weeks agoMerge tag 'erofs-for-6.16-rc3-fixes' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sat, 21 Jun 2025 16:15:08 +0000 (09:15 -0700)] 
Merge tag 'erofs-for-6.16-rc3-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs

Pull erofs fixes from Gao Xiang:

 - Use the mounter’s credentials for file-backed mounts to resolve
   Android SELinux permission issues

 - Remove the unused trace event `erofs_destroy_inode`

 - Error out on crafted out-of-file-range encoded extents

 - Remove an incorrect check for encoded extents

* tag 'erofs-for-6.16-rc3-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs:
  erofs: remove a superfluous check for encoded extents
  erofs: refuse crafted out-of-file-range encoded extents
  erofs: remove unused trace event erofs_destroy_inode
  erofs: impersonate the opener's credentials when accessing backing file