Bill Seurer [Fri, 20 May 2016 20:31:52 +0000 (20:31 +0000)]
This patch changes some of the dejagnu options to better restrict where the...
This patch changes some of the dejagnu options to better restrict
where the test cases run so that they will no longer cause failures on
power7 machines.
Based on a subsequent patch I also updated the code formatting (indentation,
etc.) for the code from the original patch (r235577) in both the test cases
and in rs6000-c.c.
[gcc]
2016-05-20 Bill Seurer <seurer@linux.vnet.ibm.com>
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Fix
code formatting in ALTIVEC_BUILTIN_VEC_ADDE section.
[gcc/testsuite]
2016-05-20 Bill Seurer <seurer@linux.vnet.ibm.com>
Nathan Sidwell [Fri, 20 May 2016 19:52:50 +0000 (19:52 +0000)]
nptx.c (nvptx_option_override): Only set flag_toplevel_reorder, if not explicitly specified.
* config/nvptx/nptx.c (nvptx_option_override): Only set
flag_toplevel_reorder, if not explicitly specified. Set
flag_no_common, unless explicitly specified.
testsuite/
* gcc.target/nvptx/uninit-decl.c: Force common storage, add
non-common cases.
* gcc.dg/tree-ssa/ssa-store-ccp-2.c: Add -fcommon.
This implements the libgccjit support for must-tail-call via
a new:
gcc_jit_rvalue_set_bool_require_tail_call
API entrypoint.
(I didn't implement a wrapper for this within the C++ bindings)
gcc/jit/ChangeLog:
* docs/topics/compatibility.rst: Add LIBGCCJIT_ABI_6.
* docs/topics/expressions.rst (Function calls): Add documentation
of gcc_jit_rvalue_set_bool_require_tail_call.
* docs/_build/texinfo/libgccjit.texi: Regenerate.
* jit-common.h (gcc::jit::recording::base_call): Add forward decl.
* jit-playback.c: Within namespace gcc::jit::playback...
(context::build_call) Add "require_tail_call" param and use it
to set CALL_EXPR_MUST_TAIL_CALL.
(context::new_call): Add "require_tail_call" param.
(context::new_call_through_ptr): Likewise.
* jit-playback.h: Within namespace gcc::jit::playback...
(context::new_call: Add "require_tail_call" param.
(context::new_call_through_ptr): Likewise.
(context::build_call): Likewise.
* jit-recording.c: Within namespace gcc::jit::recording...
(base_call::base_call): New constructor.
(base_call::write_reproducer_tail_call): New method.
(call::call): Update for inheritance from base_call.
(call::replay_into): Provide m_require_tail_call to call
to new_call.
(call::write_reproducer): Call write_reproducer_tail_call.
(call_through_ptr::call_through_ptr): Update for inheritance from
base_call.
(call_through_ptr::replay_into): Provide m_require_tail_call to call
to new_call_through_ptr.
(recording::call_through_ptr::write_reproducer): Call
write_reproducer_tail_call.
* jit-recording.h: Within namespace gcc::jit::recording...
(rvalue::dyn_cast_base_call): New virtual function.
(class base_call): New subclass of class rvalue.
(class call): Inherit from base_call rather than directly from
rvalue, moving get_precedence and m_args to base_call.
(class call_through_ptr): Likewise.
* libgccjit.c (gcc_jit_rvalue_set_bool_require_tail_call): New
function.
* libgccjit.h
(LIBGCCJIT_HAVE_gcc_jit_rvalue_set_bool_require_tail_call): New
macro.
(gcc_jit_rvalue_set_bool_require_tail_call): New function.
* libgccjit.map (LIBGCCJIT_ABI_6): New.
(gcc_jit_rvalue_set_bool_require_tail_call): Add.
gcc/testsuite/ChangeLog:
* jit.dg/all-non-failing-tests.h: Add
test-factorial-must-tail-call.c.
* jit.dg/test-error-impossible-must-tail-call.c: New test case.
* jit.dg/test-factorial-must-tail-call.c: New test case.
Uros Bizjak [Fri, 20 May 2016 17:44:29 +0000 (19:44 +0200)]
i386.c (ix86_rtx_costs): Use IS_STACK_MODE when calculating cost of standard 80387 constants.
* gcc/config/i386/i386.c (ix86_rtx_costs) <case CONST_DOUBLE>:
Use IS_STACK_MODE when calculating cost of standard 80387 constants.
Fallthru to CONST_VECTOR case to calculate cost of standard SSE
constants.
<case CONST_WIDE_INT>: Calculate cost of (MEM (SYMBOL_REF)).
(ix86_legitimate_constant_p): Use CASE_CONST_SCALAR_INT
and CASE_CONST_ANY.
is used to compile kernel. If we add another non-integer feature, it
has to be turned off. We can add a -mgeneral-regs-only option, similar
to AArch64, to disable all non-integer features so that kernel doesn't
need a long list and the same option will work for future compilers.
It can also be used to compile interrupt handler.
gcc/
PR target/70738
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET): New.
(ix86_handle_option): Disable MPX, MMX, SSE and x87 instructions
for -mgeneral-regs-only.
* config/i386/i386.c (ix86_option_override_internal): Don't
enable x87 instructions if only the general registers are
allowed.
* config/i386/i386.opt: Add -mgeneral-regs-only.
* doc/invoke.texi: Document -mgeneral-regs-only.
Bill Seurer [Fri, 20 May 2016 15:25:04 +0000 (15:25 +0000)]
This patch adds support for the signed and unsigned int versions of the...
This patch adds support for the signed and unsigned int versions of the
vec_addec altivec builtins from the Power Architecture 64-Bit ELF V2 ABI
OpenPOWER ABI for Linux Supplement (16 July 2015 Version 1.1). There are
many of the builtins that are missing and this is part of a series
of patches to add them.
There aren't instructions for the int versions of vec_addec so the
output code is built from other built-ins that do have instructions
which in this case is the following.
The new test cases are executable tests which verify that the generated
code produces expected values. C macros were used so that the same
test case could be used for both the signed and unsigned versions. An
extra executable test case is also included to ensure that the modified
support for the __int128 versions of vec_addec is not broken. The same
test case could not be used for both int and __int128 because of some
differences in loading and storing the vectors.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu and
powerpc64-unknown-linux-gnu with no regressions. Is this ok for trunk?
[gcc]
2016-05-20 Bill Seurer <seurer@linux.vnet.ibm.com>
* config/rs6000/rs6000-builtin.def (vec_addec): Change vec_addec to a
special case builtin.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
support for ALTIVEC_BUILTIN_VEC_ADDEC.
* config/rs6000/rs6000.c (altivec_init_builtins): Add definition
for __builtin_vec_addec.
[gcc/testsuite]
2016-05-20 Bill Seurer <seurer@linux.vnet.ibm.com>
* gcc.target/powerpc/vec-addec.c: New test.
* gcc.target/powerpc/vec-addec-int128.c: New test.
David Malcolm [Fri, 20 May 2016 14:20:03 +0000 (14:20 +0000)]
Implement CALL_EXPR_MUST_TAIL_CALL
This patch implements support for marking CALL_EXPRs
as being mandatory for tail-call-optimization. expand_call
tries harder to perform the optimization on such CALL_EXPRs,
and issues an error if it fails.
Currently this flag isn't accessible from any frontend,
so the patch uses a plugin for testing the functionality.
gcc/ChangeLog:
* calls.c (maybe_complain_about_tail_call): New function.
(initialize_argument_information): Call
maybe_complain_about_tail_call when clearing *may_tailcall.
(can_implement_as_sibling_call_p): Call
maybe_complain_about_tail_call when returning false.
(expand_call): Read CALL_EXPR_MUST_TAIL_CALL and, if set,
ensure try_tail_call is set. Call maybe_complain_about_tail_call
if tail-call optimization fails.
* cfgexpand.c (expand_call_stmt): Initialize
CALL_EXPR_MUST_TAIL_CALL from gimple_call_must_tail_p.
* gimple-pretty-print.c (dump_gimple_call): Dump
gimple_call_must_tail_p.
* gimple.c (gimple_build_call_from_tree): Call
gimple_call_set_must_tail with the value of
CALL_EXPR_MUST_TAIL_CALL.
* gimple.h (enum gf_mask): Add GF_CALL_MUST_TAIL_CALL.
(gimple_call_set_must_tail): New function.
(gimple_call_must_tail_p): New function.
* print-tree.c (print_node): Update printing of TREE_STATIC
to reflect its use for CALL_EXPR_MUST_TAIL_CALL.
* tree-core.h (struct tree_base): Add MUST_TAIL_CALL to the
trailing comment listing applicable flags.
* tree.h (CALL_EXPR_MUST_TAIL_CALL): New macro.
gcc/testsuite/ChangeLog:
* gcc.dg/plugin/must-tail-call-1.c: New test case.
* gcc.dg/plugin/must-tail-call-2.c: New test case.
* gcc.dg/plugin/must_tail_call_plugin.c: New file.
* gcc.dg/plugin/plugin.exp (plugin_test_list): Add the above.
David Malcolm [Fri, 20 May 2016 14:07:56 +0000 (14:07 +0000)]
Introduce can_implement_as_sibling_call_p
gcc/ChangeLog:
* calls.c (expand_call): Move "Rest of purposes for tail call
optimizations to fail" to...
(can_implement_as_sibling_call_p): ...this new function, and
split into multiple "if" statements.
* cfgloop.h (expected_loop_iterations_unbounded,
expected_loop_iterations): Unconstify.
* cfgloopanal.c (expected_loop_iterations_unbounded): Sanity check the
profile with known upper bound; return 3 when profile is absent.
(expected_loop_iterations): Update.
Jakub Jelinek [Fri, 20 May 2016 11:58:49 +0000 (13:58 +0200)]
re PR c++/71210 (internal compiler error: in assign_temp, at function.c:961)
PR c++/71210
* gimple-fold.c (gimple_fold_call): Do not remove lhs of noreturn
calls if the LHS is variable length or has addressable type.
If targets[0]->decl is a noreturn call with void return type and
zero arguments, adjust fntype and remove lhs in that case.
* g++.dg/opt/pr71210-1.C: New test.
* g++.dg/opt/pr71210-2.C: New test.
Jakub Jelinek [Fri, 20 May 2016 11:55:58 +0000 (13:55 +0200)]
re PR target/29756 (SSE intrinsics hard to use without redundant temporaries appearing)
PR tree-optimization/29756
gcc.dg/tree-ssa/vector-6.c: Add -Wno-psabi -w to dg-options.
Add -msse2 for x86 and -maltivec for powerpc. Use scan-tree-dump-times
only on selected targets where V4SImode vectors are known to be
supported.
* tree-vectorizer.c (get_vec_alignment_for_decl): New static function.
(get_vec_alignment_for_array_decl): Likewise.
(get_vec_alignment_for_record_decl): Likewise.
(increase_alignment::execute): Move code to find alignment to
get_vec_alignment_for_array_decl and call get_vec_alignment_for_decl.
(type_align_map): New hash_map.
* tree-ssa.c (non_rewritable_lvalue_p): We can rewrite
vector inserts using BIT_FIELD_REF or MEM_REF on the lhs.
(execute_update_addresses_taken): Do it.
Richard Biener [Fri, 20 May 2016 09:01:23 +0000 (09:01 +0000)]
tree-if-conv.c (add_bb_predicate_gimplified_stmts): Use gimple_seq_add_seq_without_update.
2016-05-20 Richard Biener <rguenther@suse.de>
* tree-if-conv.c (add_bb_predicate_gimplified_stmts): Use
gimple_seq_add_seq_without_update.
(release_bb_predicate): Assert we have no operands to free.
(if_convertible_loop_p_1): Calculate post dominators later.
Do not free BB predicates here.
(combine_blocks): Do not recompute BB predicates.
(version_loop_for_if_conversion): Save BB predicates around
loop versioning.
This patch restructures how the prologues/epilogues are inserted. Sibcalls
that run without prologue are now handled in shrink-wrap.c; it communicates
what is already handled by setting the EDGE_IGNORE flag. The
try_shrink_wrapping function then doesn't need to be passed the bb_flags
anymore.
* function.c (make_epilogue_seq): Remove epilogue_end parameter.
(thread_prologue_and_epilogue_insns): Remove bb_flags. Restructure
code. Ignore sibcalls on EDGE_IGNORE edges.
* shrink-wrap.c (handle_simple_exit): New function. Set EDGE_IGNORE
on edges for sibcalls that run without prologue. The rest of the
function is combined from...
(fix_fake_fallthrough_edge): ... this, and ...
(try_shrink_wrapping): ... a part of this. Remove the bb_with
function argument, make it a local variable.
gcc/
* config/i386/cygming.h (DWARF2_UNWIND_INFO): Allow
--disable-sjlj-exceptions for TARGET_BI_ARCH to select DWARF-2 EH
for 32-bit mode and SEH for 64-bit.
* config/i386/mingw32.h (SHARED_LIBGCC_UNDEFS_SPEC): Handle
TARGET_64BIT_DEFAULT.
David Malcolm [Thu, 19 May 2016 20:29:07 +0000 (20:29 +0000)]
PR c/71171: Fix uninitialized source_range in c_parser_postfix_expression
A common way for a c_expr to have an uninitialized src_range is in
error-handling, where the "value" field is set to error_mark_node
without touching the src_range, leading to complaints from valgrind.
This patch introduces a new method c_expr::set_error which sets
the value to error_mark_node whilst initializing the src_range to
UNKNOWN_LOCATION.
This fixes the valgrind issue seen in PR c/71171, along with various
other related issues seen when running the testsuite using the
checker patch I posted here:
https://gcc.gnu.org/ml/gcc-patches/2015-12/msg00887.html
(this checker still doesn't fully work yet, but it seems to be good
for easily detecting these issues without needing Valgrind).
gcc/c/ChangeLog:
PR c/71171
* c-parser.c (c_parser_generic_selection): Use c_expr::set_error
in error-handling.
(c_parser_postfix_expression): Likewise.
* c-tree.h (c_expr::set_error): New method.
* c-typeck.c (parser_build_binary_op): In error-handling, ensure
that result's range is initialized.
David Malcolm [Thu, 19 May 2016 18:10:30 +0000 (18:10 +0000)]
PR c++/71184: Fix NULL dereference in cp_parser_operator
The source-range handling for the array form of operator
new/delete erroneously assumed that the "]" was present,
leading to a dereference of NULL when it's absent.
Fix it thusly.
gcc/cp/ChangeLog:
PR c++/71184
* parser.c (cp_parser_operator): For array new/delete, check that
cp_parser_require returned a non-NULL token before dereferencing
it.
gcc/testsuite/ChangeLog:
PR c++/71184
* g++.dg/pr71184.C: New test case.
Kelvin Nilsen [Thu, 19 May 2016 17:47:40 +0000 (17:47 +0000)]
darn-0.c: New test.
gcc/testsuite/ChangeLog:
2016-05-19 Kelvin Nilsen <kelvin@gcc.gnu.org>
* gcc.target/powerpc/darn-0.c: New test.
* gcc.target/powerpc/darn-1.c: New test.
* gcc.target/powerpc/darn-2.c: New test.
gcc/ChangeLog:
2016-05-19 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/altivec.md (UNSPEC_DARN): New unspec constant.
(UNSPEC_DARN_32): New unspec constant.
(UNSPEC_DARN_RAW): New unspec constant.
(darn_32): New instruction.
(darn_raw): New instruction.
(darn): New instruction.
* config/rs6000/rs6000-builtin.def (RS6000_BUILTIN_0): Add
support and documentation for this macro.
(BU_P9_MISC_1): New macro definition.
(BU_P9_64BIT_MISC_0): New macro definition.
(BU_P9_MISC_0): New macro definition.
(darn_32): New builtin definition.
(darn_raw): New builtin definition.
(darn): New builtin definition.
* config/rs6000/rs6000.c: Add #define RS6000_BUILTIN_0 and #undef
RS6000_BUILTIN_0 directives to surround each occurrence of
#include "rs6000-builtin.def".
(rs6000_builtin_mask_calculate): Add in the RS6000_BTM_MODULO and
RS6000_BTM_64BIT flags to the returned mask, depending on
configuration.
(def_builtin): Correct an error in the assignments made to the
debugging variable attr_string.
(rs6000_expand_builtin): Add support for no-operand built-in
functions.
(builtin_function_type): Remove fatal_error assertion that is no
longer valid.
(rs6000_common_init_builtins): Add support for no-operand built-in
functions.
* config/rs6000/rs6000.h (RS6000_BTM_MODULO): New macro
definition.
(RS6000_BTM_PURE): Enhance comment to clarify intent of this flag
definition.
(RS6000_BTM_64BIT): New macro definition.
* doc/extend.texi: Document __builtin_darn (void),
__builtin_darn_raw (void), and __builtin_darn_32 (void) built-in
functions.
Kyrylo Tkachov [Thu, 19 May 2016 13:43:58 +0000 (13:43 +0000)]
[ARM] PR target/71056: Don't use vectorized builtins when NEON is not available
PR target/71056
* config/arm/arm-builtins.c (arm_builtin_vectorized_function): Return
NULL_TREE early if NEON is not available. Remove now redundant check
in ARM_CHECK_BUILTIN_MODE.
David Malcolm [Thu, 19 May 2016 00:52:08 +0000 (00:52 +0000)]
PR driver/69265: add hint for options with misspelled arguments
opts-common.c's cmdline_handle_error handles invalid arguments
for options with CL_ERR_ENUM_ARG by building a string listing the
valid arguments. By also building a vec of valid arguments, we
can use find_closest_string and provide a hint if we see a close
misspelling.
gcc/ChangeLog:
PR driver/69265
* Makefile.in (GCC_OBJS): Move spellcheck.o to...
(OBJS-libcommon-target): ...here.
* opts-common.c: Include spellcheck.h.
(cmdline_handle_error): Build a vec of valid options and use it
to suggest provide hints for misspelled arguments.
gcc/testsuite/ChangeLog:
PR driver/69265
* gcc.dg/spellcheck-options-11.c: New test case.
* cplus-dem.c (enum type_kind_t): Add tk_rvalue_reference
constant.
(demangle_template_value_parm): Handle tk_rvalue_reference
type kind.
(do_type): Support 'O' type id (rvalue references).
Martin Jambor [Wed, 18 May 2016 16:38:56 +0000 (18:38 +0200)]
Indirect inlining of targets from references of global constants
2016-05-18 Martin Jambor <mjambor@suse.cz>
PR ipa/69708
* cgraph.h (cgraph_indirect_call_info): New field
guaranteed_unmodified.
* ipa-cp.c (ipa_get_indirect_edge_target_1): Also pass parameter value
to ipa_find_agg_cst_for_param, check guaranteed_unmodified when
appropriate.
* ipa-inline-analysis.c (evaluate_conditions_for_known_args): Also
pass the parameter value to ipa_find_agg_cst_for_param.
* ipa-prop.c (ipa_load_from_parm_agg): New parameter
guaranteed_unmodified, store AA results there instead of bailing out
if present.
(ipa_note_param_call): Also initialize guaranteed_unmodified flag.
(ipa_analyze_indirect_call_uses): Also set guaranteed_unmodified flag.
(find_constructor_constant_at_offset): New function.
(ipa_find_agg_cst_from_init): Likewise.
(ipa_find_agg_cst_for_param): Also seearch for aggregate values in
static initializers of contants, report back through a new paameter
from_global_constant if that was the case.
(try_make_edge_direct_simple_call): Also pass parameter value to
ipa_find_agg_cst_for_param, check guaranteed_unmodified when
appropriate.
(ipa_write_indirect_edge_info): Stream new flag guaranteed_unmodified.
(ipa_read_indirect_edge_info): Likewise.
* ipa-prop.h (ipa_find_agg_cst_for_param): Update declaration.
(ipa_load_from_parm_agg): Likewise.
Michael Meissner [Wed, 18 May 2016 14:04:32 +0000 (14:04 +0000)]
re PR target/70915 (Improve loading 0/-1 in VSX registers on PowerPC)
[gcc]
2016-05-18 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/70915
* config/rs6000/constraints.md (wE constraint): New constraint
for a vector constant that can be loaded with XXSPLTIB.
(wM constraint): New constraint for a vector constant of a 1's.
(wS constraint): New constraint for a vector constant that can be
loaded with XXSPLTIB and a vector sign extend instruction.
* config/rs6000/predicates.md (xxspltib_constant_split): New
predicates for wE/wS constraints.
(xxspltib_constant_nosplit): Likewise.
(easy_vector_constant): Add support for constants that can be
loaded via XXSPLTIB.
(all_ones_constant): New predicate for vector constant with all
1's set.
(splat_input_operand): Add support for ISA 3.0 word splat
operations.
* config/rs6000/rs6000.c (xxspltib_constant_p): New function to
return if a constant can be loaded with the ISA 3.0 XXSPLTIB
instruction and possibly with a sign extension.
(output_vec_const_move): Add support for XXSPLTIB. If we are
loading up 0/-1 into Altivec registers, prefer using VSPLTISW
instead of XXLXOR/XXLORC.
(rs6000_expand_vector_init): Add support for ISA 3.0 word splat
operations.
(rs6000_legitimize_reload_address): Likewise.
(rs6000_output_move_128bit): Use output_vec_const_move to emit
constants.
* config/rs6000/vsx.md (VSX_M): Add TImode (if -mvsx-timode) and
combine VSX_M and VSX_M2 into one iterator.
(VSX_M2): Likewise.
(VSINT_84): New iterators for loading constants with XXSPLTIB.
(VSINT_842): Likewise.
(UNSPEC_VSX_SIGN_EXTEND): New UNSPEC.
(xxspltib_v16qi): New insns to load up constants with the ISA 3.0
XXSPLTIB instruction.
(xxspltib_<mode>_nosplit): Likewise.
(xxspltib_<mode>_split): New insn to load up constants with
XXSPLTIB and a sign extend instruction.
(vsx_mov<mode>): Replace single move that handled all vector types
with separate 32-bit and 64-bit moves. Combine the movti_<bit>
moves (when -mvsx-timode is in effect) into the main vector
moves. Eliminate separate moves for <VSr> <VSa>, where the
preferred register class (<VSr>) is listed first, and the
secondary register class (<VSa>) is listed second with a '?' to
discourage use. Prefer loading 0/-1 in any VSX register for ISA
3.0, and Altivec registers for ISA 2.06/2.07 (PR target/70915) so
that if the register was involved in a slow operation, the
clear/set operation does not wait for the slow operation to
finish. Adjust the length attributes for 32-bit mode. Use
rs6000_output_move_128bit and drop the use of the string
instructions for 32-bit movti when -mvsx-timode is in effect. Use
spacing so that the alternatives and attributes don't generate
long lines, and put things in columns, so that it is easier to
match up the operands and attributes with the insn alternatives.
(vsx_mov<mode>_64bit): Likewise.
(vsx_mov<mode>_32bit): Likewise.
(vsx_movti_64bit): Fold movti into normal vector moves.
(vsx_movti_32bit): Likewise.
(vsx_splat_<mode>, V4SI/V4SF modes): Add support for ISA 3.0 word
spat instructions.
(vsx_splat_v4si_internal): Likewise.
(vsx_splat_v4sf_internal): Likewise.
(vector fusion peepholes): Use VSX_M instead of VSX_M2.
(vsx_sign_extend_qi_<mode>): New ISA 3.0 instructions to sign
extend vector elements.
(vsx_sign_extend_hi_<mode>): Likewise.
(vsx_sign_extend_si_v2di): Likewise.
* config/rs6000/rs6000-protos.h (xxspltib_constant_p): Add
declaration.
* doc/md.texi (PowerPC constraints): Document the wE, wM, and wS
constraints. Add trailing period to wL documentation.
[gcc/testsuite]
2016-05-18 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p9-splat-1.c: New tests for ISA 3.0 word
splat operations and the XXSPLTIB instruction.
* gcc.target/powerpc/p9-splat-2.c: Likewise.
* gcc.target/powerpc/p9-splat-3.c: Likewise.
* gcc.target/powerpc/pr47755.c: Allow vspltisw in addition to
xxlxor to clear a register.
To: gcc-patches@gcc.gnu.org
Subject: PR 71020: Handle abnormal PHIs in tree-call-cdce.c
From: Richard Sandiford <richard.sandiford@arm.com>
Gcc: private.sent
--text follows this line--
The PR is about a case where tree-call-cdce.c causes two abnormal
PHIs for the same variable to be live at the same time, leading to
a coalescing failure. It seemed like getting rid of these kinds of
input would be generally useful, so I added a utility to tree-dfa.c.
Tested on x86_64-linux-gnu.
gcc/
PR middle-end/71020
* tree-dfa.h (replace_abnormal_ssa_names): Declare.
* tree-dfa.c (replace_abnormal_ssa_names): New function.
* tree-call-cdce.c: Include tree-dfa.h.
(can_guard_call_p): New function, extracted from...
(can_use_internal_fn): ...here.
(shrink_wrap_one_built_in_call_with_conds): Remove failure path
and return void.
(shrink_wrap_one_built_in_call): Likewise.
(use_internal_fn): Likewise.
(shrink_wrap_conditional_dead_built_in_calls): Update accordingly
and return void. Call replace_abnormal_ssa_names.
(pass_call_cdce::execute): Check can_guard_call_p during the
initial walk. Assume shrink_wrap_conditional_dead_built_in_calls
will always change something.
gcc/testsuite/
* gcc.dg/torture/pr71020.c: New test.
Martin Jambor [Wed, 18 May 2016 13:04:23 +0000 (15:04 +0200)]
[PR 70646] Store size to inlining predicate conditions
2016-05-18 Martin Jambor <mjambor@suse.cz>
PR ipa/70646
* ipa-inline.h (condition): New field size.
* ipa-inline-analysis.c (add_condition): New parameter SIZE, use it
for comaprison and store it into the new condition.
(evaluate_conditions_for_known_args): Use condition size to check
access sizes for all but CHANGED conditions.
(unmodified_parm_1): New parameter size_p, store access size into it.
(unmodified_parm): Likewise.
(unmodified_parm_or_parm_agg_item): Likewise.
(eliminated_by_inlining_prob): Pass NULL to unmodified_parm as size_p.
(set_cond_stmt_execution_predicate): Extract access sizes and store
them to conditions.
(set_switch_stmt_execution_predicate): Likewise.
(will_be_nonconstant_expr_predicate): Likewise.
(will_be_nonconstant_predicate): Likewise.
(inline_read_section): Stream condition size.
(inline_write_summary): Likewise.
Christophe Lyon [Wed, 18 May 2016 12:33:36 +0000 (12:33 +0000)]
noplt_3.c: Scan for "br\t".
* gcc.target/aarch64/noplt_3.c: Scan for "br\t".
* gcc.target/aarch64/tail_indirect_call_1.c: Scan for "br\t",
"blr\t" and switch to scan-assembler-times.
function: Do the CLEANUP_EXPENSIVE after shrink-wrapping, not before
We should do CLEANUP_EXPENSIVE after shrink-wrapping, because shrink-
wrapping creates constructs that CLEANUP_EXPENSIVE can optimise, and
nothing runs CLEANUP_EXPENSIVE later.
* function.c (rest_of_handle_thread_prologue_and_epilogue): Call
cleanup_cfg with CLEANUP_EXPENSIVE after shrink-wrapping instead
of before. Add a comment.
Jakub Jelinek [Wed, 18 May 2016 09:24:59 +0000 (11:24 +0200)]
sse.md (pbroadcast_evex_isa): New mode attr.
* config/i386/sse.md (pbroadcast_evex_isa): New mode attr.
(avx2_pbroadcast<mode>): Add another alternative with v instead
of x constraints in it, using <pbroadcast_evex_isa> isa.
(avx2_pbroadcast<mode>_1): Similarly, add two such alternatives.
* gcc.target/i386/avx512bw-vpbroadcast-1.c: New test.
* gcc.target/i386/avx512bw-vpbroadcast-2.c: New test.
* gcc.target/i386/avx512bw-vpbroadcast-3.c: New test.
* gcc.target/i386/avx512vl-vpbroadcast-1.c: New test.
* gcc.target/i386/avx512vl-vpbroadcast-2.c: New test.
* gcc.target/i386/avx512vl-vpbroadcast-3.c: New test.
Kirill Yukhin [Wed, 18 May 2016 09:16:09 +0000 (09:16 +0000)]
i386. Extend static buffers. Fix SF mode operand constraint to `Yv' in storehpd pattern.
gcc/
* gcc/config/i386/sse.md (define_insn "*andnot<mode>3"): Extend static
array to 128 chars.
(define_insn "*andnottf3"): Ditto.
(define_insn "*<code><mode>3"/any_logic): Ditto.
(define_insn "*<code>tf3"/any_logic): Ditto.
(define_insn "sse2_storehpd"): Use Yv constraint for scalar
operand to block AVX-512VL insn variant emit when it is not enabled.
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