Konrad Dybcio [Thu, 25 Jun 2020 18:21:17 +0000 (20:21 +0200)]
arm64: dts: qcom: Add Microsoft Lumia 950 (Talkman) device tree
Add device tree support for the Microsoft Lumia 950 smartphone.
It is based on msm8992 and supports booting Linux via a custom
EDK2 port.
Currently it supports:
* Screen console via EFIFB
* Booting via EFI_STUB
* SDHCI
* I2C
* PSCI core bringup
Please note that there is an implementation of EL2 startup
on this board, but it requires the user to resign from
PSCI and use spin-table instead. This revision sticks with
PSCI.
Konrad Dybcio [Thu, 25 Jun 2020 18:21:07 +0000 (20:21 +0200)]
arm64: dts: qcom: bullhead: Add qcom,msm-id
Add the property required for the bootloader to select
the correct device tree blob. It has been removed from
the SoC device tree as it should be set on a per-device
basis.
Konrad Dybcio [Thu, 25 Jun 2020 18:21:06 +0000 (20:21 +0200)]
arm64: dts: qcom: msm8992: Fix SDHCI1
This commit ensures the correct IRQ type is set
and disables the device by default.
The mmc-hs400-1_8v property is also moved to
Bullhead as it might not be present on all boards.
The node has been renamed to sdhci@ instead of mmc@
and the phandle was changed to sdhc_1 to comply with
the newer DTS style.
Konrad Dybcio [Thu, 25 Jun 2020 18:21:05 +0000 (20:21 +0200)]
arm64: dts: qcom: msm8992: Modernize the DTS style
Following changes have been made:
- remove name, compatible and msm-id
- wrap clocks in clocks{}
- order nodes by name and by address
- clock_gcc -> gcc
- msmgpio -> tlmm
- retire msm8992-pins.dtsi
- add some of the missing pins
- make comments C-style
- make apcs a mailbox
Konrad Dybcio [Wed, 24 Jun 2020 15:01:06 +0000 (17:01 +0200)]
arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW)
Add device tree support for the Sony Xperia Z5 smartphone.
It's based on Sony Kitakami platform (msm8994) and hence
a Kitakami-common DTSI has been created so as to reduce
clutter when remaining devices are added.
The board currently supports
* Serial
* SDHCI
* I2C
* Regulator configuration
* pstore log dump
* GPIO keys
Konrad Dybcio [Wed, 24 Jun 2020 15:01:02 +0000 (17:01 +0200)]
arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead.
This was the only device using that dtsi, so no point
keeping it separate AND with a confusing name (bullhead
is based on msm8992 and the file contains regulator
values for that specific board).
arm64: dts: qcom: sc7180: Add opp-peak-kBps to GPU opp
Add opp-peak-kBps bindings to the GPU opp table, listing the peak
GPU -> DDR bandwidth requirement for each opp level. This will be
used to scale the DDR bandwidth along with the GPU frequency dynamically.
This patch adds the interconnects property for the gpu node and the
opp-peak-kBps property to the opps of the gpu opp table. This should
help enable DDR bandwidth scaling dynamically and proportionally to the
GPU frequency.
arm64: dts: qcom: sc7180: Add support for context losing replicator
Add "qcom,replicator-loses-context" property to the replicator
in Always-on domain in SC7180 SoC to enable coresight replicator
driver to handle this variation of replicator designs.
arm64: dts: qcom: sc7180: Add support to skip powering up of ETM
Add "qcom,skip-power-up" property to skip powering up ETM
on SC7180 SoC to workaround a hardware errata where CPU
watchdog counter is stopped when ETM power up bit is set
(i.e., when TRCPDCR.PU = 1).
arm64: dts: qcom: sdm845: Support ETMv4 power management
Add "arm,coresight-loses-context-with-cpu" property to coresight
ETM nodes to avoid failure of trace session because of losing
context on entering deep idle states.
Sibi Sankar [Thu, 16 Jul 2020 19:17:46 +0000 (00:47 +0530)]
arm64: dts: qcom: sc7180: Move the fixed-perm property to SoC dtsi
All the platforms using SC7180 SoC are expected to have the wlan firmware
memory statically mapped by the Trusted Firmware. Hence move back the
qcom,msa-fixed-perm property to the SoC dtsi.
Reviewed-by: Douglas Anderson <dianders@chromium.org> Fixes: 7d484566087c0 ("arm64: dts: qcom: sc7180: Add missing properties for Wifi node") Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200716191746.23196-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
A3U/A5U both use a Bosch BMC150 accelerometer/magnetometer combo.
The chip provides two separate I2C devices for the accelerometer
and magnetometer that are already supported by the bmc150-accel
and bmc150-magn driver.
The only difference between A3U/A5U is the way the sensor is
mounted on the mainboard - set the mount-matrix in the
device-specific device tree part to handle that difference.
Co-developed-by: Michael Srba <michael.srba@seznam.cz> Signed-off-by: Michael Srba <michael.srba@seznam.cz> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200622151751.408995-5-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Stephan Gerhold [Mon, 22 Jun 2020 15:17:50 +0000 (17:17 +0200)]
arm64: dts: qcom: msm8916: Use higher I2C drive-strength only on DB410c
Commit c240f29e75e6 ("arm64: dts: set the default i2c pin drive strength to 16mA")
changed the default drive-strength for I2C pins in msm8916-pins.dtsi
to the maximum possible (16 mA).
While this makes sense for apq8016-sbc (DB410c) where you can connect
an arbitrary amount of I2C devices with level shifters etc, there is
no need to use a higher drive strength for other MSM8916 devices.
The minimum drive strength (2 mA) seems to be totally sufficient
to have everything work there.
With the short pinctrl nodes introduced earlier we can easily override
the drive-strength only for apq8016-sbc now. Use that and change
the default back to 2 mA.
i2c1_default/i2c5_default are already using 2 mA because they were
added separately later and are not used in apq8016-sbc.
So far we have been separating pinctrl entries into pinmux/pinconf.
It turns out it is also possible to combine them: The advantage is
that the device tree is overall more concise because the "pins"
to configure just need to be specified once, not separately for
pinmux/pinconf.
Using the simpler form only for new entries would be rather confusing.
This commit makes all MSM8916 device trees use the simplfied form.
Stephan Gerhold [Mon, 22 Jun 2020 15:17:48 +0000 (17:17 +0200)]
arm64: dts: msm8916-samsung/longcheer: Move pinctrl/regulators to end of file
It is helpful to be able to see all hardware components in one part
of the device tree, without having to scroll over the large amount
of regulator/pinctrl nodes. Keep those separated at the end of the file
to make navigation a bit easier.
This also makes it consistent with the order used in apq8016-sbc.dtsi.
Douglas Anderson [Thu, 25 Jun 2020 20:17:09 +0000 (13:17 -0700)]
arm64: dts: qcom: Fix WiFi supplies on sc7180-idp
The WiFi supplies that were added recently can't have done anything
useful because they were missing the "-supply" suffix. Booting
without the "-supply" suffix would give these messages:
ath10k_snoc 18800000.wifi: 18800000.wifi supply vdd-0.8-cx-mx not found, using dummy regulator
ath10k_snoc 18800000.wifi: 18800000.wifi supply vdd-1.8-xo not found, using dummy regulator
ath10k_snoc 18800000.wifi: 18800000.wifi supply vdd-1.3-rfa not found, using dummy regulator
ath10k_snoc 18800000.wifi: 18800000.wifi supply vdd-3.3-ch0 not found, using dummy regulator
Eric Biggers [Fri, 10 Jul 2020 07:20:10 +0000 (00:20 -0700)]
arm64: dts: sdm845: add Inline Crypto Engine registers and clock
Add the vendor-specific registers and clock for Qualcomm ICE (Inline
Crypto Engine) to the device tree node for the UFS host controller on
sdm845, so that the ufs-qcom driver will be able to use inline crypto.
Use a separate register range rather than extending the main UFS range
because there's a gap between the two, and the ICE registers are
vendor-specific. (Actually, the hardware claims that the ICE range also
includes the array of standard crypto configuration registers; however,
on this SoC the Linux kernel isn't permitted to access them directly.)
Rajendra Nayak [Tue, 30 Jun 2020 08:45:10 +0000 (14:15 +0530)]
arm64: dts: sc7180: Add OPP table for all qup devices
qup has a requirement to vote on the performance state of the CX domain
in sc7180 devices. Add OPP tables for these and also add power-domains
property for all qup instances for uart and spi.
i2c does not support scaling and uses a fixed clock.
Rajendra Nayak [Tue, 30 Jun 2020 08:45:09 +0000 (14:15 +0530)]
arm64: dts: sdm845: Add OPP table for all qup devices
qup has a requirement to vote on the performance state of the CX domain
in sdm845 devices. Add OPP tables for these and also add power-domains
property for all qup instances for uart and spi.
i2c does not support scaling and uses a fixed clock.
Sibi Sankar [Tue, 30 Jun 2020 08:19:38 +0000 (13:49 +0530)]
arm64: dts: qcom: sc7180: Drop the unused non-MSA SID
Having a non-MSA (Modem Self-Authentication) SID bypassed breaks modem
sandboxing i.e if a transaction were to originate from it, the hardware
memory protections units (XPUs) would fail to flag them (any transaction
originating from modem are historically termed as an MSA transaction).
Drop the unused non-MSA modem SID on SC7180 SoCs and cheza so that SMMU
continues to block them.
Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Fixes: bec71ba243e95 ("arm64: dts: qcom: sc7180: Update Q6V5 MSS node") Fixes: 68aee4af5f620 ("arm64: dts: qcom: sdm845-cheza: Add iommus property") Cc: stable@vger.kernel.org Reported-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200630081938.8131-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Bjorn Andersson [Mon, 22 Jun 2020 19:19:42 +0000 (12:19 -0700)]
arm64: dts: qcom: sdm845: Add IMEM and PIL info region
Add a simple-mfd representing IMEM on SDM845 and define the PIL
relocation info region, so that post mortem tools will be able to locate
the loaded remoteprocs.
Bjorn Andersson [Mon, 22 Jun 2020 19:19:41 +0000 (12:19 -0700)]
arm64: dts: qcom: qcs404: Add IMEM and PIL info region
Add a simple-mfd representing IMEM on QCS404 and define the PIL
relocation info region, so that post mortem tools will be able to locate
the loaded remoteprocs.
Sibi Sankar [Fri, 26 Jun 2020 19:08:08 +0000 (00:38 +0530)]
arm64: dts: qcom: sc7180: Add cpu OPP tables
Add OPP tables required to scale DDR/L3 per freq-domain on SC7180 SoCs.
Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200626190808.8716-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Konrad Dybcio [Tue, 23 Jun 2020 22:48:09 +0000 (00:48 +0200)]
arm64: dts: qcom: angler: Add qcom,msm-id and pmic-id
Add properties required for the bootloader to select
the correct bootloader blob. They have been removed from
the SoC device tree as they should be set on a per-device
basis.
Konrad Dybcio [Tue, 23 Jun 2020 22:48:00 +0000 (00:48 +0200)]
arm64: dts: qcom: msm8994: Modernize the DTS style
Following changes have been made:
- remove name, compatible and msm-id
- wrap clocks in clocks{}
- order nodes by name and by address
- clock_gcc -> gcc
- msmgpio -> tlmm
- qcom,smem -> smem
- remove unit-address from smem
- retire msm8994-pins.dtsi
- add some of the missing pins
- make comments C-style
Bjorn Andersson [Mon, 22 Jun 2020 22:27:42 +0000 (15:27 -0700)]
arm64: dts: qcom: sm8250-mtp: Drop PM8150 ldo11
PM8150 ldo11 on the MTP is wired to VDD_SSC_CX and controlled in levels,
rather than as a regulator. As such it's available from the rpmhpd as
the SM8250_LCX power domain.
Martin Botka [Mon, 22 Jun 2020 19:25:56 +0000 (21:25 +0200)]
arm64: dts: qcom: Add support for Sony Xperia 10/10 Plus (Ganges platform)
Add device tree support for the Sony Xperia 10 and 10
Plus smartphones. They are all based on the Sony Ganges
platform (sdm630/636) and share a lot of common code.
The differences are really minor, so a Ganges-common DTSI
has been created to reduce clutter.
10 - Kirin
10 Plus - Mermaid
This platform is based on SoMC Nile, but there are some
major differences when it comes to pin configuration and
panel setup (among others).
The boards currently support:
* Screen console
* SDHCI
* I2C
* pstore log dump
* GPIO keys
* PSCI idle states
Signed-off-by: Martin Botka <martin.botka1@gmail.com> Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Tested-by: Martin Botka <martin.botka1@gmail.com> Link: https://lore.kernel.org/r/20200622192558.152828-7-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Konrad Dybcio [Mon, 22 Jun 2020 19:25:55 +0000 (21:25 +0200)]
arm64: dts: qcom: Add support for Sony Xperia XA2/Plus/Ultra (Nile platform)
Add device tree support for the Sony Xperia XA2, XA2 Plus and
XA2 Ultra smartphones. They are all based on the Sony Nile
platform (sdm630) and share a lot of common code. The
differences are really minor, so a Nile-common DTSI
has been created to reduce clutter.
Konrad Dybcio [Mon, 22 Jun 2020 19:25:54 +0000 (21:25 +0200)]
arm64: dts: qcom: sdm630: Add sdm630 dts file
Add devicetree files for SDM630 SoC and its pin configuration.
This commit adds basic nodes like cpu, psci and other required
configuration for booting up from eMMC to the serial console.
Dmitry Baryshkov [Sun, 21 Jun 2020 19:28:24 +0000 (22:28 +0300)]
arm64: dts: qcom: pm8150x: add thermal alarms and thermal zones
Add temperature alarm and thermal zone configuration to all three
pm8150 instances. Configuration is largely based on the msm-4.19 tree.
These alarms use main adc of the pmic. Separate temperature adc is not
supported yet.
Amit Kucheria [Tue, 9 Jun 2020 06:44:55 +0000 (12:14 +0530)]
arm64: dts: qcom: sm8150: Add thermal zones and throttling support
sm8150 has 27 thermal sensors split across two tsens controllers. Add
the thermal zones to expose them and wireup the cpus to throttle their
frequencies on crossing passive temperature thresholds.
Stephan Gerhold [Fri, 5 Jun 2020 18:59:16 +0000 (20:59 +0200)]
arm64: dts: qcom: apq8016-sbc: Replace spaces with tabs
apq8016-sbc.dtsi uses spaces on some lines instead of tabs.
Make this consistent by converting them to tabs.
Also remove some redundant comments from the DAI link definitions
- this is already visible from the comment block before the "sound"
node or the device node entries itself.
Stephan Gerhold [Fri, 5 Jun 2020 18:59:15 +0000 (20:59 +0200)]
arm64: dts: qcom: msm8916: Pull down PDM GPIOs during sleep
The original qcom kernel changed the PDM GPIOs to be pull-down
during sleep at some point. Reportedly this was done because
there was some "leakage at PDM outputs during sleep":
msm8916-pins.dtsi specifies "bias-pull-none" for most of the audio
pin configurations. This was likely copied from the qcom kernel fork
where the same property was used for these audio pins.
However, "bias-pull-none" actually does not exist at all - not in
mainline and not in downstream. I can only guess that the original
intention was to configure "no pull", i.e. bias-disable.
Stephan Gerhold [Fri, 5 Jun 2020 18:59:13 +0000 (20:59 +0200)]
arm64: dts: qcom: msm8916: Set #address-cells for lpass
As of commit 4ff028f6c108 ("ASoC: qcom: lpass-cpu: Make I2S SD lines
configurable"), lpass now supports children nodes to configure the
MI2S SD lines to use for one of the I2S ports. For example:
Jeffrey Hugo [Thu, 28 May 2020 14:51:35 +0000 (07:51 -0700)]
arm64: dts: qcom: msm8998-clamshell: Fix label on l15 regulator
The label on the l15 regulator node does not follow the style of the
rest of the regulator nodes. Luckily, no one has used the label yet,
so lets fix it.
Jeffrey Hugo [Thu, 28 May 2020 14:48:14 +0000 (07:48 -0700)]
arm64: dts: qcom: msm8998-mtp: Fix label on l15 regulator
The label on the l15 regulator node does not follow the style of the
rest of the regulator nodes. Luckily, no one has used the label yet,
so lets fix it.
Stephen Boyd [Thu, 21 May 2020 01:03:37 +0000 (18:03 -0700)]
arm64: dts: qcom: sc7180: Move mss node to the right place
The modem node has an address of 4080000 and thus should come after tlmm
and before gpu. Move the node to the right place to maintainer proper
address sort order.
Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Cc: Evan Green <evgreen@chromium.org> Cc: Sibi Sankar <sibis@codeaurora.org> Fixes: e14a15eba89a ("arm64: dts: qcom: sc7180: Add Q6V5 MSS node") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200521010337.229177-1-swboyd@chromium.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Jonathan Marek [Sat, 23 May 2020 17:52:32 +0000 (13:52 -0400)]
arm64: dts: qcom: sm8250: change ufs node name to ufshc
The ufs-qcom driver checks that the name matches the androidboot.bootdevice
parameter provided by the bootloader, which uses the name ufshc. Without
this change UFS fails to probe.
I think this is broken behavior from the ufs-qcom driver, but using the
name ufshc is consistent with dts for sdm845/sm8150/etc.
Linus Torvalds [Sun, 14 Jun 2020 18:39:31 +0000 (11:39 -0700)]
Merge tag 'LSM-add-setgid-hook-5.8-author-fix' of git://github.com/micah-morton/linux
Pull SafeSetID update from Micah Morton:
"Add additional LSM hooks for SafeSetID
SafeSetID is capable of making allow/deny decisions for set*uid calls
on a system, and we want to add similar functionality for set*gid
calls.
The work to do that is not yet complete, so probably won't make it in
for v5.8, but we are looking to get this simple patch in for v5.8
since we have it ready.
We are planning on the rest of the work for extending the SafeSetID
LSM being merged during the v5.9 merge window"
* tag 'LSM-add-setgid-hook-5.8-author-fix' of git://github.com/micah-morton/linux:
security: Add LSM hooks to set*gid syscalls
Thomas Cedeno [Tue, 9 Jun 2020 17:22:13 +0000 (10:22 -0700)]
security: Add LSM hooks to set*gid syscalls
The SafeSetID LSM uses the security_task_fix_setuid hook to filter
set*uid() syscalls according to its configured security policy. In
preparation for adding analagous support in the LSM for set*gid()
syscalls, we add the requisite hook here. Tested by putting print
statements in the security_task_fix_setgid hook and seeing them get hit
during kernel boot.
Signed-off-by: Thomas Cedeno <thomascedeno@google.com> Signed-off-by: Micah Morton <mortonm@chromium.org>
projects / thirdparty / kernel / linux.git / log
