Peter Schauer [Sat, 9 Nov 1996 09:17:34 +0000 (09:17 +0000)]
* alpha-tdep.c (heuristic_proc_desc): Stop examining the prologue
if we encounter a positive stack adjustment.
(find_proc_desc): If heuristic_fence_post is non-zero, use
heuristic_proc_start to determine the start of a function before
calling heuristic_proc_desc.
* coffread.c (coff_symtab_read): Change minimal symbol types
for C_LABEL symbols from mst_* to mst_file_*.
* config/m68k/sun3os4.mh (MMALLOC_CFLAGS): Define MMCHECK_FORCE to 1.
* configure.in: Handle error message from sun3 native ld when
configuring HLDFLAGS.
* configure: Regenerated with autoconf.
* c-valprint.c (c_value_print): Adjust value address by VALUE_OFFSET.
* cp-valprint.c (cp_print_value): Prevent gdb crashes by making sure
that the virtual base pointer from an user object still points to
accessible memory.
* dbxread.c (dbx_symfile_init): Initialize sym_stab_info to
clear the recently added header_files fields.
(dbx_symfile_finish): Free hfiles[i].vector to avoid storage leak.
Martin Hunt [Sat, 9 Nov 1996 00:38:07 +0000 (00:38 +0000)]
Fri Nov 8 16:19:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v-sim.h (simops): Add flag is_long.
(State): Add pc_changed. Instructions which update the PC should
use the JMP macro which sets this.
(JMP): New macro. Sets the PC and the pc_changed flag.
* gencode.c (write_opcodes): Add is_long field.
* interp.c (lookup_hash): If we blindly apply a short opcode's mask
to a long opcode we could get a false match. Check the opcode size.
(hash): Add a size field to the hash table.
(sim_open): Initialize size field in hash table.
(sim_resume): Change to logic for setting the PC. Used to increment the
PC if it had not been changed. This didn't allow single-instruction loops.
Now checks the flag State.pc_changed. Also now stops when ^C is received.
(dmem_addr): Fix translation of data segments to unified memory.
(sim_ctrl_c): New function. When ^C is received, set stop_simulator flag.
* simops.c: Changed all branch and jump instructions to use new JMP macro.
(OP_20000000): Corrected trace information to show this is a ldi.l, not
a ldi.s instruction.
Martin Hunt [Thu, 7 Nov 1996 23:23:57 +0000 (23:23 +0000)]
Thu Nov 7 15:19:08 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v-tdep.c: Fix some problems with inferior function calls.
* config/d10v/tm-d10v.h (EXTRA_FRAME_INFO): Change dummy to be
a pointer to the dummy's stack instead of just a flag.
Jeff Law [Thu, 7 Nov 1996 07:26:25 +0000 (07:26 +0000)]
* mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
getx operand. Fix opcode for mulqu imm,dn.
Fix bugs exposed by gas testsuite (extended instructions).
Jeff Law [Wed, 6 Nov 1996 22:08:38 +0000 (22:08 +0000)]
* gas/mn10300/basic.exp: Test insertion of operands
into call and jmp instructions with 32bit offsets.
Fix typo in bit test patterns.
* gas/mn10300/other.s: Tweak constants to improve
testsuite coverage.
Jeff Law [Wed, 6 Nov 1996 22:04:42 +0000 (22:04 +0000)]
* config/tc-mn10300.c (mn10300_insert_operand): MN10300_OPERAND_SPLIT
operands are assumed to be 32bits. Use "bits" field to hold the
number of bits in the main instruction word for MN10300_OPERAND_SPLIT.
(mn10300_check_operand): MN10300_OPERAND_SPLIT operands are assumed
to be 32bits.
Jeff Law [Wed, 6 Nov 1996 21:58:21 +0000 (21:58 +0000)]
* mn10300-opc.c (mn10300_operands): Hijack "bits" field
in MN10300_OPERAND_SPLIT operands for how many bits
appear in the basic insn word. Add IMM32_HIGH24,
IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
(mn10300_opcodes): Use new operands as needed.
Support for everything in the basic instruction manual (yippie!)
Jeff Law [Wed, 6 Nov 1996 21:18:27 +0000 (21:18 +0000)]
* mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
for bset, bclr, btst instructions.
(mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
For btst, bclr & bset.
Jeff Law [Wed, 6 Nov 1996 20:44:58 +0000 (20:44 +0000)]
* mn10300-opc.c (mn10300_operands): Remove many redundant
operands. Update opcode table as appropriate.
(IMM32): Add MN10300_OPERAND_SPLIT flag.
(mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
Cleaning up a little.
Attempting to insert most 32bit operands.
And a bug found by assembler testsuite.
Jeff Law [Tue, 5 Nov 1996 20:35:04 +0000 (20:35 +0000)]
* gas/mn10300/basic.exp: Check bit patterns for indexed mov,
movbu, movhu instructions. Check bit patterns for more bit
operations. Check bit patterns for various 16bit call, retf
and ret instructions.
* gas/mn10300/other.s: Update operands for better test coverage.
Improving testsuite coverage.
Jeff Law [Tue, 5 Nov 1996 20:32:07 +0000 (20:32 +0000)]
* config/tc-mn10300.c (md_assemble): Insert operands into
the extension part of the instruction if necessary.
(mn10300_insert_operand): Accept pointer to extension word
argument. Make insn a pointer argument too. Return type
is now void. All callers changed.
So we can correct insert operands into any instruction except those
which have 32bit operands.
Jeff Law [Tue, 5 Nov 1996 20:29:31 +0000 (20:29 +0000)]
* mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2
operands (for indexed load/stores). Fix bitpos for DI
operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
few instructions that insert immediates/displacements in the
middle of the instruction. Add IMM8E for 8 bit immediate in
the extended part of an instruction.
(mn10300_operands): Use new opcodes as appropriate.
Opcode table changes so we can correctly insert everything except
32bit operands.
Stu Grossman [Tue, 5 Nov 1996 18:15:41 +0000 (18:15 +0000)]
* mswin/gdbwin.h: Remove bogus definition of CORE_ADDR.
* mswin/srcwin.cpp (CSrcScroll1::CSrcScroll1): Initialize depth
to fix divide-by-zero problem with clicking on source window.
Jeff Law [Mon, 4 Nov 1996 19:51:31 +0000 (19:51 +0000)]
* mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for
a data/address register that appears in register field 0
and register field 1.
(mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
Fred Fish [Sun, 3 Nov 1996 23:50:29 +0000 (23:50 +0000)]
* gdb.c++/classes.exp: Modify to handle current gcc C++ member ordering
and accept older ordering as obsolescent gcc or gdb.
* gdb.c++/templates.exp: Ditto.
* gdb.c++/virtfunc.exp: Ditto.
Peter Schauer [Sat, 2 Nov 1996 11:59:19 +0000 (11:59 +0000)]
* irix5-nat.c, osfsolib.c, solib.c (symbol_add_stub): Handle
missing or zero-sized .text sections properly.
* mdebugread.c: Handle scRConst and scSUndefined storage classes.
* stabsread.c (scan_file_globals): Try to resolve symbols
for shared libraries from the minimal symbol table of the main
executable first.
Fred Fish [Fri, 1 Nov 1996 20:00:26 +0000 (20:00 +0000)]
* gdb.base/coremaker.c: Add code to mmap some data so we
can check that it ends up in the core file.
* gdb.base/corefile.exp: Add test to read mmapped data
from core file.
* config/tc-alpha.c: Change uses of void * to PTR. Change the
alpha_macro emit field to expect a const argument, and change the
arg field to be const. Fix some spacing to follow the GNU
standard.
Fri Nov 1 10:32:03 1996 Richard Henderson <rth@tamu.edu>
* config/tc-alpha.c (md_parse_option): Add knowledge of 21164pc
(pca56) and 21264 (ev6) cpus.
(md_apply_fix): Private relocation types are now negative.
(alpha_force_relocation): Likewise.
(tc_gen_reloc): Likewise.
(emit_insn): Likewise.
(emit_ldXu): Do the right thing when the hardware can do byte insns.
(emit_stX): Likewise.
(emit_sextX): Likewise.
Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
* alpha.h: Don't include "bfd.h"; private relocation types are now
negative to minimize problems with shared libraries. Organize
instruction subsets by AMASK extensions and PALcode
implementation.
(struct alpha_operand): Move flags slot for better packing.
* stabs.c (struct stab_handle): Add bincl_list field.
(parse_stab): Pass value to push_bincl. Call find_excl for
N_EXCL.
(struct bincl_file): Add hash, file and file_types fields.
(push_bincl): Add hash parameter. Save it in the new hash field.
Save the file number in the new file field.
(pop_bincl): Put the bincl_file on bincl_list, rather than freeing
it. Save the file types in the new file_types field.
(find_excl): New static function.
PR 10980.
Michael Snyder [Fri, 1 Nov 1996 00:41:21 +0000 (00:41 +0000)]
Thu Oct 31 16:37:17 1996 Michael Snyder <msnyder@cleaver.cygnus.com>
* m32r-tdep.c: Improved frame_chain and fn prologue analysis.
* configure.tgt: Add entry for m32r target.
* monitor.h: Add a flag to tell monitor_store_register to use
(val, regno) instead of (regno, val).
* monitor.c: Make monitor_store_register honor the above flag.
Make monitor_exp ignore DC1/DC3 for m32r.
Increase buf size in monitor_dump_regs.
Martin Hunt [Tue, 29 Oct 1996 20:31:08 +0000 (20:31 +0000)]
Tue Oct 29 12:13:52 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* interp.c (sim_size): Now allocates unified memory for imap segments
0,1,2, and 127. Initializes imap0 and imap1 to 0x1000. Initializes dmap to 0.
(sim_write): Just call xfer_mem().
(sim_read): Just call xfer_mem().
(xfer_mem): New function. Does appropriate memory mapping and copies bytes.
(dmem_addr): New function. Reads dmap register and translates data
addresses to local addresses.
(pc_addr): New function. Reads imap register and computes local address
corresponding to contents of the PC.
(sim_resume): Change to use pc_addr().
(sim_create_inferior): Change reinitialization code. Also reinitializes
imap[01] and dmap.
(sim_fetch_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
(sim_store_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
* simops.c (MEMPTR): Redefine to use dmem_addr().
(OP_5F00): Replace references to STate.imem with dmem_addr().
* d10v-sim.h (State): Remove mem_min and mem_max. Add umem[128].
(RB,SW,RW,SLW,RLW): Redefine to use dmem_addr().
(IMAP0,IMAP1,DMAP,SET_IMAP,SET_IMAP1,SET_DMAP): Define.
Jeff Law [Tue, 29 Oct 1996 19:32:56 +0000 (19:32 +0000)]
* config/tc-v850.h (TC_GENERIC_RELAX_TABLE): Define.
* config/tc-v850.c: Fix some indention problems.
(md_relax_table): Define for D9->D99 branch displacement
relaxing.
(md_convert_frag): Do something useful instead of aborting.
(md_estimate_size_before_relax): Likewise.
(md_assemble): Note if the matching instruction has a relaxable
operand. If it does, allocate frag with frag_var and don't
do any fixups.
So we can do 9bit displacement to 22bit displacement relaxing.
projects / thirdparty / binutils-gdb.git / log
