Jonathan Wakely [Thu, 29 Aug 2024 12:47:15 +0000 (13:47 +0100)]
libstdc++: Avoid forming T* in unique_ptr(auto_ptr<U>&&) constraints [PR116529]
PR 116529 shows that std::unique_ptr<X&, D> is currently unusable
because the constructor taking std::auto_ptr (which is a non-standard
extension since C++17) tries to form the invalid type X&* during
overload resolution. We can use the `pointer` type in the constructor
constraints, instead of trying to form an invalid type. The
std::auto_ptr constructor can never actually match for the case where
element_type is a reference, so we just need it to produce a
substitution failure instead of being ill-formed.
LWG 4144 might make std::unique_ptr<X&, D> ill-formed, which would
invalidate this new test. We would have to remove this test in that
case. Using `pointer` in the constructor from std::auto_ptr would not be
needed to support the std::unique_ptr<X&, D> case, but would not cause
any harm either.
libstdc++-v3/ChangeLog:
PR libstdc++/116529
* include/bits/unique_ptr.h (unique_ptr(auto_ptr<U>&&)):
Use pointer instead of T*.
* testsuite/20_util/unique_ptr/creation/116529.cc: New test.
Jonathan Wakely [Fri, 20 Sep 2024 16:35:48 +0000 (17:35 +0100)]
libstdc++: Document missing features for old std:string ABI [PR116777]
There are several features that are not supported when using the old
std::string ABI. It's possible that PR 81967 will get fixed, but the
missing C++20 features almost certainly won't be. Document this in the
manual.
libstdc++-v3/ChangeLog:
PR libstdc++/116777
* doc/xml/manual/using.xml: Document features that are not
supported for the gcc4-compatible ABI.
* doc/html/manual/using_dual_abi.html: Regenerate.
Martin Uecker [Tue, 17 Sep 2024 09:37:29 +0000 (11:37 +0200)]
c: fix crash when checking for compatibility of structures [PR116726]
When checking for compatibility of structure or union types in
tagged_types_tu_compatible_p, restore the old value of the pointer to
the top of the temporary cache after recursively calling comptypes_internal
when looping over the members of a structure of union. While the next
iteration of the loop overwrites the pointer, I missed the fact that it can
be accessed again when types of function arguments are compared as part
of recursive type checking and the function is entered again.
PR c/116726
gcc/c/ChangeLog:
* c-typeck.cc (tagged_types_tu_compatible_p): Restore value
of the cache after recursing into comptypes_internal.
Patrick Palka [Fri, 20 Sep 2024 19:41:42 +0000 (15:41 -0400)]
c++: CWG 2789 and reversed operator candidates
As a follow-up to r15-3741-gee3efe06c9c49c, which was specifically
concerned with usings, it seems the CWG 2789 refinement should also
compare contexts of a reversed vs non-reversed (member) candidate
during operator overload resolution.
DR 2789
gcc/cp/ChangeLog:
* call.cc (cand_parms_match): Check for matching class contexts
even in the reversed case.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/concepts-memfun4.C: Adjust expected result
involving reversed candidate.
Gaius Mulley [Fri, 20 Sep 2024 18:05:16 +0000 (19:05 +0100)]
modula2: Remove unused parameter warnings seen in build
This patch removes unused parameters in gm2-compiler/M2Check.mod.
It also removes a --fixme-- and completes the missing code
which type checks unbounded arrays. The patch also fixes a
build error seen when building m2/stage2/cc1gm2.
gcc/m2/ChangeLog:
* gm2-compiler/M2Check.mod (checkUnboundedArray): New
procedure function.
(checkUnboundedUnbounded): Ditto.
(checkUnbounded): Rewrite to check the unbounded data
type.
(checkPair): Add comment.
(doCheckPair): Add comment.
Remove tinfo parameter from the call to checkTypeKindViolation.
(checkTypeKindViolation): Remove ununsed parameter tinfo.
* gm2-libs-ch/UnixArgs.cc (GM2RTS.h): Remove include.
* gm2-libs-ch/m2rts.h (M2RTS_INIT): New define.
(M2RTS_DEP): Ditto.
(M2RTS_RegisterModule): New prototype.
(GM2RTS.h): Add include to the MC_M2 block.
gcc/testsuite/ChangeLog:
* gm2/iso/fail/testarrayunbounded2.mod: New test.
* gm2/iso/fail/testarrayunbounded3.mod: New test.
* gm2/iso/fail/testarrayunbounded4.mod: New test.
* gm2/iso/fail/testarrayunbounded5.mod: New test.
* gm2/iso/fail/testarrayunbounded6.mod: New test.
* gm2/iso/pass/testarrayunbounded.mod: New test.
Patrick Palka [Fri, 20 Sep 2024 16:33:13 +0000 (12:33 -0400)]
c++: CWG 2789 and usings [PR116492]
After CWG 2789, the "more constrained" tiebreaker for non-template
functions should exclude member functions that are defined in
different classes. This patch implements this missing refinement.
In turn we can get rid of four-parameter version of object_parms_correspond
and call the main overload directly since now correspondence is only
only checked for members from the same class.
PR c++/116492
DR 2789
gcc/cp/ChangeLog:
* call.cc (object_parms_correspond): Remove.
(cand_parms_match): Return false for member functions that come
from different classes. Adjust call to object_parms_correspond.
(joust): Update comment for the non-template "more constrained"
case.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/concepts-memfun4.C: Also compile in C++20 mode.
Expect ambiguity when candidates come from different classes.
* g++.dg/cpp2a/concepts-inherit-ctor12.C: New test.
Patrick Palka [Fri, 20 Sep 2024 16:31:40 +0000 (12:31 -0400)]
c++: CWG 2273 and non-constructors
Our implementation of the CWG 2273 inheritedness tiebreaker seems to be
incorrectly considering all member functions introduced via using, not
just constructors. This patch restricts the tiebreaker accordingly.
DR 2273
gcc/cp/ChangeLog:
* call.cc (joust): Restrict inheritedness tiebreaker to
constructors.
gcc/testsuite/ChangeLog:
* g++.dg/cpp1z/using1.C: Expect ambiguity for non-constructor call.
* g++.dg/overload/using5.C: Likewise.
Darwin: Allow for as versions that need '-' for std in.
Recent versions of Xcode as require a dash to read from standard
input. We can use this on all supported OS versions so make it
unconditional. Patch from Mark Mentovai.
Richard Biener [Fri, 20 Sep 2024 10:17:22 +0000 (12:17 +0200)]
Fall back to elementwise access for too spaced SLP single element interleaving
gcc.dg/vect/vect-pr111779.c is a case where non-SLP manages to vectorize
using VMAT_ELEMENTWISE but SLP currently refuses because doing a regular
access with permutes would cause excess vector loads with at most one
element used. The following makes us fall back to elementwise accesses
for that, too.
* tree-vect-stmts.cc (get_group_load_store_type): Fall back
to VMAT_ELEMENTWISE when single element interleaving of
a too large group.
(vectorizable_load): Do not try to verify load permutations
when using VMAT_ELEMENTWISE for single-lane SLP and fix code
generation for this case.
* gfortran.dg/vect/vect-8.f90: Allow one more vectorized loop.
Those TR13/OpenMP 6.0 routines permit a reproducible offloading to
a specific device by mapping an OpenMP device number to a
unique ID (UID). The GPU device UIDs should be universally unique,
the one for the host is not.
gcc/ChangeLog:
* omp-general.cc (omp_runtime_api_procname): Add
get_device_from_uid and omp_get_uid_from_device routines.
Jakub Jelinek [Fri, 20 Sep 2024 07:14:29 +0000 (09:14 +0200)]
i386: Fix up _mm_min_ss etc. handling of zeros and NaNs [PR116738]
min/max patterns for intrinsics which on x86 result in the second
input operand if the two operands are both zeros or one or both of them
are a NaN shouldn't use SMIN/SMAX RTL, because that is similarly to
MIN_EXPR/MAX_EXPR undefined what will be the result in those cases.
The following patch adds an expander which uses either a new pattern with
UNSPEC_IEEE_M{AX,IN} or use the S{MIN,MAX} representation of the same.
2024-09-20 Uros Bizjak <ubizjak@gmail.com>
Jakub Jelinek <jakub@redhat.com>
PR target/116738
* config/i386/subst.md (mask_scalar_operand_arg34,
mask_scalar_expand_op3, round_saeonly_scalar_mask_arg3): New
subst attributes.
* config/i386/sse.md
(<sse>_vm<code><mode>3<mask_scalar_name><round_saeonly_scalar_name>):
Change from define_insn to define_expand, rename the old define_insn
to ...
(*<sse>_vm<code><mode>3<mask_scalar_name><round_saeonly_scalar_name>):
... this.
(<sse>_ieee_vm<ieee_maxmin><mode>3<mask_scalar_name><round_saeonly_scalar_name>):
New define_insn.
Richard Biener [Fri, 20 Sep 2024 06:53:53 +0000 (08:53 +0200)]
testsuite/116784 - match up SLP scan and vectorized scan
The test used vect_perm_short for the vectorized scanning but
vect_perm3_short for whether that's done with SLP. We're now
generally expecting SLP to be used - even as fallback, so the
following adjusts both to match up, fixing the powerpc64 reported
testsuite issue.
PR testsuite/116784
* gcc.dg/vect/slp-perm-9.c: Use vect_perm_short also for
the SLP check.
Andrew Pinski [Thu, 19 Sep 2024 23:32:50 +0000 (16:32 -0700)]
Remove PHI_RESULT_PTR and change some PHI_RESULT to be gimple_phi_result [PR116643]
There was only a few uses PHI_RESULT_PTR so lets remove it and use gimple_phi_result_ptr
or gimple_phi_result directly instead.
Since I was modifying ssa-iterators.h for the use of PHI_RESULT_PTR, change the use
of PHI_RESULT there to be gimple_phi_result instead.
This also removes one extra indirection that was done for PHI_RESULT so stage2 building
should be slightly faster.
Bootstrapped and tested on x86_64-linux-gnu.
PR middle-end/116643
gcc/ChangeLog:
* ssa-iterators.h (single_phi_def): Use gimple_phi_result
instead of PHI_RESULT.
(op_iter_init_phidef): Use gimple_phi_result/gimple_phi_result_ptr
instead of PHI_RESULT/PHI_RESULT_PTR.
* tree-ssa-operands.h (PHI_RESULT_PTR): Remove.
(PHI_RESULT): Use gimple_phi_result directly.
(SET_PHI_RESULT): Use gimple_phi_result_ptr directly.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
This PR points out the we're not implementing [dcl.fct.def.default]
properly. Consider e.g.
struct C {
C(const C&&) = default;
};
where we wrongly emit an error, but the move ctor should be just =deleted.
According to [dcl.fct.def.default], if the type of the special member
function differs from the type of the corresponding special member function
that would have been implicitly declared in a way other than as allowed
by 2.1-4, the function is defined as deleted. There's an exception for
assignment operators in which case the program is ill-formed.
clang++ has a warning for when we delete an explicitly-defaulted function
so this patch adds it too.
When the code is ill-formed, we emit an error in all modes. Otherwise,
we emit a pedwarn in C++17 and a warning in C++20.
PR c++/116162
gcc/c-family/ChangeLog:
* c.opt (Wdefaulted-function-deleted): New.
gcc/cp/ChangeLog:
* class.cc (check_bases_and_members): Don't set DECL_DELETED_FN here,
leave it to defaulted_late_check.
* cp-tree.h (maybe_delete_defaulted_fn): Declare.
(defaulted_late_check): Add a tristate parameter.
* method.cc (maybe_delete_defaulted_fn): New.
(defaulted_late_check): Add a tristate parameter. Call
maybe_delete_defaulted_fn instead of giving an error.
Jakub Jelinek [Thu, 19 Sep 2024 15:53:27 +0000 (17:53 +0200)]
dwarf2asm: Use constexpr for eh_data_format_name initialization for C++14
Similarly to the previous patch, dwarf2asm.cc had
HAVE_DESIGNATED_INITIALIZERS support, and as fallback a huge switch.
The switch from what I can see is expanded as a jump table with 256
label pointers and code at those labels then loads addresses of
string literals.
The following patch instead uses a table with 256 const char * pointers,
NULL for ICE, non-NULL for returning something, similarly to the
HAVE_DESIGNATED_INITIALIZERS case.
2024-09-19 Jakub Jelinek <jakub@redhat.com>
* dwarf2asm.cc (eh_data_format_name): Use constexpr initialization
of format_names table for C++14 instead of a large switch.
The below test are passed for this patch.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat_s_add-5.c: New test.
* gcc.target/riscv/sat_s_add-6.c: New test.
* gcc.target/riscv/sat_s_add-7.c: New test.
* gcc.target/riscv/sat_s_add-8.c: New test.
* gcc.target/riscv/sat_s_add-run-5.c: New test.
* gcc.target/riscv/sat_s_add-run-6.c: New test.
* gcc.target/riscv/sat_s_add-run-7.c: New test.
* gcc.target/riscv/sat_s_add-run-8.c: New test.
The following reverts a bogus fix done for PR101009 and instead makes
sure we get into the same_access_functions () case when computing
the distance vector for g[1] and g[1] where the constants ended up
having different types. The generic code doesn't seem to handle
loop invariant dependences. The special case gets us both
( 0 ) and ( 1 ) as distance vectors while formerly we got ( 1 ),
which the PR101009 fix changed to ( 0 ) with bad effects on other
cases as shown in this PR.
PR tree-optimization/116768
* tree-data-ref.cc (build_classic_dist_vector_1): Revert
PR101009 change.
* tree-chrec.cc (eq_evolutions_p): Make sure (sizetype)1
and (int)1 compare equal.
Richard Biener [Wed, 18 Sep 2024 10:41:25 +0000 (12:41 +0200)]
Fall back to single-lane SLP before falling back to no SLP
The following changes the fallback to disable SLP when any of the
discovered SLP instances failed to pass vectorization checking into
a fallback that emulates what no SLP would do with SLP - force
single-lane discovery for all instances.
The patch does not remove the final fallback to disable SLP but it
reduces the fallout from failing vectorization when any non-SLP
stmt survives analysis.
* tree-vectorizer.h (vect_analyze_slp): Add force_single_lane
parameter.
* tree-vect-slp.cc (vect_analyze_slp_instance): Remove
defaulting of force_single_lane.
(vect_build_slp_instance): Likewise. Pass down appropriate
force_single_lane.
(vect_analyze_slp): Add force_sigle_lane parameter and pass
it down appropriately.
(vect_slp_analyze_bb_1): Always do multi-lane SLP.
* tree-vect-loop.cc (vect_analyze_loop_2): Track two SLP
modes and adjust accordingly.
(vect_analyze_loop_1): Save the SLP mode when unrolling.
Jason Merrill [Fri, 22 Dec 2023 18:20:35 +0000 (13:20 -0500)]
libstdc++: add #pragma diagnostic
The use of #pragma GCC system_header in libstdc++ has led to bugs going
undetected for a while due to the silencing of compiler warnings that would
have revealed them promptly, and also interferes with warnings about
problematic template instantiations induced by user code.
But removing it, or even compiling with -Wsystem-header, is also problematic
due to warnings about deliberate uses of extensions.
So this patch adds #pragma GCC diagnostic as needed to suppress these
warnings.
The change to acinclude.m4 changes -Wabi to warn only in comparison to ABI
19, to avoid lots of warnings that we now mangle concept requirements, which
are in any case still experimental. I checked for any other changes against
ABI v15, and found only the <format> lambda mangling, which we can ignore.
This also enables -Wsystem-headers while building the library, so we see any
warnings not silenced by these #pragmas.
Richard Biener [Thu, 19 Sep 2024 10:37:13 +0000 (12:37 +0200)]
Always dump generated distance vectors
There's special-casing for equal access functions which bypasses
printing the distance vectors. The following makes sure we print
them always which helps debugging.
* tree-data-ref.cc (build_classic_dist_vector): Move
distance vector dumping to single caller ...
(subscript_dependence_tester): ... here, dumping always
when we succeed computing it.
Richard Biener [Tue, 17 Sep 2024 09:20:10 +0000 (11:20 +0200)]
tree-optimization/116573 - .SELECT_VL for SLP
The following restores the use of .SELECT_VL for testcases where it
is safe to use even when using SLP. I've for now restricted it
to single-lane SLP plus optimistically allow store-lane nodes
and assume single-lane roots are not widened but at most to
load-lane who should be fine.
PR tree-optimization/116573
* tree-vect-loop.cc (vect_analyze_loop_2): Allow .SELECV_VL
for SLP but disable it when there's multi-lane instances.
* tree-vect-stmts.cc (vectorizable_store): Only compute the
ptr increment when generating code.
(vectorizable_load): Likewise.
Pan Li [Wed, 11 Sep 2024 01:34:21 +0000 (09:34 +0800)]
Genmatch: Refine the gen_phi_on_cond by match_cond_with_binary_phi
This patch would like to leverage the match_cond_with_binary_phi to
match the phi on cond, and get the true/false arg if matched. This
helps a lot to simplify the implementation of gen_phi_on_cond.
Fix deep copy allocatable components in coarrays. [PR85002]
Fix code for deep copy of allocatable components in derived type nested
structures generated, but not inserted when the copy had to be done in
a coarray. Additionally fix a comment.
gcc/fortran/ChangeLog:
PR fortran/85002
* trans-array.cc (duplicate_allocatable_coarray): Allow adding
of deep copy code in the when-allocated case. Add bounds
computation before condition, because coarrays need the bounds
also when not allocated.
(structure_alloc_comps): Duplication in the coarray case is done
already, omit it. Add the deep-code when duplication a coarray.
* trans-expr.cc (gfc_trans_structure_assign): Fix comment.
Jennifer Schmitz [Tue, 17 Sep 2024 07:15:38 +0000 (00:15 -0700)]
SVE intrinsics: Fold svmul with all-zero operands to zero vector
As recently implemented for svdiv, this patch folds svmul to a zero
vector if one of the operands is a zero vector. This transformation is
applied if at least one of the following conditions is met:
- the first operand is all zeros or
- the second operand is all zeros, and the predicate is ptrue or the
predication is _x or _z.
In contrast to constant folding, which was implemented in a previous
patch, this transformation is applied as soon as one of the operands is
a zero vector, while the other operand can be a variable.
The patch was bootstrapped and regtested on aarch64-linux-gnu, no regression.
OK for mainline?
Signed-off-by: Jennifer Schmitz <jschmitz@nvidia.com>
gcc/
* config/aarch64/aarch64-sve-builtins-base.cc (svmul_impl::fold):
Add folding of all-zero operands to zero vector.
gcc/testsuite/
* gcc.target/aarch64/sve/const_fold_mul_1.c: Adjust expected
outcome.
* gcc.target/aarch64/sve/fold_mul_zero.c: New test.
aarch64: Define l1_cache_line_size for -mcpu=neoverse-v2
This is a small patch that sets the L1 cache line size for Neoverse V2.
Unlike the other cache-related constants in there this value is not used just
for SW prefetch generation (which we want to avoid for Neoverse V2 presently).
It's also used to set std::hardware_destructive_interference_size.
See the links and recent discussions in PR116662 for reference.
Some CPU tunings in aarch64 set this value to something useful, but for
generic tuning we use the conservative 256, which forces 256-byte alignment
in such atomic structures. Using a smaller value can decrease the size of such
structs during layout and should not present an ABI problem as
std::hardware_destructive_interference_size is not intended to be used for structs
in an external interface, and GCC warns about such uses.
Another place where the L1 cache line size is used is in phiopt for
-fhoist-adjacent-loads where conditional accesses to adjacent struct members
can be speculatively loaded as long as they are within the same L1 cache line.
e.g.
struct S { int i; int j; };
int
bar (struct S *x, int y)
{
int r;
if (y)
r = x->i;
else
r = x->j;
return r;
}
The Neoverse V2 L1 cache line is 64 bytes according to the TRM, so set it to
that. The rest of the prefetch parameters inherit from the generic tuning so
we don't do anything extra for software prefeteches.
Bootstrapped and tested on aarch64-none-linux-gnu.
Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
* config/aarch64/tuning_models/neoversev2.h (neoversev2_prefetch_tune):
Define.
(neoversev2_tunings): Use it.
Pan Li [Thu, 19 Sep 2024 03:03:33 +0000 (11:03 +0800)]
Match: Add interface match_cond_with_binary_phi for true/false arg
When matching the cond with 2 args phi node, we need to figure out
which arg of phi node comes from the true edge of cond block, as
well as the false edge. This patch would like to add interface
to perform the action and return the true and false arg in TREE type.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
* The x86 bootstrap test.
* The x86 fully regression test.
gcc/ChangeLog:
* gimple-match-head.cc (match_cond_with_binary_phi): Add new func
impl to match binary phi for true and false arg.
doc: Add more alias option and reorder Intel CPU -march documentation
Since r15-3539, there are requests coming in to add other alias option
documentation. This patch will add all ot them, including corei7, corei7-avx,
core-avx-i, core-avx2, atom, slm, gracemont and emerarldrapids.
Also in the patch, I reordered that part of documentation, currently all
the CPUs/products are just all over the place. I regrouped them by
date-to-now products (since the very first CPU to latest Panther Lake), P-core
(since the clients become hybrid cores, starting from Sapphire Rapids) and
E-core (since Bonnell to latest Clearwater Forest).
And in the patch, I refined the product names in documentation.
gcc/ChangeLog:
* doc/invoke.texi: Add corei7, corei7-avx, core-avx-i,
core-avx2, atom, slm, gracemont and emerarldrapids. Reorder
the -march documentation by splitting them into date-to-now
products, P-core and E-core. Refine the product names in
documentation.
Since commit r15-3594, we fixed the bugs in MASK_TYPE for AVX10.2
testcases, but we missed the following four.
The tests are not FAIL since the binutils part haven't been merged
yet, which leads to UNSUPPORTED test. But the avx512f-mask-type.h
needs to be included, otherwise, it will be compile error.
testsuite/gcc.dg/pr84877.c: Add machinery to stabilize stack aligmnent
This test awkwardly "blinks"; xfails and xpasses apparently
randomly for cris-elf using the "gdb simulator". On
inspection, I see that the stack address depends on the
number of environment variables, deliberately passed to the
simulator, each adding the size of a pointer.
This test is IMHO important enough not to be just skipped
just because it blinks (fixing the actual problem is a
different task).
I guess a random non-16 stack-alignment could happen for
other targets as well, so let's try and add a generic
machinery to "stabilize" the test as failing, by allocating
a dynamic amount to make sure it's misaligned. The most
target-dependent item here is an offset between the incoming
stack-pointer value (within main in the added framework) and
outgoing (within "xmain" as called from main when setting up
the p0 parameter). I know there are other wonderful stack
shapes, but such targets would fall under the "complicated
situations"-label and are no worse off than before.
* gcc.dg/pr84877.c: Try to make the test result consistent by
misaligning the stack.
Jason Merrill [Sun, 15 Sep 2024 09:48:46 +0000 (11:48 +0200)]
libstdc++: add braces
GCC compiles with -fno-exceptions, so __throw_exception_again is a no-op,
and compilation gives a -Wempty-body warning here, so let's wrap it as is
already done in a few other files.
Patrick Palka [Wed, 18 Sep 2024 17:50:43 +0000 (13:50 -0400)]
c++: alias of decltype(lambda) is opaque [PR116714, PR107390]
Here for
using type = decltype([]{});
static_assert(is_same_v<type, type>);
we strip the alias ahead of time during template argument coercion
which effectively transforms the template-id into
is_same_v<decltype([]{}), decltype([]{})>
which is wrong because later substitution into the template-id will
produce two new lambdas with distinct types and cause is_same_v to
return false.
This demonstrates that such aliases should be considered opaque (a
notion that we recently introduced in r15-2331-g523836716137d0).
(An alternative solution might be to consider memoizing lambda-expr
substitution rather than always producing a new lambda, but this is
much simpler.)
PR c++/116714
PR c++/107390
gcc/cp/ChangeLog:
* pt.cc (dependent_opaque_alias_p): Also return true for a
decltype(lambda) alias.
On some targets it seems that ssize_t is not defined by any of the
headers transitively included by <stdio.h>. This leads to a bootstrap
fail when jit is enabled.
hppa: Add peephole2 optimizations for REG+D loads and stores
The PA 1.x architecture only supports long displacements in
integer loads and stores. Floating-point loads and stores
only support short displacements. As a result, we have to
wait until reload is complete before generating insns with
long displacements.
The PA 2.0 architecture supports long displacements in both
integer and floating-point loads and stores.
The peephole2 optimizations added in this change are only
enabled when 14-bit long displacements aren't supported for
floating-point loads and stores.
2024-09-18 John David Anglin <danglin@gcc.gnu.org>
gcc/ChangeLog:
* config/pa/pa.h (GENERAL_REGNO_P): Define.
* config/pa/pa.md: Add SImode and SFmode peephole2
patterns to generate loads and stores with long
displacements.
Filip Kastl [Wed, 18 Sep 2024 14:38:30 +0000 (16:38 +0200)]
contrib: Set check-params-in-docs.py to skip tables of values of a param
Currently check-params-in-docs.py reports extra params being listed in
invoke.texi. However, those aren't actual params but items in a table of
possible values of the aarch64-autove-preference param.
This patch changes check-params-in-docs.py to ignore similar tables.
contrib/ChangeLog:
* check-params-in-docs.py: Skip tables of values of a param.
Remove code that skips items beginning with a number.
Richard Biener [Sun, 8 Sep 2024 09:21:19 +0000 (11:21 +0200)]
Fail vectorization when not using SLP and --param vect-force-slp == 1
The following adds --param vect-force-slp to enable the transition
to full SLP. Full SLP is enforced during stmt analysis where it
detects failed SLP discovery and at loop analysis time where it
avoids analyzing a loop with SLP disabled. Failure to SLP results
in vectorization to fail.
* params.opt (vect-force-slp): New param, default 0.
* doc/invoke.texi (--param vect-force-slp): Document.
* tree-vect-loop.cc (vect_analyze_loop_2): When analyzing
without SLP but --param vect-force-slp is 1 fail.
* tree-vect-stmts.cc (vect_analyze_stmt): Fail vectorization
for non-SLP stmts when --param vect-force-slp is 1.
[PATCH] RISC-V: Fix th.extu operands exceeding range on rv32.
The Combine Pass may generate zero_extract instructions that are out of range.
Drawing from other architectures like AArch64, we should impose restrictions
on the "*th_extu<mode>4" pattern.
gcc/
* config/riscv/thead.md (*th_extu<mode>4): Fix th.extu
operands exceeding range on rv32.
Bohan Lei [Wed, 18 Sep 2024 13:20:23 +0000 (07:20 -0600)]
[PATCH] RISC-V: Allow zero operand for DI variants of vssubu.vx
The RISC-V vector machine description relies on the helper function
`sew64_scalar_helper` to emit actual insns for the DI variants of
vssub.vx and vssubu.vx. This works with vssub.vx, but can cause
problems with vssubu.vx with the scalar operand being constant zero,
because `has_vi_variant_p` returns false, and the operand will be taken
without being loaded into a reg. The attached testcases can cause an
internal compiler error as a result.
Allowing a constant zero operand in those insns seems to be a simple
solution that only affects minimum existing code.
gcc/ChangeLog:
* config/riscv/vector.md: Allow zero operand for DI variants of
vssubu.vx
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vssubu-1.c: New test.
* gcc.target/riscv/rvv/base/vssubu-2.c: New test.
Jason Merrill [Mon, 16 Sep 2024 11:29:05 +0000 (13:29 +0200)]
c++: -Wdangling-reference diagnostic
The -Wdangling-reference diagnostic talks about the full-expression, but
prints one call, while the full-expression in a declaration is the entire
initialization. It seems more useful to point out the temporary that the
compiler thinks we might be getting a dangling reference to.
gcc/cp/ChangeLog:
* call.cc (do_warn_dangling_reference): Return temporary
instead of the call it's passed to.
(maybe_warn_dangling_reference): Adjust diagnostic.
Jason Merrill [Sun, 15 Sep 2024 11:50:04 +0000 (13:50 +0200)]
c++: -Wdangling-reference and empty class [PR115361]
We can't have a dangling reference to an empty class unless it's
specifically to that class or one of its bases. This was giving a
false positive on the _ExtractKey pattern in libstdc++ hashtable.h.
This also adjusts the order of arguments to reference_related_p, which
is relevant for empty classes (unlike scalars).
Several of the classes in the testsuite needed to gain data members to
continue to warn.
match.pd: Check trunc_mod vector obtap before folding.
In the pattern X - (X / Y) * Y to X % Y, this patch guards the
simplification for vector types by a check for:
1) Support of the mod optab for vectors OR
2) Application before vector lowering for non-VL vectors.
This is to prevent reverting vectorization of modulo to div/mult/sub
if the target does not support vector mod optab.
The patch was bootstrapped and tested with no regression on
aarch64-linux-gnu and x86_64-linux-gnu.
OK for mainline?
Signed-off-by: Jennifer Schmitz <jschmitz@nvidia.com>
gcc/
PR tree-optimization/116569
* match.pd: Guard simplification to trunc_mod with check for
mod optab support.
gcc/testsuite/
PR tree-optimization/116569
* gcc.dg/torture/pr116569.c: New test.
reload1.cc: rtl-optimization/116326 - Use RELOAD_ELIMINABLE_REGS.
The new macro is required because reload and LRA are using different
representations for a multi-register frame pointer. As ELIMINABLE_REGS
is used to initialize static const objects, it can't depend on -mlra.
PR rtl-optimization/116326
gcc/
* reload1.cc (reg_eliminate_1): Initialize from
RELOAD_ELIMINABLE_REGS if defined.
* config/avr/avr.h (RELOAD_ELIMINABLE_REGS): Copy from ELIMINABLE_REGS.
(ELIMINABLE_REGS): Don't mention sub-regnos of the frame pointer.
* doc/tm.texi.in (Eliminating Frame Pointer and Arg Pointer)
<RELOAD_ELIMINABLE_REGS>: Add documentation.
* doc/tm.texi: Rebuild.
gcc/testsuite/
* gcc.target/avr/torture/lra-pr116324.c: New test.
* gcc.target/avr/torture/lra-pr116325.c: New test.
AVR: doc/install.texi - Update avr specific installation notes.
gcc/
* doc/install.texi (Host/Target specific installation notes for GCC)
[avr]: Update web links to AVR-LibC and AVR Options.
Remove outdated note about Binutils.
Richard Biener [Wed, 18 Sep 2024 07:52:55 +0000 (09:52 +0200)]
tree-optimization/116585 - SSA corruption with split_constant_offset
split_constant_offset when looking through SSA defs can end up
picking SSA leafs that are subject to abnormal coalescing. This
can lead to downstream consumers to insert code based on the
result (like from dataref analysis) in places that violate constraints
for abnormal coalescing. It's best to not expand defs whose operands
are subject to abnormal coalescing - and not either do something when
a subexpression has operands like that already.
PR tree-optimization/116585
* tree-data-ref.cc (split_constant_offset_1): When either
operand is subject to abnormal coalescing do no further
processing.
Andrew Pinski [Tue, 17 Sep 2024 22:03:21 +0000 (15:03 -0700)]
phiopt: C++ify cond_if_else_store_replacement
This C++ify cond_if_else_store_replacement by using range fors
and changing using a std::pair instead of 2 vecs.
I had a hard time understanding the code when there was 2 vecs
so having a vec of a pair makes it easier to understand the relationship
between the 2.
gcc/ChangeLog:
* tree-ssa-phiopt.cc (cond_if_else_store_replacement): Use
range fors and use one vec for then/else stores instead of 2.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
Andrew Pinski [Tue, 17 Sep 2024 21:26:54 +0000 (14:26 -0700)]
phiopt: Add some details dump to cselim
While trying to debug PR 116747, I noticed there was no dump
saying what was done. So this adds the debug dump and it helps
debug what is going on in PR 116747 too.
After this patch:
vec_sat_s_add_int64_t_fmt_1:
...
vsetvli a6,zero,e64,m1,ta,ma
vsadd.vv v1,v1,v2
...
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/autovec.md (ssadd<mode>3): Add new pattern for
signed integer vector SAT_ADD.
* config/riscv/riscv-protos.h (expand_vec_ssadd): Add new func
decl for vector ssadd expanding.
* config/riscv/riscv-v.cc (expand_vec_ssadd): Add new func impl
to expand vector ssadd pattern.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_data.h: Add test
data for vector ssadd.
* gcc.target/riscv/rvv/autovec/vec_sat_arith.h: Add test helper
macros.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-1.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-2.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-3.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-4.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-1.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-2.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-3.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-4.c: New test.
Michael Meissner [Wed, 18 Sep 2024 01:05:27 +0000 (21:05 -0400)]
PR 89213: Add better support for shifting vectors with 64-bit elements
This patch fixes PR target/89213 to allow better code to be generated to do
constant shifts of V2DI/V2DF vectors. Previously GCC would do constant shifts
of vectors with 64-bit elements by using:
XXSPLTIB 32,4
VEXTSB2D 0,0
VSRAD 2,2,0
I.e., the PowerPC does not have a VSPLTISD instruction to load -15..14 for the
64-bit shift count in one instruction. Instead, it would need to load a byte
and then convert it to 64-bit.
With this patch, GCC now realizes that the vector shift instructions will look
at the bottom 6 bits for the shift count, and it can use either a VSPLTISW or
XXSPLTIB instruction to load the shift count.
2024-09-17 Michael Meissner <meissner@linux.ibm.com>
gcc/
PR target/89213
* config/rs6000/altivec.md (UNSPEC_VECTOR_SHIFT): New unspec.
(VSHIFT_MODE): New mode iterator.
(vshift_code): New code iterator.
(vshift_attr): New code attribute.
(altivec_<mode>_<vshift_attr>_const): New pattern to optimize
vector long long/int shifts by a constant.
(altivec_<mode>_shift_const): New helper insn to load up a
constant used by the shift operation.
* config/rs6000/predicates.md (vector_shift_constant): New
predicate.
Marek Polacek [Tue, 17 Sep 2024 18:34:30 +0000 (14:34 -0400)]
c++: fix constexpr cast from void* diag issue [PR116741]
The result of build_fold_indirect_ref can be a COMPONENT_REF in
which case using DECL_SOURCE_LOCATION will crash. Look at its op1
instead.
PR c++/116741
gcc/cp/ChangeLog:
* constexpr.cc (cxx_eval_constant_expression) <case CONVERT_EXPR>: If
the result of build_fold_indirect_ref is a COMPONENT_REF, use its op1.
Check DECL_P before calling inform.
Marek Polacek [Thu, 29 Aug 2024 14:40:50 +0000 (10:40 -0400)]
c++: ICE with -Wtautological-compare in template [PR116534]
Pre r14-4793, we'd call warn_tautological_cmp -> operand_equal_p
with operands wrapped in NON_DEPENDENT_EXPR, which works, since
o_e_p bails for codes it doesn't know. But now we pass operands
not encapsulated in NON_DEPENDENT_EXPR, and crash, because the
template tree for &a[x] has null DECL_FIELD_OFFSET.
This patch extends r12-7797 to cover the case when DECL_FIELD_OFFSET
is null.
PR c++/116534
gcc/ChangeLog:
* fold-const.cc (operand_compare::operand_equal_p): If either
field's DECL_FIELD_OFFSET is null, compare the fields with ==.
SVE intrinsics: Fold svdiv with all-zero operands to zero vector
This patch folds svdiv where one of the operands is all-zeros to a zero
vector, if one of the following conditions holds:
- the dividend is all zeros or
- the divisor is all zeros, and the predicate is ptrue or the predication
is _x or _z.
This case was not covered by the recent patch that implemented constant
folding, because that covered only cases where both operands are
constant vectors. Here, the operation is folded as soon as one of the operands
is a constant zero vector.
Folding of divison by 0 to return 0 is in accordance with
the semantics of sdiv and udiv.
The patch was bootstrapped and regtested on aarch64-linux-gnu, no regression.
OK for mainline?
Signed-off-by: Jennifer Schmitz <jschmitz@nvidia.com>
gcc/
* config/aarch64/aarch64-sve-builtins-base.cc (svdiv_impl::fold):
Add folding of all-zero operands to zero vector.
gcc/testsuite/
* gcc.target/aarch64/sve/fold_div_zero.c: New test.
* gcc.target/aarch64/sve/const_fold_div_1.c: Adjust expected
outcome.
aarch64: Improve vector constant generation using SVE INDEX instruction [PR113328]
SVE's INDEX instruction can be used to populate vectors by values starting from
"base" and incremented by "step" for each subsequent value. We can take
advantage of it to generate vector constants if TARGET_SVE is available and the
base and step values are within [-16, 15].
f_v4si:
adrp x0, .LC4
ldr q0, [x0, #:lo12:.LC4]
ret
.LC4:
.word 0
.word 1
.word 2
.word 3
With this patch, we generate an INDEX instruction instead if TARGET_SVE is
available.
f_v4si:
index z0.s, #0, #1
ret
PR target/113328
gcc/ChangeLog:
* config/aarch64/aarch64.cc (aarch64_simd_valid_immediate): Improve
handling of some ADVSIMD vectors by using SVE's INDEX if TARGET_SVE is
available.
(aarch64_output_simd_mov_immediate): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/sve/acle/general/dupq_1.c: Update test to use
SVE's INDEX instruction.
* gcc.target/aarch64/sve/acle/general/dupq_2.c: Likewise.
* gcc.target/aarch64/sve/acle/general/dupq_3.c: Likewise.
* gcc.target/aarch64/sve/acle/general/dupq_4.c: Likewise.
* gcc.target/aarch64/sve/vec_init_3.c: New test.
Gaius Mulley [Mon, 16 Sep 2024 17:18:11 +0000 (18:18 +0100)]
modula2: gcc/m2/Make-lang.in fix includes during bootstrap build
This patch fixes the include directories used when building objects in
gm2-compiler-boot. It adds the missing gm2-gcc directory and uses a
new variable GM2_BOOT_INCLUDES for all gm2-compiler-boot rules.
gcc/m2/ChangeLog:
* Make-lang.in (GM2_BOOT_INCLUDES): New variable.
(m2/gm2-compiler-boot/M2GCCDeclare.o): Rewrite to use
GM2_BOOT_INCLUDES.
(m2/gm2-compiler-boot/M2Error.o): Ditto.
(m2/gm2-compiler-boot/%.o): Ditto.
AVR-LibC has moved to GitHub, adjust web links:
https://github.com/avrdudes/avr-libc (project)
https://avrdudes.github.io/avr-libc/avr-libc-user-manual (wwwdocs)
gcc/
* doc/invoke.texi (AVR Options): Update AVR-LibC weblink from
nongnu.org to https://github.com/avrdudes/avr-libc
* doc/extend.texi (AVR Named Address Spaces): Same.
(AVR Function Attributes): Same.
* doc/install.texi (Cross-Compiler-Specific Options, AVR): Same.
Soumya AR [Tue, 10 Sep 2024 08:48:44 +0000 (14:18 +0530)]
aarch64: Emit ADD X, Y, Y instead of SHL X, Y, #1 for SVE instructions.
On Neoverse V2, SVE ADD instructions have a throughput of 4, while shift
instructions like SHL have a throughput of 2. We can lean on that to emit code
like:
add z31.b, z31.b, z31.b
instead of:
lsl z31.b, z31.b, #1
The implementation of this change for SVE vectors is similar to a prior patch
<https://gcc.gnu.org/pipermail/gcc-patches/2024-August/659958.html> that adds
the above functionality for Neon vectors.
Here, the machine descriptor pattern is split up to separately accommodate left
and right shifts, so we can specifically emit an add for all left shifts by 1.
The patch was bootstrapped and regtested on aarch64-linux-gnu, no regression.
OK for mainline?
Signed-off-by: Soumya AR <soumyaa@nvidia.com>
gcc/ChangeLog:
* config/aarch64/aarch64-sve.md (*post_ra_v<optab><mode>3): Split pattern
to accomodate left and right shifts separately.
(*post_ra_v_ashl<mode>3): Matches left shifts with additional
constraint to check for shifts by 1.
(*post_ra_v_<optab><mode>3): Matches right shifts.
Gaius Mulley [Mon, 16 Sep 2024 12:57:34 +0000 (13:57 +0100)]
PR modula2/116181 Use GCC tree location_t and separate pointer types
This patch fixes all remaining -Wodr warnings in the modula-2 front end.
It removes the m2 Tree and m2 Location definitions and uses tree and
location_t throughout. This allows the bootstrap tool mc to pick up the
GCC definitions for these data types (for the C translation of m2 sources).
The patch introduces a new module CDataTypes which contain two pointer
types: CharStar and ConstCharStar. These map onto their C counterparts
when processed by mc however currently gm2 treats them as ADDRESS.
It might be sensible to have the gm2 versions of these data types
implemented though a builtin module in the future.
AVR: Tweak >= and < compares with consts that are 0 mod 256.
The >= and < comparisons may skip comparing the lower bytes when
the according bytes of the constant are all zeros. For example,
uint16 >= 0x1200
is true iff
hi8 (uint16) >= hi8 (0x1200)
and similar for uint16 < 0x1200. Some comparisons against constants
that are an integral power of 256 where already handled in the split
preparation. That code has been outsourced to new avr_maybe_cmp_lsr()
which may change the operands such that the resulting insns become
a comparison of the high bytes against 0 plus a EQ / NE branch.
For example,
uint32 >= 0x10000
can be rewritten as
(uint32 >> 16) != 0.
The according asm output is performed by new avr_out_cmp_lsr().
gcc/
* config/avr/avr-protos.h (avr_out_cmp_lsr, avr_maybe_cmp_lsr): New.
* config/avr/avr.cc (avr_maybe_cmp_lsr, avr_out_cmp_lsr): New functions.
(avr_out_compare) [GEU, LTU]: Start output at byte CTZ(xval) / 8.
(avr_adjust_insn_length) [ADJUST_LEN_CMP_LSR]: Handle case.
* config/avr/avr.md (adjust_len) <cmp_lsr>: New attr value.
(*cmp<mode>_lsr): New define_insn_and_split.
(cbranch<mode>4_insn): When splitting, run avr_maybe_cmp_lsr()
which may map the operands to *cmp<mode>_lsr.
gcc/testsuite/
* gcc.target/avr/torture/cmp-lsr-i32.c: New test.
* gcc.target/avr/torture/cmp-lsr-u16.c: New test.
* gcc.target/avr/torture/cmp-lsr-u24.c: New test.
* gcc.target/avr/torture/cmp-lsr-u32.c: New test.
* gcc.target/avr/torture/cmp-lsr-u64.c: New test.
Andreas Schwab [Thu, 12 Sep 2024 11:55:09 +0000 (13:55 +0200)]
riscv: Fix duplicate assmbler label in @tlsdesc<mode> insn
Use %= instead of maintaining a sequence number manually, so that it
doesn't result in a duplicate assembler label when the insn is duplicated.
PR target/116693
* config/riscv/riscv.cc (riscv_legitimize_tls_address): Don't pass
seqno to gen_tlsdesc and remove it.
* config/riscv/riscv.md (@tlsdesc<mode>): Remove operand 1. Use
%= instead of %1 in template.
Jonathan Wakely [Mon, 16 Sep 2024 09:04:40 +0000 (10:04 +0100)]
libstdc++: Add .editorconfig files
These config files set default formatting behaviour for a large number
of common editors, see https://editorconfig.org
The root=true setting in libstdc++-v3/.editorconfig prevents looking in
parent directories for additional settings. If we add a .editorconfig at
the top-level we might want to use root=true there instead, and allow
libstdc++-v3/.editorconfig to inherit some some settings from there (and
only override things we want to do differently).
libstdc++-v3/ChangeLog:
* .editorconfig: New file.
* include/std/.editorconfig: New file.
Andrew Pinski [Sun, 15 Sep 2024 23:43:24 +0000 (16:43 -0700)]
vect: Set pattern_stmt_p on the newly created stmt_vec_info
While adding simple_dce_worklist to the vectorizer, there was a regression
due to the slp patterns would create a SSA name but never free it even if it
never existed in the IR (this case as addsub but complex ones had the same issue).
The reason why it was never freed was the stmt_vec_info was not marked as a pattern stmt,
unlike the other pattern stmts that use vect_init_pattern_stmt instead of vec_info::add_pattern_stmt
(which is used for SLP patterns).
Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* tree-vectorizer.cc (vec_info::add_pattern_stmt): Set pattern_stmt_p.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
Mikael Morin [Sun, 7 Jul 2024 09:00:51 +0000 (11:00 +0200)]
fortran: Remove useless nested end of scalarization chain handling
Remove the special handling of end of nested scalarization chains, which
advanced the chain to an element of a parent chain when the current one
was reaching its end.
That handling was superfluous as nested chains correspond to nested
scalarizations of subexpressions and the scalarizations don't extend beyond
their associated subexpression and don't use any scalarisation element from
the parent expression.
No change of behaviour, as the GFC_SE struct is supposed to be in its final
state anyway when the last element from the chain has been consumed.
gcc/fortran/ChangeLog:
* trans-expr.cc (gfc_advance_se_ss_chain): Don't use an element
from the parent scalarization chain when the current chain reaches
its end.
Jason Merrill [Sun, 15 Sep 2024 09:34:43 +0000 (11:34 +0200)]
c++: __extension__ and -Wconditionally-supported
When we're explicitly choosing GCC extensions, we similarly shouldn't
complain about optional features that GCC provides. This particular pattern
of cast between function and object pointer is used by gthr-posix.h on some
targets, including linux-gnu before glibc 2.34.
gcc/cp/ChangeLog:
* parser.cc (cp_parser_unary_expression) [RID_EXTENSION]: Also
suppress -Wconditionally-supported.
Jason Merrill [Sun, 15 Sep 2024 14:02:13 +0000 (16:02 +0200)]
c++: conversion location
It seems more useful for a conversion to have the location of the source
expression rather than the enclosing expression, such as a call that might
convert multiple arguments in different ways.
As a result, in srcloc17.C the recorded location of 'e' when
copy-initialized became that of the initializer rather than the variable,
since the semantic was to convert the initializer (at its location) and then
initialize the variable from the resulting prvalue. If we instead
direct-initialize the variable, the location of the constructor call is that
of the variable.
gcc/cp/ChangeLog:
* call.cc (convert_like_internal) [ck_user]: Use iloc_sentinel.
Jonathan Wakely [Wed, 4 Sep 2024 20:31:58 +0000 (21:31 +0100)]
libstdc++: Adjust std::span::iterator to be ADL-proof
Because std::span<Incomplete> can be useful, it makes sense to define
std::span<Incomplete>::iterator such that Incomplete is not an
associated class, and so the compiler won't attempt to complete it when
doing ADL for span iterators (including during the definition of
std::span<Incomplete>::const_iterator which checks that iterator
satisfies std::input_or_output_iterator).
We can't make this change for std::vector<Incomplete> because it would
change the mangled name of std::vector<Incomplete>::iterator which would
affect the mangled names of templates and functions written by users.
We can do the same thing for std::basic_stacktrace<Alloc> just so that
Alloc is not an associated class. This is probably less beneficial, as
Alloc can't be incomplete, and using SomeAllocator<Incomplete> as the
allocator parameter doesn't seem useful. But simply making the
stacktrace iterator not use Alloc for ADL lookup seems worthwhile. This
is doable because std::stacktrace is part of C++23 so its ABI isn't
considered stable yet.
libstdc++-v3/ChangeLog:
* include/std/span (span::__iter_tag): Declare nested type.
(span::iterator): Use __iter_tag as second template argument.
* include/std/stacktrace (basic_stacktrace::iterator): Use _Impl
as second template argument.
Jonathan Wakely [Mon, 15 Jan 2024 14:09:21 +0000 (14:09 +0000)]
libstdc++: Enable most of <chrono> for freestanding
This makes durations, time points and calendrical types available for
freestanding. The clocks and time zone utilities are disabled for
freestanding, as they require functions in the hosted lib.
Add support for a new macro _GLIBCXX_NO_FREESTANDING_CHRONO which can be
used to explicitly disable <chrono> for freestanding.
libstdc++-v3/ChangeLog:
* doc/xml/manual/using.xml (_GLIBCXX_NO_FREESTANDING_CHRONO):
Document macro.
* doc/html/*: Regenerate.
* include/bits/chrono.h [_GLIBCXX_NO_FREESTANDING_CHRONO]:
Only include <bits/require_hosted.h> when this macro is defined.
[_GLIBCXX_HOSTED]: Only define clocks for hosted.
* include/bits/version.def (chrono_udls): Remove hosted=yes.
* include/bits/version.h: Regenerate.
* include/std/chrono [_GLIBCXX_HOSTED]: Only define clocks and
time zone utilities for hosted.
* testsuite/std/time/freestanding.cc: New test.
Jonathan Wakely [Wed, 22 May 2024 15:49:31 +0000 (16:49 +0100)]
libstdc++: Add assertion for valid facet type arguments
LWG 436 confirmed that const-qualified types are valid arguments for
Facet template parameters, but volatile-qualified types are not. Add an
assertion to locale::combine to check for valid types.
libstdc++-v3/ChangeLog:
* include/bits/locale_classes.h (__is_facet): New helper.
* include/bits/locale_classes.tcc (locale::combine): Check that
_Facet type is valid.
Jonathan Wakely [Tue, 9 Jan 2024 23:39:14 +0000 (23:39 +0000)]
libstdc++: Make PSTL algorithms accept C++20 iterators [PR110512]
This is a step towards implementing the C++23 change P2408R5, "Ranges
iterators as inputs to non-Ranges algorithms". C++20 random access
iterators which do not meet the Cpp17RandomAccessIterator requirements
will now be recognized by the PSTL algorithms.
As noted by Patrick, P2408R5 only relaxes the requirements for
non-mutating algorithms, but this relaxes them for all parallel
algorithms. I believe that's OK. A call with a type which previously
didn't compile at all was undefined, so we're allowed to start accepting
those calls if the type satisfies std::random_access_iterator. However,
this also causes a change in behaviour for calls with arguments which
satisfy std::random_access_iterator and meet the Cpp17ForwardIterator
requirements but not the Cpp17RandomAccessIterator requirements. The
algorithms will dispatch to a different implementation now. I believe
that's also OK. The algorithms should give the same results whether
acting on forward iterators or random access iterators, just more
efficiently for the latter.
Additionally, we can optimize the C++17 implementation by using
std::__and_, and use std::__remove_cvref_t and std::__iter_category_t
for readability. This diverges from the upstream PSTL, but since libc++
is no longer using that upstream (so we're the only consumer of this
code) I think it's reasonable to use libstdc++ extensions in localized
places like this. Rebasing this small header on upstream should not be
difficult.
libstdc++-v3/ChangeLog:
PR libstdc++/110512
* include/pstl/execution_impl.h (__are_random_access_iterators):
Recognize C++20 random access iterators, and use more efficient
implementations.
* testsuite/25_algorithms/pstl/110512.cc: New test.
c++, coroutines: Fix handling of bool await_suspend() [PR115905].
As noted in the PR the action of the existing implementation was to
treat a false value from await_suspend () as equivalent to "do not
suspend". Actually it needs to be the equivalent of "resume" - and
we need to restart the dispatcher - since the await_suspend() body
could have already resumed the coroutine.
See also https://github.com/cplusplus/CWG/issues/601 (NAD) for more
discussion.
Since we need to amend the await expansion and the actor build, take
the opportunity to clean up and modernise the code there. Note that
we need to make the jump back to the dispatcher without any scope
exit cleanups (so we have to use the .CO_SUSPN IFN to do this).
PR c++/115905
gcc/cp/ChangeLog:
* coroutines.cc (struct coro_aw_data): Add a member for the
restart dispatch label.
(expand_one_await_expression): Rework to modernise and to
handle the boolean await_suspend() case.
(build_actor_fn): Rework the dispatcher and allow for a jump
back to the dispatcher.
Andrew Pinski [Fri, 13 Sep 2024 17:47:29 +0000 (10:47 -0700)]
phi-opt: Improve heuristics for factoring out with constant (again) [PR116699]
The heuristics for factoring out with a constant checks that the assignment statement
is the last statement of the basic block but sometimes there is a predicate or a nop statement
after the assignment. Rejecting this case does not make sense since both predicates and nop
statements are removed and don't contribute any instructions. So we should skip over them
when checking if the assignment statement was the last statement in the basic block.
phi-opt-factor-1.c's f0 is such an example where it should catch it at phiopt1 (before predicates are removed)
and should happen in a similar way as f1 (which uses a temporary variable rather than return).
Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/116699
gcc/ChangeLog:
* tree-ssa-phiopt.cc (factor_out_conditional_operation): Skip over nop/predicates
for seeing the assignment is the last statement.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/phi-opt-factor-1.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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