Martin Sebor [Tue, 13 Mar 2018 15:33:16 +0000 (15:33 +0000)]
PR tree-optimization/84725 - enable attribute nonstring for all narrow character types
gcc/c-family/ChangeLog:
PR tree-optimization/84725
* c-attribs.c (handle_nonstring_attribute): Allow attribute nonstring
with all three narrow character types, including their qualified forms.
gcc/testsuite/ChangeLog:
PR tree-optimization/84725
* c-c++-common/Wstringop-truncation-4.c: New test.
* c-c++-common/attr-nonstring-5.c: New test.
[SLP/AArch64] Fix unpack handling for big-endian SVE
I hadn't realised that on big-endian targets, VEC_UNPACK*HI_EXPR unpacks
the low-numbered lanes and VEC_UNPACK*LO_EXPR unpacks the high-numbered
lanes. This meant that both the SVE patterns and the handling of
fully-masked loops were wrong.
The patch deals with that by making sure that all vec_unpack* optabs
are define_expands, using BYTES_BIG_ENDIAN to choose the appropriate
define_insn. This in turn meant that we can get rid of the duplication
between the signed and unsigned patterns for predicates. (We provide
implementations of both the signed and unsigned optabs because the sign
doesn't matter for predicates: every element contains only one
significant bit.)
Also, the float unpacks need to unpack one half of the input vector,
but the unpacked upper bits are "don't care". There are two obvious
ways of handling that: use an unpack (filling with zeros) or use a ZIP
(filling with a duplicate of the low bits). The code previously used
unpacks, but the sequence involved a subreg that is semantically an
element reverse on big-endian targets. Using the ZIP patterns avoids
that, and at the moment there's no reason to prefer one over the other
for performance reasons, so the patch switches to ZIP unconditionally.
As the comment says, it would be easy to optimise this later if UUNPK
turns out to be better for some implementations.
2018-03-13 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-vect-loop-manip.c (vect_maybe_permute_loop_masks):
Reverse the choice between VEC_UNPACK_LO_EXPR and VEC_UNPACK_HI_EXPR
for big-endian.
* config/aarch64/iterators.md (hi_lanes_optab): New int attribute.
* config/aarch64/aarch64-sve.md
(*aarch64_sve_<perm_insn><perm_hilo><mode>): Rename to...
(aarch64_sve_<perm_insn><perm_hilo><mode>): ...this.
(*extend<mode><Vwide>2): Rename to...
(aarch64_sve_extend<mode><Vwide>2): ...this.
(vec_unpack<su>_<perm_hilo>_<mode>): Turn into a define_expand,
renaming the old pattern to...
(aarch64_sve_punpk<perm_hilo>_<mode>): ...this. Only define
unsigned packs.
(vec_unpack<su>_<perm_hilo>_<SVE_BHSI:mode>): Turn into a
define_expand, renaming the old pattern to...
(aarch64_sve_<su>unpk<perm_hilo>_<SVE_BHSI:mode>): ...this.
(*vec_unpacku_<perm_hilo>_<mode>_no_convert): Delete.
(vec_unpacks_<perm_hilo>_<mode>): Take BYTES_BIG_ENDIAN into
account when deciding which SVE instruction the optab should use.
(vec_unpack<su_optab>_float_<perm_hilo>_vnx4si): Likewise.
gcc/testsuite/
* gcc.target/aarch64/sve/unpack_fcvt_signed_1.c: Expect zips rather
than unpacks.
* gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c: Likewise.
* gcc.target/aarch64/sve/unpack_float_1.c: Likewise.
tlsdesc calls are guaranteed to preserve all Advanced SIMD registers,
but are not guaranteed to preserve the SVE extension of them.
The calls also don't preserve the SVE predicate registers.
The long-term plan for handling the SVE vector registers is CLOBBER_HIGH,
which adds a clobber equivalent of TARGET_HARD_REGNO_CALL_PART_CLOBBERED.
The pattern can then directly model the fact that the low 128 bits are
preserved and the upper bits are clobbered.
However, it's too late now for that to be included in GCC 8, so this
patch conservatively treats the whole vector register as being clobbered.
This has the obvious disadvantage that compiling for SVE can make NEON
code worse, but I don't think there's much we can do about that until
CLOBBER_HIGH is in.
2018-03-13 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* config/aarch64/aarch64.md (V4_REGNUM, V8_REGNUM, V12_REGNUM)
(V20_REGNUM, V24_REGNUM, V28_REGNUM, P1_REGNUM, P2_REGNUM, P3_REGNUM)
(P4_REGNUM, P5_REGNUM, P6_REGNUM, P8_REGNUM, P9_REGNUM, P10_REGNUM)
(P11_REGNUM, P12_REGNUM, P13_REGNUM, P14_REGNUM): New define_constants.
(tlsdesc_small_<mode>): Turn a define_expand and use
tlsdesc_small_sve_<mode> for SVE. Rename original define_insn to...
(tlsdesc_small_advsimd_<mode>): ...this.
(tlsdesc_small_sve_<mode>): New pattern.
gcc/testsuite/
* gcc.target/aarch64/sve/tls_1.c: New test.
* gcc.target/aarch64/sve/tls_2.C: Likewise.
One advantage of the new permute handling compared to the old way is
that we can now easily take advantage of the vectoriser's divmod patterns
for SVE.
2018-03-13 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* config/aarch64/iterators.md (UNSPEC_SMUL_HIGHPART)
(UNSPEC_UMUL_HIGHPART): New constants.
(MUL_HIGHPART): New int iteraor.
(su): Handle UNSPEC_SMUL_HIGHPART and UNSPEC_UMUL_HIGHPART.
* config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart): New
define_expand.
(*<su>mul<mode>3_highpart): New define_insn.
gcc/testsuite/
* gcc.target/aarch64/sve/mul_highpart_1.c: New test.
* gcc.target/aarch64/sve/mul_highpart_1_run.c: Likewise.
Martin Liska [Tue, 13 Mar 2018 08:20:27 +0000 (09:20 +0100)]
Fix PTA info in IPA ICF (PR ipa/84658).
2018-03-13 Martin Liska <mliska@suse.cz>
PR ipa/84658.
* (sem_item_optimizer::sem_item_optimizer): Initialize new
vector.
(sem_item_optimizer::~sem_item_optimizer): Release it.
(sem_item_optimizer::merge_classes): Register variable aliases.
(sem_item_optimizer::fixup_pt_set): New function.
(sem_item_optimizer::fixup_points_to_sets): Likewise.
* ipa-icf.h: Declare new variables and functions.
2018-03-13 Martin Liska <mliska@suse.cz>
Jakub Jelinek [Tue, 13 Mar 2018 08:12:59 +0000 (09:12 +0100)]
re PR middle-end/84834 (ICE: tree check: expected integer_cst, have complex_cst in to_wide, at tree.h:5527)
PR middle-end/84834
* match.pd ((A & C) != 0 ? D : 0): Use INTEGER_CST@2 instead of
integer_pow2p@2 and test integer_pow2p in condition.
(A < 0 ? C : 0): Similarly for @1.
Jakub Jelinek [Tue, 13 Mar 2018 08:04:54 +0000 (09:04 +0100)]
re PR target/84828 (ICE in verify_flow_info at gcc/cfghooks.c:265)
PR target/84828
* reg-stack.c (change_stack): Change update_end var from int to
rtx_insn *, if non-NULL don't update just BB_END (current_block), but
also call set_block_for_insn on the newly added insns and rescan.
Jakub Jelinek [Mon, 12 Mar 2018 23:40:20 +0000 (00:40 +0100)]
re PR c++/84808 (ICE with constexpr and array)
PR c++/84808
* constexpr.c (find_array_ctor_elt): Don't use elt reference after
first potential CONSTRUCTOR_ELTS reallocation. Convert dindex to
sizetype. Formatting fixes.
rs6000: sysv: Don't pass SFmode in varargs in FPRs
This makes the float32-basic.c testcase work on sysv (32-bit Linux).
"float" is promoted to "double" for varargs. The ABI also only defines
the use of double precision in varargs. But _Float32 is not promoted.
Since there is no way of passing single-precision float in FPRs we
should pass SFmode in GPRs (or memory) instead. This is similar to
the 64-bit ABI.
There still are situations where we have stale LOG_LINKS. This causes
combine to try two-insn combinations I2->I3 where the register set by
I2 is used before I3 as well. Not good.
This patch fixes it by checking for this situation in can_combine_p
(similar to what we already do for three and four insn combinations).
Paul Thomas [Sun, 11 Mar 2018 22:25:11 +0000 (22:25 +0000)]
re PR fortran/84546 (Bad sourced allocation of CLASS(*) with source with CLASS(*) component)
2018-03-11 Paul Thomas <pault@gcc.gnu.org>
PR fortran/84546
* trans-array.c (structure_alloc_comps): Make sure that the
vptr is copied and that the unlimited polymorphic _len is used
to compute the size to be allocated.
* trans-expr.c (gfc_get_class_array_ref): If unlimited, use the
unlimited polymorphic _len for the offset to the element.
(gfc_copy_class_to_class): Set the new 'unlimited' argument.
* trans.h : Add the boolean 'unlimited' to the prototype.
2018-03-11 Paul Thomas <pault@gcc.gnu.org>
PR fortran/84546
* gfortran.dg/unlimited_polymorphic_29.f90 : New test.
Steven G. Kargl [Sun, 11 Mar 2018 21:34:40 +0000 (21:34 +0000)]
check.c (gfc_check_kill): Check pid and sig are scalar.
2018-03-11 Steven G. Kargl <kargls@gcc.gnu.org>
* check.c (gfc_check_kill): Check pid and sig are scalar.
(gfc_check_kill_sub): Restrict kind to 4 and 8.
* intrinsic.c (add_function): Sort keyword list. Add pid and sig
keywords for KILL. Remove redundant *back="back" in favor of the
original *bck="back".
(add_subroutines): Sort keyword list. Add pid and sig keywords
for KILL.
* intrinsic.texi: Fix documentation to consistently use pid and sig.
* iresolve.c (gfc_resolve_kill): Kind can only be 4 or 8. Choose the
correct function.
(gfc_resolve_rename_sub): Add comment.
Jakub Jelinek [Sun, 11 Mar 2018 16:50:08 +0000 (17:50 +0100)]
re PR debug/58150 (debug info about definition of enum class not emitted if the declaration was already used in a class)
PR debug/58150
* dwarf2out.c (gen_enumeration_type_die): Don't guard adding
DW_AT_declaration for ENUM_IS_OPAQUE on -gdwarf-4 or -gno-strict-dwarf,
but on TYPE_SIZE. Don't do anything for ENUM_IS_OPAQUE if not creating
a new die. Don't set TREE_ASM_WRITTEN if ENUM_IS_OPAQUE. Guard
addition of most attributes on !orig_type_die or the attribute not
being present already. Assert TYPE_VALUES is NULL for ENUM_IS_OPAQUE.
Vladimir Makarov [Sat, 10 Mar 2018 16:32:21 +0000 (16:32 +0000)]
revert: re PR target/83712 ("Unable to find a register to spill" when compiling for thumb1)
2018-03-10 Vladimir Makarov <vmakarov@redhat.com>
Reverting patch:
2018-03-09 Vladimir Makarov <vmakarov@redhat.com>
PR target/83712
* lra-assigns.c (assign_by_spills): Return a flag of reload
assignment failure. Do not process the reload assignment
failures. Do not spill other reload pseudos if they has the same
reg class.
(lra_assign): Add a return arg. Set up from the result of
assign_by_spills call.
(find_reload_regno_insns, lra_split_hard_reg_for): New functions.
* lra-constraints.c (split_reg): Add a new arg. Use it instead of
usage_insns if it is not NULL.
(spill_hard_reg_in_range): New function.
(split_if_necessary, inherit_in_ebb): Pass a new arg to split_reg.
* lra-int.h (spill_hard_reg_in_range, lra_split_hard_reg_for): New
function prototypes.
(lra_assign): Change prototype.
* lra.c (lra): Add code to deal with fails by splitting hard reg
live ranges.
Alexandre Oliva [Sat, 10 Mar 2018 06:42:40 +0000 (06:42 +0000)]
[IEPM] [PR debug/84620] use constant form for DW_AT_GNU_entry_view
When outputting entry views in symbolic mode, we used to use a lbl_id,
but that outputs the view as an addr, perhaps even in an indirect one,
which is all excessive and undesirable for a small assembler-computed
constant.
Introduce a new value class for symbolic views, so that we can output
the labels as constant data, using as narrow forms as possible, but
wide enough for any symbolic views output in the compilation. We
don't know exactly where the assembler will reset views, but we count
the symbolic views since known reset points and use that as an upper
bound for view numbers.
Ideally, we'd use uleb128, but then the compiler would have to defer
.debug_info offset computation to the assembler. I'm not going there
for now, so a symbolic uleb128 assembler constant in an attribute is
not something GCC can deal with ATM.
Peter Bergner [Fri, 9 Mar 2018 22:43:59 +0000 (16:43 -0600)]
re PR target/83969 (ICE in final_scan_insn, at final.c:2997 (error: could not split insn) for powerpc targets)
gcc/
PR target/83969
* config/rs6000/rs6000.c (rs6000_offsettable_memref_p): New prototype.
Add strict argument and use it.
(rs6000_split_multireg_move): Update for new strict argument.
(mem_operand_gpr): Disallow all non-offsettable addresses.
* config/rs6000/rs6000.md (*movdi_internal64): Use YZ constraint.
gcc/testsuite/
PR target/83969
* gcc.target/powerpc/pr83969.c: New test.
Jason Merrill [Fri, 9 Mar 2018 20:39:14 +0000 (21:39 +0100)]
re PR c++/84076 (Warning about objects through POD mistakenly claims the object is a pointer)
PR c++/84076
* call.c (convert_arg_to_ellipsis): Instead of cp_build_addr_expr
build ADDR_EXPR with REFERENCE_TYPE.
(build_over_call): For purposes of check_function_arguments, if
argarray[j] is ADDR_EXPR with REFERENCE_TYPE created above, use
its operand rather than the argument itself.
Martin Sebor [Fri, 9 Mar 2018 19:06:26 +0000 (19:06 +0000)]
re PR tree-optimization/84526 (ICE in generic_overlap at gcc/gimple-ssa-warn-restrict.c:927 since r257860)
gcc/ChangeLog:
PR tree-optimization/84526
* gimple-ssa-warn-restrict.c (builtin_memref::set_base_and_offset):
Remove dead code.
(builtin_access::generic_overlap): Be prepared to handle non-array
base objects.
gcc/testsuite/ChangeLog:
PR tree-optimization/84526
* gcc.dg/Wrestrict-10.c: New test.
* gcc.dg/Wrestrict-11.c: New test.
The internal/trace package is only imported by tests (specifically the
tests in runtime/trace) so it must be in noinst_DATA to ensure that it
is built before running the tests.
This was mostly working because internal/trace has tests itself, and
is listed in check-packages.txt before runtime/trace, so typical
invocations of make would build internal/trace for checking purposes
before checking runtime/trace. But we need this change to make that
reliable.
Jakub Jelinek [Fri, 9 Mar 2018 18:01:22 +0000 (19:01 +0100)]
re PR c++/84724 (internal compiler error: in single_succ_edge, at basic-block.h:339 with a declaration of __builtin_trap)
PR c++/84724
* decl.c (duplicate_decls): Don't override __* prefixed builtins
except for __[^b]*_chk, instead issue permerror and for -fpermissive
also a note and return olddecl.
re PR target/83712 ("Unable to find a register to spill" when compiling for thumb1)
2018-03-09 Vladimir Makarov <vmakarov@redhat.com>
PR target/83712
* lra-assigns.c (assign_by_spills): Return a flag of reload
assignment failure. Do not process the reload assignment
failures. Do not spill other reload pseudos if they has the same
reg class.
(lra_assign): Add a return arg. Set up from the result of
assign_by_spills call.
(find_reload_regno_insns, lra_split_hard_reg_for): New functions.
* lra-constraints.c (split_reg): Add a new arg. Use it instead of
usage_insns if it is not NULL.
(spill_hard_reg_in_range): New function.
(split_if_necessary, inherit_in_ebb): Pass a new arg to split_reg.
* lra-int.h (spill_hard_reg_in_range, lra_split_hard_reg_for): New
function prototypes.
(lra_assign): Change prototype.
* lra.c (lra): Add code to deal with fails by splitting hard reg
live ranges.
Kyrylo Tkachov [Fri, 9 Mar 2018 15:42:10 +0000 (15:42 +0000)]
[arm] PR target/83193: Do not print arch/cpu hints twice on invalid -march/-mcpu
Currently when handling an invalid -march or -mcpu option on a toolchain without an explicit --with-mode configuration
and compiling without an explicit -mthumb or -marm the arm specs end up calling arm_target_thumb_only to determine
the "thumbness" of the target, which involves parsing the architecture or cpu name. But the functions doing that
parsing also emit error messages and hints on invalid arguments. Later when we parse the architecture or cpu string to
as part of the canonicalisation process (arm_canon_arch_option) we end up emitting the errors again.
The solution in this patch is to silence the errors during the arm_target_thumb_only processing so that they are not emitted
twice. arm_canon_arch_option is guaranteed to run as well, so it can emit the errors and hints that it needs.
Bootstrapped and tested on arm-none-linux-gnueabihf.
Checked that we emit the arch/cpu hints for invalid -march/-mcpu options only once when no "thumbness" options were specified
during configuration or invocation.
PR target/83193
* common/config/arm/arm-common.c (arm_parse_arch_option_name):
Accept complain bool parameter. Only emit errors if it is true.
(arm_parse_cpu_option_name): Likewise.
(arm_target_thumb_only): Adjust callers of the above.
* config/arm/arm-protos.h (arm_parse_cpu_option_name): Adjust
prototype to take a default true bool parameter.
(arm_parse_arch_option_name): Likewise.
Andreas Krebbel [Fri, 9 Mar 2018 12:32:22 +0000 (12:32 +0000)]
S/390: libatomic: Fix 16 byte atomic exchange
The compiler builtin will use the hardware instruction cdsg if the
memory operand is properly aligned and will fall back to the
library call otherwise.
In case the compiler for one part is able to detect that the
location is aligned and fails to do so for another usage of the hw
instruction and the sw fall back would be mixed on the same memory
location. To avoid this the library fall back also has to use the
hardware instruction if possible.
libatomic/ChangeLog:
2018-03-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/exch_n.c: New file.
* configure.tgt: Add the config directory for s390.
Jonathan Wakely [Fri, 9 Mar 2018 01:09:58 +0000 (01:09 +0000)]
Use non-throwing is_directory in filesystem::create_directory
The create_dir helper was calling the throwing form of
filesystem::is_directory instead of passing the error_code argument.
Since std::filesystem::create_directory(const path&, error_code&) is
noexcept, it would call std::terminate if an error occurred in
is_directory.
Passing the error_code also takes care of clearing it in the case where
is_directory returns true.
src/filesystem/ops.cc (create_dir): Pass error_code to is_directory.
src/filesystem/std-ops.cc (create_dir): Likewise.
Jason Merrill [Thu, 8 Mar 2018 21:18:50 +0000 (22:18 +0100)]
re PR c++/80598 (-Wunused triggers for functions used in uninstantiated templates)
PR c++/80598
* call.c (build_over_call): In templates set TREE_USED (first_fn) when
not calling mark_used for the benefit of -Wunused-function warning.
Kyrylo Tkachov [Thu, 8 Mar 2018 15:50:25 +0000 (15:50 +0000)]
[AArch64] PR target/84748: Mark *compare_cstore<mode>_insn as clobbering CC reg
In this wrong-code PR the combine pass ends up moving a CC-using instruction past a *compare_cstore<mode>_insn
insn_and_split. After reload the *compare_cstore<mode>_insn splitter ends up generating a SUBS instruction that
clobbers the condition flags, and things go bad.
The solution is simple, the *compare_cstore<mode>_insn pattern should specify that it clobbers the CC register
so that combine (or any other pass) does not assume that it can move CC-using patterns across it.
This patch does that and fixes the testcase.
The testcase FAILs on GCC 8 only, but the buggy pattern is in GCC 6 onwards, so we should backport this as
a latent bug fix after it's had some time to bake in trunk.
Bootstrapped and tested on aarch64-none-linux-gnu.
PR target/84748
* config/aarch64/aarch64.md (*compare_cstore<mode>_insn): Mark pattern
as clobbering CC_REGNUM.
David Malcolm [Thu, 8 Mar 2018 12:17:36 +0000 (12:17 +0000)]
tree-if-conv.c: fix ICE seen with -fno-tree-forwprop (PR tree-optimization/84178)
PR tree-optimization/84178 reports a couple of source files that ICE inside
ifcvt when compiled with -03 -fno-tree-forwprop (trunk and gcc 7).
Both cases involve problems with ifcvt's per-BB gimplified predicates.
Testcase 1 fails this assertion within release_bb_predicate during cleanup:
283 if (flag_checking)
284 for (gimple_stmt_iterator i = gsi_start (stmts);
285 !gsi_end_p (i); gsi_next (&i))
286 gcc_assert (! gimple_use_ops (gsi_stmt (i)));
The testcase contains a division in the loop, which leads to
if_convertible_loop_p returning false (due to gimple_could_trap_p being true
for the division). This happens *after* the per-BB gimplified predicates
have been created in predicate_bbs (loop).
Hence tree_if_conversion bails out to "cleanup", but the gimplified predicates
exist and make use of SSA names; for example this conjunction for two BB
conditions:
* tree-if-conv.c (add_bb_predicate_gimplified_stmts): Use
gimple_seq_add_seq_without_update.
(release_bb_predicate): Assert we have no operands to free.
(if_convertible_loop_p_1): Calculate post dominators later.
Do not free BB predicates here.
(combine_blocks): Do not recompute BB predicates.
(version_loop_for_if_conversion): Save BB predicates around
loop versioning.
* gcc.dg/tree-ssa/ifc-cd.c: Adjust.
The following patch fixes this by adding a call to gimple_seq_discard
to release_bb_predicate. It also updates the assertion, so that
instead of asserting the stmts have no imm uses, instead assert that
they weren't added to a bb before discarding them (otherwise discarding
them would be a bug). We know this is the case because
insert_gimplified_predicates has:
/* Once the sequence is code generated, set it to NULL. */
set_bb_predicate_gimplified_stmts (bb, NULL);
but asserting it seems appropriate as a double-check.
The patch doesn't address the 2nd issue within PR tree-optimization/84178.
gcc/ChangeLog:
PR tree-optimization/84178
* tree-if-conv.c (release_bb_predicate): Remove the
the assertion that the stmts have NULL use_ops.
Discard the statements, asserting that they haven't
yet been added to a BB.
gcc/testsuite/ChangeLog:
PR tree-optimization/84178
* gcc.c-torture/compile/pr84178-1.c: New test.
Richard Biener [Thu, 8 Mar 2018 09:23:44 +0000 (09:23 +0000)]
re PR tree-optimization/84746 (ICE on valid code at -O2 and -O3: Segmentation fault)
2018-03-08 Richard Biener <rguenther@suse.de>
PR tree-optimization/84746
* tree-ssa-pre.c (find_leader_in_sets): Deal with SET1 being NULL.
(phi_translate): Pass in destination ANTIC_OUT set.
(phi_translate_1): Likewise. For a simplified result lookup
a leader in ANTIC_OUT and AVAIL_OUT, not the ANTIC_IN sets.
(phi_translate_set): Adjust.
(do_pre_regular_insertion): Likewise.
(do_pre_partial_partial_insertion): Likewise.
Alexandre Oliva [Thu, 8 Mar 2018 08:27:56 +0000 (08:27 +0000)]
[LVU] reset view at function entry, omit views at line zero
Location views might be associated with locations that lack line
number information (line number zero), but since we omit .loc
directives that would have been issued with line number zero, we also
omit the symbolic view numbers that would have been issued at such
points.
Resetting views at function entry points address some of these issues,
and alleviate the huge chains of symbolic views that have burdened
assemblers since we disabled -ginternal-reset-location-views by
default, but other problems of undefined views remain when it's not
the whole function that lacks line number info, just parts of it.
So, when we encounter a request to output a view that may have been
referenced, but we decide to omit the .loc because the line is zero,
we will now omit the view as well, i.e., we will internally regard
that view as zero-numbered.
for gcc/ChangeLog
PR debug/84404
PR debug/84408
* dwarf2out.c (struct dw_line_info_table): Update comments for
view == -1.
(FORCE_RESET_NEXT_VIEW): New.
(FORCE_RESETTING_VIEW_P): New.
(RESETTING_VIEW_P): Check for -1 too.
(ZERO_VIEW_P): Likewise.
(new_line_info_table): Force-reset next view.
(dwarf2out_begin_function): Likewise.
(dwarf2out_source_line): Simplify zero_view_p initialization.
Test FORCE_RESETTING_VIEW_P and RESETTING_VIEW_P instead of
view directly. Omit view when omitting .loc at line 0.
Jakub Jelinek [Thu, 8 Mar 2018 06:56:59 +0000 (07:56 +0100)]
re PR tree-optimization/84739 (ICE in get_value_for_expr, at tree-ssa-ccp.c:649)
PR tree-optimization/84739
* tree-tailcall.c (find_tail_calls): Check call arguments against
DECL_ARGUMENTS (current_function_decl) rather than
DECL_ARGUMENTS (func) when checking for tail recursion.
Jakub Jelinek [Wed, 7 Mar 2018 21:59:09 +0000 (22:59 +0100)]
contrib.texi: Add entries for Martin Liska...
* doc/contrib.texi: Add entries for Martin Liska, David Malcolm,
Marek Polacek, extend Vladimir Makarov's, Jonathan Wakely's and
Volker Reichelt's entry and add entries for people that perform
GCC fuzzy testing and report numerous bugs.
This adds a new option -mreadonly-in-sdata (on by default) that
controls whether readonly data can be put in sdata. (For EABI this
does nothing, readonly data is put in sdata2 as usual).
PR target/82411
* config/rs6000/rs6000.c (rs6000_elf_in_small_data_p): Don't put
readonly data in sdata, if that is disabled.
* config/rs6000/sysv4.opt (mreadonly-in-sdata): New option.
* doc/invoke.texi (RS/6000 and PowerPC Options): Document
-mreadonly-in-sdata option.
gcc/testsuite/
PR target/82411
* gcc.target/powerpc/ppc-sdata-2.c: Skip if -mno-readonly-in-sdata.
Martin Sebor [Wed, 7 Mar 2018 19:30:31 +0000 (19:30 +0000)]
PR tree-optimization/84468 - bogus -Wstringop-truncation despite assignment after conditional strncpy
gcc/ChangeLog:
PR tree-optimization/84468
* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Consider successor
basic block when looking for nul assignment.
gcc/testsuite/ChangeLog:
PR tree-optimization/84468
* g++.dg/warn/Wstringop-truncation-2.C: New test.
* gcc.dg/Wstringop-truncation.c: New test.
* gcc.dg/Wstringop-truncation-2.c: New test.
Eric Botcazou [Wed, 7 Mar 2018 15:54:59 +0000 (15:54 +0000)]
re PR target/84277 (A lot of new acats testsuite failures)
PR target/84277
* except.h (output_function_exception_table): Adjust prototype.
* except.c (output_function_exception_table): Remove FNNAME parameter
and add SECTION parameter. Ouput one part of the table at a time.
* final.c (final_scan_insn_1) <NOTE_INSN_SWITCH_TEXT_SECTIONS>: Output
the first part of the exception table and emit unwind directives.
* config/i386/i386-protos.h (i386_pe_end_cold_function): Declare.
(i386_pe_seh_cold_init): Likewise.
* config/i386/cygming.h (ASM_DECLARE_COLD_FUNCTION_NAME): New macro.
(ASM_DECLARE_COLD_FUNCTION_SIZE): Likewise.
* config/i386/i386.c (x86_expand_epilogue): Fix wording in comment.
(ix86_output_call_insn): Emit a nop in one more case for SEH.
* config/i386/winnt.c: Include except.h.
(struct seh_frame_state): Add reg_offset, after_prologue and
in_cold_section fields.
(i386_pe_seh_end_prologue): Set seh->after_prologue.
(i386_pe_seh_cold_init): New function.
(i386_pe_seh_fini): Add COLD parameter and bail out if it is not equal
to seh->in_cold_section.
(seh_emit_push): Record the offset of the push.
(seh_emit_save): Record the offet of the save.
(i386_pe_seh_unwind_emit): Deal with NOTE_INSN_SWITCH_TEXT_SECTIONS.
Test seh->after_prologue to disregard the epilogue.
(i386_pe_end_function): Pass FALSE to i386_pe_seh_fini.
(i386_pe_end_cold_function): New function.
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