- Add i.MX8 ahab-commit command.
- Add support for flashing board with UUU on imx93_frdm.
- Fix the acces of PFUZE100 regulator desc.
- Add more i.MX6 PWM clock definitions.
- Enable OP-TEE on phytec-imx8m and update documentation.
- Enable PCI host controller on iMX95 19x19 EVK.
[trini: Fixup spacing issues] Signed-off-by: Tom Rini <trini@konsulko.com>
OP-TEE configs are enabled by default, change the doc to no longer
declare OP-TEE as optional. Also remove CFG_TEE_BENCHMARK as it is no
longer present in optee_os.
Further, phycore-imx8mm and imx8mm-phygate-tauri-l use different build
instructions, so dissolve the common file for building OP-TEE.
Enable OP-TEE config and RNG by default.
Set OP-TEE load address to end of 1GiB RAM for phycore-imx8mp and
phycore-imx8mm as the boards support a 1GiB RAM variant (although not
yet upstreamed for phycore-imx8mm).
The imx8mm-phygate-tauri-l board only supports 2GiB, so the default at
the end of 2GiB is sufficient.
Following the work done in commit 7f39ad5a ("clk: imx6q: Add definition
for IMX6QDL_CLK_PWM1"), this commit adds definitions for PWM2, PWM3, and
PWM4 clocks. Allowing one to use these PWM modules together with DM_CLK.
Note that the solution was verified only against PWM3.
Signed-off-by: Ricardo Simoes <ricardo.simoes@pt.bosch.com> Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
- Fix Phycore i.MX93 voltage modes
- Call DM post init function for init_r phase on i.MX8ULP
- Fix ELE FW version print bug on i.MX8UL EVK.
- Fix LPCG number in ccm_reg structure on i.MX93
board: phytec: phycore-imx93: Fix i.MX93 voltage modes
Fix support for i.MX93 voltage modes on phyCORE-i.MX93 SoM boards.
First of all, Kconfig option CONFIG_IMX9_LOW_DRIVE_MODE is gone since
commit c9efcad23741 ("imx93_evk: Remove CONFIG_IMX9_LOW_DRIVE_MODE and
ld defconfig") and was replaced by runtime detection mechanism. Thus
lets use is_voltage_mode() instead of Kconfig to detect CPU type and
select proper voltage mode.
Secondly, 1400MHz ND mode (Nominal Drive) requiring 0.85V BUCK voltage
was not supported with current power_init_board() PMIC settings. Add
check also for this CPU type and set BUCK voltage accordingly.
Last but not least, add printf() printouts about PMIC voltage mode to
the console. This makes it more apparent and verbose about voltage mode
in use. Also our internal tests depend on this printout to catch issues
with i.MX93 CPU types and set PMIC voltage modes.
Ye Li [Fri, 19 Sep 2025 06:58:34 +0000 (14:58 +0800)]
arm: imx9: Fix LPCG number in ccm_reg structure
The LPCG number on iMX93 and iMX91 is 127 not 122. The wrong
value is used in ccm_reg structure and Coverity reports several
issues as out-of-bounds write.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Fri, 19 Sep 2025 06:58:33 +0000 (14:58 +0800)]
imx8ulp_evk: Fix ELE FW version print bug
According to latest ELE Get FW version API, the FW version word is defined
as below. The patch version only has 4 bits and minor version has 12 bits.
However, the codes use 8 bits for patch version and minor version. Add the
patch to fix the issue.
ELE firmware version
[31] - When set indicates a dirty build.
[30] - Reserved
[29:28] - Hotfix version.
[27] - When set, indicate that ELE FW is authenticated and operational.
[26:25] - Reserved
[24] - When set, indicate that an alternative FW is running.
[23:16] - Indicate the major version. This byte is checked against the
version set in the fuses to determine if the FW execution can be authorized
[15:4] - Indicate the minor version.
[3:0] - Indicate the patch version.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 16 Sep 2025 02:57:35 +0000 (10:57 +0800)]
power: regulator: pfuze100: Fix accessing the regulator desc
se_desc loop check is wrong, it relies on the desc always has
the expected name to end of the loop. It works because the device tree
has the expected name as of now, but this may not be always true.
Drop se_desc by moving the check into probe and fix the loop check.
Reported-by: Andrew Goodbody <andrew.goodbody@linaro.org> Cc: Tom Rini <trini@konsulko.com> Cc: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
imx93_frdm: Add support for flashing board with UUU
Allow to flash a board using NXP UUU utility:
- Enable fastboot support on USB.
- Add fastboot partition aliases with names used by UUU. Also add extra
environment variables used by UUU.
- Set 'dofastboot' environment variable based on boot device
configuration, allowing to automatically enter fastboot when booting
from USB.
Ye Li [Thu, 11 Sep 2025 10:56:08 +0000 (18:56 +0800)]
clk: clk-uclass: Fix clk_set_default_rates issue
clk_set_rate returns the actual clock rate, When assigned clock rate is
higher than 0x7FFFFFFF, the return value will be recognized as error.
Change to IS_ERR_VALUE to check the return value.
Ye Li [Thu, 11 Sep 2025 10:56:06 +0000 (18:56 +0800)]
clk: imx: Add imx95 blkctrl clock driver
Add iMX95 blkctrl clock driver which implements clocks for HSIOMIX
blkctrl and LVDS blkctrl.
Since multiple blkctrl device for different blkctrl may be enabled,
and each has dedicated clock id from 0. We must enable CLK_AUTO_ID
to avoid conflict on clock id.
John Ripple [Tue, 9 Sep 2025 19:53:22 +0000 (13:53 -0600)]
imx8: Add ahab_commit command
The ahab_commit command allows the user to commit into the SECO fuses
that control the SRK key revocation information. This is used to Revoke
compromised SRK keys.
To use ahab_commit, the boot container must be built with an SRK
revocation bit mask that is not 0x0. For the SPSDK provided by NXP, this
means setting the 'srk_revoke_mask' option in the config file used to
sign the boot container. The 'ahab_commit 0x10' can then be used to commit
the SRK revocation information into the SECO fuses.
Signed-off-by: John Ripple <john.ripple@keysight.com>
- Switch to upstream devicetree for TH1520 platform
- Remove fdt_high env variable
- Support SMP on RISC-V cores with Zalrsc only
- Make MPFS Generic
- riscv: dts: starfive: prune redundant jh7110-common
In the qemu-sbsa configuration, the GICv3 definition is disabled due to
a typo. After fixing the typo, GICv3 is enabled, however, the GIC register
base address definitions are missing, resulting in a build failure.
This series enables GICv3 and resolves this build error.
Confirming that U-Boot successfully starts up in QEMU SBSA environment
after the fix.
The config "GIC_V3" seems to be typo, and currently "GICV3" remains
disabled. Since "GIC_V3_ITS" is enabled in qemu-sbsa, "GICV3" should
also be enabled.
E Shattow [Wed, 17 Sep 2025 00:02:23 +0000 (17:02 -0700)]
riscv: dts: starfive: sync visionfive2 overrides with upstream Linux for-next
Sync automatic dtsi inclusion overrides for JH7110 CPU with upstream
"riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot
loader" from upstream Linux conor/riscv-dt-for-next commit 8181cc2f3f21
Signed-off-by: E Shattow <e@freeshell.de> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Vivian Wang [Sun, 14 Sep 2025 23:45:49 +0000 (07:45 +0800)]
riscv: qemu: Remove fdt_high default
Setting fdt_high to all ones is discouraged and does not appear to be
useful for RISC-V QEMU. Moreover, it causes a boot failure when the FDT
generated internally by QEMU is used while booting. Remove it to allow
U-Boot to pick a suitable address and relocate the FDT.
Closes: https://lore.kernel.org/u-boot/8397369a-9b0b-4798-9c30-3a81165657d6@iscas.ac.cn Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yao Zi [Tue, 2 Sep 2025 08:19:32 +0000 (08:19 +0000)]
riscv: Add a Zalrsc-only alternative for synchronization in start.S
Add an alternative implementation that use Zalrsc extension only for
HART lottery and SMP locking to support SMP on cores without "Zaamo"
extension available. The Zaamo implementation is still prioritized if
both of them are available, since it takes fewer instructions.
Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yao Zi [Tue, 2 Sep 2025 08:19:31 +0000 (08:19 +0000)]
configs: ibex-ast2700: Explicitly disable Zaamo and Zalrsc extension
This board supports neither Zaamo nor Zalrsc extension, thus we want to
build it without "a" specified in the ISA string passed to compiler in
case of misused A-extension instructions. With RISCV_ISA_ZAAMO and
RISCV_ISA_ZALRSC Kconfig options introduced, we must explicitly disable
both of them to achieve this.
Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yao Zi [Tue, 2 Sep 2025 08:19:30 +0000 (08:19 +0000)]
riscv: Add Kconfig options to distinguish Zaamo and Zalrsc
Ratified on Apr. 2024, the original RISC-V "A" extension is now split
into two separate extensions, "Zaamo" for atomic operations and "Zalrsc"
for load-reserved/store-conditional instructions.
For now, we've already seen real-world designs implement the Zalrsc
extension only[2]. As U-Boot mainly runs with only one HART, we could
easily support these designs by not using AMO instructions in the
hard-written assembly if necessary, for which this patch introduces two
new Kconfig options to indicate the availability of "Zaamo" and "Zalrsc".
Note that even with this patch, "A" extension is specified in the ISA
string passed to the compiler as long as one of "Zaamo" or "Zalrsc" is
available, since they're only recognized with a quite recent version of
GCC/Clang. The compiler usually doesn't automatically generate atomic
instructions unless the source explicitly instructs it to do so, thus
this should be safe.
Yao Zi [Wed, 13 Aug 2025 10:09:26 +0000 (10:09 +0000)]
pinctrl: th1520: Mark driver as DM_FLAG_PRE_RELOC
It's common that UARTs are bound and probed before U-Boot relocation, in
which case the UART's pincontroller and pinconfig must be probed first.
Let's apply DM_FLAG_PRE_RELOC to the driver, allow it to bind before
relocation.
Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yao Zi [Wed, 13 Aug 2025 10:09:25 +0000 (10:09 +0000)]
clk: thead: th1520-ap: Mark drivers as DM_FLAG_PRE_RELOC
It's common that UARTs are bound and probed before U-Boot relocation,
in which case the clocks of UART and UART's pincontroller must be
registered first. Let's apply DM_FLAG_PRE_RELOC to the driver, allowing
it to bind before relocation.
Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yao Zi [Wed, 13 Aug 2025 10:09:24 +0000 (10:09 +0000)]
configs: th1520_lpi4a: Enlarge SYS_MALLOC_F_LEN to 0x10000
For TH1520, we want clock and pinctrl drivers to bind before relocation
along with the UART which makes use of them, since upstream devicetree
specifies pinctrl properties for the UART.
This requires a large malloc pool before relocation, let's enlarge it.
Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Marek Vasut [Mon, 8 Sep 2025 13:48:16 +0000 (15:48 +0200)]
boot: Increase kernel size limit to 128 MiB on ARM64/PPC/RV
The ARM64 kernel Image size with LOCKDEP enabled is now around 80 MiB, which
makes it unbootable due to "Image too large: increase CONFIG_SYS_BOOTM_LEN".
Increase the image size limit to 128 MiB to future proof the limit.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The MediaTek MT7987/MT7988 SoCs features a built-in 2.5Gb PHY
connected to GMAC1. The PHY supports 10/100/1000/2500 Mbps
full-duplex only.
The PHY requires one or two firmware files. Firmware for MT7988 has
already been added to upstream: mediatek/mt7988/i2p5ge-phy-pmb.bin.
MT7987 has two firmware files which will be add to upstream later:
i2p5ge-phy-pmb.bin and i2p5ge-phy-DSPBitTb.bin.
Environment variable can be set for firmware data loading:
mt7987_i2p5ge_load_pmb_firmware for i2p5ge-phy-pmb.bin
mt7987_i2p5ge_load_dspbit_firmware for i2p5ge-phy-DSPBitTb.bin
mt7988_i2p5ge_load_pmb_firmware for i2p5ge-phy-pmb.bin
This driver allows dedicated weak functions to be overridden by
board to provide the firmware data:
mt7987_i2p5ge_get_fw() for MT7987
mt7988_i2p5ge_get_fw() for MT7988
To enable the PHY, add the following not to device tree:
ð1 {
status = "okay";
phy-mode = "xgmii";
phy-handle = <&phy15>;
net: mediatek: associate PHY device with dts node specified by phy-handle
Associate PHY device with its device node specified by phy-handle
property. This makes it possible for PHY drivers to read dedicated
information to configure the PHY device.
misc: fs_loader: allow returning actual firmware data size in request_firmware_into_buf_via_script()
It's important to return the actual firmware data size as some
firmware files may have no checksum and need the size as the only
way for firmware validation check.
Add STM32 OSPI driver, it supports :
- support sNOR / sNAND devices.
- Two functional modes: indirect (read/write) and memory-mapped (read).
- Single-, dual-, quad-, and octal-SPI communication.
- Single data rate (SDR).
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Octo Memory Manager driver (OMM) manages:
- the muxing between 2 OSPI busses and 2 output ports.
There are 4 possible muxing configurations:
- direct mode (no multiplexing): OSPI1 output is on port 1 and OSPI2
output is on port 2
- OSPI1 and OSPI2 are multiplexed over the same output port 1
- swapped mode (no multiplexing), OSPI1 output is on port 2,
OSPI2 output is on port 1
- OSPI1 and OSPI2 are multiplexed over the same output port 2
- the split of the memory area shared between the 2 OSPI instances.
- chip select selection override.
- the time between 2 transactions in multiplexed mode.
- check firewall access.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fix RIFSC semaphores acquisition by not returning an error when the
current CID already possess the semaphore. Also fix an incorrect mask
for the CID value in the SEMCR register.
Marek Vasut [Sun, 7 Sep 2025 01:00:47 +0000 (03:00 +0200)]
board: dhelectronics: Use isascii() before isprint() in dh_read_eeprom_id_page()
The isprint() checks printability across all 256 characters, some of the
upper 128 characters are printable and produce artifacts on UART. Call
isascii() first to only consider the bottom 7bit ASCII characters as
printable, and then check their printability using isprint(). This fixes
a rare misprint in case the ID page content is uninitialized or corrupted.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Marek Vasut [Sun, 7 Sep 2025 01:00:46 +0000 (03:00 +0200)]
board: dhelectronics: Check pointer before access in dh_get_value_from_eeprom_buffer()
The eip pointer in dh_get_value_from_eeprom_buffer() might be NULL.
The current NULL pointer check happens too late, after the eip was
accessed in variable assignment. Reorder the two, so the NULL pointer
check happens first, and any access second, otherwise the access may
trigger a hang or other undefined behavior.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Tom Rini [Wed, 17 Sep 2025 13:52:31 +0000 (07:52 -0600)]
Merge patch series "Hyperflash boot fixes for j721e/j7200"
Anurag Dutta <a-dutta@ti.com> says:
This series introdues a couple of small fixes that involves
enabling hyperflash at R5 SPL and u-boot proper stage and
Kconfig changes that are required for HBMC boot on j721e/j7200
Michal Simek [Wed, 17 Sep 2025 07:22:18 +0000 (09:22 +0200)]
xilinx: Disable SPL_OS_BOOT for Zynq and ZynqMP
The commit 210702ae6ce8 ("spl: spi: fix falcon mode for spi boot") fixed
the logic of spl_start_uboot() where 0 means OS boot and 1 means u-boot.
Zynq/ZynqMP enable OS_BOOT by default but it was never really be used
that's why disable it to boot via U-Boot phase all the time.
Signed-off-by: Michal Simek <michal.simek@amd.com>
board: ti: am57xx: Remove "ti/omap/" from name_fit_config
Commit 649f4a7d3ca7 ("board: ti: am57xx: Set fdtfile from C code
instead of findfdt script") prepends "ti/omap/" to the actual name
of the fdtfile whereas fit image boot needs exact dtb name. So, remove
"ti/omap" from name_fit_config by substituting it with an empty string.
Fixes: 649f4a7d3ca7 ("board: ti: am57xx: Set fdtfile from C code instead of findfdt script") Signed-off-by: Anurag Dutta <a-dutta@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Alice Guo [Fri, 5 Sep 2025 18:22:04 +0000 (02:22 +0800)]
imx95_evk: Restore support for i.MX95 A0 silicon
This patch is used to restore support for i.MX95 A0 silicon. To avoid
duplicating defconfig, imx95.config is added and can be shared between
imx95_a0_19x19_evk_defconfig and imx95_19x19_evk_defconfig.
container.cfg and imximage.cfg are used to created .cfgout files that
are be passed to mkimage with -n to build flash.bin. Now they have been
deleted and replaced by adding their content to properties of node which
type is nxp-imx9image under binman node.
Fixes: 9936724aa9b ("imx95_evk: Add i.MX95 B0 support") Signed-off-by: Alice Guo <alice.guo@nxp.com> Tested-By: Tim Harvey <tharvey@gateworks.com> # imx95-19x19-evk (rA0)
Alice Guo [Fri, 5 Sep 2025 18:22:03 +0000 (02:22 +0800)]
binman: add a new entry type to support .bin file generation for the i.MX95 platform
To support passing specific commands defined in enum imx8image_cmd to
the imx8image_copy_image() function, this patch introduces a new entry
type nxp-imx9image. This entry generates a plain text data file
containing the relevant commands, enabling flexible configuration during
image creation.
Marek Vasut [Sun, 7 Sep 2025 01:00:47 +0000 (03:00 +0200)]
board: dhelectronics: Use isascii() before isprint() in dh_read_eeprom_id_page()
The isprint() checks printability across all 256 characters, some of the
upper 128 characters are printable and produce artifacts on UART. Call
isascii() first to only consider the bottom 7bit ASCII characters as
printable, and then check their printability using isprint(). This fixes
a rare misprint in case the ID page content is uninitialized or corrupted.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Marek Vasut [Sun, 7 Sep 2025 01:00:46 +0000 (03:00 +0200)]
board: dhelectronics: Check pointer before access in dh_get_value_from_eeprom_buffer()
The eip pointer in dh_get_value_from_eeprom_buffer() might be NULL.
The current NULL pointer check happens too late, after the eip was
accessed in variable assignment. Reorder the two, so the NULL pointer
check happens first, and any access second, otherwise the access may
trigger a hang or other undefined behavior.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Marek Vasut [Sat, 6 Sep 2025 23:00:44 +0000 (01:00 +0200)]
phy: Reset init count on phy exit failure
In case the PHY exit callback reports failure, reset init_count to 0 anyway,
so the next attempt at PHY initialization might try to reinitialize the PHY
and restore it to normal operation.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Tom Rini [Tue, 16 Sep 2025 19:45:08 +0000 (13:45 -0600)]
Merge patch series "Modernize U-Boot code formatting with clang-format"
Javier Tia <javier.tia@linaro.org> says:
This patch series modernizes U-Boot's code formatting infrastructure by
with current Linux kernel practices and providing a more robust and
comprehensive formatting solution.
Javier Tia [Fri, 5 Sep 2025 20:53:47 +0000 (14:53 -0600)]
doc: Update U-Boot coding style guide with clang-format usage
The U-Boot coding style guide has been updated to include information
about using the `.clang-format` configuration file for automatic code
formatting. This ensures consistent formatting across the entire
codebase and aligns with Linux kernel coding standards. The goal with
introducing a predefined coding style is consistency rather than
personal preference.
The .clang-format file is copied directly from the Linux kernel without
any modifications, ensuring complete compatibility with kernel coding
standards.
Include comprehensive best practices for using clang-format,
specifically guidance on formatting only changed blocks versus entire
files, creating separate formatting-only commits for better code review,
and leveraging git clang-format for targeted formatting. Add examples of
editor integrations. This enhancement will help maintainers and
contributors to easily adhere to U-Boot coding standards.
Javier Tia [Fri, 5 Sep 2025 20:53:45 +0000 (14:53 -0600)]
tools: zynqmp_psu_init_minimize.sh: Switch to clang-format
Replace the use of scripts/Lindent with clang-format in
zynqmp_psu_init_minimize.sh. This change is made to align with the rest
of the codebase that uses clang-format for code formatting. This ensures
consistency across all scripts in terms of code style and formatting.
Tested-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Javier Tia <javier.tia@linaro.org>
Javier Tia [Fri, 5 Sep 2025 20:53:44 +0000 (14:53 -0600)]
clang-format: Add configuration file
Introduce .clang-format configuration file to U-Boot, providing
significant improvements over the existing scripts/Lindent approach for
C code formatting.
Benefits of clang-format over scripts/Lindent:
- More comprehensive formatting rules: While Lindent relies on the basic
'indent' tool with limited options, clang-format provides extensive
control over code formatting with 800+ configuration options
- Better handling of complex code structures: clang-format understands
modern C constructs and handles nested structures, macros, and complex
expressions more intelligently
- IDE and editor integration: Native support in major development
environments (VS Code, Vim, Emacs, etc.) enables real-time formatting
- Consistent results across environments: Eliminates variations between
different versions of 'indent' tool and system configurations
- Active maintenance: clang-format is actively developed and updated,
unlike the aging 'indent' tool
Alignment with Linux kernel practices:
Continues U-Boot alignment with Linux kernel development practices,
maintaining consistency between these closely related projects. The
Linux kernel adopted clang-format to modernize its code formatting
infrastructure and improve developer experience.
The .clang-format file is based on the Linux kernel configuration,
specifically copied from Linux kernel v6.16 tag, which itself builds
upon the initial introduction in commit d4ef8d3ff005c ("clang-format:
add configuration file").
Tom Rini [Tue, 16 Sep 2025 19:44:39 +0000 (13:44 -0600)]
Merge patch series "Fix ADI driver header dependencies"
Greg Malysa <malysagreg@gmail.com> says:
Between 2025.07 and 2025.10 many header dependency chains were improved,
but this exposed implicit header usage in several of our drivers. This
wasn't discovered before or included in the original fixes because our
drivers are not yet used by any mainline-supported boards, so build
tests did not find them. This series addresses the two build failures
I've encountered while rebasing our work onto 2025.10 and continuing to
prepare the next submission of our board files.
As part of the header dependency cleanup between 2025.07 and 2025.10, an
implicit route to obtain SZ_128M from linux/sizes.h was removed. This
adds an explicit reference to linux/sizes.h to fix build failures for
this driver.
Signed-off-by: Greg Malysa <malysagreg@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Following header dependency cleanups, an implicit dependence on env.h
was exposed in dwc_eth_qos_adi. However because this driver is not (yet)
enabled in any defconfigs, build tests did not identify the missing
header. This adds the missing #include so that the driver builds
correctly when enabled.
projects / thirdparty / u-boot.git / log
