Jakub Jelinek [Wed, 3 Jun 2015 21:33:22 +0000 (23:33 +0200)]
backport: re PR gcov-profile/64634 (gcov reports catch(...) as not executed)
Backported from mainline
2015-02-18 Jakub Jelinek <jakub@redhat.com>
PR gcov-profile/64634
* tree-eh.c (frob_into_branch_around): Fix up typos
in function comment.
(lower_catch): Put eh_seq resulting from EH lowering of
the cleanup sequence after the cleanup rather than before
it.
PR tree-optimization/66123
* tree-ssa-dom.c (propagate_rhs_into_lhs): Check if we found
a taken edge.
* gcc.dg/torture/pr66123.c: New testcase.
2015-05-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/66272
Revert parts of
2014-08-15 Richard Biener <rguenther@suse.de>
PR tree-optimization/62031
* tree-data-ref.c (dr_analyze_indices): Do not set
DR_UNCONSTRAINED_BASE.
(dr_may_alias_p): All indirect accesses have to go the
formerly DR_UNCONSTRAINED_BASE path.
* tree-data-ref.h (struct indices): Remove
unconstrained_base member.
(DR_UNCONSTRAINED_BASE): Remove.
backport: varasm.c (output_constant_pool_1): Pass down alignment from constant pool entry's descriptor to output_constant_pool_2.
Backported from mainline
2015-05-14 Rohit Arul Raj <rohitarulraj@freescale.com>
* varasm.c (output_constant_pool_1): Pass down alignment from
constant pool entry's descriptor to output_constant_pool_2.
(output_object_block): Add comment prior to call to
output_constant_pool_1.
Andreas Krebbel [Mon, 18 May 2015 11:08:46 +0000 (11:08 +0000)]
S/390: Adjust zEC12 scheduling
2015-05-18 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Backport from mainline
2015-05-12 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/2827.md: Split zEC12_simple into zEC12_simple_int
and zEC12_simple_fp.
* config/s390/s390.c (s390_issue_rate): Set issue rate for zEC12
to 1.
Peter Bergner [Tue, 5 May 2015 14:27:30 +0000 (09:27 -0500)]
backport: re PR target/64579 (__TM_end __builtin_tend failed to return transactional state)
gcc/
Backport from mainline.
2015-04-27 Peter Bergner <bergner@vnet.ibm.com>
PR target/64579
* config/rs6000/htm.md: Remove all define_expands.
(UNSPECV_HTM_TABORTDC, UNSPECV_HTM_TABORTDCI, UNSPECV_HTM_TABORTWC,
UNSPECV_HTM_TABORTWCI): Remove.
(UNSPECV_HTM_TABORTXC, UNSPECV_HTM_TABORTXCI, UNSPECV_HTM_TTEST): New.
(tabort_internal, tbegin_internal, tcheck_internal, tend_internal,
trechkpt_internal, treclaim_internal, tsr_internal): Rename from this...
(tabort, tbegin, tcheck, tend, trechkpt, treclaim, tsr): ...to this.
(tabortdc_internal, tabortdci_internal, tabortwc_internal,
tabortwci_internal): Remove define_insns.
(tabort<wd>c, tabort<wd>ci): New define_insns.
(tabort): Use gpc_reg_operand.
(tcheck): Remove operand.
(htm_mfspr_<mode>, htm_mtspr_<mode>): Use GPR mode macro.
* config/rs6000/htmxlintrin.h (__TM_end): Use _HTM_TRANSACTIONAL as
expected value.
* config/rs6000/rs6000-builtin.def (BU_HTM_SPR0): Remove.
(BU_HTM_SPR1): Rename to BU_HTM_V1. Remove use of RS6000_BTC_SPR.
(tabort, tabortdc, tabortdci, tabortwc, tabortwci, tbegin,
tcheck, tend, tendall, trechkpt, treclaim, tresume, tsuspend,
tsr, ttest): Pass in the RS6000_BTC_CR attribute.
(get_tfhar, set_tfhar, get_tfiar, set_tfiar, get_texasr, set_texasr,
get_texasru, set_texasru): Pass in the RS6000_BTC_SPR attribute.
(tcheck): Remove builtin argument.
* config/rs6000/rs6000.c (rs6000_htm_spr_icode): Use TARGET_POWERPC64
not TARGET_64BIT.
(htm_expand_builtin): Fix usage of expandedp. Disallow usage of the
tabortdc and tabortdci builtins when not in 64-bit mode.
Modify code to handle the loss of the HTM define_expands.
Emit code to copy the CR register to TARGET.
(htm_init_builtins): Modify code to handle the loss of the HTM
define_expands.
* config/rs6000/rs6000.h (RS6000_BTC_32BIT): Delete.
(RS6000_BTC_64BIT): Likewise.
(RS6000_BTC_CR): New macro.
* doc/extend.texi: Update documentation for htm builtins.
gcc/testsuite/
Backport from mainline.
2015-04-27 Peter Bergner <bergner@vnet.ibm.com>
PR target/64579
* gcc.target/powerpc/htm-1.c: New test.
* gcc.target/powerpc/htm-builtin-1.c (__builtin_tabortdc): Only test
on 64-bit compiles.
(__builtin_tabortdci): Likewise.
(__builtin_tcheck): Remove operand.
* lib/target-supports.exp (check_htm_hw_available): New function.
Bill Schmidt [Sat, 25 Apr 2015 02:09:07 +0000 (02:09 +0000)]
backport: altivec.md (*altivec_lvx_<mode>_internal): Remove asterisk from name so this can be generated directly.
2015-04-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline r222385
2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/altivec.md (*altivec_lvx_<mode>_internal): Remove
asterisk from name so this can be generated directly.
(*altivec_stvx_<mode>_internal): Likewise.
* config/rs6000/rs6000.c (rs6000_emit_le_vsx_store): Add assert
that this is never called during or after reload/lra.
(rs6000_frame_related): Remove split_reg
argument and logic that references it.
(emit_frame_save): Remove last parameter from call to
rs6000_frame_related.
(rs6000_emit_prologue): Remove last parameter from eight calls to
rs6000_frame_related. Force generation of stvx instruction for
Altivec register saves. Remove split_reg handling, which is no
longer needed.
(rs6000_emit_epilogue): Force generation of lvx instruction for
Altivec register restores.
Michael Meissner [Fri, 24 Apr 2015 23:48:54 +0000 (23:48 +0000)]
backport: re PR target/65849 (Add missing tuning knobs to #pragma target/attribute target support)
2015-04-24 Michael Meissner <meissner@linux.vnet.ibm.com>
Backport from mainline
2015-04-24 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/65849
* config/rs6000/rs6000.opt (-mvsx-align-128): Make options that
save to independent variables use the Save attribute. This will
allow these options to be modified with the #pragma/attribute
target support.
(-mallow-movmisalign): Likewise.
(-mallow-df-permute): Likewise.
(-msched-groups): Likewise.
(-malways-hint): Likewise.
(-malign-branch-targets): Likewise.
(-mvectorize-builtins): Likewise.
(-msave-toc-indirect): Likewise.
* config/rs6000/rs6000.c (rs6000_opt_masks): Add more options that
can be set via the #pragma/attribute target support.
(rs6000_opt_vars): Likewise.
(rs6000_inner_target_options): If VSX was set, also set
-mno-avoid-indexed-addresses.
2015-04-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline r222351
2015-04-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rtx_is_swappable_p): Commentary
adjustments.
(insn_is_swappable_p): Return 1 for a convert from double to
single precision when all of its uses are splats of BE element
zero.
[gcc/testsuite]
2015-04-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline r222351
2015-04-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Bill Schmidt [Fri, 24 Apr 2015 20:17:10 +0000 (20:17 +0000)]
backport: re PR target/65456 (powerpc64le autovectorized copy loop missed optimization)
[gcc]
2015-04-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline r222349
2015-04-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR target/65456
* config/rs6000/rs6000.c (rs6000_option_override_internal): For
VSX + POWER8, enable TARGET_ALLOW_MOVMISALIGN and
TARGET_EFFICIENT_UNALIGNED_VSX if not selected by command line
option.
(rs6000_builtin_mask_for_load): Return 0 for targets with
efficient unaligned VSX accesses so that the vectorizer will use
direct unaligned loads.
(rs6000_builtin_support_vector_misalignment): Always return true
for targets with efficient unaligned VSX accesses.
(rs6000_builtin_vectorization_cost): Cost of unaligned loads and
stores on targets with efficient unaligned VSX accesses is almost
always the same as the cost of an aligned load or store, so model
it that way.
* config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Return 0 for
unaligned vectors if we have efficient unaligned VSX accesses.
* config/rs6000/rs6000.opt (mefficient-unaligned-vector): New
undocumented option.
[gcc/testsuite]
2015-04-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline r222349
2015-04-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Bill Schmidt [Sun, 19 Apr 2015 16:53:22 +0000 (16:53 +0000)]
backport: re PR target/65787 (Miscompile due to bad vector swap optimization for little endian)
[gcc]
2015-04-18 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Jakub Jelinek <jakub@redhat.com>
Backport from mainline r222205
2015-04-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Jakub Jelinek <jakub@redhat.com>
PR target/65787
* config/rs6000/rs6000.c (rtx_is_swappable_p): Ensure that a
subsequent SH_NONE operand does not overwrite an existing *special
value.
(adjust_extract): Handle case where a vec_extract operation is
wrapped in a PARALLEL.
[gcc/testsuite]
2015-04-18 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline r222205
2015-04-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Mikael Morin [Tue, 14 Apr 2015 12:23:30 +0000 (12:23 +0000)]
re PR fortran/56674 (ICE in check_sym_interfaces)
PR fortran/56674
PR fortran/58813
PR fortran/59016
PR fortran/59024
fortran/
* symbol.c (save_symbol_data, gfc_save_symbol_data): Rename the
former to the latter and make it non-static. Update callers.
* gfortran.h (gfc_save_symbol_data): New prototype.
* decl.c (gfc_match_decl_type_spec): Call 'gfc_save_symbol_data'
before modifying symbols 'sym' and 'dt_sym'.
testsuite/
* gfortran.dg/used_types_27.f90: New.
* config/s390/s390.c (s390_function_num_hotpatch_hw): Allow hotpatching
nested functions.
(s390_reorg): Adapt to new signature of s390_function_num_hotpatch_hw.
(s390_asm_output_function_label): Adapt to new signature of
s390_function_num_hotpatch_hw
Optimise the code generating assembler output.
Add comments to assembler file.
projects / thirdparty / gcc.git / log
