The MSM8916 Longcheer L8150 uses a fallback in compatible:
msm8916-longcheer-l8150.dtb: /: compatible: 'oneOf' conditional failed, one must be fixed:
['longcheer,l8150', 'qcom,msm8916-v1-qrd/9-v1', 'qcom,msm8916'] is too long
Fixes: b72160fa886d ("dt-bindings: qcom: Document bindings for new MSM8916 devices") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20220520123252.365762-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
qcom-cpufreq-hw finds turbo-mode in the LUT hardware tables
and slaps the flag on the last element, so there's no reason
to add it in the dts, so remove it.
Johan Hovold [Fri, 15 Jul 2022 07:02:48 +0000 (09:02 +0200)]
arm64: dts: qcom: reorder USB interrupts
Three SoCs did not follow the interrupt order specified by the USB
controller binding.
While keeping the non-SuperSpeed interrupts together seems natural,
reorder the interrupts to match the binding.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
[bjorn: Omitted sdx65 part from this patch] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220715070248.19078-5-johan+linaro@kernel.org
Johan Hovold [Fri, 15 Jul 2022 07:02:46 +0000 (09:02 +0200)]
arm64: dts: qcom: sc8280xp: fix USB interrupts
The two single-port SC8280XP USB controllers do not have an hs_phy_irq
interrupt. Instead they have a pwr_event interrupt which is distinct
from the former and not yet supported by the driver.
Fix the USB node interrupt names so that they match the devicetree
binding.
Also fix the pwr_event interrupt of the second controller which should
be 811 as noticed by Andrew Halaney.
Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220715070248.19078-3-johan+linaro@kernel.org
Johan Hovold [Fri, 15 Jul 2022 07:02:45 +0000 (09:02 +0200)]
arm64: dts: qcom: sc8280xp: fix USB clock order and naming
Fix the USB controller clock order and naming so that they match the
devicetree binding.
Note that the driver currently simply enables all clocks in the order
that they are specified in the devicetree. Reordering the clocks as per
the binding means that the only explicit ordering constraint found in
the vendor driver, that cfg_noc should be enabled before the core_clk,
is now honoured.
Currently the DT for QCS404 SoC has setup for 2 USB2 PHYs with one each
assigned to USB3 controller and USB2 controller. This assignment is
incorrect which only works by luck: as when each USB HCI comes up it
configures the *other* controllers PHY which is enough to make them
happy. If, for any reason, we were to disable one of the controllers then
both would stop working.
This was a difficult inconsistency to be caught which was found while
trying to enable USB support in u-boot. So with all the required drivers
ported to u-boot, I couldn't get the same USB storage device enumerated
in u-boot which was being enumerated fine by the kernel.
The root cause of the problem came out to be that I wasn't enabling USB2
PHY: "usb2_phy_prim" in u-boot. Then I realised that via simply disabling
the same USB2 PHY currently assigned to USB2 host controller in the
kernel disabled enumeration for USB3 host controller as well.
So fix this inconsistency by correctly assigning USB2 PHYs.
Fixes: 9375e7d719b3 ("arm64: dts: qcom: qcs404: Add USB devices and PHYs") Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220711083038.1518529-1-sumit.garg@linaro.org
arm64: dts: qcom: sc7280: drop unused clocks from eDP node
The eDP node includes two clocks which are used by the eDP PHY rather
than eDP controller itself. Drop these clocks to remove extra difference
between eDP and DP controllers.
arm64: dts: qcom: sc7280: drop address/size-cells from eDP node
Drop #address/#size-cells from eDP device node. For eDP the panels are
not described directly under the controller node. They are either
present under aux-bus child node, or they are declared separately (e.g.
in a /soc node).
arm64: dts: qcom: sc7280: drop #clock-cells from displayport-controller
Drop #clock-cells from DP device node. It is a leftover from the times
before splitting the deviice into controller and PHY devices. Now the
clocks are provided by the PHY, while the controller doesn't provide any
clocks.
arm64: dts: qcom: sc7280: split register block for DP controller
Follow the schema for the DP controller and declare 5 register regions
instead of using a single region for all the registers. Note, this
extends the dts by adding p1 region to the DP node (to be used for DP
MST).
arm64: dts: qcom: sc7180: drop #clock-cells from displayport-controller
Drop #clock-cells from DP device node. It is a leftover from the times
before splitting the device into controller and PHY devices. Now the
clocks are provided by the PHY, while the controller doesn't provide any
clocks.
arm64: dts: qcom: sc7180: split register block for DP controller
Follow the schema for the DP controller and declare 5 register regions
instead of using a single region for all the registers. Note, this
extends the dts by adding p1 region to the DP node (to be used for DP
MST).
Marijn Suijten [Sat, 7 May 2022 15:36:27 +0000 (17:36 +0200)]
arm64: dts: qcom: msm8998: Make regulator voltages multiple of step-size
These voltages are not a multiple of the given step-size 8000 (with base
voltage 1664000) in pm8998_pldo, resulting in PLDO regulators l18 and
l22 failing to validate and in turn not probing the rpm-pm8998-regulator
driver:
Marijn Suijten [Sat, 7 May 2022 22:46:45 +0000 (00:46 +0200)]
arm64: dts: qcom: sm6350: Replace literal rpmhpd indices with constants
It seems the SM6350_CX definition was temporarily replaced with its
literal value 0 in 1797e1c9a95c ("arm64: dts: qcom: sm6350: Add SDHCI1/2
nodes") to prevent a dependency on the qcom-rpmpd.h header patch being
available prior to this DT patch being applied, similar to c23f1b77358c
("arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX").
However, unlike the revert of that in the sm6125 tree the next merge
window around in a90b8adfa2dd ("Revert "arm64: dts: qcom: sm6125: Avoid
using missing SM6125_VDDCX""), this has not yet happened for sm6350:
replace them back now that the definitions are definitely available.
Robert Marko [Thu, 7 Jul 2022 17:37:33 +0000 (19:37 +0200)]
arm64: dts: qcom: ipq8074: add APCS node
APCS now has support for providing the APSS clocks as the child device
for IPQ8074.
So, add the required DT node for it as it will later be used as the CPU
clocksource.
Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[bjorn: Sorted node based on address] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220707173733.404947-4-robimarko@gmail.com
arm64: dts: qcom: sc8280xp: Add lost ranges for timer
The timer node needs ranges specified to map the 1-cell children to the
2-cell address range used in /soc. This addition never made it into the
patch that was posted and merged, so add it now.
Johan Hovold [Tue, 5 Jul 2022 11:40:29 +0000 (13:40 +0200)]
arm64: dts: qcom: sm8450: drop UFS PHY clock-cells
The QMP UFS PHY provides more than one symbol clock and would need an
index to differentiate the clocks, but none of this is described by the
binding currently.
Drop the incorrect '#clock-cells' property for now.
Johan Hovold [Tue, 5 Jul 2022 11:40:28 +0000 (13:40 +0200)]
arm64: dts: qcom: sm8250: drop UFS PHY clock-cells
The QMP UFS PHY provides more than one symbol clock and would need an
index to differentiate the clocks, but none of this is described by the
binding currently.
Drop the incorrect '#clock-cells' property for now.
Johan Hovold [Tue, 5 Jul 2022 11:40:27 +0000 (13:40 +0200)]
arm64: dts: qcom: sc8280xp: drop UFS PHY clock-cells
The QMP UFS PHY provides more than one symbol clock and would need an
index to differentiate the clocks, but none of this is described by the
binding currently.
Drop the incorrect '#clock-cells' property for now.
The commit in question caused my sc7280-herobrine-herobrine-r1 board
not to boot anymore. This shouldn't be too surprising since the driver
is relying on the name "cqhci".
The issue seems to be that someone decided to change the names of
things when the binding moved from .txt to .yaml. We should go back to
the names that the bindings have historically specified.
For some history, see commit d3392339cae9 ("mmc: cqhci: Update cqhci
memory ioresource name") and commit d79100c91ae5 ("dt-bindings: mmc:
sdhci-msm: Add CQE reg map").
arm64: dts: qcom: sc7280: use constants for gpucc clocks and power-domains
To ease merging of bindings and dts files, the constants were replaced
with numeric values. Change them back to defined constants.
While we are at it, fix the indentation of these clocks properties to
follow established guidelines.
Robert Marko [Mon, 4 Jul 2022 14:35:54 +0000 (16:35 +0200)]
arm64: dts: qcom: ipq8074: add reset to SDHCI
Add reset to SDHCI controller so it can be reset to avoid timeout issues
after software reset due to bootloader set configuration.
Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220704143554.1180927-2-robimarko@gmail.com
Add device node for CPU-memory BWMON device (bandwidth monitoring) on
SDM845 measuring bandwidth between CPU (gladiator_noc) and Last Level
Cache (memnoc). Usage of this BWMON allows to remove fixed bandwidth
votes from cpufreq (CPU nodes) thus achieve high memory throughput even
with lower CPU frequencies.
Robert Marko [Mon, 4 Jul 2022 11:33:18 +0000 (13:33 +0200)]
arm64: dts: qcom: ipq8074: move ARMv8 timer out of SoC node
The ARM timer is usually considered not part of SoC node, just like
other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning:
arch/arm64/boot/dts/qcom/ipq8072-ax9000.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'}
From schema: dtschema/schemas/simple-bus.yaml
Signed-off-by: Robert Marko <robimarko@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[bjorn: Moved node after "soc" for alphabetical ordering] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220704113318.623102-1-robimarko@gmail.com
Abel Vesa [Thu, 30 Jun 2022 10:14:03 +0000 (13:14 +0300)]
arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSI
Switch from the flat PC idle states of sdm845 to OSI hierarchical idle
states. The exceptions are the cheza plaftorms, which need to remain with
PC idle states. So in order allow all the other platforms to switch,
while cheza platforms to remain the same, replace the PC idle states with
the OSI ones in the main SDM845 dtsi, and then override the inherited OSI
states with PC ones, delete inherited psci cpus nodes, domain idle states
and power domain properties.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220630101403.1888541-1-abel.vesa@linaro.org
Anton Bambura [Sun, 26 Jun 2022 16:45:38 +0000 (12:45 -0400)]
arm64: dts: qcom: add device tree for LG G7 and LG V35
Adds initial support for the LG G7 (judyln) and
LG V35 (judyp) phones.
Currently supported features:
- Display via simplefb (panel driver is WIP)
- Keys
- Micro SD card
- Modem (not tested much, but initialises)
- UFS (crashes during intensive workloads, may need quirks)
- USB in peripheral mode
Notable missing features:
- Enabling WiFi causes a remoteproc crash, so it's disabled here.
Needs to be debugged - ideas welcome!
Signed-off-by: Anton Bambura <jenneron@protonmail.com> Signed-off-by: Stefan Hansson <newbie13xd@gmail.com> Tested-by: Gregari Ivanov <llamashere@posteo.de> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220626164536.16011-2-newbie13xd@gmail.com
Dmitry Baryshkov [Mon, 20 Jun 2022 07:19:34 +0000 (10:19 +0300)]
arm64: dts: qcom: msm8996: correct #clock-cells for QMP PHY nodes
The commit 82d61e19fccb ("arm64: dts: qcom: msm8996: Move '#clock-cells'
to QMP PHY child node") moved the '#clock-cells' properties to the child
nodes. However it missed the fact that the property must have been set
to <0> (as all pipe clocks use of_clk_hw_simple_get as the xlate
function. Also the mentioned commit didn't add '#clock-cells' properties
to second and third PCIe PHY nodes. Correct both these mistakes:
- Set '#clock-cells' to <0>,
- Add the property to pciephy_1 and pciephy_2 nodes.
Dylan Van Assche [Thu, 12 May 2022 05:44:39 +0000 (07:44 +0200)]
arm64: dts: qcom: sdm845-shift-axolotl: Enable pmi9889 LPG LED
Enables the RGB notification LED on the SHIFT 6mq (sdm845-shift-axolotl)
with the Qualcomm Light Pulse Generator bindings by Bjorn Andersson [1].
Patches are merged in for-next branch of linux-leds.
Tested these changes on the SHIFT 6mq.
Marijn Suijten [Sun, 8 May 2022 10:03:35 +0000 (12:03 +0200)]
arm64: dts: qcom: sm6125: Add DLL/DDR configuration on SDHCI 1/2
These config values have been extracted from CodeLinaro's most recent
trinket/sm6125 tag:
https://git.codelinaro.org/clo/la/kernel/msm-4.14/-/blob/LA.UM.9.11.r1-05600-NICOBAR.QSSI12.0/arch/arm64/boot/dts/qcom/trinket.dtsi
Marijn Suijten [Sun, 8 May 2022 10:03:33 +0000 (12:03 +0200)]
arm64: dts: qcom: sm6125: Move sdc2 pinctrl from seine-pdx201 to sm6125
Both the sdc2-on and sdc2-off pinctrl nodes are used by the
sdhci@4784000 node in sm6125.dtsi. Surprisingly sdc2-off is defined in
sm6125, yet its sdc2-on counterpart is only defined in board-specific DT
for the Sony Seine PDX201 board/device resulting in an "undefined label
&sdc2_state_on" error if sm6125.dtsi were included elsewhere.
This sm6125 base dtsi should not rely on externally defined labels; the
properties referencing it should then also be written externally.
Since the sdc2-on pin configuration is board-independent just like
sdc2-off, move it from seine-pdx201.dts into sm6125.dtsi.
The SDCard-detect pin (gpio98) is however board-specific, and remains as
an overwrite in seine-pdx201.dts for both the on and off state.
As a drive-by cleanup, reorder bias- and drive-strength properties.
Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125") Fixes: 82e1783890b7 ("arm64: dts: qcom: sm6125: Add support for Sony Xperia 10II") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220508100336.127176-1-marijn.suijten@somainline.org
Bjorn Andersson [Thu, 5 May 2022 02:27:06 +0000 (19:27 -0700)]
arm64: dts: qcom: db820c: Add user LEDs
The db820c has 4 "user LEDs", all connected to the PMI8994. The first
three are connected to the three current sinks provided by the TRILED
and the fourth is connected to MPP2.
By utilizing the DTEST bus the MPP is fed the control signal from the
fourth LPG block, providing a consistent interface to the user.
Bjorn Andersson [Thu, 5 May 2022 02:27:04 +0000 (19:27 -0700)]
arm64: dts: qcom: sdm845: Enable user LEDs on DB845c
The DB845c has 4 "user LEDs", the last one is already supported as it's
just wired to a gpio. Now that the LPG binding is in place we can wire
up the other 3 LEDs as well.
Stephen Boyd [Mon, 27 Jun 2022 21:28:02 +0000 (14:28 -0700)]
arm64: dts: qcom: sc7180-trogdor: Split out keyboard node and describe detachables
Trogdor devices that have a detachable keyboard still have a
non-detachable keyboard input device present because we include the
cros-ec-keyboard.dtsi snippet in the top-level sc7180-trogdor.dtsi file
that every variant board includes. We do this because the
keyboard-controller node also provides some buttons like the power
button and volume buttons. Unfortunately, this means we register a
keyboard input device that doesn't do anything on boards with a
detachable keyboard.
Change the node's compatible on detachables to the newly introduced
"google,cros-ec-keyb-switches" compatible to indicate that there are
only switches and no keyboard to register. Similarly, move the keyboard
include that defines the keyboard-controller node out of
sc7180-trogdor.dtsi to boards that actually have a keyboard so that the
matrix properties are not defined on boards with the switches
compatible. Future boards can either use the include approach or the
node definition approach to describe a keyboard with possible switches
or just some switches.
Cc: Benson Leung <bleung@chromium.org> Cc: Guenter Roeck <groeck@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Cc: Hsin-Yi Wang <hsinyi@chromium.org> Cc: "Joseph S. Barrera III" <joebar@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220627212802.3593012-1-swboyd@chromium.org
Dmitry Baryshkov [Fri, 17 Jun 2022 10:36:52 +0000 (13:36 +0300)]
arm64: dts: qcom: msm8996: add second DSI interface
Add device nodes for the DSI1, second DSI interface found on
MSM8996/APQ8096 platforms. For example on db820c it is routed to the
secondary HS expansion connector.
This is an SMMU for the adreno gpu, and adding this compatible lets
the driver use per-fd page tables, which are required for security
between GPU clients.
Signed-off-by: Emma Anholt <emma@anholt.net> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[bjorn: Move arm,smmu-500 last, per Dmitry's request] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220614230136.3726047-2-emma@anholt.net
arm64: dts: qcom: msm8996: drop phy-names from HDMI device node
The HDMI driver doesn't use the phy-names to identify the PHY. Different
Qualcomm platforms have used different names for the PHY. So, we are
deprecating phy-names propertty of the HDMI device and dropping them
from existing DTs.
arm64: dts: qcom: sdm845: add dedicated IMEM and syscon compatibles
Add proper compatibles to the IMEM device node:
1. syscon to allow accessing memory from other devices,
2. dedicated compatible as required for syscon and simple-mfd nodes.
arm64: dts: qcom: sdm630: add dedicated IMEM and syscon compatibles
Add proper compatibles to the IMEM device node:
1. syscon to allow accessing memory from other devices,
2. dedicated compatible as required for syscon and simple-mfd nodes.
arm64: dts: qcom: sc7180: add dedicated IMEM and syscon compatibles
Add proper compatibles to the IMEM device node:
1. syscon to allow accessing memory from other devices,
2. dedicated compatible as required for syscon and simple-mfd nodes.
arm64: dts: qcom: qcs404: add dedicated IMEM and syscon compatibles
Add proper compatibles to the IMEM device node:
1. syscon to allow accessing memory from other devices,
2. dedicated compatible as required for syscon and simple-mfd nodes.
arm64: dts: qcom: use generic sram as name for imem and ocmem nodes
According to Devicetree specification, the device nodes should be
generic, reflecting the function of the device. The typical name for
memory regions is "sram".
projects / thirdparty / kernel / stable.git / log
