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8 months agotestsuite: check that generated .sarif files validate against the SARIF schema [PR109360]
David Malcolm [Fri, 21 Jun 2024 12:46:14 +0000 (08:46 -0400)] 
testsuite: check that generated .sarif files validate against the SARIF schema [PR109360]

This patch extends the dg directive verify-sarif-file so that if
the "jsonschema" tool is available, it will be used to validate the
generated .sarif file.

Tested with jsonschema 3.2 with Python 3.8

gcc/ChangeLog:
PR testsuite/109360
* doc/install.texi: Mention optional usage of "jsonschema" tool.

gcc/testsuite/ChangeLog:
PR testsuite/109360
* lib/sarif-schema-2.1.0.json: New file, downloaded from
https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/schemas/sarif-schema-2.1.0.json
Licensing information can be seen at
https://github.com/oasis-tcs/sarif-spec/issues/583
which states "They are free to incorporate it into their
implementation. No need for special permission or paperwork from
OASIS."
* lib/scansarif.exp (verify-sarif-file): If "jsonschema" is
available, use it to verify that the .sarif file complies with the
SARIF schema.
* lib/target-supports.exp (check_effective_target_jsonschema):
New.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
(cherry picked from commit a84fe222029ff21903283cc8ee4bc760ebf80ec2)

8 months agodiagnostics: fixes to SARIF output [PR109360]
David Malcolm [Fri, 21 Jun 2024 12:46:13 +0000 (08:46 -0400)] 
diagnostics: fixes to SARIF output [PR109360]

When adding validation of .sarif files against the schema
(PR testsuite/109360) I discovered various issues where we were
generating invalid .sarif files.

Specifically, in
  c-c++-common/diagnostic-format-sarif-file-bad-utf8-pr109098-1.c
the relatedLocations for the "note" diagnostics were missing column
numbers, leading to validation failure due to non-unique elements,
such as multiple:
"message": {"text": "invalid UTF-8 character <bf>"}},
on line 25 with no column information.

Root cause is that for some diagnostics in libcpp we have a location_t
representing the line as a whole, setting a column_override on the
rich_location (since the line hasn't been fully read yet).  We were
handling this column override for plain text output, but not for .sarif
output.

Similarly, in diagnostic-format-sarif-file-pr111700.c there is a warning
emitted on "line 0" of the file, whereas SARIF requires line numbers to
be positive.

We also use column == 0 internally to mean "the line as a whole",
whereas SARIF required column numbers to be positive.

This patch fixes these various issues.

gcc/ChangeLog:
PR testsuite/109360
* diagnostic-format-sarif.cc
(sarif_builder::make_location_object): Pass any column override
from rich_loc to maybe_make_physical_location_object.
(sarif_builder::maybe_make_physical_location_object): Add
"column_override" param and pass it to maybe_make_region_object.
(sarif_builder::maybe_make_region_object): Add "column_override"
param and use it when the location has 0 for a column.  Don't
add "startLine", "startColumn", "endLine", or "endColumn" if
the values aren't positive.
(sarif_builder::maybe_make_region_object_for_context): Don't
add "startLine" or "endLine" if the values aren't positive.

libcpp/ChangeLog:
PR testsuite/109360
* include/rich-location.h (rich_location::get_column_override):
New accessor.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
(cherry picked from commit 9f4fdc3acebcf6b045edea1361570658da4bc0ab)

8 months agoregenerate-opt-urls.py: fix transposed values for "vax" and "v850"
David Malcolm [Tue, 28 May 2024 19:47:38 +0000 (15:47 -0400)] 
regenerate-opt-urls.py: fix transposed values for "vax" and "v850"

gcc/ChangeLog:
* config/v850/v850.opt.urls: Regenerate, with fix.
* config/vax/vax.opt.urls: Likewise.
* regenerate-opt-urls.py (TARGET_SPECIFIC_PAGES): Fix transposed
values for "vax" and "v850".

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
(cherry picked from commit 7cc529fe514cc64e88208a6a7acfc6fe6419a453)

8 months agotestsuite: fix analyzer C++ failures on Solaris [PR111475]
David Malcolm [Fri, 3 May 2024 13:05:29 +0000 (09:05 -0400)] 
testsuite: fix analyzer C++ failures on Solaris [PR111475]

As part of PR analyzer/96395, these patches moved testcases from
gcc.dg/analyzer to c-c++-common/analyzer:
r14-3503-g55f6a7d949abc7
r14-3823-g50b5199cff6908
r14-6564-gae034b9106fbdd

Unfortunately this led to numerous g++ testsuite failures on Solaris,
tracked as PR analyzer/111475.

Almost all of the failures are due to standard library differences where
including a C standard library on C++ e.g. <stdlib.h> leads to the plain
symbols referencing the symbols "std::" via a "using" declaration,
whereas I had written the code expecting them to use symbols in the root
namespace.

The analyzer has special-case handling of many functions by name.
This patch generalizes such handling to also match against functions
in "std::" for all of the cases I found in the testsuite (via manual
inspection of the preprocessed test cases against Solaris headers).
This fixes cases where the analyzer was failing to "know about" the
behavior of such functions.

Other such failures are due to "std::" prefixes appearing in names of
functions in the output, leading to mismatches against expected output.
The patch adds regexes to some cases, and moves some other cases back
from c-c++-common to gcc.dg where the dg-multiline syntax isn't
expressive enough.

Various "fd-*.c" failures relate to Solaris's socket-handling functions
not being marked with "noexcept", where due to PR analyzer/97111 we
mishandle the exception-handling edges in the CFG, leading to leak
false positives.  The patch works around this by adding -fno-exceptions
to these cases, pending a proper fix for PR analyzer/97111.

gcc/analyzer/ChangeLog:
PR analyzer/111475
* analyzer.cc (is_special_named_call_p): Add "look_in_std" param.
(is_std_function_p): Make non-static.
* analyzer.h (is_special_named_call_p): Add optional "look_in_std"
param.
(is_std_function_p): New decl.
* engine.cc (stmt_requires_new_enode_p): Look for both "signal"
and "std::signal".
* kf.cc (register_known_functions): Add various "std::" copies
of the known functions.
* known-function-manager.cc
(known_function_manager::~known_function_manager): Clean up
m_std_ns_map_id_to_kf.
(known_function_manager::add_std_ns): New.
(known_function_manager::get_match): Also look for known "std::"
functions.
(known_function_manager::get_by_identifier_in_std_ns): New.
* known-function-manager.h
(known_function_manager::add_std_ns): New decl.
(known_function_manager::get_by_identifier_in_std_ns): New decl.
(known_function_manager::m_std_ns_map_id_to_kf): New field.
* sm-file.cc (register_known_file_functions): Add various "std::"
copies of the known functions.
* sm-malloc.cc (malloc_state_machine::on_stmt): Handle
"std::realloc".
* sm-signal.cc (signal_unsafe_p): Consider "std::" copies of the
functions as also being async-signal-unsafe.
(signal_state_machine::on_stmt): Consider "std::signal".

gcc/testsuite/ChangeLog:
PR analyzer/111475
* c-c++-common/analyzer/fd-glibc-byte-stream-socket.c: Add
-fno-exceptions for now.
* c-c++-common/analyzer/fd-manpage-getaddrinfo-client.c: Likewise.
* c-c++-common/analyzer/fd-mappage-getaddrinfo-server.c: Rename to...
* c-c++-common/analyzer/fd-manpage-getaddrinfo-server.c: ...this, and
add -fno-exceptions for now.
* c-c++-common/analyzer/fd-socket-meaning.c: Add -fno-exceptions
for now.
* c-c++-common/analyzer/fd-symbolic-socket.c: Likewise.
* c-c++-common/analyzer/flexible-array-member-1.c: Use regexp to
handle C vs C++ differences in spelling of function name, which
could have a "std::" prefix on some targets.
* c-c++-common/analyzer/pr106539.c: Likewise.
* c-c++-common/analyzer/malloc-ipa-8-unchecked.c: Move back to...
* gcc.dg/analyzer/malloc-ipa-8-unchecked.c: ...here, dropping
attempt to generalize output for C vs C++.
* c-c++-common/analyzer/signal-4a.c: Move back to...
* gcc.dg/analyzer/signal-4a.c: ...here, dropping attempt to
generalize output for C vs C++.
* c-c++-common/analyzer/signal-4b.c: Move back to...
* gcc.dg/analyzer/signal-4b.c: ...here, dropping attempt to
generalize output for C vs C++.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
(cherry picked from commit 5219414f3cde3c1037e289a6654cd722cfa75dea)

8 months ago[PATCH] PR modula2/115276 bugfix libgm2 wraptime.InitTM returns NIL
Gaius Mulley [Wed, 20 Nov 2024 09:22:53 +0000 (09:22 +0000)] 
[PATCH] PR modula2/115276 bugfix libgm2 wraptime.InitTM returns NIL

This patch fixes libgm2/libm2iso/wraptime.cc:InitTM so that
it does not always return NULL.  The incorrect autoconf macro
was used (inside InitTM) and the function short circuited
to return NULL.  The fix is to use HAVE_SYS_TIME_H and use
AC_HEADER_TIME in libgm2/configure.ac.

libgm2/ChangeLog:

PR modula2/115276
* config.h.in: Regenerate.
* configure: Regenerate.
* configure.ac: Use AC_HEADER_TIME.
* libm2iso/wraptime.cc (InitTM): Check HAVE_SYS_TIME_H
before using struct tm to obtain the size.

gcc/testsuite/ChangeLog:

PR modula2/115276
* gm2/isolib/run/pass/testinittm.mod: New test.

(cherry picked from commit d1a1f7e9f0bedea55c558ab95127679bc3e9ff72)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
8 months ago[PATCH] modula2: simplify xref usage in documentation, remove external ref to gm2.
Gaius Mulley [Wed, 20 Nov 2024 08:15:45 +0000 (08:15 +0000)] 
[PATCH] modula2: simplify xref usage in documentation, remove external ref to gm2.

This patch simplifies all the xref usage for gm2 nodes in the
modula-2 documentation.

gcc/ChangeLog:

* doc/gm2.texi: Replace all occurrences of xref
{foo, , , gm2} with xref {foo}.

(cherry picked from commit a209f219b862def8fed166b31984b8c6c3bb74a0)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
8 months ago[PATCH] modula2: fix xref fourth parameter in documentation, change from gm2 to m2
Gaius Mulley [Wed, 20 Nov 2024 08:14:10 +0000 (08:14 +0000)] 
[PATCH] modula2: fix xref fourth parameter in documentation, change from gm2 to m2

This patch corrects the gm2.texi xref for the modula-2 documentation.

gcc/ChangeLog:

* doc/gm2.texi: Replace all occurrences of xref {, , , gm2}
with xref {, , , m2}.

(cherry picked from commit 5833e5b8ef40367764325f4f3c80cfa129fbe1da)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
8 months agoDaily bump.
GCC Administrator [Wed, 20 Nov 2024 00:23:31 +0000 (00:23 +0000)] 
Daily bump.

8 months ago[PATCH] modula2: use groups in the type resolver of the bootstrap tool mc
Gaius Mulley [Wed, 20 Nov 2024 00:17:23 +0000 (00:17 +0000)] 
[PATCH] modula2: use groups in the type resolver of the bootstrap tool mc

This patch introduces groups to maintain the lists used when resolving
types in the bootstrap tool mc.  The groups and type resolver are very
similar to that used in cc1gm2.  Specifically the resolver uses the group
to detect any change to any element in any list within a group.  This is
much cleaner and safer than the previous list length comparisons.

gcc/m2/ChangeLog:

* Make-lang.in (MC_EXTENDED_OPAQUE): New definition.
* mc-boot/GDynamicStrings.cc: Rebuild.
* mc-boot/GDynamicStrings.h: Rebuild.
* mc-boot/Galists.cc: Rebuild.
* mc-boot/Galists.h: Rebuild.
* mc-boot/Gdecl.cc: Rebuild.
* mc/alists.def (equalList): New procedure.
* mc/alists.mod (equalList): New procedure implementation.
* mc/decl.mod (group): New type.
(freeGroup): New variable.
(globalGroup): Ditto.
(todoQ): Remove declaration and prefix all occurances with globalGroup^.
(partialQ): Ditto.
(doneQ): Ditto.
(newGroup): New procedure.
(initGroup): Ditto.
(killGroup): Ditto.
(dupGroup): Ditto.
(equalGroup): Ditto.
(topologicallyOut): Rewrite.

(cherry picked from commit 20e6f36771df7e3a8857628dd367eecfe77ba4fc)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
8 months ago[PATCH] modula2: Pass --destdir for dir index during install of m2.info.
Gaius Mulley [Tue, 19 Nov 2024 22:28:04 +0000 (22:28 +0000)] 
[PATCH] modula2: Pass --destdir for dir index during install of m2.info.

This patch adds DESTDIR to the infodir when installing m2.info.

gcc/m2/ChangeLog

* Make-lang.in (m2.install-info): Pass --destdir for dir index.

(cherry picked from commit 232a86f9640cde6908d0875b8df52c36030c5b5e)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
8 months ago[PATCH] PR modula2/115164 initial test code highlighting the problem
Gaius Mulley [Tue, 19 Nov 2024 19:33:18 +0000 (19:33 +0000)] 
[PATCH] PR modula2/115164 initial test code highlighting the problem

This patch includes some trivial testcode which highlights
PR 115164.  Expect future test code to perform runtime checks
for a series of trailing zeros.

gcc/testsuite/ChangeLog:

PR modula2/115164
* gm2/isolib/run/pass/testlowread.mod: New test.
* gm2/isolib/run/pass/testwritereal.mod: New test.

(cherry picked from commit d642b66a298ece7394e786a6a2d14a4f0b561d9a)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
8 months ago[PATCH] PR modula2/115057 TextIO.ReadRestLine raises an exception when buffer is...
Gaius Mulley [Tue, 19 Nov 2024 18:30:10 +0000 (18:30 +0000)] 
[PATCH] PR modula2/115057 TextIO.ReadRestLine raises an exception when buffer is exceeded

TextIO.ReadRestLine will raise an "attempting to read beyond end of file"
exception if the buffer is exceeded.  This bug is caused by the
TextIO.ReadRestLine calling IOChan.Skip without a preceeding IOChan.Look.
The Look procedure will update the status result whereas
Skip always sets read result to allRight.

gcc/m2/ChangeLog:

PR modula2/115057
* gm2-libs-iso/TextIO.mod (ReadRestLine): Use ReadChar to
skip unwanted characters as this calls IOChan.Look and updates
the cid result status.  A Skip without a Look does not update
the status.  Skip always sets read result to allRight.
* gm2-libs-iso/TextUtil.def (SkipSpaces): Improve comments.
(CharAvailable): Improve comments.
* gm2-libs-iso/TextUtil.mod (SkipSpaces): Improve comments.
(CharAvailable): Improve comments.

gcc/testsuite/ChangeLog:

PR modula2/115057
* gm2/isolib/run/pass/testrestline.mod: New test.
* gm2/isolib/run/pass/testrestline2.mod: New test.
* gm2/isolib/run/pass/testrestline3.mod: New test.

(cherry picked from commit 680af0e1e90d4b80260d173636dfe15654fd470d)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
8 months ago[PATCH] PR modula2/115003 exporting a symbol to outer scope with a name clash causes ICE
Gaius Mulley [Tue, 19 Nov 2024 15:32:02 +0000 (15:32 +0000)] 
[PATCH] PR modula2/115003 exporting a symbol to outer scope with a name clash causes ICE

An ICE will occur if an unknown symbol is exported and causes a name
clash.  The error mechanism attempts to find the scope of an unknown
symbol.  This patch adds a missing case clause to GetScope and returns
NulSym if the scope is an unknown symbol.

gcc/m2/ChangeLog:

PR modula2/115003
* gm2-compiler/SymbolTable.mod (GetScope): Add UndefinedSym
case clause and return NulSym.

(cherry picked from commit bc5afdf14ccf8375f7fb3de2be1121aaf550f8aa)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
8 months agoDaily bump.
GCC Administrator [Tue, 19 Nov 2024 00:22:54 +0000 (00:22 +0000)] 
Daily bump.

8 months agoi386: Enable *rsqrtsf2_sse without TARGET_SSE_MATH [PR117357]
Uros Bizjak [Mon, 18 Nov 2024 21:38:46 +0000 (22:38 +0100)] 
i386: Enable *rsqrtsf2_sse without TARGET_SSE_MATH [PR117357]

__builtin_ia32_rsqrtsf2 expander generates UNSPEC_RSQRT insn pattern
also when TARGET_SSE_MATH is not set.  Enable *rsqrtsf2_sse without
TARGET_SSE_MATH to avoid ICE with unrecognizable insn.

PR target/117357

gcc/ChangeLog:

* config/i386/i386.md (*rsqrtsf2_sse):
Also enable for !TARGET_SSE_MATH.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr117357.c: New test.

(cherry picked from commit 344356f781ddb7bf0abb11edf9bdd13f6802dea8)

8 months agoAVR: target/117659 - Fix wrong code for u24 << 16.
Georg-Johann Lay [Mon, 18 Nov 2024 17:12:38 +0000 (18:12 +0100)] 
AVR: target/117659 - Fix wrong code for u24 << 16.

gcc/
PR target/117659
* config/avr/avr.cc (avr_out_ashlpsi3) [case 16]: Use %A1 as
input (instead of bogus %A0).

(cherry picked from commit bba27015f2815a8fa6fae46a29a70644e868341c)

8 months agofold-const: Fix BIT_INSERT_EXPR folding for BYTES_BIG_ENDIAN [PR116997]
Andre Vieira [Mon, 14 Oct 2024 15:24:07 +0000 (16:24 +0100)] 
fold-const: Fix BIT_INSERT_EXPR folding for BYTES_BIG_ENDIAN [PR116997]

Fix constant folding of BIT_INSER_EXPR for BYTES_BIG_ENDIAN targets.

gcc/ChangeLog:

PR middle-end/116997
* fold-const.cc (fold_ternary_loc): Fix BIT_INSERT_EXPR constant folding
for BYTES_BIG_ENDIAN targets.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/pr116997.c: New test.

Co-authored-by: Andrew Pinski <quic_apinski@quicinc.com>
(cherry picked from commit 2e30e90a0c2bf8147a6d24854aa653c332c8f84f)

8 months agoi386: Zero extend 32-bit address to 64-bit with option -mx32 -maddress-mode=long...
Hu, Lin1 [Wed, 6 Nov 2024 07:42:13 +0000 (15:42 +0800)] 
i386: Zero extend 32-bit address to 64-bit with option -mx32 -maddress-mode=long. [PR 117418]

-maddress-mode=long let Pmode = DI_mode, so zero extend 32-bit address to
64-bit and uses a 64-bit register as a pointer for avoid raise an ICE.

gcc/ChangeLog:

PR target/117418
* config/i386/i386-expand.cc (ix86_expand_builtin): Convert
pointer's mode according to Pmode.

gcc/testsuite/ChangeLog:

PR target/117418
* gcc.target/i386/pr117418-1.c: New test.

(cherry picked from commit 2272cd2508f1854c880082f792de15e76ec09a99)

8 months agoDaily bump.
GCC Administrator [Mon, 18 Nov 2024 00:25:08 +0000 (00:25 +0000)] 
Daily bump.

8 months agoDaily bump.
GCC Administrator [Sun, 17 Nov 2024 00:32:22 +0000 (00:32 +0000)] 
Daily bump.

8 months agoAVR: target/117500 - Use output_operand_lossage in avr_print_operand.
Georg-Johann Lay [Sat, 9 Nov 2024 11:40:48 +0000 (12:40 +0100)] 
AVR: target/117500 - Use output_operand_lossage in avr_print_operand.

PR target/117500
gcc/
* config/avr/avr.cc (avr_print_operand) [code = 'i']: Use
output_operand_lossage on bad operands instead of fatal_insn.

(cherry picked from commit 02d7370966ac19af966b827b4c984e8a38fdf728)

8 months agoDaily bump.
GCC Administrator [Sat, 16 Nov 2024 00:23:28 +0000 (00:23 +0000)] 
Daily bump.

8 months agohppa: Fix typos in 32-bit SFmode peephole2 patterns
John David Anglin [Fri, 15 Nov 2024 16:05:58 +0000 (11:05 -0500)] 
hppa: Fix typos in 32-bit SFmode peephole2 patterns

2024-11-15  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

PR target/117564
* config/pa/pa.md: Fix typos in 32-bit SFmode peephole2 patterns.

8 months agoDaily bump.
GCC Administrator [Fri, 15 Nov 2024 00:23:15 +0000 (00:23 +0000)] 
Daily bump.

8 months agoDaily bump.
GCC Administrator [Thu, 14 Nov 2024 17:24:28 +0000 (17:24 +0000)] 
Daily bump.

8 months agoFortran: Fix associate_69.f90 that fails on some platforms [PR115700]
Paul Thomas [Sun, 3 Nov 2024 18:02:16 +0000 (18:02 +0000)] 
Fortran: Fix associate_69.f90 that fails on some platforms [PR115700]

2024-11-03  Paul Thomas  <pault@gcc.gnu.org>

gcc/testsuite/
PR fortran/115700
* gfortran.dg/associate_69.f90: Remove the test that produces a
variable string length because the optimized count depends on
the platform. This is tested in associate_70.f90.

(cherry picked from commit 4ed02814c2191d5febe0972c3e43c80c004f4799)

8 months agoFortran: Fix problems with substring selectors in ASSOCIATE [PR115700]
Paul Thomas [Fri, 1 Nov 2024 07:45:00 +0000 (07:45 +0000)] 
Fortran: Fix problems with substring selectors in ASSOCIATE [PR115700]

2024-11-01  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/115700
* resolve.cc (resolve_assoc_var): Extract a substring reference
with missing as well as non-constant start or end.

gcc/testsuite/
PR fortran/115700
* gfortran.dg/associate_69.f90: Activate commented out tests.
* gfortran.dg/associate_70.f90: Test correct functioning of
references in associate_69.f90 tests.

(cherry picked from commit 7f93910a8b5d606ad742a3594750f0c2b20d8bda)

8 months agoFortran: Fix problem with substring selectors in ASSOCIATE [PR115700]
Paul Thomas [Thu, 31 Oct 2024 07:22:36 +0000 (07:22 +0000)] 
Fortran: Fix problem with substring selectors in ASSOCIATE [PR115700]

2024-10-31  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/115700
* resolve.cc (resolve_variable): The typespec of an expression,
which is not a substring, can be shared with a deferred length
associate name.
(resolve_assoc_var): Extract a substring reference with non-
constant start or end. Use it to flag up the need for array
associate name to be a pointer.
(resolve_block_construct): Change comment from past to future
tense.

gcc/testsuite/
PR fortran/115700
* gfortran.dg/associate_70.f90: New test.

(cherry picked from commit 159fb203231c503418e7ab9f45282957e40cb195)

8 months agohppa: Remove inner `fix:SF/DF` from fixed-point patterns
John David Anglin [Wed, 13 Nov 2024 14:40:42 +0000 (09:40 -0500)] 
hppa: Remove inner `fix:SF/DF` from fixed-point patterns

2024-11-13  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

PR target/117525
* config/pa/pa.md (fix_truncsfsi2): Remove inner `fix:SF`.
(fix_truncdfsi2, fix_truncsfdi2, fix_truncdfdi2,
fixuns_truncsfsi2, fixuns_truncdfsi2, fixuns_truncsfdi2,
fixuns_truncdfdi2): Likewise.

8 months agoDaily bump.
GCC Administrator [Wed, 13 Nov 2024 00:23:07 +0000 (00:23 +0000)] 
Daily bump.

8 months agohppa: Fix decrement_and_branch_until_zero constraint
John David Anglin [Tue, 12 Nov 2024 19:26:08 +0000 (14:26 -0500)] 
hppa: Fix decrement_and_branch_until_zero constraint

The third alternative for argument 4 needs to be an early clobber
constraint.  Noticed testing LRA.

2024-11-12  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

* config/pa/pa.md (decrement_and_branch_until_zero): Fix
constraint.

8 months agoada: Fix spurious error on iterated component association with large index type
Eric Botcazou [Wed, 30 Oct 2024 10:22:12 +0000 (11:22 +0100)] 
ada: Fix spurious error on iterated component association with large index type

This is only for the Ada 2022 form of the iterated component association.

gcc/ada/ChangeLog:

PR ada/117328
* exp_aggr.adb (Two_Pass_Aggregate_Expansion): Use a type sized
from the index type to compute the length.  Simplify and remove
useless calls to New_Copy_Tree for this computation.

8 months agoada: Fix bogus error for delta aggregate as expression function
Eric Botcazou [Mon, 28 Oct 2024 08:30:07 +0000 (09:30 +0100)] 
ada: Fix bogus error for delta aggregate as expression function

The compiler correctly accepts the other forms of aggregates.

gcc/ada/ChangeLog:

PR ada/113868
* par-ch6.adb (P_Subprogram) <Scan_Body_Or_Expression_Function>:
Add delta aggregate alongside the other forms of aggregates.

8 months agolibstdc++: Add parentheses around operand of |
Jonathan Wakely [Mon, 11 Nov 2024 11:23:08 +0000 (11:23 +0000)] 
libstdc++: Add parentheses around operand of |

libstdc++-v3/ChangeLog:

* include/bits/unicode.h (_Utf_iterator::_M_read_utf16): Add
parentheses.

8 months agotestsuite: Adjust jump threading test expectation
Andrew Carlotti [Fri, 1 Nov 2024 17:27:38 +0000 (17:27 +0000)] 
testsuite: Adjust jump threading test expectation

This test started failing on aarch64 after 0cfc9c95 in 2023 ("Phi
analyzer - Initialize with range instead of a tree.").

The only change visible in the pass dumps prior to thread2 is the upper
bounds of some ranges are reduced from +INF to 7, consistent with the
bitamsk information.  After thread2, there are changes in the control
flow, but only affecting edges that are obviously never taken (from
basic blocks 6 through 12).  These are cleaned up in the following pass,
but the final codegen remains different.

There isn't anything obviously wrong with the change in dump output, so
let's just update the test expectations (as has happened previously
here).

gcc/testsuite/ChangeLog:

PR tree-optimization/112376
* gcc.dg/tree-ssa/ssa-dom-thread-7.c: Update expectation.

8 months agolibstdc++: Fix typos in iterator increment for std::text_encoding [PR117520]
Jonathan Wakely [Mon, 11 Nov 2024 11:54:00 +0000 (11:54 +0000)] 
libstdc++: Fix typos in iterator increment for std::text_encoding [PR117520]

The intended behaviour for std::text_encoding::aliases_view's iterator
is that it incrementing or decrementing too far sets it to a
value-initialized state, or fails an assertion when those are enabled.
There were typos that used == instead of = which meant that instead of
becoming singular or aborting, an out-of-range increment just did
nothing. This meant erroneous operations were well-defined and didn't
produce any undefined behaviour, but were not diagnosed with assertions
enabled, as had been intended.

This change fixes the bugs and adds more tests to verify the intended
behaviour.

libstdc++-v3/ChangeLog:

PR libstdc++/117520
* include/std/text_encoding (aliases_view:_Iterator::operator+=):
Fix typos that caused == to be used instead of =.
(aliases_view::_Iterator): Fix friend declaration.
* testsuite/std/text_encoding/members.cc: Adjust expected
behaviour of invalid subscript. Add tests for other erroneous
operations on iterators.

8 months agoDaily bump.
GCC Administrator [Tue, 12 Nov 2024 00:23:41 +0000 (00:23 +0000)] 
Daily bump.

8 months agolibstdc++: Do not define _Insert_base::try_emplace before C++17
Jonathan Wakely [Fri, 8 Nov 2024 13:58:23 +0000 (13:58 +0000)] 
libstdc++: Do not define _Insert_base::try_emplace before C++17

This is not a reserved name in C++11 and C++14, so must not be defined.

Also use the appropriate feature test macros for the try_emplace members
of the Debug Mode maps.

libstdc++-v3/ChangeLog:

* include/bits/hashtable_policy.h (_Insert_base::try_emplace):
Do not define for C++11 and C++14.
* include/debug/map.h (try_emplace): Use feature test macro.
* include/debug/unordered_map (try_emplace): Likewise.
* testsuite/17_intro/names.cc: Define try_emplace before C++17.

(cherry picked from commit b66a57c0ad300b293ebd366bc29f44f2ddb65c69)

8 months agoi386: Add new model number for Arrow Lake
Haochen Jiang [Mon, 11 Nov 2024 02:52:33 +0000 (10:52 +0800)] 
i386: Add new model number for Arrow Lake

gcc/ChangeLog:

* common/config/i386/cpuinfo.h (get_intel_cpu): Add new model
number for Arrow Lake.

8 months agoDaily bump.
GCC Administrator [Mon, 11 Nov 2024 00:21:46 +0000 (00:21 +0000)] 
Daily bump.

8 months agoDaily bump.
GCC Administrator [Sun, 10 Nov 2024 00:22:20 +0000 (00:22 +0000)] 
Daily bump.

8 months agoDaily bump.
GCC Administrator [Sat, 9 Nov 2024 16:07:50 +0000 (16:07 +0000)] 
Daily bump.

8 months agoarm: Fix ICE on arm_mve.h pragma without MVE types [PR117408]
Torbjörn SVENSSON [Fri, 1 Nov 2024 16:47:48 +0000 (17:47 +0100)] 
arm: Fix ICE on arm_mve.h pragma without MVE types [PR117408]

Starting with r14-435-g00d97bf3b5a, doing `#pragma arm "arm_mve.h"
false` or `#pragma arm "arm_mve.h" true` without first doing
`#pragma arm "arm_mve_types.h"` causes GCC to ICE.

gcc/ChangeLog:

PR target/117408
* config/arm/arm-mve-builtins.cc(handle_arm_mve_h): Detect if MVE
types is missing and if so, return error.

gcc/testsuite/ChangeLog:

PR target/117408
* gcc.target/arm/mve/pr117408-1.c: New test.
* gcc.target/arm/mve/pr117408-2.c: Likewise.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit 8b04f60f88079c41b5cb1bf3b7c798703cceea18)

8 months agohppa: Don't use '%' operator in base14_operand
John David Anglin [Fri, 8 Nov 2024 21:54:48 +0000 (16:54 -0500)] 
hppa: Don't use '%' operator in base14_operand

Division is slow on hppa and mode sizes are powers of 2.  So, we
can use '&' operator to check displacement alignment.

2024-11-08  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

* config/pa/predicates.md (base14_operand): Use '&' operator
instead of '%' to check displacement alignment.

8 months agohppa: Fix handling of secondary reloads involving a SUBREG
John David Anglin [Fri, 8 Nov 2024 21:34:41 +0000 (16:34 -0500)] 
hppa: Fix handling of secondary reloads involving a SUBREG

This is fairly subtle.

When handling spills for SUBREG arguments in pa_emit_move_sequence,
alter_subreg may be called.  It in turn calls adjust_address_1 and
change_address_1.  change_address_1 calls pa_legitimate_address_p
to validate the new spill address.  change_address_1 generates an
internal compiler error if the address is not valid.  We need to
allow 14-bit displacements for all modes when reload_in_progress
is true and strict is false to prevent the internal compiler error.

SUBREGs are only used with the general registers, so the spill
should result in an integer access.  14-bit displacements are okay
for integer loads and stores but not for floating-point loads and
stores.

Potentially, the change could break the handling of spills for the
floating point-registers but I believe these are handled separately
in pa_emit_move_sequence.

This change fixes the build of symmetrica-3.0.1+ds.

2024-11-08  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

PR target/117443
* config/pa/pa.cc (pa_legitimate_address_p): Allow any
14-bit displacement when reload is in progress and strict
is false.

8 months agoAArch64: backport Neoverse and Cortex CPU definitions
Tamar Christina [Fri, 8 Nov 2024 18:12:32 +0000 (18:12 +0000)] 
AArch64: backport Neoverse and Cortex CPU definitions

This is a conservative backport of a few core definitions backporting only the
core definitions and mapping them to their closest cost model that exist on the
branches.

gcc/ChangeLog:

* config/aarch64/aarch64-cores.def (cortex-a725, cortex-x925,
neoverse-n3, neoverse-v3, neoverse-v3ae): New.
* config/aarch64/aarch64-tune.md: Regenerate
* doc/invoke.texi: Document them.

8 months agoaarch64: Fix gcc.target/aarch64/sme2/acle-asm/bfmlslb_f32.c
Richard Sandiford [Fri, 8 Nov 2024 14:07:47 +0000 (14:07 +0000)] 
aarch64: Fix gcc.target/aarch64/sme2/acle-asm/bfmlslb_f32.c

I missed a search-and-replace on this test, meaning that it was
duplicating bfmlalb_f32.c.

gcc/testsuite/
* gcc.target/aarch64/sme2/acle-asm/bfmlslb_f32.c: Replace bfmla*
with bfmls*

(cherry picked from commit 156f536d54b2f6f41de4719f9b3a8a33273a51a9)

8 months agoaarch64: Make PSEL dependent on SME rather than SME2
Richard Sandiford [Fri, 8 Nov 2024 14:07:47 +0000 (14:07 +0000)] 
aarch64: Make PSEL dependent on SME rather than SME2

The svpsel_lane intrinsics were wrongly classified as SME2+ only,
rather than as base SME intrinsics.  They should always be available
in streaming mode.

gcc/
* config/aarch64/aarch64-sve2.md (@aarch64_sve_psel<BHSD_BITS>)
(*aarch64_sve_psel<BHSD_BITS>_plus): Require TARGET_STREAMING
rather than TARGET_STREAMING_SME2.

gcc/testsuite/
* gcc.target/aarch64/sme2/acle-asm/psel_lane_b16.c: Move to...
* gcc.target/aarch64/sme/acle-asm/psel_lane_b16.c: ...here.
* gcc.target/aarch64/sme2/acle-asm/psel_lane_b32.c: Move to...
* gcc.target/aarch64/sme/acle-asm/psel_lane_b32.c: ...here.
* gcc.target/aarch64/sme2/acle-asm/psel_lane_b64.c: Move to...
* gcc.target/aarch64/sme/acle-asm/psel_lane_b64.c: ...here.
* gcc.target/aarch64/sme2/acle-asm/psel_lane_b8.c: Move to...
* gcc.target/aarch64/sme/acle-asm/psel_lane_b8.c: ...here.
* gcc.target/aarch64/sme2/acle-asm/psel_lane_c16.c: Move to...
* gcc.target/aarch64/sme/acle-asm/psel_lane_c16.c: ...here.
* gcc.target/aarch64/sme2/acle-asm/psel_lane_c32.c: Move to...
* gcc.target/aarch64/sme/acle-asm/psel_lane_c32.c: ...here.
* gcc.target/aarch64/sme2/acle-asm/psel_lane_c64.c: Move to...
* gcc.target/aarch64/sme/acle-asm/psel_lane_c64.c: ...here.
* gcc.target/aarch64/sme2/acle-asm/psel_lane_c8.c: Move to...
* gcc.target/aarch64/sme/acle-asm/psel_lane_c8.c: ...here.

(cherry picked from commit afd3887262edbdd5d7be5f34658432fd3046a168)

8 months agoaarch64: Restrict FCLAMP to SME2
Richard Sandiford [Fri, 8 Nov 2024 14:07:46 +0000 (14:07 +0000)] 
aarch64: Restrict FCLAMP to SME2

There are two sets of patterns for FCLAMP: one set for single registers
and one set for multiple registers.  The multiple-register set was
correctly gated on SME2, but the single-register set only required SME.
This doesn't matter for ACLE usage, since the intrinsic definitions
are correctly gated.  But it does matter for automatic generation of
FCLAMP from separate minimum and maximum operations (either ACLE
intrinsics or autovectorised code).

gcc/
* config/aarch64/aarch64-sve2.md (@aarch64_sve_fclamp<mode>)
(*aarch64_sve_fclamp<mode>_x): Require TARGET_STREAMING_SME2
rather than TARGET_STREAMING_SME.

gcc/testsuite/
* gcc.target/aarch64/sme/clamp_3.c: Force sme2
* gcc.target/aarch64/sme/clamp_4.c: Likewise.
* gcc.target/aarch64/sme/clamp_5.c: New test.

(cherry picked from commit f5962839d6e0c3115931e68d938d9a0cd7a383b1)

8 months agoaarch64: Fix folding of degenerate svwhilele case [PR117045]
Richard Sandiford [Fri, 8 Nov 2024 14:07:46 +0000 (14:07 +0000)] 
aarch64: Fix folding of degenerate svwhilele case [PR117045]

The svwhilele folder mishandled the degenerate case in which
the second argument is the maximum integer.  In that case,
the result is all-true regardless of the first parameter:

  If the second scalar operand is equal to the maximum signed integer
  value then a condition which includes an equality test can never fail
  and the result will be an all-true predicate.

This is because the conceptual "increment the first operand
by 1 after each element" is done modulo the range of the operand.
The GCC code was instead treating it as infinite precision.
whilele_5.c even had a test for the incorrect behaviour.

The easiest fix seemed to be to handle that case specially before
doing constant folding.  This also copes with variable first operands.

gcc/
PR target/116999
PR target/117045
* config/aarch64/aarch64-sve-builtins-base.cc
(svwhilelx_impl::fold): Check for WHILELTs of the minimum value
and WHILELEs of the maximum value.  Fold them to all-false and
all-true respectively.

gcc/testsuite/
PR target/116999
PR target/117045
* gcc.target/aarch64/sve/acle/general/whilele_5.c: Fix bogus
expected result.
* gcc.target/aarch64/sve/acle/general/whilele_11.c: New test.
* gcc.target/aarch64/sve/acle/general/whilele_12.c: Likewise.

(cherry picked from commit 50e7c51b0a0e9dc1d93f829016ae743b4f2e5070)

8 months agoaarch64: Fix SVE ACLE gimple folds for C++ LTO [PR116629]
Richard Sandiford [Fri, 8 Nov 2024 14:07:45 +0000 (14:07 +0000)] 
aarch64: Fix SVE ACLE gimple folds for C++ LTO [PR116629]

The SVE ACLE code has two ways of handling overloaded functions.
One, used by C, is to define a single dummy function for each unique
overloaded name, with resolve_overloaded_builtin then resolving calls
to real non-overloaded functions.  The other, used by C++, is to
define a separate function for each individual overload.

The builtins harness assigns integer function codes programmatically.
However, LTO requires it to use the same assignment for every
translation unit, regardless of language.  This means that C++ TUs
need to create (unused) slots for the C overloads and that C TUs
need to create (unused) slots for the C++ overloads.

In many ways, it doesn't matter whether the LTO frontend itself
uses the C approach or the C++ approach to defining overloaded
functions, since the LTO frontend never has to resolve source-level
overloading.  However, the C++ approach of defining a separate
function for each overload means that C++ calls never need to
be redirected to a different function.  Calls to an overload
can appear in the LTO dump and survive until expand.  In contrast,
calls to C's dummy overload functions are resolved by the front
end and never survive to LTO (or expand).

Some optimisations work by moving between sibling functions, such as _m
to _x.  If the source function is an overload, the expected destination
function is too.  The LTO frontend needs to define C++ overloads if it
wants to do this optimisation properly for C++.

The PR is about a tree checking failure caused by trying to use a
stubbed-out C++ overload in LTO.  Dealing with that by detecting the
stub (rather than changing which overloads are defined) would have
turned this from an ice-on-valid to a missed optimisation.

In future, it would probably make sense to redirect overloads to
non-overloaded functions during gimple folding, in case that exposes
more CSE opportunities.  But it'd probably be of limited benefit, since
it should be rare for code to mix overloaded and non-overloaded uses of
the same operation.  It also wouldn't be suitable for backports.

gcc/
PR target/116629
* config/aarch64/aarch64-sve-builtins.cc
(function_builder::function_builder): Use direct overloads for LTO.

gcc/testsuite/
PR target/116629
* gcc.target/aarch64/sve/acle/general/pr106326_2.c: New test.

(cherry picked from commit fee3adbac055c3ff2649fed866c66d44ebfcbe90)

8 months agoaarch64: Rename svpext to svpext_lane [PR116371]
Richard Sandiford [Fri, 8 Nov 2024 14:07:45 +0000 (14:07 +0000)] 
aarch64: Rename svpext to svpext_lane [PR116371]

When implementing the SME2 ACLE, I somehow missed off the _lane
suffix on svpext.

gcc/
PR target/116371
* config/aarch64/aarch64-sve-builtins-sve2.h (svpext): Rename to...
(svpext_lane): ...this.
* config/aarch64/aarch64-sve-builtins-sve2.cc (svpext_impl): Rename
to...
(svpext_lane_impl): ...this and update instantiation accordingly.
* config/aarch64/aarch64-sve-builtins-sve2.def (svpext): Rename to...
(svpext_lane): ...this.

gcc/testsuite/
PR target/116371
* gcc.target/aarch64/sme2/acle-asm/pext_c16.c,
gcc.target/aarch64/sme2/acle-asm/pext_c16_x2.c,
gcc.target/aarch64/sme2/acle-asm/pext_c32.c,
gcc.target/aarch64/sme2/acle-asm/pext_c32_x2.c,
gcc.target/aarch64/sme2/acle-asm/pext_c64.c,
gcc.target/aarch64/sme2/acle-asm/pext_c64_x2.c,
gcc.target/aarch64/sme2/acle-asm/pext_c8.c,
gcc.target/aarch64/sme2/acle-asm/pext_c8_x2.c: Replace with...
* gcc.target/aarch64/sme2/acle-asm/pext_lane_c16.c,
gcc.target/aarch64/sme2/acle-asm/pext_lane_c16_x2.c,
gcc.target/aarch64/sme2/acle-asm/pext_lane_c32.c,
gcc.target/aarch64/sme2/acle-asm/pext_lane_c32_x2.c,
gcc.target/aarch64/sme2/acle-asm/pext_lane_c64.c,
gcc.target/aarch64/sme2/acle-asm/pext_lane_c64_x2.c,
gcc.target/aarch64/sme2/acle-asm/pext_lane_c8.c,
gcc.target/aarch64/sme2/acle-asm/pext_lane_c8_x2.c: ...these new tests,
testing for svpext_lane instead of svpext.

(cherry picked from commit cc2d29e5f4434a3fd4e0dd93ea4f9857a0309201)

9 months agotestsuite: arm: Use check-function-bodies in epilog-1.c test
Torbjörn SVENSSON [Thu, 7 Nov 2024 19:09:48 +0000 (20:09 +0100)] 
testsuite: arm: Use check-function-bodies in epilog-1.c test

Update test case for armv8.1-m.main that supports conditional
arithmetic.

armv7-m:
        push    {r4, lr}
        ldr     r4, .L6
        ldr     r4, [r4]
        lsls    r4, r4, #29
        it      mi
        addmi   r2, r2, #1
        bl      bar
        movs    r0, #0
        pop     {r4, pc}

armv8.1-m.main:
        push    {r3, r4, r5, lr}
        ldr     r4, .L5
        ldr     r5, [r4]
        tst     r5, #4
        csinc   r2, r2, r2, eq
        bl      bar
        movs    r0, #0
        pop     {r3, r4, r5, pc}

gcc/testsuite/ChangeLog:

* gcc.target/arm/epilog-1.c: Use check-function-bodies.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit ec86e87439b4a5cf73da6f318757f3561f9f278a)

9 months agotestsuite: arm: Use effective-target arm_libc_fp_abi for pr68620.c test
Torbjörn SVENSSON [Wed, 6 Nov 2024 06:12:14 +0000 (07:12 +0100)] 
testsuite: arm: Use effective-target arm_libc_fp_abi for pr68620.c test

This fixes reported regression at
https://linaro.atlassian.net/browse/GNU-1407.

gcc/testsuite/ChangeLog:

* gcc.target/arm/pr68620.c: Use effective-target
arm_libc_fp_abi.
* lib/target-supports.exp: Define effective-target
arm_libc_fp_abi.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
Co-authored-by: Richard Earnshaw <rearnsha@arm.com>
(cherry picked from commit dc5d559494656c17c4faa99f398047b7d0c33adc)

9 months agotestsuite: arm: Allow vst1.32 instruction in pr40457-2.c
Torbjörn SVENSSON [Thu, 7 Nov 2024 17:05:19 +0000 (18:05 +0100)] 
testsuite: arm: Allow vst1.32 instruction in pr40457-2.c

When building the test case with neon, the 'vst1.32' instruction is used
instead of 'strd'. Allow both variants to make the test pass.

gcc/testsuite/ChangeLog:

* gcc.target/arm/pr40457-2.c: Add vst1.32 as an allowed
instruction.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit 636b8aeacd182351313381636ecbf8dcef1ee45a)

9 months agotestsuite: arm: Use effective-target for pr84556.cc test
Torbjörn SVENSSON [Wed, 6 Nov 2024 09:28:34 +0000 (10:28 +0100)] 
testsuite: arm: Use effective-target for pr84556.cc test

Using "dg-do run" with a selector overrides the default selector set by
vect.exp that picks between "dg-do run" and "dg-do compile" based on the
target's support for simd operations for Arm targets.
The actual selection of default operation is performed in
check_vect_support_and_set_flags.

gcc/testsuite/ChangeLog:

* g++.dg/vect/pr84556.cc: Change from "dg-do run" with selector
to instead use dg-require-effective-target with the same
selector.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit 85c3d944800257248ab48cdc75c2c02fadf63c73)

9 months agotestsuite: arm: Use effective-target for nomve_fp_1 test
Torbjörn SVENSSON [Thu, 31 Oct 2024 18:11:57 +0000 (19:11 +0100)] 
testsuite: arm: Use effective-target for nomve_fp_1 test

Test uses MVE, so add effective-target arm_fp requirement.

gcc/testsuite/ChangeLog:

* g++.target/arm/mve/general-c++/nomve_fp_1.c: Use
effective-target arm_fp.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit e8886406fac50f80a521a4100a80517e50e1c388)

9 months agoaarch64: Add support for FUJITSU-MONAKA (-mcpu=fujitsu-monaka) CPU
Yuta Mukai [Thu, 7 Nov 2024 22:09:39 +0000 (22:09 +0000)] 
aarch64: Add support for FUJITSU-MONAKA (-mcpu=fujitsu-monaka) CPU

This patch adds initial support for FUJITSU-MONAKA CPU.
The cost model will be corrected in the future.

2024-11-07  Yuta Mukai  <mukai.yuta@fujitsu.com>

gcc/ChangeLog:

* config/aarch64/aarch64-cores.def (AARCH64_CORE): Add fujitsu-monaka.
* config/aarch64/aarch64-tune.md: Regenerate.
* config/aarch64/aarch64.cc: Include fujitsu-monaka tuning model.
* doc/invoke.texi: Document -mcpu=fujitsu-monaka.
* config/aarch64/tuning_models/fujitsu_monaka.h: New file.

9 months agoi386: Modify regexp of pr117304-1.c
Hu, Lin1 [Thu, 7 Nov 2024 02:13:15 +0000 (10:13 +0800)] 
i386: Modify regexp of pr117304-1.c

Since the test doesn't care if the hint is correct,
modify the regexp of the hint part to avoid future
changes to the hint that would cause the test to fail.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr117304-1.c: Modify regexp.

(cherry picked from commit 4473cf8409f4db19ad91bd784e32dc54eccf02a3)

9 months agoi386: Add OPTION_MASK_ISA2_EVEX512 for some AVX512 instructions.
Hu, Lin1 [Tue, 5 Nov 2024 07:49:57 +0000 (15:49 +0800)] 
i386: Add OPTION_MASK_ISA2_EVEX512 for some AVX512 instructions.

gcc/ChangeLog:

PR target/117304
* config/i386/i386-builtin.def: Add OPTION_MASK_ISA2_EVEX512 for some
AVX512 512-bits instructions.

gcc/testsuite/ChangeLog:

PR target/117304
* gcc.target/i386/pr117304-1.c: New test.

(cherry picked from commit 8ac694ae67e24a798dce368587bed4c40b90fbc0)

9 months agoDaily bump.
GCC Administrator [Thu, 7 Nov 2024 00:24:55 +0000 (00:24 +0000)] 
Daily bump.

9 months agoAArch64: rename the SVE2 psel intrinsics to psel_lane [PR116371]
Tamar Christina [Mon, 14 Oct 2024 12:58:09 +0000 (13:58 +0100)] 
AArch64: rename the SVE2 psel intrinsics to psel_lane [PR116371]

The psel intrinsics. similar to the pext, should be name psel_lane.  This
corrects the naming.

gcc/ChangeLog:

PR target/116371
* config/aarch64/aarch64-sve-builtins-sve2.cc (class svpsel_impl):
Renamed to ...
(class svpsel_lane_impl): ... This and adjust initialization.
* config/aarch64/aarch64-sve-builtins-sve2.def (svpsel): Renamed to ...
(svpsel_lane): ... This.
* config/aarch64/aarch64-sve-builtins-sve2.h (svpsel): Renamed to
svpsel_lane.

gcc/testsuite/ChangeLog:

PR target/116371
* gcc.target/aarch64/sme2/acle-asm/psel_b16.c,
gcc.target/aarch64/sme2/acle-asm/psel_b32.c,
gcc.target/aarch64/sme2/acle-asm/psel_b64.c,
gcc.target/aarch64/sme2/acle-asm/psel_b8.c,
gcc.target/aarch64/sme2/acle-asm/psel_c16.c,
gcc.target/aarch64/sme2/acle-asm/psel_c32.c,
gcc.target/aarch64/sme2/acle-asm/psel_c64.c,
gcc.target/aarch64/sme2/acle-asm/psel_c8.c: Renamed to....
* gcc.target/aarch64/sme2/acle-asm/psel_lane_b16.c,
gcc.target/aarch64/sme2/acle-asm/psel_lane_b32.c,
gcc.target/aarch64/sme2/acle-asm/psel_lane_b64.c,
gcc.target/aarch64/sme2/acle-asm/psel_lane_b8.c,
gcc.target/aarch64/sme2/acle-asm/psel_lane_c16.c,
gcc.target/aarch64/sme2/acle-asm/psel_lane_c32.c,
gcc.target/aarch64/sme2/acle-asm/psel_lane_c64.c,
gcc.target/aarch64/sme2/acle-asm/psel_lane_c8.c: ... These.

(cherry picked from commit 306834b7f74ab61160f205e04f5bf35b71f9ec52)

9 months agoc++: Defer -fstrong-eval-order processing to template instantiation time [PR117158]
Simon Martin [Wed, 6 Nov 2024 05:54:57 +0000 (06:54 +0100)] 
c++: Defer -fstrong-eval-order processing to template instantiation time [PR117158]

Since r10-3793-g1a37b6d9a7e57c, we ICE upon the following valid code
with -std=c++17 and above

=== cut here ===
struct Base {
  unsigned int *intarray;
};
template <typename T> struct Sub : public Base {
  bool Get(int i) {
    return (Base::intarray[++i] == 0);
  }
};
=== cut here ===

The problem is that from c++17 on, we use -fstrong-eval-order and need
to wrap the array access expression into a SAVE_EXPR. We do so at
template declaration time, and end up calling contains_placeholder_p
with a SCOPE_REF, that it does not handle well.

This patch fixes this by deferring the wrapping into SAVE_EXPR to
instantiation time for templates, when the SCOPE_REF will have been
turned into a COMPONENT_REF.

PR c++/117158

gcc/cp/ChangeLog:

* typeck.cc (cp_build_array_ref): Only wrap array expression
into a SAVE_EXPR at template instantiation time.

gcc/testsuite/ChangeLog:

* g++.dg/cpp1z/eval-order13.C: New test.
* g++.dg/parse/crash77.C: New test.

(cherry picked from commit b1d92aeb8583c8d1491c97703680c5fb88ed1fe4)

9 months agoDaily bump.
GCC Administrator [Wed, 6 Nov 2024 00:24:00 +0000 (00:24 +0000)] 
Daily bump.

9 months agoc++: reference variable as default targ [PR101463]
Patrick Palka [Tue, 5 Nov 2024 20:18:26 +0000 (15:18 -0500)] 
c++: reference variable as default targ [PR101463]

Here during default template argument substitution we wrongly consider
the (substituted) default arguments v and vt<int> as value-dependent
which ultimately leads to deduction failure for the calls.

The bogus value_dependent_expression_p result aside, I noticed
type_unification_real during default targ substitution keeps track of
whether all previous targs are known and non-dependent, as is the case
for these calls.  And in such cases it should be safe to avoid checking
dependence of the substituted default targ and just assume it's not.
This patch implements this optimization for GCC 14, which lets us accept
both testcases by sidestepping the value_dependent_expression_p issue
altogether.  (Note that for GCC 15 we fixed this differently, see
r15-3038-g5348e3cb9bc99d.)

PR c++/101463

gcc/cp/ChangeLog:

* pt.cc (type_unification_real): Avoid checking dependence of
a substituted default template argument if we can assume it's
non-dependent.

gcc/testsuite/ChangeLog:

* g++.dg/cpp1z/nontype6.C: New test.
* g++.dg/cpp1z/nontype6a.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
9 months agotestsuite: arm: Use effective-target for pr68620 and pr78041 tests
Torbjörn SVENSSON [Thu, 31 Oct 2024 18:00:36 +0000 (19:00 +0100)] 
testsuite: arm: Use effective-target for pr68620 and pr78041 tests

gcc/testsuite/ChangeLog:

* gcc.target/arm/pr68620.c: Use effective-target arm_neon.
* gcc.target/arm/pr78041.c: Use effective-target arm_arch_v7a.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit c7518891483e2aa558390ffeab4a19ba747814d6)

9 months agotestsuite: arm: Use effective-target for pr98636.c test
Torbjörn SVENSSON [Fri, 1 Nov 2024 10:11:26 +0000 (11:11 +0100)] 
testsuite: arm: Use effective-target for pr98636.c test

The test case assumes that -mfp16-format=alternative is accepted for the
target, but not all targets support this flag. One such target is
Cortex-M85 that does support FP16, but not the alternative format.

gcc/testsuite/ChangeLog:

* gcc.target/arm/pr98636.c: Use effective-target
arm_fp16_alternative.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit 4602f628f723688a10c14ab20bd013ba7a825dab)

9 months agoc++: allow array mem-init with -fpermissive [PR116634]
Jason Merrill [Mon, 4 Nov 2024 22:48:46 +0000 (17:48 -0500)] 
c++: allow array mem-init with -fpermissive [PR116634]

We've accidentally accepted this forever (at least as far back as 4.7), but
it's always been ill-formed; this was PR59465.  And we didn't accept it for
scalar types.  But rather than switch to a hard error for this code, let's
give a permerror so affected code can continue to work with -fpermissive.

PR c++/116634

gcc/cp/ChangeLog:

* init.cc (can_init_array_with_p): Allow PR59465 case with
permerror.

gcc/testsuite/ChangeLog:

* g++.dg/diagnostic/aggr-init1.C: Expect warning with -fpermissive.
* g++.dg/init/array62.C: Adjust diagnostic.
* g++.dg/init/array63.C: Adjust diagnostic.
* g++.dg/init/array64.C: Adjust diagnostic.

(cherry picked from commit 3545aab00152ed3db1d7ce6ca4e1671dde276980)

9 months agoFortran: Fix regressions with intent(out) class[PR115070, PR115348].
Paul Thomas [Tue, 5 Nov 2024 15:54:45 +0000 (15:54 +0000)] 
Fortran: Fix regressions with intent(out) class[PR115070, PR115348].

2024-11-05  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/115070
PR fortran/115348
* trans-expr.cc (gfc_trans_class_init_assign): If all the
components of the default initializer are null for a scalar,
build an empty statement to prevent prior declarations from
disappearing.

gcc/testsuite/
PR fortran/115070
* gfortran.dg/ieee/pr115070.f90: New test.

PR fortran/115348
* gfortran.dg/pr115348.f90: New test.

9 months agoDaily bump.
GCC Administrator [Tue, 5 Nov 2024 00:24:42 +0000 (00:24 +0000)] 
Daily bump.

9 months agoDon't call invert on VARYING.
Andrew MacLeod [Sat, 2 Nov 2024 14:26:24 +0000 (10:26 -0400)] 
Don't call invert on VARYING.

When all cases go to one label and resul in a VARYING value, we can't
invert that value to remove all values from the default case. Simply
check for this case and set the default to UNDEFINED.

PR tree-optimization/117398
gcc/
* gimple-range-edge.cc (gimple_outgoing_range::calc_switch_ranges):
Check for VARYING and don't call invert () on it.

gcc/testsuite/
* gcc.dg/pr117398.c: New.

9 months agotestsuite: arm: Use effective-target for memset-inline* tests
Torbjörn SVENSSON [Thu, 24 Oct 2024 08:40:27 +0000 (10:40 +0200)] 
testsuite: arm: Use effective-target for memset-inline* tests

As these tests are set to execute and require neon hardware to do so,
add the missing dg-require-effective-target arm_neon_hw.

gcc/testsuite/ChangeLog:

* gcc.target/arm/memset-inline-4.c: Use effective-target
arm_neon_hw.
* gcc.target/arm/memset-inline-5.c: Likewise.
* gcc.target/arm/memset-inline-6.c: Likewise.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
9 months agotestsuite: arm: Force hard ABI for pr51534.c test
Torbjörn SVENSSON [Thu, 31 Oct 2024 17:54:30 +0000 (18:54 +0100)] 
testsuite: arm: Force hard ABI for pr51534.c test

The test case is written in a way that it should be using hard float
ABI, but the use of -mfloat-abi=hard could be overriden by
dg-add-options arm_neon. Ensure that -mfloat-abi=hard is always after.

gcc/testsuite/ChangeLog:

* gcc.target/arm/pr51534.c: Ensure -mfloat-abi=hard is used.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit e995866cff2866512cd3af24b6ca27a5782aca1f)

9 months agotestsuite: arm: Use effective-target for data-intrinsics-assembly test
Torbjörn SVENSSON [Sat, 19 Oct 2024 17:55:51 +0000 (19:55 +0200)] 
testsuite: arm: Use effective-target for data-intrinsics-assembly test

The expected assembler in the test case assumes -marm, so explicily
require it.

gcc/testsuite/ChangeLog:

* gcc.target/arm/acle/data-intrinsics-assembly.c: Use
effective-target arm_arch_v6_arm.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit 7b2e6e6be6fdb3cbb2e21e190a981731b322bf4f)

9 months agotestsuite: arm: Relax cbranch tests to accept inverted branches
Torbjörn SVENSSON [Sat, 19 Oct 2024 15:54:59 +0000 (17:54 +0200)] 
testsuite: arm: Relax cbranch tests to accept inverted branches

Similar to PR113502, but for non-aarch64 test.
The test started to fail after r14-7243-gafac1bd3365.

gcc/testsuite/ChangeLog:

* gcc.target/arm/vect-early-break-cbranch.c: Ignore exact
branch.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit d56d2f3102ada3d68eaa318de4b6d1a17d9cd74d)

9 months agoada: Fix crash on default value with nested iterated component associations
Eric Botcazou [Wed, 16 Oct 2024 07:05:55 +0000 (09:05 +0200)] 
ada: Fix crash on default value with nested iterated component associations

The problem is that the freeze node for the type of the element ends up in
the component list of the record type declared with the default value.

gcc/ada/ChangeLog:

PR ada/113036
* freeze.adb (Freeze_Expression): Deal with freezing actions coming
from within nested internal loops present in spec expressions.

9 months agoada: Fix crash on real literal in declare expression of expression function
Eric Botcazou [Mon, 20 May 2024 12:33:14 +0000 (14:33 +0200)] 
ada: Fix crash on real literal in declare expression of expression function

The problem is that the freeze node of the type to which the real literal
is resolved is placed inside the expression function instead of outside.

gcc/ada/

* freeze.adb (Freeze_Expression): Also attach pending freeze nodes
to the parent in the case of an internal block in a spec expression.

9 months agoUpdate bitwise_or op_range.
Andrew MacLeod [Thu, 31 Oct 2024 18:07:00 +0000 (14:07 -0400)] 
Update bitwise_or op_range.

If the LHS of a bitwise OR is positive, then so are both operands when
using op1_range or op2_range.

gcc/
* range-op.cc (operator_bitwise_or::op1_range): If LHS is signed
positive, so are both operands.

gcc/testsuite
* g++.dg/cpp23/attr-assume-opt.C (f2b): Alternate flow test.

9 months agoReimplement 'assume' processing pass.
Andrew MacLeod [Fri, 1 Nov 2024 16:46:39 +0000 (12:46 -0400)] 
Reimplement 'assume' processing pass.

Rework the assume pass to work properly and fail conservatively when it
does.  Also move it to its own file.

PR tree-optimization/117287
gcc/
* Makefile.in (IBJS): Add tree-assume.o
* gimple-range.cc (assume_query::assume_range_p): Remove.
(assume_query::range_of_expr): Remove.
(assume_query::assume_query): Move to tree-assume.cc.
(assume_query::~assume_query): Remove.
(assume_query::calculate_op): Move to tree-assume.cc.
(assume_query::calculate_phi): Likewise.
(assume_query::check_taken_edge): Remove.
(assume_query::calculate_stmt): Move to tree-assume.cc.
(assume_query::dump): Remove.
* gimple-range.h (class assume_query): Move to tree-assume.cc
* tree-assume.cc: New
* tree-vrp.cc (struct pass_data_assumptions): Move to tree-assume.cc.
(class pass_assumptions): Likewise.
(make_pass_assumptions): Likewise.

gcc/testsuite/
* g++.dg/cpp23/pr117287-attr.C: New.

9 months agoMake fur_edge accessible.
Andrew MacLeod [Fri, 1 Nov 2024 14:56:54 +0000 (10:56 -0400)] 
Make fur_edge accessible.

Move the decl of fur_edge out of the source file into the header file.

* gimple-range-fold.cc (class fur_edge): Relocate from here.
(fur_edge::fur_edge): Also move to:
* gimple-range-fold.h (class fur_edge): Relocate to here.
(fur_edge::fur_edge): Likewise.

9 months agolibstdc++: Fix up 117406.cc test [PR117406]
Jakub Jelinek [Mon, 4 Nov 2024 11:29:01 +0000 (12:29 +0100)] 
libstdc++: Fix up 117406.cc test [PR117406]

Christophe mentioned in bugzilla that the test FAILs on aarch64,
I'm not including <climits> and use INT_MAX.
Apparently during my testing I got it because the test preinclude
-include bits/stdc++.h
and that includes <climits>, dunno why that didn't happen on aarch64.
In any case, either I can add #include <climits>, or because the
test already has #include <limits> I've changed uses of INT_MAX
with std::numeric_limits<int>::max(), that should be the same thing.
But if you prefer
 #include <climits>
I can surely add that instead.

2024-11-04  Jakub Jelinek  <jakub@redhat.com>

PR libstdc++/117406
* testsuite/26_numerics/headers/cmath/117406.cc: Use
std::numeric_limits<int>::max() instead of INT_MAX.

(cherry picked from commit afcbf4dd27c147eb7d8f84e1a41c021eddec777e)

9 months agolibstdc++: Fix up std::{,b}float16_t std::{ilogb,l{,l}r{ound,int}} [PR117406]
Jakub Jelinek [Sat, 2 Nov 2024 17:48:54 +0000 (18:48 +0100)] 
libstdc++: Fix up std::{,b}float16_t std::{ilogb,l{,l}r{ound,int}} [PR117406]

These overloads incorrectly cast the result of the float __builtin_*
to _Float or __gnu_cxx::__bfloat16_t.  For std::ilogb that changes
behavior for the INT_MAX return because that isn't representable in
either of the floating point formats, for the others it is I think
just a very inefficient hop from int/long/long long to std::{,b}float16_t
and back.  I mean for the round/rint cases, either the argument is small
and then the return value should be representable in the floating point
format too, or it is too large that the argument is already integral
and then it should just return the argument with the round trips.
Too large value is unspecified unlike ilogb.

2024-11-02  Jakub Jelinek  <jakub@redhat.com>

PR libstdc++/117406
* include/c_global/cmath (std::ilogb(_Float16), std::llrint(_Float16),
std::llround(_Float16), std::lrint(_Float16), std::lround(_Float16)):
Don't cast __builtin_* return to _Float16.
(std::ilogb(__gnu_cxx::__bfloat16_t),
std::llrint(__gnu_cxx::__bfloat16_t),
std::llround(__gnu_cxx::__bfloat16_t),
std::lrint(__gnu_cxx::__bfloat16_t),
std::lround(__gnu_cxx::__bfloat16_t)): Don't cast __builtin_* return to
__gnu_cxx::__bfloat16_t.
* testsuite/26_numerics/headers/cmath/117406.cc: New test.

(cherry picked from commit 36a9e2b22596711455e702ea5a5a3f26e145321c)

9 months agoexpand: Fix up expansion of VIEW_CONVERT_EXPR to BITINT_TYPE [PR117354]
Jakub Jelinek [Thu, 31 Oct 2024 09:52:56 +0000 (10:52 +0100)] 
expand: Fix up expansion of VIEW_CONVERT_EXPR to BITINT_TYPE [PR117354]

The following testcase ICEs, because when trying to expand the
VIEW_CONVERT_EXPR operand which is SSA_NAME defined to
V32QI or V4DI MEM_REF which is aligned just to 8 bytes we force
it as unaligned into a register, but then try to call extract_bit_field
from the V32QI or V4DI register to BLKmode.  extract_bit_field doesn't
obviously support BLKmode extraction and so ICEs.

The second hunk fixes the ICE by not calling extract_bit_field when
it can't handle it, the last if will handle it properly by storing
it to memory and using BLKmode access to the copy.

The first hunk is an optimization, if mode is BLKmode, by setting
inner_reference_p argument to expand_expr_real we avoid the
expand_misaligned_mem_ref calls which load it from memory into a register.

2024-10-31  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/117354
* expr.cc (expand_expr_real_1) <case VIEW_CONVERT_EXPR>: Pass
true as inner_reference_p argument to expand_expr_real if
mode is BLKmode.  Don't call extract_bit_field if mode is BLKmode.

* gcc.dg/bitint-113.c: New test.

(cherry picked from commit b39f62ff739e9ffea0e6485667f15b985f8cd63d)

9 months agofunction: Call do_pending_stack_adjust in assign_parms [PR117296]
Jakub Jelinek [Wed, 30 Oct 2024 08:59:22 +0000 (09:59 +0100)] 
function: Call do_pending_stack_adjust in assign_parms [PR117296]

Functions called by assign_parms call emit_block_move in two places,
so on some targets can be expanded as calls and can result in pending
stack adjustment.

Now, during expansion we normally call do_pending_stack_adjust at the end
of expansion of each basic block or before emitting code that will branch
and/or has labels, and when emitting labels we assert that there are no
pending stack adjustments.

assign_parms is expanded before the first basic block and if the first
basic block starts with a label and at least one of those emit_block_move
calls resulted in the need of pending stack adjustments, we ICE when
emitting that label.

The following patch fixes that by calling do_pending_stack_adjust after
after the assign_parms potential emit_block_move calls.

2024-10-30  Jakub Jelinek  <jakub@redhat.com>

PR target/117296
* function.cc (assign_parms): Call do_pending_stack_adjust.

* gcc.target/i386/pr117296.c: New test.

(cherry picked from commit fccef0c4ed0119ac53940bdb3838052339cf14a2)

9 months agolibstdc++: Use if consteval rather than if (std::__is_constant_evaluated()) for ...
Jakub Jelinek [Tue, 29 Oct 2024 10:14:12 +0000 (11:14 +0100)] 
libstdc++: Use if consteval rather than if (std::__is_constant_evaluated()) for {,b}float16_t nextafter [PR117321]

The nextafter_c++23.cc testcase fails to link at -O0.
The problem is that eventhough std::__is_constant_evaluated() has
always_inline attribute, that at -O0 just means that we inline the
call, but its result is still assigned to a temporary which is tested
later, nothing at -O0 propagates that false into the if and optimizes
away the if body.  And the __builtin_nextafterf16{,b} calls are meant
to be used solely for constant evaluation, the C libraries don't
define nextafterf16 these days.

As __STDCPP_FLOAT16_T__ and __STDCPP_BFLOAT16_T__ are predefined right
now only by GCC, not by clang which doesn't implement the extended floating
point types paper, and as they are predefined in C++23 and later modes only,
I think we can just use if consteval which is folded already during the FE
and the body isn't included even at -O0.  I've added a feature test for
that just in case clang implements those and implements those in some weird
way.  Note, if (__builtin_is_constant_evaluted()) would work correctly too,
that is also folded to false at gimplification time and the corresponding
if block not emitted at all.  But for -O0 it can't be wrapped into a helper
inline function.

2024-10-29  Jakub Jelinek  <jakub@redhat.com>

PR libstdc++/117321
* include/c_global/cmath (nextafter(_Float16, _Float16)): Use
if consteval rather than if (std::__is_constant_evaluated()) around
the __builtin_nextafterf16 call.
(nextafter(__gnu_cxx::__bfloat16_t, __gnu_cxx::__bfloat16_t)): Use
if consteval rather than if (std::__is_constant_evaluated()) around
the __builtin_nextafterf16b call.
* testsuite/26_numerics/headers/cmath/117321.cc: New test.

(cherry picked from commit 5e247ac0c28b9a2662f99c4a5420c5f7c2d0c6bd)

9 months agoAdd regression test
Eric Botcazou [Mon, 4 Nov 2024 10:15:15 +0000 (11:15 +0100)] 
Add regression test

This is for the latest fix made to Selected_Length_Checks in Checks.

gcc/testsuite
* gnat.dg/specs/array7.ads: New test.

9 months agoada: Fix internal error on concatenation of discriminant-dependent component
Eric Botcazou [Fri, 16 Aug 2024 14:03:30 +0000 (16:03 +0200)] 
ada: Fix internal error on concatenation of discriminant-dependent component

This only occurs with optimization enabled, but the expanded code is always
wrong because it reuses the formal parameter of an initialization procedure
associated with a discriminant (a discriminal in GNAT parlance) outside of
the initialization procedure.

gcc/ada/

* checks.adb (Selected_Length_Checks.Get_E_Length): For a
component of a record with discriminants and if the expression is
a selected component, try to build an actual subtype from its
prefix instead of from the discriminal.

9 months agoDaily bump.
GCC Administrator [Mon, 4 Nov 2024 00:22:56 +0000 (00:22 +0000)] 
Daily bump.

9 months agoDaily bump.
GCC Administrator [Sun, 3 Nov 2024 00:22:12 +0000 (00:22 +0000)] 
Daily bump.

9 months agoDaily bump.
GCC Administrator [Sat, 2 Nov 2024 00:25:44 +0000 (00:25 +0000)] 
Daily bump.

9 months agoi386: Do not allow pointer conversion for CMPccXADD intrin under -O0
Haochen Jiang [Fri, 1 Nov 2024 07:59:47 +0000 (15:59 +0800)] 
i386: Do not allow pointer conversion for CMPccXADD intrin under -O0

The pointer conversion to wider type under macro would not consider
whether the higher bit is cleaned or not. It will lead to unexpected
cmp result.

After this change, it will throw an incompatible pointer type error just
like -O2 does currently.

gcc/ChangeLog:

* config/i386/cmpccxaddintrin.h (_cmpccxadd_epi32): Do not do
type conversion for pointer.
(_cmpccxadd_epi64): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/cmpccxadd-1b.c: New test.

9 months agoFortran: Fix ICE with structure constructor in data statement [PR79685]
Paul Thomas [Fri, 25 Oct 2024 16:59:03 +0000 (17:59 +0100)] 
Fortran: Fix ICE with structure constructor in data statement [PR79685]

2024-10-25  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/79685
* decl.cc (match_data_constant): Find the symtree instead of
the symbol so the use renamed symbols are found. Pass this and
the derived type to gfc_match_structure_constructor.
* match.h: Update prototype of gfc_match_structure_contructor.
* primary.cc (gfc_match_structure_constructor): Remove call to
gfc_get_ha_sym_tree and use caller supplied symtree instead.

gcc/testsuite/
PR fortran/79685
* gfortran.dg/use_rename_13.f90: New test.

(cherry picked from commit 6cb1da72cac166bd3b005c0430557b68b9761da5)

9 months ago[APX PPX] Avoid generating unmatched pushp/popp in pro/epilogue
Hongyu Wang [Wed, 7 Feb 2024 06:42:58 +0000 (14:42 +0800)] 
[APX PPX] Avoid generating unmatched pushp/popp in pro/epilogue

According to APX spec, the pushp/popp pairs should be matched,
otherwise the PPX hint cannot take effect and cause performance loss.

In the ix86_expand_epilogue, there are several optimizations that may
cause the epilogue using mov to restore the regs. Check if PPX applied
and prevent usage of mov/leave in the epilogue. Also do not use PPX
for eh_return.

gcc/ChangeLog:

* config/i386/i386.cc (ix86_expand_prologue): Set apx_ppx_used
flag in m.fs with TARGET_APX_PPX && !crtl->calls_eh_return.
(ix86_emit_save_regs): Emit ppx is available only when
TARGET_APX_PPX && !crtl->calls_eh_return.
(ix86_expand_epilogue): Don't restore reg using mov when
apx_ppx_used flag is true.
* config/i386/i386.h (struct machine_frame_state):
Add apx_ppx_used flag.

gcc/testsuite/ChangeLog:

* gcc.target/i386/apx-ppx-2.c: New test.
* gcc.target/i386/apx-ppx-3.c: Likewise.

(cherry picked from commit 8e72b1bb3896f6e8d4f4679cbcfbc2a8212d04f9)

9 months agoDaily bump.
GCC Administrator [Fri, 1 Nov 2024 00:24:47 +0000 (00:24 +0000)] 
Daily bump.

9 months agors6000: ROP - Do not disable shrink-wrapping for leaf functions [PR114759]
Peter Bergner [Tue, 18 Jun 2024 22:42:45 +0000 (17:42 -0500)] 
rs6000: ROP - Do not disable shrink-wrapping for leaf functions [PR114759]

Only disable shrink-wrapping when using -mrop-protect when we know we
will be emitting the ROP-protect hash instructions (ie, non-leaf functions).

2024-06-17  Peter Bergner  <bergner@linux.ibm.com>

gcc/
PR target/114759
* config/rs6000/rs6000.cc (rs6000_override_options_after_change): Move
the disabling of shrink-wrapping from here....
* config/rs6000/rs6000-logue.cc (rs6000_emit_prologue): ...to here.

gcc/testsuite/
PR target/114759
* gcc.target/powerpc/pr114759-1.c: New test.

(cherry picked from commit 0451bc503da9c858e9f1ddfb8faec367c2e032c8)

9 months agoaarch64: Forbid F64MM permutes in streaming mode
Richard Sandiford [Thu, 31 Oct 2024 19:52:46 +0000 (19:52 +0000)] 
aarch64: Forbid F64MM permutes in streaming mode

The current code was based on an early version of the SME spec,
which allowed the .Q forms of TRN1, TRN2, UZP1, UZP2, ZIP1, and ZIP2
to be used in streaming mode.  We should now forbid them instead;
see https://developer.arm.com/documentation/ddi0602/2024-09/SVE-Instructions/TRN1--TRN2--vectors---Interleave-even-or-odd-elements-from-two-vectors-?lang=en
and the corresponding entries for the others.

gcc/
* config/aarch64/aarch64-sve-builtins-base.def (svtrn1q, svtrn2q)
(svuzp1q, svuzp2q, svzip1q, svzip2q): Require SM_OFF.

gcc/testsuite/
* g++.target/aarch64/sve/aarch64-ssve.exp: Add tests for trn[12]q,
uzp[12].c, and zip[12]q.
* gcc.target/aarch64/sve/acle/asm/trn1q_bf16.c: Skip for
STREAMING_COMPATIBLE.
* gcc.target/aarch64/sve/acle/asm/trn1q_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_u8.c: Likewise.

(cherry picked from commit e8fa15ea01439bccf15ae9b9a4d63ac92586c2c5)

9 months agoFix function multiversioning dispatcher link error with LTO
Yangyu Chen [Thu, 31 Oct 2024 19:52:45 +0000 (19:52 +0000)] 
Fix function multiversioning dispatcher link error with LTO

We forgot to apply DECL_EXTERNAL to __init_cpu_features_resolver decl. When
building with LTO, the linker cannot find the
__init_cpu_features_resolver.lto_priv* symbol, causing the link error.

This patch gets this fixed by adding DECL_EXTERNAL to the decl. To avoid used
but never defined warning for this symbol, we also mark TREE_PUBLIC to the decl.
We should also mark the decl having hidden visibility. And fix the attribute in
the same way for __aarch64_cpu_features identifier.

Minimal steps to reproduce the bug:

echo '__attribute__((target_clones("default", "aes"))) void func1() { }' > 1.c
echo '__attribute__((target_clones("default", "aes"))) void func2() { }' > 2.c
echo 'void func1();void func2();int main(){func1();func2();return 0;}' > main.c
gcc -flto -c 1.c 2.c
gcc -flto main.c 1.o 2.o

Fixes: 0cfde688e213 ("[aarch64] Add function multiversioning support")
Signed-off-by: Yangyu Chen <cyy@cyyself.name>
gcc/ChangeLog:

* config/aarch64/aarch64.cc (dispatch_function_versions): Adding
DECL_EXTERNAL, TREE_PUBLIC and hidden DECL_VISIBILITY to
__init_cpu_features_resolver and __aarch64_cpu_features.

(cherry picked from commit 875279ff3ee3b4135401286b8378087a24fd0f8d)

9 months agoDaily bump.
GCC Administrator [Thu, 31 Oct 2024 00:22:52 +0000 (00:22 +0000)] 
Daily bump.

9 months agojit: fix leak of pending_assemble_externals_set [PR117275]
David Malcolm [Wed, 30 Oct 2024 20:11:41 +0000 (16:11 -0400)] 
jit: fix leak of pending_assemble_externals_set [PR117275]

My recent r15-4580-g779c0390e3b57d fix for resetting state in
varasm.cc introduced some noise to "make selftest-valgrind" and,
presumably, a memory leak in libgccjit:

==2462086== 160 (56 direct, 104 indirect) bytes in 1 blocks are definitely lost in loss record 248 of 352
==2462086==    at 0x5270E7D: operator new(unsigned long) (vg_replace_malloc.c:342)
==2462086==    by 0x1D1EB89: init_varasm_once() (varasm.cc:6806)
==2462086==    by 0x181C845: backend_init() (toplev.cc:1826)
==2462086==    by 0x181D41A: do_compile() (toplev.cc:2193)
==2462086==    by 0x181D99C: toplev::main(int, char**) (toplev.cc:2371)
==2462086==    by 0x378391D: main (main.cc:39)

Fixed thusly.

gcc/ChangeLog:
PR jit/117275
* varasm.cc (process_pending_assemble_externals): Reset
pending_assemble_externals_set to nullptr after deleting it.
(varasm_cc_finalize): Delete pending_assemble_externals_set.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
(cherry picked from commit 7f41203f08b9948c1c636dc9d66571121c6c7793)
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
9 months agojit: reset state in varasm.cc [PR117275]
David Malcolm [Wed, 30 Oct 2024 20:11:40 +0000 (16:11 -0400)] 
jit: reset state in varasm.cc [PR117275]

PR jit/117275 reports various jit test failures seen on
powerpc64le-unknown-linux-gnu due to hitting this assertion
in varasm.cc on the 2nd compilation in a process:

#2  0x00007ffff63e67d0 in assemble_external_libcall (fun=0x7ffff2a4b1d8)
    at ../../src/gcc/varasm.cc:2650
2650          gcc_assert (!pending_assemble_externals_processed);
(gdb) p pending_assemble_externals_processed
$1 = true

We're not properly resetting state in varasm.cc after a compile
for libgccjit.

Fixed thusly.

gcc/ChangeLog:
PR jit/117275
* toplev.cc (toplev::finalize): Call varasm_cc_finalize.
* varasm.cc (varasm_cc_finalize): New.
* varasm.h (varasm_cc_finalize): New decl.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
(cherry picked from commit 779c0390e3b57d1eebd41bbfe43d1f329c91de6c)
Signed-off-by: David Malcolm <dmalcolm@redhat.com>