Jan Hubicka [Tue, 18 Jul 2023 15:47:50 +0000 (17:47 +0200)]
tree-ssa-loop-ch improvements, part 3
Extend range query done by loop-ch to also support basic blocks
that are not headers of the loop. This is easy to do, since we already
do path specific query so we only need to extend the path by headers we decided
to dulicate earlier.
This makes it possible to track situations where exit that is always false in
the first iteration (wihch is a common case) is not in the first iteration of
the loop. Doing so lets us to update profile better and do better heuristics.
In particular I changed logic as follows
1) should_duplicate_loop_header_p counts size of duplicated region. When we
know that a given conditional will be constant true or constant false either
in the duplicated region, by range query, or in the loop body after
duplication (since it is loop invariant), we do not account it to code size
costs
2) don't need account loop invariant compuations that will be duplicated
as they will become fully invariant
(maybe we want to have some cap for register pressure eventually?)
3) optimize_size logic is now different. Originally we started duplicating
iff the first conditional was known to be true by ranger query, but then
we used same limits as for -O2.
I now simply lower limits to 0. This means that every conditional
in duplicated sequence must be either loop invariant or constant when
duplicated and we only duplicate statements computing loop invariants
and those we account to 0 size anyway,
This makes code IMO more logical, but makes little difference in practice.
The problem is that in loop:
void test2();
void test(int n)
{
for (int i = 0; n && i < 10; i++)
test2();
}
and do not understand that the final conditional is a combination of a conditional
that is always true in first iteration and a conditional that is loop invariant.
This is also the case of
void test2();
void test(int n)
{
for (int i = 0; n; i++)
{
if (i > 10)
break;
test2();
}
}
Which we turn to the earlier case in ifcombine.
With disabled ifcombine things however works as exepcted. This is something
I plan to handle incrementally. However extending loop-ch and peeling passes
to understand such combined conditionals is still not good enough: at the time ifcombine
merged the two conditionals we lost profile information on how often n is 0,
so we can't recover correct profile or know what is expected number of iterations
after the transofrm.
gcc/ChangeLog:
* tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
for queries not in headers.
(static_loop_exit): Add basic blck parameter; update use of
edge_range_query
(should_duplicate_loop_header_p): Add ranger and static_exits
parameter. Do not account statements that will be optimized
out after duplicaiton in overall size. Add ranger query to
find static exits.
(update_profile_after_ch): Take static_exits has set instead of
single eliminated_edge.
(ch_base::copy_headers): Do all analysis in the first pass;
remember invariant_exits and static_exits.
Jason Merrill [Fri, 14 Jul 2023 16:25:51 +0000 (12:25 -0400)]
c++: constexpr bit_cast with empty field
The change to only cache constexpr calls that are
reduced_constant_expression_p tripped on bit-cast3.C, which failed that
predicate due to the presence of an empty field in the result of
native_interpret_aggregate, which reduced_constant_expression_p rejects to
avoid confusing output_constructor.
This patch proposes to skip such fields in native_interpret_aggregate, since
they aren't actually involved in the value representation.
This patch fixes many limitations of the uninitialized static analysis.
NEW is understood, local variable pointers and non var parameters
will be tracked.
gcc/ChangeLog:
* doc/gm2.texi (Semantic checking): Change example testwithptr
to testnew6.
gcc/m2/ChangeLog:
* Make-lang.in: Minor formatting change.
* gm2-compiler/M2GCCDeclare.mod
(DeclareUnboundedProcedureParameters): Rename local variables.
(WalkUnboundedProcedureParameters): Rename local variables.
(DoVariableDeclaration): Avoid declaration of a variable if
it is on the heap (used by static analysis only).
* gm2-compiler/M2GenGCC.mod: Formatting.
* gm2-compiler/M2Quads.def (GetQuadTrash): New procedure function.
* gm2-compiler/M2Quads.mod (GetQuadTrash): New procedure function.
(QuadFrame): Add Trash field.
(BuildRealFuncProcCall): Detect ALLOCATE and DEALLOCATE and create
a heap variable for parameter 1 saving it as the trashed variable
for static analysis.
(GenQuadOTrash): New procedure.
(DisplayQuadRange): Bugfix. Write the scope number.
* gm2-compiler/M2SymInit.mod: Rewritten to separate LValue
equivalence from LValue to RValue pairings. Comprehensive
detection of variant record implemented. Allow dereferencing
of pointers through LValue/RValue chains.
* gm2-compiler/SymbolTable.def (PutVarHeap): New procedure.
(IsVarHeap): New procedure function.
(ForeachParamSymDo): New procedure.
* gm2-compiler/SymbolTable.mod (PutVarHeap): New procedure.
(IsVarHeap): New procedure function.
(ForeachParamSymDo): New procedure.
(MakeVariableForParam): Reformatted.
(CheckForUnknownInModule): Reformatted.
(SymVar): Add field Heap.
(MakeVar): Assign Heap to FALSE.
gcc/testsuite/ChangeLog:
* gm2/switches/uninit-variable-checking/pass/assignparam.mod: New test.
* gm2/switches/uninit-variable-checking/pass/tiny.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/fail/switches-uninit-variable-checking-procedures-fail.exp:
New test.
* gm2/switches/uninit-variable-checking/procedures/fail/testnew.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/fail/testnew2.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/fail/testnew3.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/fail/testnew4.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/fail/testnew5.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/fail/testnew6.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/fail/testptrptr.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/pass/assignparam2.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/pass/switches-uninit-variable-checking-procedures-pass.exp:
New test.
* gm2/switches/uninit-variable-checking/procedures/pass/testnew5.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/pass/testnew6.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/pass/testparamlvalue.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/pass/testparamrvalue.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/pass/testproc.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/pass/testptrptr.mod: New test.
Richard Biener [Tue, 18 Jul 2023 08:02:52 +0000 (10:02 +0200)]
middle-end/105715 - missed RTL if-conversion with COND_EXPR expansion
When the COND_EXPR condition operand was split out to a separate stmt
it became subject to CSE with other condition evaluations. This
unfortunately leads to TER no longer applying and in turn RTL
expansion of COND_EXPRs no longer seeing the condition and thus
failing to try conditional move expansion. This can be seen with
gcc.target/i386/pr45685.c when built with -march=cascadelake which
then FAILs to produce the expected number of cmovs.
It can also be seen when we create more COND_EXPRs early like for
instruction selection of MIN/MAX operations that map to IEEE
a > b ? a : b expression semantics.
Patrick Palka [Tue, 18 Jul 2023 13:22:49 +0000 (09:22 -0400)]
c++: non-standalone surrogate call template
I noticed we're accidentally prevented from considering a pointer- or
reference-to-function conversion function template if it's not the first
conversion function that's considered, which for the testcase below
results in us accepting the B call but not the A call despite the only
difference between A and B being their order of member declarations.
This patch fixes this so that the outcome of overload resolution doesn't
arbitrarily depend on declaration order here.
gcc/cp/ChangeLog:
* call.cc (add_template_conv_candidate): Don't check for
non-empty 'candidates' here.
(build_op_call): Check it here, before we've considered any
conversion functions.
We weren't checking constraints on pointer/reference-to-function conversion
functions during overload resolution, which caused us to ICE on the first
testcase and reject the second testcase.
Tom Tromey [Thu, 29 Jun 2023 15:56:59 +0000 (09:56 -0600)]
ada: Use new typedefs in gcc-interface
This changes gcc-interface to use the typedefs that were recently
introduced in gnat. This is another step toward switching the code
generator to emit enums rather than preprocessor defines.
In a couple of spots, a 'default' case is also added. These avoid
warnings from -Wswitch when the typedefs are changed to be enums.
gcc/ada/
* gcc-interface/decl.cc (check_ok_for_atomic_type): Use Pragma_Id.
* gcc-interface/trans.cc (lvalue_required_p, Pragma_to_gnu): Use
Pragma_Id.
(get_type_length, Attribute_to_gnu, get_atomic_access): Use
Attribute_Id.
Javier Miranda [Sun, 9 Jul 2023 10:58:05 +0000 (10:58 +0000)]
ada: Constraint_Error caused by 'Image applied to interface type
When the prefix of 'Image is used with a class-wide interface
type object, the frontend does not generate code to displace
the pointer to the underlying object to reference its base,
and this is required to invoke Ada.Tags.Wide_Wide_Expanded_Name.
gcc/ada/
* exp_imgv.adb (Rewrite_Object_Image): fix type of formal. Found
reading sources.
(Expand_Wide_Image_Attribute): ditto.
(Expand_Wide_Wide_Image_Attribute): ditto.
(Rewrite_Object_Image): ditto.
* exp_put_image.adb (Build_Image_Call): For class-wide interface
type prefix generate code to displace the pointer to the object to
reference the base of the underlying object.
ada: Avoid iterator conflicts in container aggregates
Create temporary scope for the iterators defined in a
container aggregate so that it would not be put to the
same scope where the expression was used. This would
otherwise lead to multiple aggregates with iterators that have
the same name leading to a name conflict.
gcc/ada/
* sem_aggr.adb (Resolve_Iterated_Association): Add temporary scope
when analyzing the Iterator Specification. Use preanalysis instead
of Analysis to avoid polluting the tree.
ada: Apply correct element type for container aggregates
When dealing with a container aggregate with an iterator
specification the iterator should take the value of the
element of the container instead of the key.
gcc/ada/
* sem_aggr.adb (Resolve_Iterated_Association): Use the element
type for the iterator in a container aggregate with an iterator
specification.
ada: Fix expanding container aggregates with Iterator specification
The compiler should use unnamed addition methods such as Append
when expanding a container aggregate with Iterator Specification.
gcc/ada/
* exp_aggr.adb (Expand_Container_Aggregate): Use the positional
addition method only when dealing with a container aggregate
without an Iterator Specification e.g. with a loop parameter
specification
Eric Botcazou [Wed, 5 Jul 2023 20:04:07 +0000 (22:04 +0200)]
ada: Improve error message for ambiguous subprogram call
This restores the full listing of the types for the interpretations.
gcc/ada/
* sem_util.ads (Wrong_Type): Add Multiple parameter defaulting to
False and document it.
* sem_util.adb (Wrong_Type): Do not return early if an error has
already been posted on Expr and Multiple is True.
* sem_ch4.adb (Analyze_One_Call): Pass All_Errors_Mode as the
actual parameter for Multiple to Wrong_Type.
Javier Miranda [Wed, 5 Jul 2023 17:27:14 +0000 (17:27 +0000)]
ada: Constraint_Error caused by interface conversion
When the sources have a type conversion from an interface type
T2 to some ancestor interface type T1 (that is, T2 extends T1)
the tag check added by the compiler may fail at runtime.
Before this patch, the run-time assumed that not specifying a CPU
affinity mask when creating a thread was equivalent to specifying a
CPU affinity mask that included all CPUs.
As documented in the man pages for pthread_create and
pthread_setaffinity_np, this assumption is incorrect: a thread created
using pthread_create inherits the CPU affinity mask of the creating
thread by default. There was a comment in Set_Task_Affinity that
acknowledged this behavior, but the actual code made the erroneous
assumption mentioned above.
That assumption caused the run-time to behave incorrectly when tasks were
explicity assigned to Not_A_Specific_CPU: those tasks were assigned to
the same CPUs as their parents instead of being allowed to run on any
CPU. This patch fixes that behavior.
This patch has the negative effect of making the runtime issue
sched_setaffinity syscalls that are not necessary.
gcc/ada/
* libgnarl/s-taprop__linux.adb (Set_Task_Affinity, Create_Task): Tweak
handling of CPU affinities.
Eric Botcazou [Tue, 4 Jul 2023 17:24:07 +0000 (19:24 +0200)]
ada: Fix internal error on aggregates of self-referencing types
The front-end contains a specific mechanism to deal with aggregates of
self-referencing types by means of the Has_Self_Reference flag, which is
supposed to be set during semantic analysis and used during expansion.
The problem is that the first part overlooks aggregates of derived types
which implicitly contain references to an ancestor type (the second part
uses a broader condition but it is effectively guarded by the first one).
This changes both parts to use the same condition based on the Is_Ancestor
predicate, which seems to implement the expected semantic in this case.
gcc/ada/
* sem_type.ads (Is_Ancestor): Remove mention of tagged type.
* exp_aggr.adb: Add with and use clauses for Sem_Type.
(Build_Record_Aggr_Code.Replace_Type): Call Is_Ancestor to spot
self-references to the type of the aggregate.
* sem_aggr.adb (Resolve_Record_Aggregate.Add_Discriminant_Values):
Likewise.
Eric Botcazou [Wed, 5 Jul 2023 17:49:40 +0000 (19:49 +0200)]
ada: Fix assertion failure introduced by latest change
The new processing is not properly guarded.
gcc/ada/
* sem_ch13.adb (Replace_Type_References_Generic.Visible_Component):
In the case of private discriminated types, explicitly check that we
have a private declaration before examining its discriminant part.
Vasiliy Fofanov [Fri, 30 Jun 2023 12:22:47 +0000 (12:22 +0000)]
ada: Refactor s-pack* units to remove multiple returns
The aim of this refactoring is to replace multiple returns from
branches of case and if statements by a single return statement
with a conditional expression. This is more readable and
maintainable, and also conformant with a Highly Recommended
design principle of ISO 26262-6.
Yannick Moy [Fri, 30 Jun 2023 12:51:53 +0000 (14:51 +0200)]
ada: Allow warnings with explain code
Change the way explain codes are handled to generate the command for the
user to get the explanations, as this was not working for warnings.
gcc/ada/
* errout.adb (Error_Msg_Internal): Remove call to
Prescan_Message on the special continuation for the explain code
command, as this does not play well with the setting of global
variables for the message (like its status as a warning or not).
Instead, set directly the global variables regarding content of
the message in terms of special characters.
Eric Botcazou [Sun, 2 Jul 2023 08:07:55 +0000 (10:07 +0200)]
ada: Fix Valid_Scalars attribute applied to types from limited with
The attribute is wrongly computed as always True because, unlike for e.g.
private types, Validated_View does not look through the limited view.
gcc/ada/
* sem_util.ads (Validated_View): Document enhanced behavior.
* sem_util.adb (Validated_View): Return the nonlimited view, if any,
of types coming from a limited with.
RISC-V: Dynamic adjust size of VLA vector according to TARGET_MIN_VLEN
This patch is to dynamic adjust size of VLA vectors according to TARGET_MIN_VLEN (-march=*zvl*b).
Currently, VNx16QImode is always [16,16] when TARGET_MINV_LEN >= 128.
We are going to add a bunch of VLS modes (V16QI,V32QI,....etc), these modes should always be considered
as having smaller size than VLA vectors.
For example, the V32QImode is LMUL = 1 VLS mode when TARGET_MIN_VLEN = 256
and V16QImode is LMUL = 1 VLS mode when TARGET_MINV_LEN = 128.
Since a LMUL = 1 VLA mode VNx16QI is always [16,16] before this patch,
when TARGET_MIN_VLEN = 128, VNx16QImode ([16,16]) > V16QImode.
when TARGET_MIN_VLEN = 256, VNx16QImode ([16,16]) possible < V32QImode.
Then such inconsistency (TARGET_MIN_VLEN = 128, regno_reg_rtx[97] is VLA modes wheras it is VLS modes when TARGET_MIN_VLEN = 256).
This patch now adjust VLA vector size accurately according to TARGET_MIN_VLEN which make things more reasonable:
VNx16QI = [16,16] if TARGET_MIN_VLEN = 128.
VNx16QI = [32,32] if TARGET_MIN_VLEN = 256.
VNx16QI = [64,64] if TARGET_MIN_VLEN = 512.
VNx16QI = [128,128] if TARGET_MIN_VLEN = 1024.
VNx16QI = [256,256] if TARGET_MIN_VLEN = 2048.
VNx16QI = [512,512] if TARGET_MIN_VLEN = 4096.
gcc/ChangeLog:
* config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
* config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
(riscv_convert_vector_bits): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/zve32f_zvl1024b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve32f_zvl2048b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve32f_zvl256b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve32f_zvl4096b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve32f_zvl512b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve32x_zvl1024b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve32x_zvl2048b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve32x_zvl256b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve32x_zvl4096b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve32x_zvl512b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64d_zvl1024b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64d_zvl2048b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64d_zvl256b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64d_zvl4096b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64d_zvl512b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64f_zvl1024b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64f_zvl2048b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64f_zvl256b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64f_zvl4096b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64f_zvl512b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64x_zvl1024b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64x_zvl2048b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64x_zvl256b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64x_zvl4096b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64x_zvl512b-1.c: New test.
* config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
* config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/reduc/reduc-5.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc-6.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc-7.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc-8.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc-9.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-5.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-6.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-7.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-8.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-9.c: New test.
RISC-V: Remove testcase that cannot be compiled because VLEN limitation
Since the latter patch (https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624689.html)
forbidden VLEN > 4096, the testcase attribute-20.c is no long need. This is obvious.
Tighten regexps in gcc.target/riscv/_Float16-zhinx-1.c .
The original "mv" regexp would match
.ascii "\254\254\375\002e2N6\013\231,\354NDmvVP0]\304\312F!biZ\025\211"
in the .gnu.lto_foo1.0.32528183c9deec41 section.
Add peephole to eliminate redundant comparison after cmpccxadd.
Similar like we did for cmpxchg, but extended to all
ix86_comparison_int_operator since cmpccxadd set EFLAGS exactly same
as CMP.
When operand order in compare insn is same as that in cmpccxadd,
compare insn can be eliminated directly.
When operand order is swapped in compare insn, only optimize cmpccxadd
+ cmpl + jcc/setcc to cmpccxadd + jcc/setcc when FLAGS_REG is dead
after jcc/setcc.
gcc/ChangeLog:
PR target/110591
* config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
3 define_peephole2 after the pattern.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr110591.c: New test.
* gcc.target/i386/pr110591-2.c: New test.
RISC-V port needs to add a bunch VLS modes (V16QI,V32QI,V64QI,...etc)
There are sharing same REG_CLASS with VLA modes (VNx16QI,VNx32QI,...etc)
When I am adding those VLS modes, the RTL_SSA initialization in VSETVL PASS (inserted after RA) ICE:
rvv.c:13:1: internal compiler error: in partial_subreg_p, at rtl.h:3186
13 | }
| ^
0xf7a5b1 partial_subreg_p(machine_mode, machine_mode)
../../../riscv-gcc/gcc/rtl.h:3186
0x1407616 wider_subreg_mode(machine_mode, machine_mode)
../../../riscv-gcc/gcc/rtl.h:3252
0x2a2c6ff rtl_ssa::combine_modes(machine_mode, machine_mode)
../../../riscv-gcc/gcc/rtl-ssa/internals.inl:677
0x2a2b9a4 rtl_ssa::function_info::simplify_phi_setup(rtl_ssa::phi_info*, rtl_ssa::set_info**, bitmap_head*)
../../../riscv-gcc/gcc/rtl-ssa/functions.cc:146
0x2a2c142 rtl_ssa::function_info::simplify_phis()
../../../riscv-gcc/gcc/rtl-ssa/functions.cc:258
0x2a2b3f0 rtl_ssa::function_info::function_info(function*)
../../../riscv-gcc/gcc/rtl-ssa/functions.cc:51
0x1cebab9 pass_vsetvl::init()
../../../riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:4578
0x1cec150 pass_vsetvl::execute(function*)
../../../riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:4716
The reason is that we have V32QImode (size = [32,0]) which is the mode set as regno_reg_rtx[97]
When the PHI input def comes from ENTRY BLOCK (index =0), the def->mode () = V32QImode.
But the phi_mode = VNx2QI for example (I use VLA modes intrinsic write the codes).
Then combine_modes report ICE.
gcc/ChangeLog:
* rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
Pan Li [Fri, 14 Jul 2023 02:14:07 +0000 (10:14 +0800)]
RISC-V: Support basic floating-point dynamic rounding mode
This patch would like to support the basic floating-point dynamic
rounding modes for the RVV.
We implement the dynamic rounding mode by below steps.
1. Set entry to DYN and exit to DYN_EXIT.
2. Add one rtl variable into machine_function for backup/restore.
3. Backup frm value when entry.
4. Restore frm value when exit and prev mode is not DYN.
5. Restore frm when mode switching to DYN.
6. Set frm when mode switching to STATIC.
Please *NOTE* inline asm and call during the cfun will be implemented
in another PATCH(s).
Signed-off-by: Pan Li <pan2.li@intel.com> Co-Authored-By: Juzhe-Zhong <juzhe.zhong@rivai.ai>
gcc/ChangeLog:
* config/riscv/riscv.cc (struct machine_function): Add new field.
(riscv_static_frm_mode_p): New function.
(riscv_emit_frm_mode_set): New function for emit FRM.
(riscv_emit_mode_set): Extract function for FRM.
(riscv_mode_needed): Fix the TODO.
(riscv_mode_entry): Initial dynamic frm RTL.
(riscv_mode_exit): Return DYN_EXIT.
* config/riscv/riscv.md: Add rdfrm.
* config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
* config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
(fsrm): Removed.
(fsrmsi_backup): New pattern for swap.
(fsrmsi_restore): New pattern for restore.
(fsrmsi_restore_exit): New pattern for restore exit.
(frrmsi): New pattern for backup.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/float-point-frm-insert-1.c: Adjust
test cases.
* gcc.target/riscv/rvv/base/float-point-frm-insert-10.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-frm-insert-2.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-frm-insert-3.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-frm-insert-4.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-frm-insert-5.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-frm-insert-6.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-frm-insert-7.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-frm-insert-8.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-frm-insert-9.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-frm-run-1.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-frm-run-2.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-frm-run-3.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-1.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-10.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-11.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-12.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-13.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-14.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-15.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-16.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-17.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-18.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-19.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-2.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-20.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-21.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-22.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-23.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-24.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-25.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-26.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-27.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-28.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-29.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-3.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-30.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-31.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-32.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-4.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-5.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-6.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-7.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-8.c: New test.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-9.c: New test.
Jason Merrill [Thu, 13 Jul 2023 21:48:05 +0000 (17:48 -0400)]
c++: only cache constexpr calls that are constant exprs
In reviewing Nathaniel's patch for PR70331, it occurred to me that instead
of looking for various specific problematic things in the result of a
constexpr call to decide whether to cache it, we should use
reduced_constant_expression_p.
The change to that function is to avoid crashing on uninitialized objects of
non-class type.
In a trial version of this patch I checked to see what cases this stopped
caching; most were instances of partially-initialized return values, which
seem fine to not cache. Some were returning pointers to expiring local
variables, which we definitely want not to cache. And one was bit-cast3.C,
which will be handled in a follow-up patch.
gcc/cp/ChangeLog:
* constexpr.cc (cxx_eval_call_expression): Only cache
reduced_constant_expression_p results.
(reduced_constant_expression_p): Handle CONSTRUCTOR of scalar type.
(cxx_eval_constant_expression): Fold vectors here.
(cxx_eval_bare_aggregate): Not here.
combine-stack-adj: Change return type of predicate function from int to bool
gcc/ChangeLog:
* combine-stack-adj.cc (stack_memref_p): Change return type from
int to bool and adjust function body accordingly.
(rest_of_handle_stack_adjustments): Change return type to void.
combine: Change return type of predicate functions from int to bool
Also change some internal variables and function arguments from int to bool.
gcc/ChangeLog:
* combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
(cant_combine_insn_p): Change return type from int to bool and adjust
function body accordingly.
(can_combine_p): Ditto.
(combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
function arguments from int to bool.
(contains_muldiv): Change return type from int to bool and adjust
function body accordingly.
(try_combine): Ditto. Change "new_direct_jump" pointer function
argument from int to bool. Change "substed_i2", "substed_i1",
"substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
"i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
"i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
"i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
"i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
"swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
from int to bool.
(subst): Change "in_dest", "in_cond" and "unique_copy" function
arguments from int to bool.
(combine_simplify_rtx): Change "in_dest" and "in_cond" function
arguments from int to bool.
(make_extraction): Change "unsignedp", "in_dest" and "in_compare"
function argument from int to bool.
(force_int_to_mode): Change "just_select" function argument
from int to bool. Change "next_select" variable to bool.
(rtx_equal_for_field_assignment_p): Change return type from
int to bool and adjust function body accordingly.
(merge_outer_ops): Ditto. Change "pcomp_p" pointer function
argument from int to bool.
(get_last_value_validate): Change return type from int to bool
and adjust function body accordingly.
(reg_dead_at_p): Ditto.
(reg_bitfield_target_p): Ditto.
(combine_instructions): Ditto. Change "new_direct_jump"
variable to bool.
(can_combine_p): Change return type from int to bool
and adjust function body accordingly.
(likely_spilled_retval_p): Ditto.
(can_change_dest_mode): Change "added_sets" function argument
from int to bool.
(find_split_point): Change "unsignedp" variable to bool.
(simplify_if_then_else): Change "comparison_p" and "swapped"
variables to bool.
(simplify_set): Change "other_changed" variable to bool.
(expand_compound_operation): Change "unsignedp" variable to bool.
(force_to_mode): Change "just_select" function argument
from int to bool. Change "next_select" variable to bool.
(extended_count): Change "unsignedp" function argument to bool.
(simplify_shift_const_1): Change "complement_p" variable to bool.
(simplify_comparison): Change "changed" variable to bool.
(rest_of_handle_combine): Change return type to void.
Harald Anlauf [Sun, 16 Jul 2023 20:17:27 +0000 (22:17 +0200)]
Fortran: intrinsics and deferred-length character arguments [PR95947,PR110658]
gcc/fortran/ChangeLog:
PR fortran/95947
PR fortran/110658
* trans-expr.cc (gfc_conv_procedure_call): For intrinsic procedures
whose result characteristics depends on the first argument and which
can be of type character, the character length will not be deferred.
gcc/testsuite/ChangeLog:
PR fortran/95947
PR fortran/110658
* gfortran.dg/deferred_character_37.f90: New test.
Andre Vieira [Mon, 17 Jul 2023 16:00:54 +0000 (17:00 +0100)]
Include insn-opinit.h in PLUGIN_H [PR110610]
This patch fixes PR110610 by including insn-opinit.h in the INTERNAL_FN_H list,
as insn-opinit.h is now required by internal-fn.h. This will lead to
insn-opinit.h being installed in the plugin directory.
ira: Skip empty regclass when setting up reg class relations
ira.cc:setup_reg_class_relations sets up ira_reg_class_subset (among
other things). If reg class cl3 has no registers, then that empty set
is always hard_reg_set_subset_p of any other set, and this makes
ira_reg_class_subset[ALL_REGS][NO_REGS] equal to such a regclass,
rather than NO_REGS.
This breaks code (lra-constraints.cc:in_class_p/curr_insn_transform,
for e.g.) which uses NO_REGS to check for an empty regclass.
Why define an empty regclass? A regclass could be conditionally empty (via
TARGET_CONDITIONAL_REGISTER_USAGE) - for the avr target, ADDW_REGS and
NO_LD_REGS are empty for the avrtiny subarch, for example.
Fix by continuing the innermost loop if the corresponding reg class is empty.
gcc/ChangeLog:
* ira.cc (setup_reg_class_relations): Continue
if regclass cl3 is hard_reg_set_empty_p.
OpenMP/Fortran: Parsing support for 'uses_allocators'
The 'uses_allocators' clause to the 'target' construct accepts predefined
allocators and can also be used to define a new allocator for a target region.
As predefined allocators in GCC do not require special handling, those can and
are ignored after parsing, such that this feature now works. On the other hand,
defining a new allocator will fail for now with a 'sorry, unimplemented'.
Note that both the OpenMP 5.0/5.1 and 5.2 syntax for uses_allocators
is supported by this commit.
Martin Jambor [Mon, 17 Jul 2023 12:22:06 +0000 (14:22 +0200)]
Restore bootstrap by removing unused variable in tree-ssa-loop-ivcanon.cc
This restores bootstrap by removing the variable causing:
/home/mjambor/gcc/trunk/src/gcc/tree-ssa-loop-ivcanon.cc: In function ‘bool try_peel_loop(loop*, edge, tree, bool, long int)’:
/home/mjambor/gcc/trunk/src/gcc/tree-ssa-loop-ivcanon.cc:1170:17: error: variable ‘entry_count’ set but not used [-Werror=unused-but-set-variable]
1170 | profile_count entry_count = profile_count::zero ();
| ^~~~~~~~~~~
cc1plus: all warnings being treated as errors
Mikael Morin [Mon, 17 Jul 2023 12:14:22 +0000 (14:14 +0200)]
fortran: Pass pre-calculated class container argument [pr110618]
Pass already evaluated class container argument from
gfc_conv_procedure_call down to gfc_add_finalizer_call through
gfc_deallocate_scalar_with_status and gfc_deallocate_with_status,
to avoid repeatedly evaluating the same data reference expressions
in the generated code.
PR fortran/110618
gcc/fortran/ChangeLog:
* trans.h (gfc_deallocate_with_status): Add class container
argument.
(gfc_deallocate_scalar_with_status): Ditto.
* trans.cc (gfc_deallocate_with_status): Add class container
argument and pass it down to gfc_add_finalize_call.
(gfc_deallocate_scalar_with_status): Same.
* trans-array.cc (structure_alloc_comps): Update caller.
* trans-stmt.cc (gfc_trans_deallocate): Ditto.
* trans-expr.cc (gfc_conv_procedure_call): Ditto. Pass
pre-evaluated class container argument if it's available.
Mikael Morin [Mon, 17 Jul 2023 12:14:18 +0000 (14:14 +0200)]
fortran: Use pre-evaluated class container if available [PR110618]
Add the possibility to provide a pre-evaluated class container argument
to gfc_add_finalizer to avoid repeatedly evaluating data reference
expressions in the generated code.
PR fortran/110618
gcc/fortran/ChangeLog:
* trans.h (gfc_add_finalizer_call): Add class container argument.
* trans.cc (gfc_add_finalizer_call): Ditto. Pass down new
argument to get_final_proc_ref, get_elem_size, get_var_desc,
and get_vptr.
(get_elem_size): Add class container argument.
Use provided class container if it's available.
(get_var_descr): Same.
(get_vptr): Same.
(get_final_proc_ref): Same. Add boolean telling the class
container argument is used. Set it. Don't try to use
final_wrapper if class container argument was used.
Mikael Morin [Mon, 17 Jul 2023 12:14:14 +0000 (14:14 +0200)]
fortran: Factor scalar descriptor generation
The same scalar descriptor generation code is present twice, in the
case of derived type entities, and in the case of polymorphic
non-coarray entities. Factor it in preparation for a future third case
that will also need the same code for scalar descriptor generation.
Mikael Morin [Mon, 17 Jul 2023 12:13:53 +0000 (14:13 +0200)]
fortran: Push final procedure expr gen close to its one usage.
Final procedure pointer expression is generated in gfc_build_final_call
and only used in get_final_proc_ref. Move the generation there.
gcc/fortran/ChangeLog:
* trans.cc (gfc_add_finalizer_call): Remove local variable
final_expr. Pass down expr to get_final_proc_ref and move
final procedure expression generation down to its one usage
in get_final_proc_ref.
(get_final_proc_ref): Add argument expr. Remove argument
final_wrapper. Recreate final_wrapper from expr.
Mikael Morin [Mon, 17 Jul 2023 12:13:48 +0000 (14:13 +0200)]
fortran: Push element size expression generation close to its usage
gfc_add_finalizer_call creates one expression which is only used
by the get_final_proc_ref function. Move the expression generation
there.
gcc/fortran/ChangeLog:
* trans.cc (gfc_add_finalizer_call): Remove local variable
elem_size. Pass expression to get_elem_size and move the
element size expression generation close to its usage there.
(get_elem_size): Add argument expr, remove class_size argument
and rebuild it from expr. Remove ts argument and use the
type of expr instead.
Mikael Morin [Mon, 17 Jul 2023 12:13:44 +0000 (14:13 +0200)]
fortran: Reuse final procedure pointer expression
Reuse twice the same final procedure pointer expression instead of
translating it twice.
Final procedure pointer expressions were translated twice, once for the
final procedure call, and once for the check for non-nullness (if
applicable).
gcc/fortran/ChangeLog:
* trans.cc (gfc_add_finalizer_call): Move pre and post code for
the final procedure pointer expression to the outer block.
Reuse the previously evaluated final procedure pointer
expression.
Mikael Morin [Mon, 17 Jul 2023 12:13:37 +0000 (14:13 +0200)]
fortran: Add missing cleanup blocks
Move cleanup code for the data descriptor after the finalization code
as it makes more sense to have it after.
Other cleanup blocks should be empty (element size and final pointer
are just data references), but add them by the way, just in case.
gcc/fortran/ChangeLog:
* trans.cc (gfc_add_finalizer_call): Add post code for desc_se
after the finalizer call. Add post code for final_se and
size_se as well.
Currently CCP throws away the known 1 bits because VRP and irange have
traditionally only had a way of tracking known 0s (set_nonzero_bits).
With the ability to keep all the known bits in the irange, we can now
save this between passes.
gcc/ChangeLog:
* tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
This patch add reduc_*_scal to support reduction auto-vectorization.
Use COND_LEN_* + reduc_*_scal to support unordered non-SLP auto-vectorization.
Consider this following case:
int __attribute__((noipa))
and_loop (int32_t * __restrict x,
int32_t n, int res)
{
for (int i = 0; i < n; ++i)
res &= x[i];
return res;
}
ASM:
and_loop:
ble a1,zero,.L4
vsetvli a3,zero,e32,m1,ta,ma
vmv.v.i v1,-1
.L3:
vsetvli a5,a1,e32,m1,tu,ma ------------> MUST BE "TU".
slli a4,a5,2
sub a1,a1,a5
vle32.v v2,0(a0)
add a0,a0,a4
vand.vv v1,v2,v1
bne a1,zero,.L3
vsetivli zero,1,e32,m1,ta,ma
vmv.v.i v2,-1
vsetvli a3,zero,e32,m1,ta,ma
vredand.vs v1,v1,v2
vmv.x.s a5,v1
and a0,a2,a5
ret
.L4:
mv a0,a2
ret
Fix bug of VSETVL PASS which is caused by reduction testcase.
SLP reduction and floating-point in-order reduction are not supported yet.
* gcc.target/riscv/rvv/rvv.exp: Add reduction tests.
* gcc.target/riscv/rvv/autovec/reduc/reduc-1.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc-2.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc-3.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc-4.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-3.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-4.c: New test.
Currently IPA throws away the known 1 bits because VRP and irange have
traditionally only had a way of tracking known 0s (set_nonzero_bits).
With the ability to keep all the known bits in the irange, we can now
save this between passes.
gcc/ChangeLog:
* ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
Kewen Lin [Mon, 17 Jul 2023 08:44:59 +0000 (03:44 -0500)]
vect: Initialize new_temp to avoid false positive warning [PR110652]
As PR110652 and its duplicate PRs show, there could be one
build error
error: 'new_temp' may be used uninitialized
for some build configurations. It's a false positive warning
(or error at -Werror), but in order to make the build succeed,
this patch is to initialize the reported variable 'new_temp'
as NULL_TREE.
PR tree-optimization/110652
gcc/ChangeLog:
* tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
NULL_TREE.
Richard Biener [Mon, 17 Jul 2023 07:20:33 +0000 (09:20 +0200)]
tree-optimization/110669 - bogus matching of loop bitop
The matching code lacked a check that we end up with a PHI node
in the loop header. This caused us to match a random PHI argument
now catched by the extra PHI_ARG_DEF_FROM_EDGE checking.
PR tree-optimization/110669
* tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
Check we matched a header PHI.
Add global setter for value/mask pair for SSA names.
This patch provides a way to set the value/mask pair of known bits
globally, similarly to how we can use set_nonzero_bits for known 0
bits. This can then be used by CCP and IPA to set value/mask info
instead of throwing away the known 1 bits.
In further clean-ups, I will see if it makes sense to remove
set_nonzero_bits altogether, since it is subsumed by value/mask.
The bit twiddling in union/intersect for the value/mask pair must be
normalized to have the unknown bits with a value of 0 in order to make
the math simpler. Normalizing at construction slowed VRP by 1.5% so I
opted to normalize before updating the bitmask in range-ops, since it
was the only user. However, with upcoming changes there will be
multiple setters of the mask (IPA and CCP), so we need something more
general.
I played with various alternatives, and settled on normalizing before
union/intersect which were the ones needing the bits cleared. With
this patch, there's no noticeable difference in performance either in
VRP or in overall compilation.
gcc/ChangeLog:
* value-range.cc (irange_bitmask::verify_mask): Mask need not be
normalized.
* value-range.h (irange_bitmask::union_): Normalize beforehand.
(irange_bitmask::intersect): Same.
I had messed up the case where the outer operator is `==`.
The check for the resulting should have been `==` and not `!=`.
This patch fixes that and adds a full runtime testcase now for
all cases to make sure it works.
OK? Bootstrapped and tested on x86-64-linux-gnu with no regressions.
gcc/ChangeLog:
PR tree-optimization/110666
* match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
gcc/testsuite/ChangeLog:
PR tree-optimization/110666
* gcc.c-torture/execute/pr110666-1.c: New test.
i386: Auto vectorize usdot_prod, udot_prod with AVXVNNIINT16 instruction.
gcc/ChangeLog:
* config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
have the same iterator. Also renaming all the occurence to
VI2_AVX2_AVX512BW.
(usdot_prod<mode>): New define_expand.
(udot_prod<mode>): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/vnniint16-auto-vectorize-1.c: New test.
* gcc.target/i386/vnniint16-auto-vectorize-2.c: Ditto.
Jan Hubicka [Sun, 16 Jul 2023 21:56:59 +0000 (23:56 +0200)]
Fix profile update in scale_profile_for_vect_loop
When vectorizing 4 times, we sometimes do
for
<4x vectorized body>
for
<2x vectorized body>
for
<1x vectorized body>
Here the second two fors handling epilogue never iterates.
Currently vecotrizer thinks that the middle for itrates twice.
This turns out to be scale_profile_for_vect_loop that uses
niter_for_unrolled_loop.
At that time we know epilogue will iterate at most 2 times
but niter_for_unrolled_loop does not know that the last iteration
will be taken by the epilogue-of-epilogue and thus it think
that the loop may iterate once and exit in middle of second
iteration.
We already do correct job updating niter bounds and this is
just ordering issue. This patch makes us to first update
the bounds and then do updating of the loop. I re-implemented
the function more correctly and precisely.
The loop reducing iteration factor for overly flat profiles is bit funny, but
only other method I can think of is to compute sreal scale that would have
similar overhead I think.
Bootstrapped/regtested x86_64-linux, will commit it shortly.
Jan Hubicka [Sun, 16 Jul 2023 21:55:14 +0000 (23:55 +0200)]
Fix optimize_mask_stores profile update
While looking into sphinx3 regression I noticed that vectorizer produces
BBs with overall probability count 120%. This patch fixes it.
Richi, I don't know how to create a testcase, but having one would
be nice.
Bootstrapped/regtested x86_64-linux, will commit it shortly.
gcc/ChangeLog:
PR tree-optimization/110649
* tree-vect-loop.cc (optimize_mask_stores): Set correctly
probability of the if-then-else construct.
Jan Hubicka [Sun, 16 Jul 2023 21:53:56 +0000 (23:53 +0200)]
Avoid double profile udpate in try_peel_loop
try_peel_loop uses gimple_duplicate_loop_body_to_header_edge which subtracts the profile
from the original loop. However then it tries to scale the profile in a wrong way
(it forces header count to be entry count).
This eliminates to profile misupdates in the internal loop of sphinx3.
David Edelsohn [Sat, 15 Jul 2023 22:44:25 +0000 (18:44 -0400)]
testsuite: Require 128 bit long double for ibmlongdouble.
pr103628.f90 adds the -mabi=ibmlongdouble option, but AIX defaults
to 64 bit long double. This patch adds -mlong-double-128 to ensure
that the testcase is compiled with 128 bit long double.
Here the call A().f() is represented as a COMPOUND_EXPR whose first
operand is the otherwise unused object argument A() and second operand
is the call result (both are TARGET_EXPRs). Within the return statement,
this outermost COMPOUND_EXPR ends up foiling the copy elision check in
build_special_member_call, resulting in us introducing a bogus call to the
deleted move constructor. (Within the variable initialization, which goes
through ocp_convert instead of convert_for_initialization, we've already
been eliding the copy -- despite the outermost COMPOUND_EXPR -- ever since r10-7410-g72809d6fe8e085 made ocp_convert look through COMPOUND_EXPR).
In contrast I noticed '(A(), A::f())' (which should be equivalent to
the above call) is represented with the COMPOUND_EXPR inside the RHS's
TARGET_EXPR initializer thanks to a special case in cp_build_compound_expr.
So this patch fixes this by making keep_unused_object_arg use
cp_build_compound_expr as well.
PR c++/110441
gcc/cp/ChangeLog:
* call.cc (keep_unused_object_arg): Use cp_build_compound_expr
instead of building a COMPOUND_EXPR directly.
Jason Merrill [Fri, 14 Jul 2023 13:37:21 +0000 (09:37 -0400)]
c++: c++26 regression fixes
Apparently I wasn't actually running the testsuite in C++26 mode like I
thought I was, so there were some failures I wasn't seeing.
The constexpr hunk fixes regressions with the P2738 implementation; we still
need to use the old handling for casting from void pointers to heap
variables.
PR c++/110344
gcc/cp/ChangeLog:
* constexpr.cc (cxx_eval_constant_expression): Move P2738 handling
after heap handling.
* name-lookup.cc (get_cxx_dialect_name): Add C++26.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/constexpr-cast2.C: Adjust for P2738.
* g++.dg/ipa/devirt-45.C: Handle -fimplicit-constexpr.
Christophe Lyon [Wed, 28 Jun 2023 14:29:15 +0000 (14:29 +0000)]
arm: [MVE intrinsics] Factorize vcaddq vhcaddq
Factorize vcaddq, vhcaddq so that they use the same parameterized
names.
To be able to use the same patterns, we add a suffix to vcaddq.
Note that vcadd uses UNSPEC_VCADDxx for builtins without predication,
and VCADDQ_ROTxx_M_x (that is, not starting with "UNSPEC_"). The
UNPEC_* names are also used by neon.md
Roger Sayle [Fri, 14 Jul 2023 17:21:56 +0000 (18:21 +0100)]
PR target/110588: Add *bt<mode>_setncqi_2 to generate btl on x86.
This patch resolves PR target/110588 to catch another case in combine
where the i386 backend should be generating a btl instruction. This adds
another define_insn_and_split to recognize the RTL representation for this
case.
I also noticed that two related define_insn_and_split weren't using the
preferred string style for single statement preparation-statements, so
I've reformatted these to be consistent in style with the new one.
2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
PR target/110588
* config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
preparation statement over braces for a single statement.
(*bt<mode>_setncqi): Likewise.
(*bt<mode>_setncqi_2): New define_insn_and_split.
gcc/testsuite/ChangeLog
PR target/110588
* gcc.target/i386/pr110588.c: New test case.
Marek Polacek [Thu, 25 May 2023 22:54:18 +0000 (18:54 -0400)]
c++: wrong error with static constexpr var in tmpl [PR109876]
Since r8-509, we'll no longer create a static temporary var for
the initializer '{ 1, 2 }' for num in the attached test because
the code in finish_compound_literal is now guarded by
'&& fcl_context == fcl_c99' but it's fcl_functional here. This
causes us to reject num as non-constant when evaluating it in
a template.
Jason's idea was to treat num as value-dependent even though it
actually isn't. This patch implements that suggestion.
We weren't marking objects whose type is an empty class type
constant. This patch changes that so that v_d_e_p doesn't need
to check is_really_empty_class.
Co-authored-by: Jason Merrill <jason@redhat.com>
PR c++/109876
gcc/cp/ChangeLog:
* decl.cc (cp_finish_decl): Set TREE_CONSTANT when initializing
an object of empty class type.
* pt.cc (value_dependent_expression_p) <case VAR_DECL>: Treat a
constexpr-declared non-constant variable as value-dependent.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/constexpr-template12.C: New test.
* g++.dg/cpp1z/constexpr-template1.C: New test.
* g++.dg/cpp1z/constexpr-template2.C: New test.
Roger Sayle [Fri, 14 Jul 2023 17:10:05 +0000 (18:10 +0100)]
i386: Improved insv of DImode/DFmode {high,low}parts into TImode.
This is the next piece towards a fix for (the x86_64 ABI issues affecting)
PR 88873. This patch generalizes the recent tweak to ix86_expand_move
for setting the highpart of a TImode reg from a DImode source using
*insvti_highpart_1, to handle both DImode and DFmode sources, and also
use the recently added *insvti_lowpart_1 for setting the lowpart.
Although this is another intermediate step (not yet a fix), towards
enabling *insvti and *concat* patterns to be candidates for TImode STV
(by using V2DI/V2DF instructions), it already improves things a little.
2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/i386-expand.cc (ix86_expand_move): Generalize special
case inserting of 64-bit values into a TImode register, to handle
both DImode and DFmode using either *insvti_lowpart_1
or *isnvti_highpart_1.
We rely on the "undefined" vals to have a specific value (from the earlier
REG_EQUAL note) but actual code generation doesn't ensure this (it doesn't
need to). That said, the issue isn't the constant folding per-se but that
we do not actually constant fold but register an equality that doesn't hold.
PR target/110206
gcc/ChangeLog:
* fwprop.cc (contains_paradoxical_subreg_p): Move to ...
* rtlanal.cc (contains_paradoxical_subreg_p): ... here.
* rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
* cprop.cc (try_replace_reg): Do not set REG_EQUAL note
when the original source contains a paradoxical subreg.
Jan Hubicka [Fri, 14 Jul 2023 15:14:15 +0000 (17:14 +0200)]
Turn TODO_rebuild_frequencies to a pass
Currently we rebiuild profile_counts from profile_probability after inlining,
because there is a chance that producing large loop nests may get unrealistically
large profile_count values. This is much less of concern when we switched to
new profile_count representation while back.
This propagation can also compensate for profile inconsistencies caused by
optimization passes. Since inliner is followed by basic cleanup passes that
does not use profile, we get more realistic profile by delaying the recomputation
after basic optimizations exposed by inlininig are finished.
This does not fit into TODO machinery, so I turn rebuilding into stand alone
pass and schedule it before first consumer of profile in the optimization
queue.
I also added logic that avoids repropagating when CFG is good and not too close
to overflow. Propagating visits very basic block loop_depth times, so it is
not linear and avoiding it may help a bit.
On tramp3d we get 14 functions repropagated and 916 are OK. The repropagated
functions are RB tree ones where we produce crazy loop nests by recurisve inlining.
This is something to fix independently.
gcc/ChangeLog:
* passes.cc (execute_function_todo): Remove
TODO_rebuild_frequencies
* passes.def: Add rebuild_frequencies pass.
* predict.cc (estimate_bb_frequencies): Drop
force parameter.
(tree_estimate_probability): Update call of
estimate_bb_frequencies.
(rebuild_frequencies): Turn into a pass; verify CFG profile consistency
first and do not rebuild if not necessary.
(class pass_rebuild_frequencies): New.
(make_pass_rebuild_frequencies): New.
* profile-count.h: Add profile_count::very_large_p.
* tree-inline.cc (optimize_inline_calls): Do not return
TODO_rebuild_frequencies
* tree-pass.h (TODO_rebuild_frequencies): Remove.
(make_pass_rebuild_frequencies): Declare.
projects / thirdparty / gcc.git / log
