Steven G. Kargl [Sat, 4 Nov 2017 17:16:39 +0000 (17:16 +0000)]
re PR fortran/82796 (Private+equivalence in used module breaks compilation of pure function)
2017-11-01 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/82796
* resolve.c (resolve_equivalence): An entity in a common block within
a module cannot appear in an equivalence statement if the entity is
with a pure procedure.
2017-11-01 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/82796
* gfortran.dg/equiv_pure.f90: New test.
Paul Thomas [Wed, 1 Nov 2017 17:24:35 +0000 (17:24 +0000)]
[multiple changes]
2017-11-01 Andre Vehreschild <vehre@gcc.gnu.org>
Paul Thomas <pault@gcc.gnu.org>
PR fortran/78293
* trans-expr.c (gfc_conv_procedure_call): Prepend deallocation
of alloctable components to post, rather than adding to
se->post.
* trans-stmt.c (gfc_trans_allocate): Move deallocation of expr3
allocatable components so that all expr3s are visited.
2017-11-01 Paul Thomas <pault@gcc.gnu.org>
PR fortran/78293
* gfortran.dg/allocatable_function_10.f90: New test.
* gfortran.dg/class_array_15.f03: Increase builtin_free count
from 11 to 12.
Jonathan Wakely [Mon, 23 Oct 2017 17:47:05 +0000 (18:47 +0100)]
Fix path::iterator post-increment and post-decrement
Backport from mainline
2017-10-19 Jonathan Wakely <jwakely@redhat.com>
* include/experimental/bits/fs_path.h (path::iterator++(int))
(path::iterator--(int)): Fix for paths with only one component.
* testsuite/experimental/filesystem/path/itr/traversal.cc: Test
post-increment and post-decrement.
Bill Schmidt [Fri, 20 Oct 2017 21:35:41 +0000 (21:35 +0000)]
backport: rs6000.c (rs6000_gen_le_vsx_permute): Use rotate instead of vec_select for V1TImode.
2017-10-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
2017-03-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_gen_le_vsx_permute): Use rotate
instead of vec_select for V1TImode.
* conifg/rs6000/vsx.md (VSX_LE): Remove mode iterator that is no
longer needed.
(VSX_LE_128): Add V1TI to this mode iterator.
(*vsx_le_perm_load_<mode>): Change to use VSX_D mode iterator.
(*vsx_le_perm_store_<mode>): Likewise.
(pre-reload splitter for VSX stores): Likewise.
(post-reload splitter for VSX stores): Likewise.
(*vsx_xxpermdi2_le_<mode>): Likewise.
(*vsx_lxvd2x2_le_<mode>): Likewise.
(*vsx_stxvd2x2_le_<mode>): Likewise.
Peephole patterns exist in the arm backend to spot load/store
operations to adjacent memory operations in order to convert them into
ldrd/strd instructions. However, when we have strict alignment
enforced, then we can only do this if the accesses are known to be
64-bit aligned; this is unlikely to be the case for most loads. The
patch adds some alignment checking to the code that validates the
addresses for use in the peephole patterns. This should also fix
incorrect generation of ldrd/strd with unaligned accesses that could
previously have occurred on ARMv5e where all such operations must be
64-bit aligned.
I've added some new tests as well. In doing so I discovered that the
ldrd/strd peephole tests could never fail since they would match the
source file name in the scanned assembly as well as any instructions
of the intended type. I've fixed those by tightening the scan results
slightly.
gcc:
* config/arm/arm.c (align_ok_ldrd_strd): New function.
(mem_ok_for_ldrd_strd): New parameter align. Extract the alignment of the
mem into it.
(gen_operands_ldrd_strd): Validate the alignment of the accesses.
testsuite:
* gcc.target/arm/peep-ldrd-1.c: Tighten test scan pattern.
* gcc.target/arm/peep-strd-1.c: Likewise.
* gcc.target/arm/peep-ldrd-2.c: New test.
* gcc.target/arm/peep-strd-2.c: New test.
Jakub Jelinek [Fri, 13 Oct 2017 20:14:34 +0000 (22:14 +0200)]
re PR target/82274 (__builtin_mul_overflow fails to detect overflow for int64_t when compiled with -m32)
PR target/82274
* internal-fn.c (expand_mul_overflow): If both operands have
the same highpart of -1 or 0 and the topmost bit of lowpart
is different, overflow is if res <= 0 rather than res < 0.
* libgcc2.c (__mulvDI3): If both operands have
the same highpart of -1 and the topmost bit of lowpart is 0,
multiplication overflows even if both lowparts are 0.
* gcc.dg/pr82274-1.c: New test.
* gcc.dg/pr82274-2.c: New test.
Andreas Tobler [Tue, 10 Oct 2017 18:47:57 +0000 (20:47 +0200)]
config.gcc: (armv7*-*-freebsd*): New target.
2017-10-10 Andreas Tobler <andreast@gcc.gnu.org>
* config.gcc: (armv7*-*-freebsd*): New target.
Define TARGET_FREEBSD_ARMv7
* config/arm/freebsd.h: Use TARGET_FREEBSD_ARMv7 to define the
default cpu for armv7*-*-freebsd*.
Bill Schmidt [Mon, 2 Oct 2017 18:09:20 +0000 (18:09 +0000)]
backport: re PR tree-optimization/82337 (ICE: SSA corruption at tree-ssa-coalesce.c:1010)
[gcc]
2017-10-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
2017-09-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR tree-optimization/82337
* gimple-ssa-strength-reduction.c (find_phi_def): Don't record a
phi definition if the PHI result appears in an abnormal PHI.
(find_basis_for_base_expr): Don't record a basis if the LHS of the
basis appears in an abnormal PHI.
[gcc]
2017-10-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
2017-09-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR tree-optimization/82337
* gcc.c-torture/compile/pr82337.c: New file.
Alan Modra [Thu, 21 Sep 2017 12:57:24 +0000 (22:27 +0930)]
PR81996, __builtin_return_address(0) fails
rs6000_return_addr assumes that the stack link is at frame+0, which is
true for count>0. For count==0, rs6000_return_addr is called with
frame==frame_pointer_rtx and the stack link is *not* at frame+0 if
-fstack-protector-all or -fsanitize=address because rs6000.h sets
FRAME_GROWS_DOWNWARD for those options.
PR target/81996
* gcc/config/rs6000/rs6000.c (rs6000_return_addr): Use
stack_pointer_rtx for count 0. Update comments. Break up
large rtl expression.
As described in PR71951, if libgcc is built with -fomit-frame-pointer,
unwinding crashes, for example while doing a backtrace. The underlying
reason is the Dwarf unwinder does not setup the frame pointer register
in the initialization code. When later unwinding a function that uses
the frame pointer, it tries to read FP using _Unwind_GetGR, and this
crashes if has never restored FP. To unwind correctly the first frame
must save and restore FP (it is unwound in a special way so that it
uses SP instead of FP). This is done by adding -fno-omit-frame-pointer.
i386.c (fold_builtin_cpu): Add M_AMDFAM17H to processor_model and "amdfam17h" to arch_names_table.
* config/i386/i386.c (fold_builtin_cpu): Add M_AMDFAM17H
to processor_model and "amdfam17h" to arch_names_table.
* doc/extend.texi (__builtin_cpu_is): Document amdfam17h CPU name.
Richard Biener [Mon, 18 Sep 2017 11:07:50 +0000 (11:07 +0000)]
backport: [multiple changes]
2017-09-18 Richard Biener <rguenther@suse.de>
Backport from mainline
2017-08-28 Richard Biener <rguenther@suse.de>
PR tree-optimization/81977
* tree-ssa-sccvn.c (vn_reference_lookup_3): Fix look through
memcpy.
* g++.dg/torture/pr81977.C: New testcase.
2017-09-04 Richard Biener <rguenther@suse.de>
PR tree-optimization/82084
* fold-const.h (can_native_encode_string_p): Declare.
* fold-const.c (can_native_encode_string_p): Factor out from ...
(native_encode_string): ... here.
* tree-vect-stmts.c (vectorizable_store): Call it to avoid
vectorizing stores from constants we later cannot handle.
* g++.dg/torture/pr82084.C: New testcase.
2017-07-25 Richard Biener <rguenther@suse.de>
PR middle-end/81505
* fold-const.c (fold_negate_const): TREE_OVERFLOW should be
sticky.
Jakub Jelinek [Fri, 15 Sep 2017 21:40:51 +0000 (23:40 +0200)]
backport: re PR target/82112 (internal compiler error: in fold_convert_loc, at fold-const.c:2262)
Backported from mainline
2017-09-12 Jakub Jelinek <jakub@redhat.com>
PR target/82112
* c-common.c (sync_resolve_size): Instead of c_dialect_cxx ()
assertion check that in the condition.
(get_atomic_generic_size): Likewise. Before testing if parameter
has pointer type, if it has array type, call for C++
default_conversion to perform array-to-pointer conversion.
* c-c++-common/pr82112.c: New test.
* gcc.dg/pr82112.c: New test.
Jakub Jelinek [Fri, 15 Sep 2017 21:34:10 +0000 (23:34 +0200)]
backport: re PR middle-end/81052 (ICE in verify_dominators, at dominance.c:1184)
Backported from mainline
2017-08-03 Jakub Jelinek <jakub@redhat.com>
PR middle-end/81052
* omp-low.c (diagnose_sb_0): Handle flag_openmp_simd like flag_openmp.
(pass_diagnose_omp_blocks::gate): Enable also for flag_openmp_simd.
Backported from mainline
2017-07-27 Jakub Jelinek <jakub@redhat.com>
PR c/45784
* c-omp.c (c_finish_omp_for): If the condition is wrapped in
rhs of COMPOUND_EXPR(s), skip them and readd their lhs into
new COMPOUND_EXPRs around the rhs of the comparison.
* testsuite/libgomp.c/pr45784.c: New test.
* testsuite/libgomp.c++/pr45784.C: New test.
Jakub Jelinek [Fri, 15 Sep 2017 21:32:05 +0000 (23:32 +0200)]
backport: re PR target/81766 (ICE in maybe_add_or_update_dep_1, at sched-deps.c:924 caused by r250815)
Backported from mainline
2017-08-08 Richard Biener <rguenther@suse.de>
PR middle-end/81766
* function.c (thread_prologue_and_epilogue_insns): Restore
behavior of always calling find_many_sub_basic_blocks on
the inserted prologue.
* gcc.target/i386/pr81766.c: New testcase.
2017-08-02 Jakub Jelinek <jakub@redhat.com>
PR middle-end/79499
* function.c (thread_prologue_and_epilogue_insns): Determine blocks
for find_many_sub_basic_blocks bitmap by looking up BLOCK_FOR_INSN
of first NONDEBUG_INSN_P in each of the split_prologue_seq and
prologue_seq sequences - if any.
Jakub Jelinek [Fri, 15 Sep 2017 21:30:04 +0000 (23:30 +0200)]
backport: re PR target/81225 (ICE with -mavx512ifma -O3 -ffloat-store)
Backported from mainline
2017-06-30 Jakub Jelinek <jakub@redhat.com>
PR target/81225
* config/i386/sse.md (vec_extract_lo_<mode><mask_name>): For
V8FI, V16FI and VI8F_256 iterators, use <store_mask_predicate> instead
of nonimmediate_operand and <store_mask_constraint> instead of m for
the input operand. For V8FI iterator, always split if input is a MEM.
For V16FI and V8SF_256 iterators, don't test if both operands are MEM
if <mask_applied>. For VI4F_256 iterator, use <store_mask_predicate>
instead of register_operand and <store_mask_constraint> instead of v for
the input operand. Make sure both operands aren't MEMs for if not
<mask_applied>.
Martin Liska [Fri, 15 Sep 2017 09:21:42 +0000 (11:21 +0200)]
Backport r251530
2017-09-15 Martin Liska <mliska@suse.cz>
Backport from mainline
2017-08-30 Martin Liska <mliska@suse.cz>
PR inline-asm/82001
* ipa-icf-gimple.c (func_checker::compare_tree_list_operand):
Rename to ...
(func_checker::compare_asm_inputs_outputs): ... this function.
(func_checker::compare_gimple_asm): Use the function to compare
also ASM constrains.
* ipa-icf-gimple.h: Rename the function.
2017-09-15 Martin Liska <mliska@suse.cz>
Backport from mainline
2017-08-30 Martin Liska <mliska@suse.cz>
PR inline-asm/82001
* gcc.dg/ipa/pr82001.c: New test.
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