PR fortran/95881 - ICE in resolve_symbol, at fortran/resolve.c:15175

Avoid NULL pointer dereference.

gcc/fortran/
PR fortran/95881
* resolve.c (resolve_symbol): Avoid NULL pointer dereference.

(cherry picked from commit 3cbc0fb39c84ae0a51a9a88649dccd105bf17d6e)

Daily bump.

PR fortran/95826 - Buffer overflows with PDTs and long symbols

With PDTs (parameterized derived types), name mangling results in variably
long internal symbols.  Use a dynamic buffer instead of a fixed-size one.

gcc/fortran/
PR fortran/95826
* decl.c (gfc_match_decl_type_spec): Replace a fixed size
buffer by a pointer and reallocate if necessary.

(cherry picked from commit 35a335a159216548fc77263ac5df71ff29d3f448)

PR fortran/95828 - Buffer overflows with SELECT RANK

With SELECT RANK, name mangling results in long internal symbols that
overflows internal buffers.  Fix that.

gcc/fortran/
PR fortran/95828
* match.c (select_rank_set_tmp): Enlarge internal buffer used in
generating a mangled name.
* resolve.c (resolve_select_rank): Likewise.

(cherry picked from commit 77d455ee81ec3a23f8b20259a31ab963716f8e82)

d: Fix ICE during error recovery in semantic pass

Fixes a regression caused by an incomplete backport of converting the
Expression semantic pass to a Visitor.

gcc/d/ChangeLog:

PR d/95250
* dmd/expressionsem.c (class ExpressionSemanticVisitor): Return early
if error occurred during semantic of DivExp.

gcc/testsuite/ChangeLog:

PR d/95250
* gdc.dg/pr95250.d: New test.

(cherry picked from commit 1d19c9cd3dd99ba8885c0fc93223918399f73939)

d: Fix ICE in uda_attribute_p when looking up unknown attribute

The target attribute table is not guaranteed to be set in all backends.

gcc/d/ChangeLog:

PR d/95173
* d-attribs.cc (uda_attribute_p): Don't search target attribute table
if NULL.

gcc/testsuite/ChangeLog:

PR d/95173
* gdc.dg/pr95173.d: New test.

(cherry picked from commit 62e02c8729a75c4a859edc18e0bcafb87d717f46)

Daily bump.

PR fortran/95827 - Buffer overflows with submodules and coarrays

With submodules and coarrays, name mangling results in long internal
symbols.  Enlarge internal buffer.

gcc/fortran/
PR fortran/95827
* iresolve.c (gfc_get_string): Enlarge internal buffer used in
generating the mangled name.

(cherry picked from commit a16d0924f18046704ef9a4b6d9593718594677f1)

coroutines: Add a cleanup expression for g-r-o when needed [PR95477].

The PR reports that we fail to destroy the object initially created from
the get-return-object call.  Fixed by adding a cleanup when the DTOR is
non-trivial.  In addition, to meet the specific wording that the call to
get_return_object creates the glvalue for the return, we must construct
that in-place in the return object to avoid a second copy/move CTOR.

gcc/cp/ChangeLog:

PR c++/95477
* coroutines.cc (morph_fn_to_coro): Apply a cleanup to
the get return object when the DTOR is non-trivial.

gcc/testsuite/ChangeLog:

PR c++/95477
* g++.dg/coroutines/pr95477.C: New test.
* g++.dg/coroutines/void-gro-non-class-coro.C: New test.

(cherry picked from commit 788b962aa00959e861b45767c5c88ec41ca30c21)

x96: Remove PTA_CLWB from PTA_ICELAKE_CLIENT

CLWB isn't supported on Ice Lake client.  But Ice Lake server and Tiger
Lake support it.  Move PTA_CLWB to PTA_ICELAKE_SERVER and PTA_TIGERLAKE.

PR target/95874
* config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
(PTA_ICELAKE_SERVER): Add PTA_CLWB.
(PTA_TIGERLAKE): Add PTA_CLWB.

(cherry picked from commit c422e5f81f42a0fc197f0715f4fcd81f1be90bff)

Daily bump.

rs6000: Add MMA built-in function definitions and test cases

Add the Matrix-Multiply Assist (MMA) built-ins.  The MMA accumulators are
INOUT operands for most MMA instructions, but they are also very expensive
to move around.  For this reason, we have implemented a built-in API where
the accumulators are passed using pass-by-reference/pointers, so the user
won't use one accumulator as input and another as output, which wouldentail
a lot of copies.  However, using pointers gives us poor code generation
when we expand the built-ins at normal expand time.  We therefore expand
the MMA built-ins early into gimple, converting the pass-by-reference calls
to an internal built-in that uses pass-by-value calling convention, where
we can enforce the input and output accumulators are the same.  This gives
us much better code generation.

2020-06-20  Peter Bergner  <bergner@linux.ibm.com>

gcc/
* config/rs6000/predicates.md (mma_assemble_input_operand): New.
* config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
built-in functions.
(ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
* config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
Allow zero constants.
(print_operand) <case 'A'>: New output modifier.
(rs6000_split_multireg_move): Add support for inserting accumulator
priming and depriming instructions.  Add support for splitting an
assemble accumulator pattern.
* config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
rs6000_gimple_fold_mma_builtin): New functions.
(RS6000_BUILTIN_M): New macro.
(def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
(bdesc_mma): Add new MMA built-in support.
(htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
(rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
RS6000_BTM_MMA.
(rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
(rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
and rs6000_gimple_fold_mma_builtin.
(rs6000_expand_builtin): Call mma_expand_builtin.
Use RS6000_BTC_OPND_MASK.
(rs6000_init_builtins): Adjust comment.  Call mma_init_builtins.
(htm_init_builtins): Use RS6000_BTC_OPND_MASK.
(builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
VSX_BUILTIN_XVCVBF16SP.
* config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
(RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
* config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
(UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
(MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
MMA_AVVI4I4I4): New define_int_iterator.
(acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
avvi4i4i4): New define_int_attr.
(*movpxi): Add zero constant alternative.
(mma_assemble_pair, mma_assemble_acc): New define_expand.
(*mma_assemble_acc): New define_insn_and_split.
(mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
* config/rs6000/rs6000.md (define_attr "type"): New type mma.
* config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
(UNSPEC_VSX_XVCVSPBF16): Likewise.
(XVCVBF16): New define_int_iterator.
(xvcvbf16): New define_int_attr.
(vsx_<xvcvbf16>): New define_insn.
* doc/extend.texi: Document the mma built-ins.

gcc/testsuite/
* gcc.target/powerpc/mma-builtin-1.c: New test.
* gcc.target/powerpc/mma-builtin-2.c: New test.
* gcc.target/powerpc/mma-builtin-3.c: New test.
* gcc.target/powerpc/mma-builtin-4.c: New test.
* gcc.target/powerpc/mma-builtin-5.c: New test.
* gcc.target/powerpc/mma-builtin-6.c: New test.

(cherry picked from commit 8ee2640bfdc62f835ec9740278f948034bc7d9f1)

rs6000: Backport u8bit_cint_operand predicate

Backport from master.

2020-05-11  Kelvin Nilsen  <wschmidt@linux.ibm.com>

gcc/
* config/rs6000/predicates.md (u8bit_cint_operand): New predicate.

rs6000: Add base support and types for defining MMA built-ins

Add the new -mmma option as well as the initial MMA support, which includes
the target specific __vector_pair and __vector_quad types, the POImode and
PXImode partial integer modes they are mapped to, and their associated
move patterns.  Support for the restrictions on the registers these modes
can be assigned to as also been added.

2020-06-20  Peter Bergner  <bergner@linux.ibm.com>
    Michael Meissner  <meissner@linux.ibm.com>

gcc/
* config/rs6000/mma.md: New file.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
__MMA__ for mma.
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
for __vector_pair and __vector_quad types.
* config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
OPTION_MASK_MMA.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
(POI, PXI): New partial integer modes.
* config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
(rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
(rs6000_hard_regno_mode_ok_uncached): Likewise.
Add support for POImode being allowed in VSX registers and PXImode
being allowed in FP registers.
(rs6000_modes_tieable_p): Adjust comment.
Add support for POImode and PXImode.
(rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
(rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
Set up appropriate addr_masks for vector pair and vector quad addresses.
(rs6000_init_hard_regno_mode_ok): Add support for vector pair and
vector quad registers.  Setup reload handlers for POImode and PXImode.
(rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
(rs6000_option_override_internal): Error if -mmma is specified
without -mcpu=future.
(rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
(quad_address_p): Change size test to less than 16 bytes.
(reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
and vector quad instructions.
(avoiding_indexed_address_p): Likewise.
(rs6000_emit_move): Disallow POImode and PXImode moves involving
constants.
(rs6000_preferred_reload_class): Prefer VSX registers for POImode
and FP registers for PXImode.
(rs6000_split_multireg_move): Support splitting POImode and PXImode
move instructions.
(rs6000_mangle_type): Adjust comment.  Add support for mangling
__vector_pair and __vector_quad types.
(rs6000_opt_masks): Add entry for mma.
(rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
(rs6000_function_value): Use VECTOR_ALIGNMENT_P.
(address_to_insn_form): Likewise.
(reg_to_non_prefixed): Likewise.
(rs6000_invalid_conversion): New function.
* config/rs6000/rs6000.h (MASK_MMA): Define.
(BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
(VECTOR_ALIGNMENT_P): New helper macro.
(ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
(RS6000_BTM_MMA): Define.
(RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
(rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
RS6000_BTI_vector_quad.
(vector_pair_type_node): New.
(vector_quad_type_node): New.
* config/rs6000/rs6000.md: Include mma.md.
(define_mode_iterator RELOAD): Add POI and PXI.
* config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
* config/rs6000/rs6000.opt (-mmma): New.
* doc/invoke.texi: Document -mmma.

(cherry picked from commit f002c046e37d0027513af5297d9259e1fad29c27)

c++: Fix ICE with using and virtual function. [PR95719]

conversion_path points to the base where we found the using-declaration, not
where the function is actually a member; look up the actual base.  And then
maybe look back to the derived class if the base is primary.

gcc/cp/ChangeLog:

PR c++/95719
* call.c (build_over_call): Look up the overrider in base_binfo.
* class.c (lookup_vfn_in_binfo): Look through BINFO_PRIMARY_P.

gcc/testsuite/ChangeLog:

PR c++/95719
* g++.dg/tree-ssa/final4.C: New test.

(cherry picked from commit 7d6baf68fe22b6ef5b1d6fabbef97c0e1b4d7abf)

libstdc++: Fix std::from_chars to ignore leading zeros in base 2

The parser for binary numbers returned an error if the entire string
contains more digits than the result type. Leading zeros should be
ignored.

libstdc++-v3/ChangeLog:

* include/std/charconv (__from_chars_binary): Ignore leading zeros.
* testsuite/20_util/from_chars/1.cc: Check "0x1" for all bases,
not just 10 and 16.
* testsuite/20_util/from_chars/3.cc: New test.

(cherry picked from commit eb0ff770e29715deb8b2e6f5da736e0c1e8f8d07)

libstdc++: Fix warnings with -Wsystem-headers

libstdc++-v3/ChangeLog:

* include/bits/stl_algobase.h (__find_if): Add FALLTHRU markers.
* include/std/charconv (__detail::__to_chars): Avoid
-Wsign-compare warning.

(cherry picked from commit 25920dd18ad12ea501309b1487366e22f35db631)

libstdc++: Fix std::to_chars buffer overflow (PR 95851)

The __detail::__to_chars_2 function assumes it won't be called with zero
values. However, when the output buffer is empty the caller doesn't
handle zero values correctly, and calls __to_chars_2 with a zero value,
resulting in an overflow of the empty buffer.

The __detail::__to_chars_i function should just return immediately for
an empty buffer, and otherwise ensure zero values are handled properly.

libstdc++-v3/ChangeLog:

PR libstdc++/95851
* include/std/charconv (__to_chars_i): Check for zero-sized
buffer unconditionally.
* testsuite/20_util/to_chars/95851.cc: New test.

(cherry picked from commit be50843754b4c4d47f0d628a84b3dbf2a4145a43)

tree-optimization/95717 - fix SSA update for vectorizer epilogue

This fixes yet another issue with the custom SSA updating in the
vectorizer when we copy from the non-if-converted loop.  We must
not mess with current defs before we updated the BB copies.

2020-06-17  Richard Biener  <rguenther@suse.de>

PR tree-optimization/95717
* tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
Move BB SSA updating before exit/latch PHI current def copying.

* g++.dg/torture/pr95717.C: New testcase.

(cherry picked from commit d0909f5858ad81e6d8b73fa6193be19cb5e6ed7b)

Daily bump.

Make forall statement in testsuite conforming.

The recent patch for dependency checking introduced one failing test
case for pointer assignments in a forall statement.  This test case
was invalid because of an interdependency in a forall statement.
This patch fixes that by removing that dependency.

gcc/testsuite/ChangeLog:

2020-06-23  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/95812
* gfortran.fortran-torture/execute/forall_5.f90: Make forall
statement conforming.

(cherry picked from commit 6f609029c7078fbd29e2f842074e2b99ea099096)

Fix memory corruption with vector and variant record

The problem is that Has_Constrained_Partial_View must be tested on the
base type of the designated type of an allocator.

gcc/ada/ChangeLog:
* gcc-interface/trans.c (gnat_to_gnu) <N_Allocator>: Minor tweaks.
Call Has_Constrained_Partial_View on base type of designated type.

middle-end/95493 - bogus MEM_ATTRS for variable array access

The following patch avoids keeping the inherited MEM_ATTRS when
set_mem_attributes_minus_bitpos is called with a variable ARRAY_REF.
The inherited ones may not reflect the correct offset and neither
does the updated alias-set match the inherited MEM_EXPR.  This all
ends up confusing path-based alias-analysis, causing wrong-code.

The fix is to stop not adopting a MEM_EXPR for certain kinds of
expressions and instead handle everything we can.  There's still
the constant kind trees case which I'm too lazy to look into right
now.  I did refrain from adding SSA_NAME there and instead avoided
calling set_mem_attributes_minus_bitpos when debug expression
expansion ended up expanding a SSA definition RHS which should
already have taken care of setting the appropriate MEM_ATTRS.

It also avoids calling set_mem_attributes on the
DECL_INITIAL of a CONST_DECL which seems pointless since there
cannot be a sensible MEM_EXPR derived from that.  We're overwriting
both other possibly useful info, alias-set and alignment immediately
so the following patch simply removes the call instead of making
the function deal with even more (unexpected) trees that are not
memory accesses.

2020-06-23  Richard Biener  <rguenther@suse.de>

PR middle-end/95493
PR middle-end/95690
* cfgexpand.c (expand_debug_expr): Avoid calling
set_mem_attributes_minus_bitpos when we were expanding
an SSA name.
* emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
ARRAY_REF special-casing, add CONSTRUCTOR to the set of
special-cases we do not want MEM_EXPRs for.  Assert
we end up with reasonable MEM_EXPRs.
* varasm.c (build_constant_desc): Remove set_mem_attributes call.

* g++.dg/torture/pr95493.C: New testcase.
* g++.dg/torture/pr95493-1.C: Likewise.
* gfortran.dg/pr95690.f90: Likewise.

Handle AR_FULL vs. AR_FULL in dependency checking.

Previously, handling of full vs. full references failed to take
AR_FULL vs. AR_FULL into account.  A change in dependency
checking in gcc 10 created a code path that could lead there;
with this patch, this is now correctly handled.

gcc/fortran/ChangeLog:

2020-06-23  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/95812
* dependency.c (ref_same_as_full_array): Handle case of AR_FULL
vs. AR_FULL.

gcc/testsuite/ChangeLog:

2020-06-23  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/95812
* gfortran.dg/dependency_59.f90: New test.

(cherry picked from commit abcde0a658e17dbbabcb396eaae5a3612e07d401)

tree-optimization/95487 - use a truth type for scatter masks

This makes sure to get a truth type for scatter masks even when they
are invariant.

2020-06-03  Richard Biener  <rguenther@suse.de>

PR tree-optimization/95487
* tree-vect-stmts.c (vectorizable_store): Use a truth type
for the scatter mask.

* g++.dg/vect/pr95487.cc: New testcase.

tree-optimization/95308 - really avoid forward propagating of &TMR

This fixes a hole that still allowed forwarding of TARGET_MEM_REF
addresses.

2020-05-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/95308
* tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
test for TARGET_MEM_REFs.

* g++.dg/torture/pr95308.C: New testcase.

c/95141 - fix bogus integer overflow warning

This fixes an integer overflow warning that ultimatively happens because
of TREE_OVERFLOW propagating through transforms and the existing guard
against this,

375           if (TREE_OVERFLOW_P (ret)
376               && !TREE_OVERFLOW_P (op0)
377               && !TREE_OVERFLOW_P (op1))
378             overflow_warning (EXPR_LOC_OR_LOC (expr, input_location,

being insufficient.  Rather than trying to use sth like walk_tree to
exhaustively walk operands (with the possibility of introducing
quadraticness when folding larger expressions recursively) the
following amends the above with an ad-hoc test for a binary op0
with a possibly constant op1.

2020-05-30  Richard Biener  <rguenther@suse.de>

PR c/95141
gcc/c
* c-fold.c (c_fully_fold_internal): Enhance guard on
overflow_warning.

gcc/testsuite
* gcc.dg/pr95141.c: New testcase.

tree-optimization/95133 - avoid abnormal edges in path splitting

When path splitting tries to detect a CFG diamond make sure it
is composed of normal (non-EH, not abnormal) edges.  Otherwise
CFG manipulation later may fail.

2020-05-15  Richard Biener  <rguenther@suse.de>

PR tree-optimization/95133
* gimple-ssa-split-paths.c
(find_block_to_duplicate_for_splitting_paths): Check for
normal edges.

* gcc.dg/pr95133.c: New testcase.

middle-end/95118 - fix printing of denormal zero

This fixes printing a REAL_CST generated from value-numbering
punning some bits to a real which turns out as zero with big
negative exponent.  This causes the loop in real_to_decimal_for_mode to
never terminate.

2020-05-14  Richard Biener  <rguenther@suse.de>

PR middle-end/95118
* real.c (real_to_decimal_for_mode): Make sure we handle
a zero with nonzero exponent.

* gcc.dg/pr95118.c: New testcase.

tree-optimization/95049 - fix not terminating RPO VN iteration

This rejects lattice changes from one constant to another.

2020-05-11  Richard Biener  <rguenther@suse.de>

PR tree-optimization/95049
* tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
between different constants.

* gcc.dg/torture/pr95049.c: New testcase.

middle-end/94964 - avoid EH loop entry with CP_SIMPLE_PREHEADERS

Loop optimizers expect to be able to insert on the preheader
edge w/o splitting it thus avoid ending up with a preheader
that enters the loop via an EH edge (or an abnormal edge).

2020-05-06  Richard Biener  <rguenther@suse.de>

PR middle-end/94964
* cfgloopmanip.c (create_preheader): Require non-complex
preheader edge for CP_SIMPLE_PREHEADERS.

Fortran  : ICE in resolve_fl_procedure PR95708

Now issues an error "Intrinsic procedure 'num_images' not
allowed in PROCEDURE" instead of an ICE.

2020-06-22  Steven G. Kargl  <kargl@gcc.gnu.org>

gcc/fortran/

PR fortran/95708
* intrinsic.c (add_functions): Replace CLASS_INQUIRY with
CLASS_TRANSFORMATIONAL for intrinsic num_images.
(make_generic): Replace ACTUAL_NO with ACTUAL_YES for
intrinsic team_number.
* resolve.c (resolve_fl_procedure): Check pointer ts.u.derived
exists before using it.

2020-06-22  Mark Eggleston  <markeggleston@gcc.gnu.org>

gcc/testsuite/

PR fortran/95708
* gfortran.dg/pr95708.f90: New test.

(cherry picked from commit 647340c92a042e8e6f7d004637f07060dbde49c0)

Daily bump.

Update gcc sv.po.

* sv.po: Update.

c++: Refinements to "more constrained".

P2113 from the last C++ meeting clarified that we only compare constraints
on functions or function templates that have equivalent template parameters
and function parameters.

I'm not currently implementing the complicated handling of reversed
comparison operators here; thinking about it now, it seems like a lot of
complexity to support a very weird usage.  If I write two similar comparison
operators to be distinguished by their constraints, why would I write one
reversed?  If they're two unrelated operators, they're very unlikely to be
similar enough for the complexity to help.  I've started a discussion on the
committee reflector about changing these rules.

This change breaks some greedy_ops tests in libstdc++ that were relying on
comparing constraints on unrelated templates, which seems pretty clearly
wrong, so I'm removing those tests for now.

gcc/cp/ChangeLog:

* call.c (joust): Only compare constraints for non-template
candidates with matching parameters.
* pt.c (tsubst_pack_expansion): Fix getting a type parameter
pack.
(more_specialized_fn): Only compare constraints for candidates with
matching parameters.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/concepts-return-req1.C: Expect error.
* g++.dg/cpp2a/concepts-p2113a.C: New test.
* g++.dg/cpp2a/concepts-p2113b.C: New test.

libstdc++-v3/ChangeLog:

* testsuite/24_iterators/move_iterator/rel_ops_c++20.cc:
Remove greedy_ops tests.
* testsuite/24_iterators/reverse_iterator/rel_ops_c++20.cc:
Remove greedy_ops tests.

c++: implicit operator== adjustments from P2002.

P2002R1, adopted at the February C++ meeting, made several refinements to
the wording for operator<=>.  This implements clarifications in how the
implicit operator== is declared: as a duplicate of the operator<=>, with
only the return type and name changed.  To that end I factored out the
declaration copying from build_clone.  For GCC 10 I'm leaving build_clone
alone, to reduce the chance of non-C++20-mode regressions.

The decl.c changes are a hack to avoid complaining about constraints on a
non-template friend that isn't defined in the class.  In this case the
defaulted comparison operator should be considered defined, but we weren't
setting funcdef_flag properly.  For GCC 11 I fixed it properly.

gcc/cp/ChangeLog:

* cp-tree.h (copy_fndecl_with_name): Declare.
* class.c (copy_fndecl_with_name): Copy from build_clone.
(add_implicitly_declared_members): Add op== to TYPE_FIELDS.
* method.c (implicitly_declare_fn): Use copy_fndecl_with_name.
* decl.c (grokfndecl): Add initialized parm.
(grokdeclarator): Pass it down.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/spaceship-synth9.C: New test.

PR fortran/95707 - ICE in finish_equivalences, at fortran/trans-common.c:1319

With submodules and equivalence declarations, name mangling may result in
long internal symbols overflowing internal buffers.  We now check that
we do not exceed the enlarged buffer sizes.

gcc/fortran/
PR fortran/95707
* gfortran.h (gfc_common_head): Enlarge buffer.
* trans-common.c (gfc_sym_mangled_common_id): Enlarge temporary
buffers, and add check on length on mangled name to prevent
overflow.

(cherry picked from commit 3345e74299687de6144b87c0632018cafd4ccf3b)

PR fortran/95688 - ICE in gfc_get_string, at fortran/iresolve.c:70

With submodules, name mangling of character pointer declarations produces long
internal symbols that overflowed a static internal buffer.  Adjust the buffer
size.

gcc/fortran/
PR fortran/95688
* iresolve.c (gfc_get_string): Enlarge static buffer size.

(cherry picked from commit cd6546ac0e8fb2f4ff2a4bb2db2363ca02bdb7ba)

PR fortran/95687 - ICE in get_unique_hashed_string, at fortran/class.c:508

With submodules and PDTs, name mangling of interfaces may result in long
internal symbols overflowing a previously static internal buffer.  We now
set the buffer size dynamically.

gcc/fortran/
PR fortran/95687
* class.c (get_unique_type_string): Return a string with dynamic
length.
(get_unique_hashed_string, gfc_hash_value): Use dynamic result
from get_unique_type_string instead of static buffer.

(cherry picked from commit ac932bfcd21e9523fa2b880ae8138aef79da7f54)

PR fortran/95689 - ICE in check_sym_interfaces, at fortran/interface.c:2015

With submodules, name mangling of interfaces may result in long internal
symbols overflowing an internal buffer.  We now check that we do not
exceed the enlarged buffer size.

gcc/fortran/
PR fortran/95689
* interface.c (check_sym_interfaces): Enlarge temporary buffer,
and add check on length on mangled name to prevent overflow.

(cherry picked from commit 62c0c0ea7bfb6f8f6b8d767b05120cafb6823da6)

PR fortran/95587 - ICE in gfc_target_encode_expr, at fortran/target-memory.c:362

EQUIVALENCE objects are subject to constraints listed in the Fortran 2018
standard, section 8.10.1.1.  These constraints are to be checked
also for CLASS variables.

gcc/fortran/
PR fortran/95587
* match.c (gfc_match_equivalence): Check constraints on
EQUIVALENCE objects also for CLASS variables.

(cherry picked from commit 5eb947601bdce59f2ff26694327ad173c51c2724)

Enable CET in cross compiler if possible

Don't perform CET run-time check for host when cross compiling.  Instead,
enable CET in cross compiler if possible so that it will run on both CET
and non-CET hosts.

config/

PR bootstrap/94998
* cet.m4 (GCC_CET_HOST_FLAGS): Enable CET in cross compiler if
possible.

libiberty/

PR bootstrap/94998
* configure: Regenerated.

lto-plugin/

PR bootstrap/94998
* configure: Regenerated.

(cherry picked from commit d17cdc17c90ce77cb90c569322c1f241d3530cec)

Daily bump.

coroutines: Update handling and failure for g-r-o-o-a-f [PR95505]

The actual issue is that (in the testcase) std::nothrow is not
available.  So update the handling of the get-return-on-alloc-fail
to include the possibility that std::nothrow might not be
available.

gcc/cp/ChangeLog:

PR c++/95505
* coroutines.cc (morph_fn_to_coro): Update handling of
get-return-object-on-allocation-fail and diagnose missing
std::nothrow.

gcc/testsuite/ChangeLog:

PR c++/95505
* g++.dg/coroutines/pr95505.C: New test.

(cherry picked from commit 445d8da5fbd10e32f8ea470bd9ac02faba8fd718)

Daily bump.

Add missing unit dependence vector in data dependence analysis

Current data dependence analysis misses unit distant vector if DRs in
DDR have the same invariant access functions.  This adds the vector as
the constant access function case.

Also fix typo in testcase.

Backport from master.

2020-06-20  Bin Cheng  <bin.cheng@linux.alibaba.com>

gcc/
PR tree-optimization/94969
* tree-data-ref.c (constant_access_functions): Rename to...
(invariant_access_functions): ...this.  Add parameter.  Check for
invariant access function, rather than constant.
(build_classic_dist_vector): Call above function.
* tree-loop-distribution.c (pg_add_dependence_edges): Add comment.

gcc/testsuite/
PR tree-optimization/94969
* gcc.dg/tree-ssa/pr94969.c: New test.

2020-06-20  Jakub Jelinek  <jakub@redhat.com>

gcc/testsuite/
PR tree-optimization/95110
* gcc.dg/tree-ssa/pr94969.c: Swap scan-tree-dump-not arguments.

Daily bump.

c++: Allow defaulted comparison outside class.

Implementing P2085, another refinement to the operator<=> specification from
the Prague meeting.  It was deemed desirable to be able to have a non-inline
defaulted definition of a comparison operator just like you can with other
defaulted functions.

gcc/cp/ChangeLog:

* method.c (early_check_defaulted_comparison): Allow defaulting
comparison outside class.  Complain if non-member operator isn't a
friend.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/spaceship-friend1.C: New test.
* g++.dg/cpp2a/spaceship-err4.C: Adjust diagnostic.

c++: More P2002 operator<=> refinements.

* Disallow && references.
* Allow empty unions.
* Improve diagnostics for a subobject comparison with
  non-comparison-category type.

gcc/cp/ChangeLog:

* method.c (early_check_defaulted_comparison): Check for &&.
(build_comparison_op): Allow empty union.  Diagnose non-category
type.
(common_comparison_type): Remove handling for non-category type.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/spaceship-ref1.C: New test.
* g++.dg/cpp2a/spaceship-synth-neg4.C: New test.
* g++.dg/cpp2a/spaceship-union1.C: New test.

c++: Fix consteval operator handling.

We were crashing trying to find the CALL_EXPR in the result of a call to a
consteval operator.

gcc/cp/ChangeLog:

* call.c (build_new_op_1): Don't look for a CALL_EXPR when
calling a consteval function.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/consteval17.C: New test.

Introduce flag_cunroll_grow_size for cunroll and avoid enable it at -O2

Currently GIMPLE complete unroller(cunroll) is checking
flag_unroll_loops and flag_peel_loops to see if allow size growth.
Beside affects curnoll, flag_unroll_loops also controls RTL unroler.
To have more freedom to control cunroll and RTL unroller, this patch
introduces flag_cunroll_grow_size.  With this patch, we can control
cunroll and RTL unroller indepently. And enable flag_cunroll_grow_size
only if -funroll-loops or -fpeel-loops or -O3 is specified explicitly.

gcc/ChangeLog
2020-06-19  Jiufu Guo  <guojiufu@linux.ibm.com>

PR target/95018
* common.opt (flag_cunroll_grow_size): New flag.
* toplev.c (process_options): Set flag_cunroll_grow_size.
* tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
Use flag_cunroll_grow_size.
* config/rs6000/rs6000.c (rs6000_option_override_internal):
Override flag_cunroll_grow_size.

Daily bump.

identify lfs prefixed case PR95347

The same problem also arises for plfs where prefixed_load_p()
doesn't recognize it so we get just lfs in the asm output
with an @pcrel address.

Backport from master
2020-06-03  Aaron Sawdey  <acsawdey@linux.ibm.com>

PR target/95347
* config/rs6000/rs6000.c (is_stfs_insn): Rename to
is_lfs_stfs_insn and make it recognize lfs as well.
(prefixed_store_p): Use is_lfs_stfs_insn().
(prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.

Correctly identify stfs if prefixed

Because reg_to_non_prefixed() only looks at the register being used, it
doesn't get the right answer for stfs, which leads to us not seeing
that it has a PCREL symbol ref.  This patch works around this by
introducing a helper function that inspects the insn to see if it is in
fact a stfs. Then if we use NON_PREFIXED_DEFAULT, address_to_insn_form()
can see that it has the PCREL symbol ref.

Backport from master
2020-06-02  Aaron Sawdey  <acsawdey@linux.ibm.com>

PR target/95347
* config/rs6000/rs6000.c (prefixed_store_p): Add special case
for stfs.
(is_stfs_insn): New helper function.

forwprop: simplify_vector_constructor follow-up fix [PR95713]

As the following testcase shows, the exception for the aarch64
vec_pack_trunc_di is not sufficient on x86, the halfvectype
"vectors" have SImode but the x86 vec_pack_trunc_si meant for
the bool bitmasks combines 2x SImode into DImode, while in the
testcase the halfvectype is 1x SImode "vector" with SImode and
result is 2x HImode "vector" with SImode.

Richard Sandiford's reply:
FWIW, since the aarch64 case was only found by inspection and might
not be useful, personally I'd prefer to drop that case after all.

2020-06-18  Jakub Jelinek  <jakub@redhat.com>

PR target/95713
* tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
scalar mode halfvectype other than vector boolean for
VEC_PACK_TRUNC_EXPR.

* gcc.dg/pr95713.c: New test.

(cherry picked from commit 9a875db43cd4210843c480c8df26a1d6624d057d)

[PATCH][GCC] arm: Fix the MVE ACLE vaddq_m polymorphic variants.

Hello,

This patch fixes the MVE ACLE vaddq_m polymorphic variants by modifying the corresponding
intrinsic parameters and vaddq_m polymorphic variant's _Generic case entries in "arm_mve.h"
header file.

2020-06-04  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

gcc/
* config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
arguments.
(__arm_vaddq_m_n_s32): Likewise.
(__arm_vaddq_m_n_s16): Likewise.
(__arm_vaddq_m_n_u8): Likewise.
(__arm_vaddq_m_n_u32): Likewise.
(__arm_vaddq_m_n_u16): Likewise.
(__arm_vaddq_m): Modify polymorphic variant.

gcc/testsuite/
* gcc.target/arm/mve/intrinsics/mve_vaddq_m.c: New test.

(cherry picked from commit dc39db873670bea8d8e655444387ceaa53a01a79)

[PATCH][GCC] arm: Fix MVE scalar shift intrinsics code-gen.

This patch modifies the MVE scalar shift RTL patterns. The current patterns
have wrong constraints and predicates due to which the values returned from
MVE scalar shift instructions are overwritten in the code-gen.

example:
$ cat x.c
int32_t  foo(int64_t acc, int shift)
{
  return sqrshrl_sat48 (acc, shift);
}

Code-gen before applying this patch:
$ arm-none-eabi-gcc -march=armv8.1-m.main+mve -mfloat-abi=hard -O2 -S
$  cat x.s
foo:
   push    {r4, r5}
   sqrshrl r0, r1, #48, r2   ----> (a)
   mov     r0, r4  ----> (b)
   pop     {r4, r5}
   bx      lr

Code-gen after applying this patch:
foo:
   sqrshrl r0, r1, #48, r2
   bx      lr

In the current compiler the return value (r0) from sqrshrl (a) is getting
overwritten by the mov statement (b).
This patch fixes above issue.

2020-06-12  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

gcc/
* config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
and constraint of all the operands.
(mve_sqrshrl_sat<supf>_di): Likewise.
(mve_uqrshl_si): Likewise.
(mve_sqrshr_si): Likewise.
(mve_uqshll_di): Likewise.
(mve_urshrl_di): Likewise.
(mve_uqshl_si): Likewise.
(mve_urshr_si): Likewise.
(mve_sqshl_si): Likewise.
(mve_srshr_si): Likewise.
(mve_srshrl_di): Likewise.
(mve_sqshll_di): Likewise.
* config/arm/predicates.md (arm_low_register_operand): Define.

gcc/testsuite/
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts1.c: New test.
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts2.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts3.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts4.c: Likewise.

(cherry picked from commit 6af598703f919b56f628c496843cdfe6f0cb8276)

Daily bump.

Add 'dg-do run' to 'libgomp.fortran/use_device_ptr-optional-3.f90' [PR94848]

Fix-up for r279858/commit f760c0c77fe350616da9dbeaea16442b0acfb09c "Fortran]
OpenMP/OpenACC – fix more issues with OPTIONAL".

With offloading enabled, we then saw:

    PASS: libgomp.fortran/use_device_ptr-optional-3.f90   -O0  (test for excess errors)
    PASS: libgomp.fortran/use_device_ptr-optional-3.f90   -O0  execution test
    PASS: libgomp.fortran/use_device_ptr-optional-3.f90   -O1  (test for excess errors)
    PASS: libgomp.fortran/use_device_ptr-optional-3.f90   -O1  execution test
    FAIL: libgomp.fortran/use_device_ptr-optional-3.f90   -O2  (test for excess errors)
    UNRESOLVED: libgomp.fortran/use_device_ptr-optional-3.f90   -O2  compilation failed to produce executable
    FAIL: libgomp.fortran/use_device_ptr-optional-3.f90   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  (test for excess errors)
    UNRESOLVED: libgomp.fortran/use_device_ptr-optional-3.f90   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  compilation failed to produce executable
    FAIL: libgomp.fortran/use_device_ptr-optional-3.f90   -O3 -g  (test for excess errors)
    UNRESOLVED: libgomp.fortran/use_device_ptr-optional-3.f90   -O3 -g  compilation failed to produce executable
    FAIL: libgomp.fortran/use_device_ptr-optional-3.f90   -Os  (test for excess errors)
    UNRESOLVED: libgomp.fortran/use_device_ptr-optional-3.f90   -Os  compilation failed to produce executable

 ... due to:

    /tmp/cciVc43I.o:(.gnu.offload_vars+0x10): undefined reference to `A.12.4064'
    [...]

..., but after the recent PR94848, PR95551 changes, that problem is now gone.

libgomp/
PR lto/94848
* testsuite/libgomp.fortran/use_device_ptr-optional-3.f90: Add
'dg-do run'.

(cherry picked from commit 5864930754f63e2dcef9606f2514ae20e80f436e)

hurd: libgcc unwinding support over signal trampolines

libgcc/
* config.host (md_unwind_header) <i[34567]86-*-gnu*>: Set to
'i386/gnu-unwind.h'
* config/i386/gnu-unwind.h: New file.

Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
(cherry picked from commit 5e2eebc80d6eeca24745c27a925afdb64292ed22)

[HSA] Avoid ICE when "HSA does not implement indirect calls"

Made apparent by recent commit dc703151d4f4560e647649506d5b4ceb0ee11e90
"openmp: Implement discovery of implicit declare target to clauses":

    +FAIL: libgomp.c/target-39.c (internal compiler error)
    +FAIL: libgomp.c/target-39.c (test for excess errors)
    +UNRESOLVED: libgomp.c/target-39.c compilation failed to produce executable

This is in a '--enable-offload-targets=[...],hsa' build, with '-foffload=hsa'
enabled (by default).

    during GIMPLE pass: hsagen
    source-gcc/libgomp/testsuite/libgomp.c/target-39.c: In function ‘main._omp_fn.0.hsa.0’:
    source-gcc/libgomp/testsuite/libgomp.c/target-39.c:23:11: internal compiler error: Segmentation fault
       23 |   #pragma omp target map(from:err)
          |           ^~~
    [...]

GDB:

    Program received signal SIGSEGV, Segmentation fault.
    fndecl_built_in_p (node=0x0, name=BUILT_IN_PREFETCH) at [...]/source-gcc/gcc/tree.h:6267
    6267      return (fndecl_built_in_p (node, BUILT_IN_NORMAL)
    (gdb) bt
    #0  fndecl_built_in_p (node=0x0, name=BUILT_IN_PREFETCH) at [...]/source-gcc/gcc/tree.h:6267
    #1  0x0000000000b19739 in gen_hsa_insns_for_call (stmt=stmt@entry=0x7ffff693b200, hbb=hbb@entry=0x2b152c0) at [...]/source-gcc/gcc/hsa-gen.c:5304
    #2  0x0000000000b1aca7 in gen_hsa_insns_for_gimple_stmt (stmt=0x7ffff693b200, hbb=hbb@entry=0x2b152c0) at [...]/source-gcc/gcc/hsa-gen.c:5770
    #3  0x0000000000b1bd21 in gen_body_from_gimple () at [...]/source-gcc/gcc/hsa-gen.c:5999
    #4  0x0000000000b1dbd2 in generate_hsa (kernel=<optimized out>) at [...]/source-gcc/gcc/hsa-gen.c:6596
    #5  0x0000000000b1de66 in (anonymous namespace)::pass_gen_hsail::execute (this=0x2a2aac0) at [...]/source-gcc/gcc/hsa-gen.c:6680
    #6  0x0000000000d06f90 in execute_one_pass (pass=pass@entry=0x2a2aac0) at [...]/source-gcc/gcc/passes.c:2502
    [...]
    (gdb) up
    #1  0x0000000000b19739 in gen_hsa_insns_for_call (stmt=stmt@entry=0x7ffff693b200, hbb=hbb@entry=0x2b152c0) at /home/thomas/tmp/source/gcc/build/track-slim-omp/source-gcc/gcc/hsa-gen.c:5304
    5304          if (fndecl_built_in_p (function_decl, BUILT_IN_PREFETCH))
    (gdb) print function_decl
    $1 = (tree) 0x0
    (gdb) list
    5299      if (!gimple_call_builtin_p (stmt, BUILT_IN_NORMAL))
    5300        {
    5301          tree function_decl = gimple_call_fndecl (stmt);
    5302          /* Prefetch pass can create type-mismatching prefetch builtin calls which
    5303             fail the gimple_call_builtin_p test above.  Handle them here.  */
    5304          if (fndecl_built_in_p (function_decl, BUILT_IN_PREFETCH))
    5305            return;
    5306
    5307          if (function_decl == NULL_TREE)
    5308            {

The problem is present already since 2016-11-23 commit
56b1c60e412fcf1245b4780871553cbdebb956a3 (r242761) "Merge from HSA branch to
trunk", and the fix obvious enough.

gcc/
* hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
NULL_TREE' check earlier.
gcc/testsuite/
* c-c++-common/gomp/hsa-indirect-call-1.c: New file.

(cherry picked from commit 973bce0fb50bbfd91f47238b82b99935525716ad)

PR fortran/95088 - Buffer overflows with PDTs, submodules and long symbols

With PDTs (parameterized derived types) and submodules, name mangling
results in variably long internal symbols.  Instead of using a fixed-size
intermediate buffer, which is actually not really needed, just use a
pointer to strings.

2020-06-14  Harald Anlauf  <anlauf@gmx.de>

gcc/fortran/
PR fortran/95088
* class.c (get_unique_type_string): Replace use of fixed size
buffer by internally passing a pointer to strings.

(cherry picked from commit 3ee9d82484bdc0ae5b1b21f4a3d8ff46d40e36fd)

c++: ICE with IMPLICIT_CONV_EXPR in array subscript [PR95508]

Since r10-7096 convert_like, when called in a template, creates an
IMPLICIT_CONV_EXPR when we're converting to/from array type.

In this test, we have e[f], and we're converting f (of type class A) to
int, so convert_like in build_new_op_1 created the IMPLICIT_CONV_EXPR
that got into cp_build_array_ref which calls maybe_constant_value.  My
patch above failed to adjust this spot to call fold_non_dependent_expr
instead, which can handle codes like I_C_E in a template.  Fixed by
using a new function maybe_fold_non_dependent_expr, which, if the expr
can't be evaluated to a constant, returns the original expression.

gcc/cp/ChangeLog:

PR c++/95508
* constexpr.c (maybe_fold_non_dependent_expr): New.
* cp-tree.h (maybe_fold_non_dependent_expr): Declare.
* typeck.c (cp_build_array_ref): Call maybe_fold_non_dependent_expr
instead of maybe_constant_value.

gcc/testsuite/ChangeLog:

PR c++/95508
* g++.dg/template/conv16.C: New test.

Daily bump.

arm: Fix the MVE ACLE vbicq intrinsics.

Following MVE intrinsic testcases are failing in GCC testsuite.

Directory: gcc.target/arm/mve/intrinsics/
Testcases: vbicq_f16.c, vbicq_f32.c, vbicq_s16.c, vbicq_s32.c, vbicq_s8.c
,vbicq_u16.c, vbicq_u32.c and vbicq_u8.c.

This patch fixes the vbicq intrinsics by modifying the intrinsic parameters
and polymorphic variants in "arm_mve.h" header file.

Backported from mainline
2020-06-04  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

gcc/
* config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
arguments.
(__arm_vbicq_n_s16): Likewise.
(__arm_vbicq_n_u32): Likewise.
(__arm_vbicq_n_s32): Likewise.
(__arm_vbicq): Modify polymorphic variant.

gcc/testsuite/
* gcc.target/arm/mve/intrinsics/vbicq_f16.c: Modify.
* gcc.target/arm/mve/intrinsics/vbicq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vbicq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vbicq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vbicq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vbicq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vbicq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vbicq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vbicq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vbicq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vbicq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vbicq_u8.c: Likewise.

arm: Correct the grouping of operands in MVE vector scatter store intrinsics (PR94735).

The operands in RTL patterns of MVE vector scatter store intrinsics are
wrongly grouped, because of which few vector loads and stores instructions
are wrongly getting optimized out with -O2.

A new predicate "mve_scatter_memory" is defined in this patch, this predicate
returns TRUE on matching: (mem(reg)) for MVE scatter store intrinsics.
This patch fixes the issue by adding define_expand pattern with
"mve_scatter_memory" predicate and calls the corresponding define_insn by
passing register_operand as first argument. This register_operand is extracted
from the operand with "mve_scatter_memory" predicate in define_expand pattern.

Backported from mainline
2020-06-04  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

gcc/
PR target/94735
* config/arm/predicates.md (mve_scatter_memory): Define to
match (mem (reg)) for scatter store memory.
* config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
define_insn to define_expand.
(mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
(mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
(mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
(mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
(mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
(mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
(mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
(mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
(mve_vstrhq_scatter_offset_fv8hf): Likewise.
(mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
(mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
(mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
(mve_vstrwq_scatter_offset_fv4sf): Likewise.
(mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
(mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
(mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
(mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
(mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
(mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
(mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
(mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
stores.
(mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
(mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
(mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
(mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
(mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
(mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
(mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
(mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
(mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
(mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
(mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
(mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
(mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
(mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
(mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
(mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
(mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
(mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
(mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
(mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.

gcc/testsuite/
PR target/94735
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_base.c: New test.
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_base_p.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_offset.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_offset_p.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c:
Likewise.
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c:
Likewise.

arm: Fix unintentional fall throughs in arm.c

This small patch fix some unintentional fall-throughs in
`mve_vector_mem_operand'.

Backported from mainline
2020-05-28  Andrea Corallo  <andrea.corallo@arm.com>

gcc/
* config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
fall-throughs.

arm: Fix the wrong code-gen generated by MVE vector load/store intrinsics (PR94959).

Few MVE intrinsics like vldrbq_s32, vldrhq_s32 etc., the assembler instructions
generated by current compiler are wrong.
eg: vldrbq_s32 generates an assembly instructions `vldrb.s32 q0,[ip]`.
But as per Arm-arm second argument in above instructions must also be a low
register (<= r7). This patch fixes this issue by creating a new predicate
"mve_memory_operand" and constraint "Ux" which allows low registers as arguments
to the generated instructions depending on the mode of the argument. A new constraint
"Ul" is created to handle loading to PC-relative addressing modes for vector
store/load intrinsiscs.
All the corresponding MVE intrinsic generating wrong code-gen as vldrbq_s32
are modified in this patch.

Backported from mainline
2020-05-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

gcc/
PR target/94959
* config/arm/arm-protos.h (arm_mode_base_reg_class): Function
declaration.
(mve_vector_mem_operand): Likewise.
* config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
the load from memory to a core register is legitimate for give mode.
(mve_vector_mem_operand): Define function.
(arm_print_operand): Modify comment.
(arm_mode_base_reg_class): Define.
* config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
* config/arm/constraints.md (Ux): Likewise.
(Ul): Likewise.
* config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
add support for missing Vector Store Register and Vector Load Register.
Add a new alternative to support load from memory to PC (or label) in
vector store/load.
(mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
(mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
mve_memory_operand and also modify the MVE instructions to emit.
(mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
(mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
mve_memory_operand and also modify the MVE instructions to emit.
(mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
mve_memory_operand and also modify the MVE instructions to emit.
(mve_vldrhq_z_fv8hf): Likewise.
(mve_vldrhq_z_<supf><mode>): Likewise.
(mve_vldrwq_fv4sf): Likewise.
(mve_vldrwq_<supf>v4si): Likewise.
(mve_vldrwq_z_fv4sf): Likewise.
(mve_vldrwq_z_<supf>v4si): Likewise.
(mve_vld1q_f<mode>): Modify constriant Us to Ux.
(mve_vld1q_<supf><mode>): Likewise.
(mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
mve_memory_operand.
(mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
mve_memory_operand and also modify the MVE instructions to emit.
(mve_vstrhq_p_<supf><mode>): Likewise.
(mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
mve_memory_operand.
(mve_vstrwq_fv4sf): Modify constriant Us to Ux.
(mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
instructions to emit.
(mve_vstrwq_p_<supf>v4si): Likewise.
(mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
* config/arm/predicates.md (mve_memory_operand): Define.

gcc/testsuite/
PR target/94959
* gcc.target/arm/mve/intrinsics/mve_vector_float2.c: Modify.
* gcc.target/arm/mve/intrinsics/mve_vldr.c: New test.
* gcc.target/arm/mve/intrinsics/mve_vldr_z.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_vstr.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_vstr_p.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_f16.c: Modify.
* gcc.target/arm/mve/intrinsics/vld1q_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vuninitializedq_float.c: Likewise.
* gcc.target/arm/mve/intrinsics/vuninitializedq_float1.c: Likewise.
* gcc.target/arm/mve/intrinsics/vuninitializedq_int.c: Likewise.
* gcc.target/arm/mve/intrinsics/vuninitializedq_int1.c: Likewise.

Co-Authored-By: Andre Vieira <andre.simoesdiasvieira@arm.com>

testsuite: Add offloading_enabled check and use it for xfail (PR95622)

gcc/testsuite/ChangeLog:

PR middle-end/95622
* lib/target-supports.exp (check_effective_target_offloading_enabled):
New.
* c-c++-common/goacc/kernels-alias-ipa-pta-2.c: Use it for xfail.
* c-c++-common/goacc/kernels-alias-ipa-pta-4.c: Likewise.
* c-c++-common/goacc/kernels-alias-ipa-pta.c: Likewise.

Reviewed-by: Thomas Schwinge <thomas@codesourcery.com>
(cherry picked from commit e70fbee1a3dd9fdeb661366dbf3096d76c4e2d6e)

Daily bump.

amdgcn: use unsigned extend for lshiftrt

This fixes a wrong-code logic error in a previous patch.
Detected by gcc.c-torture/execute/pr53645-2.c.

gcc/
* config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.

(cherry picked from commit b8db70e1f1cea312888470e1911c7b5e32333c61)

openmp: ensure variables in offload table are streamed out (PRs 94848 + 95551)

gcc/ChangeLog:

* omp-offload.c (add_decls_addresses_to_decl_constructor,
omp_finish_file): With in_lto_p, stream out all offload-table
items even if the symtab_node does not exist.

(cherry picked from commit bf4ab2689bb586971d5b2ab6b13d078cd7ac45af)

openmp: ensure variables in offload table are streamed out (PRs 94848 + 95551)

gcc/ChangeLog:

PR lto/94848
PR middle-end/95551
* omp-offload.c (add_decls_addresses_to_decl_constructor,
omp_finish_file): Skip removed items.
* lto-cgraph.c (output_offload_tables): Likewise; set force_output
to this node for variables and functions.

libgomp/ChangeLog:

PR lto/94848
PR middle-end/95551
* testsuite/libgomp.fortran/target-var.f90: New test.

(cherry picked from commit 1c0fdaf79e3618fd7512608a2e5c62b6b306e9e8)

Daily bump.

coroutines: Handle lambda closure pointers like 'this'.

It was agreed amongst the implementors that the correct
interpretation of the standard is that lambda closure pointers
should be treated in the same manner as class object pointers.

gcc/cp/ChangeLog:

* coroutines.cc (instantiate_coro_traits): Pass a reference
to lambda closure objects to traits instantiation.
(morph_fn_to_coro): Likewise for promise parameter
preview and allocator lookup.

(cherry picked from commit 1c140cfbfa4b465a29ef26f1fdfef04c671e3c9c)

PR fortran/95544 - Fix ICE in NULL() argument to intrinsics

Fortran 2018: An argument to an intrinsic procedure other than ASSOCIATED,
NULL, or PRESENT shall be a data object.  An EXPR_NULL is not a data
object.  Add checks for intrinsics.

2020-06-11  Steven G. Kargl  <kargl@gcc.gnu.org>
    Harald Anlauf  <anlauf@gmx.de>

gcc/fortran/
PR fortran/95544
* check.c (invalid_null_arg): Rename to gfc_invalid_null_arg.
(gfc_check_associated, gfc_check_kind, gfc_check_merge)
(gfc_check_shape, gfc_check_size, gfc_check_spread)
(gfc_check_transfer): Adjust.
(gfc_check_len_lentrim, gfc_check_trim): Check for NULL() argument.
* gfortran.h: Declare gfc_invalid_null_arg ().
* intrinsic.c (check_arglist): Check for NULL() argument.

(cherry picked from commit 7fd614ee818983274eb5e47cbb8ec68b20994963)

PR fortran/93366 - ICE on invalid, reject invalid use of NULL() as argument

gcc/fortran/ChangeLog:

2020-05-05  Steve Kargl  <kargl@gcc.gnu.org>
    Harald Anlauf  <anlauf@gmx.de>

PR fortran/93366
* check.c (gfc_check_associated, invalid_null_arg): Factorize
check for presence of invalid NULL() argument.
(gfc_check_kind, gfc_check_merge, gfc_check_shape)
(gfc_check_sizeof, gfc_check_spread, gfc_check_transfer): Use this
check for presence of invalid NULL() arguments.

gcc/testsuite/ChangeLog:

2020-05-05  Harald Anlauf  <anlauf@gmx.de>

PR fortran/93366
* gfortran.dg/pr93366.f90: New test.

(cherry picked from commit 5a26ea7e0f8b9a00a2eb0a5e8f70efa04056f167)

PR fortran/95503 - Fix ICE in gfc_is_simply_contiguous, at fortran/expr.c:5844

The check for assigning a pointer that cannot be determined to be simply
contiguous at compile time to a contiguous pointer does not need to be
invoked if the lhs of the assignment is known to have conflicting attributes.

2020-06-11  Harald Anlauf  <anlauf@gmx.de>

gcc/fortran/
PR fortran/95503
* expr.c (gfc_check_pointer_assign): Skip contiguity check of rhs
of pointer assignment if lhs cannot be simply contiguous.

gcc/testsuite/
PR fortran/95503
* gfortran.dg/pr95503.f90: New test.

(cherry picked from commit 87af4f40453a9c84363bde5d9a58466de7fbee2e)

When avoiding double deallocation, look at namespace, expression and component.

Our finalization handling is a mess.  Really, we should get to try and get
this fixed for gcc 11.

In the meantime, here is a patch which fixes a regression I introduced
when fixing a regression with a memory leak.  The important thing
here is to realize that we do not need to finalize (and deallocate)
multiple times for the same expression and the same component
in the same namespace.  It might cause code size regressions, but
better big code than wrong code...

Backported from r11-1296-g1af22e455584ef5fcad2b4474c1efc3fd26f6cb3 .

gcc/fortran/ChangeLog:

PR fortran/94109
* class.c (finalize_component): Return early if finalization has
already happened for expression and component within namespace.
* gfortran.h (gfc_was_finalized): New type.
(gfc_namespace): Add member was_finalzed.
(gfc_expr): Remove finalized.
* symbol.c (gfc_free_namespace): Free was_finalized.

gcc/testsuite/ChangeLog:

PR fortran/94109
* gfortran.dg/finalize_34.f90: Adjust free counts.
* gfortran.dg/finalize_36.f90: New test.

c++: Fix initlist-array12.C

* g++.dg/cpp0x/initlist-array12.C: Fix the definition of
initializer_list for ilp32 target.

(cherry picked from commit 4833c1adc3c7b125bf1c59e8bd8d802ac3b0d205)

c-family: Fix up MEM_REF printing [PR95580]

The C FE in the MEM_REF printing ICEs if the type of the first argument
(which due to useless pointer conversions can be an arbitrary type) is a
pointer to an incomplete type.  The code just wants to avoid printing a cast
if it is a pointer to single byte elements.

2020-06-09  Jakub Jelinek  <jakub@redhat.com>

PR c/95580
* c-pretty-print.c (c_pretty_printer::unary_expression): Handle the
case when MEM_REF's first argument has type pointer to incomplete type.

* gcc.dg/pr95580.c: New test.

(cherry picked from commit d6dbb71e468d0db561cc9eca99eeaca1efb81c11)

forwprop: Ignore scalar mode vectors in simplify_vector_constructor [PR95528]

As mentioned in the PR, the problem is that at least the x86 backend asumes
that the vec_unpack* and vec_pack* optabs with integral modes are for the
AVX512-ish vector masks rather than for very small vectors done in GPRs.
The only other target that seems to have a scalar mode vec_{,un}pack* optab
is aarch64 as discussed in the PR, so there is also a condition for that.
All other targets have just vector mode optabs.

2020-06-08  Jakub Jelinek  <jakub@redhat.com>

PR target/95528
* tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
type is vector boolean.

* g++.dg/opt/pr95528.C: New test.

(cherry picked from commit 8be374e02761c9d63d2753d71e4bd4874a1577b1)

c++: Try to complete decomp types [PR95328]

Two years ago Paolo has added the
  else if (processing_template_decl && !COMPLETE_TYPE_P (type))
    pedwarn (...);
lines into cp_finish_decomp.  For type dependent decl we punt much earlier,
but even for types which aren't type dependent COMPLETE_TYPE_P might be
false as this testcase shows, so this patch tries to complete_type first
(the reason for writing it that way is that it is then followed by another
else if and if complete_type returns error_mark_node, we shouldn't report
anything, as a bug should have been reported already.

2020-05-28  Jakub Jelinek  <jakub@redhat.com>

PR c++/95328
* decl.c (cp_finish_decomp): Call complete_type before checking
COMPLETE_TYPE_P.

* g++.dg/cpp1z/decomp53.C: New test.

(cherry picked from commit 3d8d5ddb539a5254c7ef83414377f4c74c7701d4)

openmp: Ensure copy ctor for composite distribute parallel for class iterators is instantiated [PR95197]

During gimplification omp_finish_clause langhook is called in several places
to add the language specific info to the clause like what default/copy ctors,
dtors and assignment operators should be used.

Unfortunately, if it refers to some not yet instantiated method, during
gimplification it is too late and the methods will not be instantiated
anymore.  For other cases, the genericizer has code to detect those and
instantiate whatever is needed, this change adds the same for
distribute parallel for class iterators where we under the hood need
a copy constructor for the iterator to implement it.

2020-05-26  Jakub Jelinek  <jakub@redhat.com>

PR c++/95197
* gimplify.c (find_combined_omp_for): Move to omp-general.c.
* omp-general.h (find_combined_omp_for): Declare.
* omp-general.c: Include tree-iterator.h.
(find_combined_omp_for): New function, moved from gimplify.c.

* cp-gimplify.c: Include omp-general.h.
(cp_genericize_r) <case OMP_DISTRIBUTE>: For class iteration
variables in composite distribute parallel for, instantiate copy
ctor of their types.

(cherry picked from commit f1f862aec2c3b93dbd6adfc35b0e1b6034e59c21)

openmp: Fix placement of 2nd+ preparation statement for PHIs in simd clone lowering [PR95108]

For normal stmts, preparation statements are inserted before the stmt, so if we need multiple,
they are in the correct order, but for PHIs we emit them after labels in the entry successor
bb, and we used to emit them in the reverse order that way.

2020-05-14  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/95108
* omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
(ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
entry block if info->after_stmt is NULL, otherwise add after that stmt
and update it after adding each stmt.
(ipa_simd_modify_function_body): Initialize info.after_stmt.

* gcc.dg/gomp/pr95108.c: New test.

(cherry picked from commit d0fb9ffc1b8f3b86bbdf0e915cec2136141b329b)

Fix -fcompare-debug issue in purge_dead_edges [PR95080]

The following testcase fails with -fcompare-debug, the bug used to be latent
since introduction of -fcompare-debug.
The loop at the start of purge_dead_edges behaves differently between -g0
and -g - if the last insn is a DEBUG_INSN, then it skips not just
DEBUG_INSNs but also NOTEs until it finds some other real insn (or bb head),
while with -g0 it will not skip any NOTEs, so if we have
real_insn
note
debug_insn // not present with -g0
then with -g it might remove useless REG_EH_REGION from real_insn, while
with -g0 it will not.

Yet another option would be not skipping NOTE_P in the loop; I couldn't find
in history rationale for why it is done.

2020-05-13  Jakub Jelinek  <jakub@redhat.com>

PR debug/95080
* cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
if the last insn is a note.

* g++.dg/opt/pr95080.C: New test.

(cherry picked from commit 18edc195442291525e04f0fa4d5ef972155117da)

testsuite: Re-add gdc.test prefix in test names (PR testsuite/95575)

gcc/testsuite/ChangeLog:

PR testsuite/95575
* lib/gdc-utils.exp (gdc-do-test): Re-add $subdir link and inclusion
in filename.

(cherry picked from commit 4a557dc45650bbe500276680674afa18d291fdcc)

Daily bump.

coroutines: Make call argument handling more robust [PR95440]

build_new_method_call is supposed to be able to handle a null
arguments list pointer (when the method has no parms).  There
were a couple of places where uses of the argument list pointer
were not defended against NULL.

gcc/cp/ChangeLog:

PR c++/95440
* call.c (add_candidates): Use vec_safe_length() for
testing the arguments list.
(build_new_method_call_1): Use vec_safe_is_empty() when
checking for an empty args list.

gcc/testsuite/ChangeLog:

PR c++/95440
* g++.dg/coroutines/pr95440.C: New test.

(cherry picked from commit a9eec9625ea7165292958be04899b057804192fb)

c++: constrained class template friend [PR93467]

This fixes two issues in our handling of constrained class template
friend declarations.

The first issue is that we fail to set the constraints on the injected
class template declaration during tsubst_friend_class.

The second issue is that the template parameter levels within the parsed
constraints of a class template friend declaration are shifted if the
enclosing class is a template, and this shift leads to spurious
constraint mismatch errors in associate_classtype_constraints if the
friend declaration refers to an already declared class template.

gcc/cp/ChangeLog:

PR c++/93467
* constraint.cc (associate_classtype_constraints): If there is a
discrepancy between the current template depth and the template
depth of the original declaration, then adjust the template
parameter depth within the current constraints appropriately.
* pt.c (tsubst_friend_class): Substitute into and set the
constraints on the injected declaration.

gcc/testsuite/ChangeLog:

PR c++/93467
* g++.dg/cpp2a/concepts-friend6.C: New test.
* g++.dg/cpp2a/concepts-friend7.C: New test.

(cherry picked from commit 11c7261128ad3ee136508703b20e45cbe04f8dd0)

Daily bump.

go.test: update issue4085b.go to version from Go 1.13

This lets the test pass on AIX.

Not updating to master because we get slightly different error messages,
so that is a more complex change.

coroutines: Correct handling of references in parm copies [PR95350].

Adjust to handle rvalue refs the same way as clang, and to correct
the handling of moves when a copy CTOR is present.  This is one area
where we could make things easier for the end-user (as was implemented
before this change), however there needs to be agreement about when the
full statement containing a coroutine call ends (i.e. when the ramp
terminates or when the coroutine terminates).

gcc/cp/ChangeLog:

PR c++/95350
* coroutines.cc (struct param_info): Remove rv_ref field.
(build_actor_fn): Remove specifial rvalue ref handling.
(morph_fn_to_coro): Likewise.

gcc/testsuite/ChangeLog:

PR c++/95350
* g++.dg/coroutines/torture/func-params-08.C: Adjust test to
reflect that all rvalue refs are dangling.
* g++.dg/coroutines/torture/func-params-09-awaitable-parms.C:
Likewise.
* g++.dg/coroutines/pr95350.C: New test.

(cherry picked from commit 88f48e2967ead9be262483618238efa9c7c842ec)

asan: fix RTX emission for ilp32

gcc/ChangeLog:

PR sanitizer/95634
* asan.c (asan_emit_stack_protection): Fix emission for ilp32
by using Pmode instead of ptr_mode.

Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
(cherry picked from commit 8cff672cb9a132d3d3158c2edfc9a64b55292b80)

Add missing store in emission of asan_stack_free.

gcc/ChangeLog:

2020-05-19  Martin Liska  <mliska@suse.cz>

PR sanitizer/94910
* asan.c (asan_emit_stack_protection): Emit
also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
a stack frame.

(cherry picked from commit 8b6731e674c76cb48a417f2eef74ced92a17f469)

Daily bump.

c++: Fix ICE in check_local_shadow with enum [PR95560]

Another indication that perhaps this warning is emitted too early.  We
crash because same_type_p gets a null type: we have an enumerator
without a fixed underlying type and finish_enum_value_list hasn't yet
run.  So check if the type is null before calling same_type_p.

PR c++/95560
* name-lookup.c (check_local_shadow): Check if types are
non-null before calling same_type_p.

* g++.dg/warn/Wshadow-local-3.C: New test.

c++: explicit(bool) malfunction with dependent expression [PR95066]

I forgot to set DECL_HAS_DEPENDENT_EXPLICIT_SPEC_P when merging two
function declarations and as a sad consequence, we never tsubsted
the dependent explicit-specifier in tsubst_function_decl, leading to
disregarding the explicit-specifier altogether, and wrongly accepting
this test.

PR c++/95066
* decl.c (duplicate_decls): Set DECL_HAS_DEPENDENT_EXPLICIT_SPEC_P.

* g++.dg/cpp2a/explicit16.C: New test.

c++: ICE with -Wall and constexpr if [PR94937]

An ICE arises here because we call cp_get_callee_fndecl_nofold in a
template, and we've got a CALL_EXPR whose CALL_EXPR_FN is a BASELINK.
This tickles the INDIRECT_TYPE_P assert in cp_get_fndecl_from_callee.

Fixed by turning the assert into a condition and returning NULL_TREE
in that case.

PR c++/94937
* cvt.c (cp_get_fndecl_from_callee): Return NULL_TREE if the function
type is not INDIRECT_TYPE_P.
* decl.c (omp_declare_variant_finalize_one): Call
cp_get_callee_fndecl_nofold instead of looking for the function decl
manually.

* g++.dg/cpp1z/constexpr-if34.C: New test.
* g++.dg/cpp2a/is-constant-evaluated10.C: New test.

c++: Fix bogus -Wparentheses warning [PR95344]

Since r267272, which added location wrappers, cp_fold loses
TREE_NO_WARNING on a MODIFY_EXPR that finish_parenthesized_expr set, and
that results in a bogus -Wparentheses warning.

I.e., previously we had "b = 1" but now we have "VIEW_CONVERT_EXPR<bool>(b) = 1"
and cp_fold_maybe_rvalue folds away the location wrapper and so we do
2718             x = fold_build2_loc (loc, code, TREE_TYPE (x), op0, op1);
in cp_fold and the flag is lost.

PR c++/95344
* cp-gimplify.c (cp_fold) <case MODIFY_EXPR>: Don't set
TREE_THIS_VOLATILE here.
(cp_fold): Set it here along with TREE_NO_WARNING.

* c-c++-common/Wparentheses-2.c: New test.