Merge tag 'thead-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux into soc/dt
T-HEAD Devicetrees for v6.17
There are several additions for the T-Head TH1520 SoC:
- Add PVT node for thermal sensor which works with the existing Moortec
MR75203 driver.
- Add "gpu-clkgen" reset property to the AON node which allows the power
domain driver to detect the capability to power sequence the GPU.
All of these patches have been tested in linux-next.
Signed-off-by: Drew Fustini <fustini@kernel.org>
* tag 'thead-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux:
riscv: dts: thead: Add PVT node
riscv: dts: thead: th1520: Add GPU clkgen reset to AON node
Merge tag 'v6.17-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New board: FriendlyElec NanoPi M5
Camera support for the PinePhone Pro.
A bunch of cleanups to make DTC happier, fix ordering of DMA uart
channels on rk3528 and some video output enablement as well as some
button definitions.
An interesting tidbit is the reset behaviour addition in that some
boards have specific requirements as to how the PMIC needs to do the
restart. DT-maintainers did not consider the header with helper-constants
as part of the binding, so that header ended up in the Rockchip directory
* tag 'v6.17-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (29 commits)
arm64: dts: rockchip: Add maskrom button to NanoPi R5S + R5C
arm64: dts: rockchip: Drop regulator-compatible property on rk3399
arm64: dts: rockchip: Drop unneeded address+size-cells on px30
arm64: dts: rockchip: Fix LCD panel port on rk3566-pinetab2
arm64: dts: rockchip: Move mipi_out node on rk3399 haikou demo dtso
arm64: dts: rockchip: Simplify mipi_out endpoint on rk3399 RP64 dtso
arm64: dts: rockchip: Simplify edp endpoints on several rk3399 boards
arm64: dts: rockchip: Simplify VOP port definition on rk3328
arm64: dts: rockchip: Move dsi address+size-cells from SoC to rk3399 boards
arm64: dts: rockchip: Move dsi address+size-cells from SoC to px30 boards
arm64: dts: rockchip: Fix UART DMA support for RK3528
arm64: dts: rockchip: Add reset button to NanoPi R5S
arm64: dts: rockchip: Add rtc0 alias for NanoPi R5S + R5C
arm64: dts: rockchip: describe the OV8858 user camera on PinePhone Pro
arm64: dts: rockchip: describe I2c Bus 1 and IMX258 world camera on PinePhone Pro
arm64: dts: rockchip: Fix pinctrl node names for RK3528
arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board
arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Tiger
arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Jaguar
...
ARM: dts: st: spear: Use generic "ethernet" as node name
Common name for Ethernet controllers is "ethernet", not "eth", also
recommended by Devicetree specification in "Generic Names
Recommendation". Verified lack of impact using dtx_diff.
Merge tag 'mvebu-dt-6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt
mvebu dt for 6.17 (part 1)
Use recent scl/sda gpio bindings on kirkwood boards (Keymile ones)
* tag 'mvebu-dt-6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
ARM: dts: marvell: kirkwood: use recent scl/sda gpio bindings
Merge tag 'amlogic-arm64-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM64 DT for v6.17:
- Align wifi node name with bindings
- Add pinctrl nodes for Amlogic S7/S7D/S6 nodes
- Enable the NPU nodes on Alta & VIM3
- New boards:
- Ugoos AM3
* tag 'amlogic-arm64-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
arm64: dts: amlogic: Enable the npu node for Alta and VIM3
dts: arm64: amlogic: add S6 pinctrl node
dts: arm64: amlogic: add S7D pinctrl node
dts: arm64: amlogic: add S7 pinctrl node
arm64: dts: amlogic: Add Ugoos AM3
dt-bindings: arm: amlogic: Add Ugoos AM3
arm64: dts: amlogic: Align wifi node name with bindings
Merge tag 'qcom-arm64-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm64 DeviceTree updates for v6.17
79b896e7da7e arm64: dts: qcom: msm8976-longcheer-l9360: Add initial device tree 6516961352a1 arm64: dts: qcom: Add support for X1-based Asus Zenbook A14
The DB410c D3 camera mezzanine is converted to an overlay.
On MSM8976 SDC2 pinctrl definitions are introduced and BLSP DMA
controller is marked to be managed by another entity.
Add camera subsystem on the QCM2290 platform.
Add and enable remoteproc and related devices on QCS615.
Add and enable Video encoder/decoder on QCS8300 and SA8775P.
Also on SA8775P add CPU OPP tables for scaling DDR/L3 bandwidth based on
CPU frequency, add L3 interconnect definitions, DSI and video
encoder/decoder support.
Enable the SLPI remoteproc on SDM850-based Lenovo Yoga C630.
On SM6350, add the video clock controller, APR and some audio related
services.
Describe the camera subsystem on SM8550 and add Iris video
encoder/decoder node for SM8650.
On SM8750 introduce UFS and Soundwire support, enable these and describe
the sound hardware on MTP and QRD.
Add camera clock controller on SC8180X.
On X Elite, for the Dell XPS13, add WiFi and Bluetooth pwrseq and enable
the fingerprint sensor. For HP Omnibook X14 USB1 SS1 SBU mux and do
some misc cleanup.
Replace the thermal zones inherited from X Elite with X Plus-specific
ones.
Add missing interrupts and clean up unrelated clocks for PCIe
controllers across a variety of platforms.
* tag 'qcom-arm64-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (67 commits)
arm64: dts: qcom: sm8150: Drop unrelated clocks from PCIe hosts
arm64: dts: qcom: sc8180x: Drop unrelated clocks from PCIe hosts
arm64: dts: qcom: x1-asus-zenbook: support sound
arm64: dts: qcom: x1-asus-zenbook: fixup GPU nodes
arm64: dts: qcom: sm6115: add debug UART pins
arm64: dts: qcom: sm8650: add iris DT node
arm64: dts: qcom: msm8976-longcheer-l9360: Add initial device tree
arm64: dts: qcom: msm8976: Add sdc2 GPIOs
dt-bindings: arm: qcom: Add MSM8976 BQ Aquaris X5 Plus
arm64: dts: qcom: msm8976: Make blsp_dma controlled-remotely
arm64: dts: qcom: sa8775p: Correct the interrupt for remoteproc
arm64: dts: qcom: sm8550: Add support for camss
arm64: dts: qcom: qcs615: disable the CTI device of the camera block
arm64: dts: qcom: qcs615-ride: enable remoteprocs
arm64: dts: qcom: qcs615: add ADSP and CDSP nodes
arm64: dts: qcom: qcs615: Add IMEM and PIL info region
arm64: dts: qcom: qcs615: Add mproc node for SEMP2P
arm64: dts: qcom: Add support for X1-based Asus Zenbook A14
arm64: dts: qcom: sc7180: Expand IMEM region
arm64: dts: qcom: sdm845: Expand IMEM region
...
Merge tag 'sunxi-dt-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt
Allwinner device tree changes for 6.17
This branch includes a change shared with the clk tree for adding
the missing PPU0 reset on the A523.
The PM domain DT binding immutable branch is also included, which
brings in v6.16-rc2, as well as PM domain bindings for other platforms.
Other changes include:
- RGB666 LCD pin definitions for the V3s PE pins and V3 PD pins
- node order fixes for the A523 dtsi
- UART1 pin definitions for A523
- Allwinner board DT binding cleanup
- EMAC support on A100/A133
- Enabled on the Liontron H-A133L board
- SID efuse, power controllers and GPU added for A523
- A523 GPU enabled on all existing boards
New boards:
- Xunlong OrangePi 4A with the Allwinner T527 SoC.
* tag 'sunxi-dt-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (21 commits)
arm64: dts: allwinner: a523: enable Mali GPU for all boards
arm64: dts: allwinner: a523: add Mali GPU node
arm64: dts: allwinner: a523: Add power controller device nodes
dt-bindings: power: Add A523 PPU and PCK600 power controllers
arm64: dts: allwinner: A523: Add SID controller node
arm64: dts: allwinner: a133-liontron-h-a133l: Add Ethernet support
arm64: dts: allwinner: a100: Add EMAC support
arm64: dts: allwinner: a100: Add pin definitions for RGMII/RMII
dt-bindings: arm: sunxi: Combine board variants into enums
dt-bindings: power: qcom,rpmpd: document the Milos RPMh Power Domains
arm64: dts: allwinner: t527: Add OrangePi 4A board
arm64: dts: allwinner: a523: Add UART1 pins
arm64: dts: allwinner: a523: Move rgmii0 pins to correct location
arm64: dts: allwinner: a523: Move mmc nodes to correct position
dt-bindings: arm: sunxi: Add Xunlong OrangePi 4A board
ARM: dts: sun8i: v3: Add RGB666 LCD PD pins definition
ARM: dts: sun8i: v3s: Add RGB666 LCD PE pins definition
dt-bindings: reset: sun55i-a523-r-ccu: Add missing PPU0 reset
dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen
dt-bindings: rockchip: pmu: Add compatible for RK3528
...
Merge tag 'qcom-arm32-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm32 DeviceTree updates for v6.17
Add aliases for MMC controllers on MSM8974, enable USB charging on the
Sony Xperia Rhine platform and add new DeviceTree for the Sony Xperia Z
Ultra device.
Tidy up interrupts specifiers on MSM8960, by using macro constants.
* tag 'qcom-arm32-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: msm8974-sony-xperia-rhine: Add alias for mmc0 & mmc1
ARM: dts: qcom: msm8974-hammerhead: Add alias for mmc0
ARM: dts: qcom: msm8974-oneplus-bacon: Add alias for mmc0
ARM: dts: qcom: Add initial support for Sony Xperia Z Ultra (togari)
dt-bindings: arm: qcom: Add Sony Xperia Z Ultra (togari)
ARM: dts: qcom: msm8974-sony-xperia-rhine: Move camera buttons to amami & honami
ARM: dts: qcom: msm8974-sony-xperia-rhine: Enable USB charging
ARM: dts: qcom: msm8960: use macros for interrupts
ARM: dts: qcom: Align wifi node name with bindings
Merge tag 'imx-bindings-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
i.MX dt-bindings changes for 6.17:
- New board compatibles for i.MX28 Amarula, Engicam MicroGEA, GOcontroll
and phyCORE-i.MX 95 Plus FPSC SoM
- A couple of i.MX AIPSTZ bridge related bindings updates from
Laurentiu Mihalcea
* tag 'imx-bindings-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: add imx95-libra-rdk-fpsc
dt-bindings: arm: fsl: support Engicam MicroGEA GTW board
dt-bindings: arm: fsl: support Engicam MicroGEA RMM board
dt-bindings: arm: fsl: support Engicam MicroGEA BMM board
dt-bindings: dsp: fsl,dsp: document 'access-controllers' property
dt-bindings: bus: document the IMX AIPSTZ bridge
dt-bindings: arm: fsl: add i.MX28 Amarula rmm board
dt-bindings: arm: fsl: Add GOcontroll Moduline Display
Merge tag 'imx-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
i.MX ARM device tree changes for 6.17:
- New device trees for Engicam MicroGEA-MX6UL and i.MX28 Amarula board
- A couple of changes from Bence Csókás to replace license text comment
with SPDX identifier for Karo and Gateworks boards
- A couple of imx7s-warp updates from Fabio Estevam to improve Bluetooth
and Wifi description
- A set of dt-schema fixes for VF610 based boards from Frank Li
- A couple of imx6ul-kontron-sl-common changes to add SPI NOR partitions
and correct QSPI NAND node name
- A few other random improvements
* tag 'imx-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (21 commits)
ARM: dts: imx6-gw: Replace license text comment with SPDX identifier
ARM: dts: imx6ul-kontron-sl-common: Fix QSPI NAND node name
ARM: dts: imx6ul-kontron-sl-common: Add SPI NOR partitions
ARM: dts: imx6ul-kontron-bl-common: Fix RTS polarity for RS485 interface
ARM: dts: imx6-karo: Replace license text comment with SPDX identifier
ARM: dts: imx6ul: support Engicam MicroGEA GTW board
ARM: dts: imx6ul: support Engicam MicroGEA RMM board
ARM: dts: imx6ul: support Engicam MicroGEA BMM board
ARM: dts: imx6ul: support Engicam MicroGEA-MX6UL SoM
ARM: dts: mxs: support i.MX28 Amarula rmm board
ARM: dts: imx28: add pwm7 muxing options
ARM: dts: vf: vf610-zii-cfu1: rename node name *-gpio to *-gpios
ARM: dts: vf: vf-colibri-eval-v3: add power-supply for edt,et057090dhu
ARM: dts: vf: rename io-expander@20 to pinctrl@20
ARM: dts: vf: remove redundant layer under iomux
ARM: dts: vf: remove redundant pinctrl-names
ARM: dts: vf: remove reg property for arm pmu
ARM: dts: vfxxx: Correctly use two tuples for timer address
ARM: dts: add ngpios for vf610 compatible gpio controllers
ARM: dts: imx7s-warp: Improve the Wifi description
...
Merge tag 'imx-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
i.MX arm64 device tree changes for 6.17:
- New board support: GOcontroll Moduline based devices, phyCORE-i.MX 95
Plus FPSC SoM and base boards, i.MX93 phycore overlays
- A few i.MX8M changes from Adam Ford to add DMA configuration for
UART2, set up VPU clocks for nominal and overdrive mode, improve
HS400 USDHC clock speed
- Several sets of changes from Alexander Stein to add EASRC support for
tqma8mnql and tqma8mpql board, add missing DMA entries for I2C & LPUART
on ls1043a and ls1046a, enable SFP interface for tqmls1043a and
tqmls1046a, etc.
- A series from Clark Wang to improve Ethernet support for i.MX93,
removing eee-broken-1000t for eqos node, reducing the driving strength
of net RXC/TXC, etc.
- A few i.MX95 and i.MX8Q changes from Frank Li to add missing devices
for EVK board and enable camera support
- A couple of changes from Laurentiu Mihalcea to support WM8962 audio
codec for imx8qxp-mek and imx8qm-mek board
- A number of changes from Shengjiu Wang to improve various audio
support for imx943-evk and imx8mp-evk
- A series from Tim Harvey to increase HS400 USDHC clock speed for
Gateworks i.MX8M Venice devices
- Many other random improvements and cleanups on various boards
Merge tag 'tegra-for-6.17-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Changes for v6.17-rc1
Add support for the Tegra264 SoC and the corresponding engineering
reference hardware (P3971-0089+P3834-0008).
* tag 'tegra-for-6.17-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add p3971-0089+p3834-0008 support
arm64: tegra: Add memory controller on Tegra264
arm64: tegra: Add Tegra264 support
Merge tag 'tegra-for-6.17-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
ARM: tegra: Device tree changes for v6.17-rc1
Add support for two Tegra30 ASUS devices and enable the embedded
controller on Pegatron Chagall.
* tag 'tegra-for-6.17-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: chagall: Add embedded controller node
ARM: tegra: Add device-tree for Asus Portable AiO P1801-T
ARM: tegra: Add device-tree for ASUS VivoTab RT TF600T
Merge tag 'tegra-for-6.17-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Updates for v6.17-rc1
Add Tegra264 compatible strings for some core components and extend
bindings where necessary to accomodate the new hardware generation. Also
document some new platforms, for both old and new chips.
* tag 'tegra-for-6.17-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: arm: tegra: Add Asus Portable AiO P1801-T
dt-bindings: arm: tegra: Add Asus VivoTab RT TF600T
dt-bindings: Add Tegra264 clock and reset definitions
dt-bindings: tegra: Document P3971-0089+P3834-0008 Platform
dt-bindings: rtc: tegra: Document Tegra264 RTC
dt-bindings: dma: Add Tegra264 compatible string
dt-bindings: misc: Document Tegra264 APBMISC compatible
dt-bindings: firmware: Document Tegra264 BPMP
dt-bindings: mailbox: tegra-hsp: Properly sort compatible string list
dt-bindings: mailbox: tegra-hsp: Bump number of shared interrupts
dt-bindings: tegra: pmc: Add Tegra264 compatible
dt-bindings: memory: tegra: Add Tegra264 support
Merge tag 'mtk-dts64-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek ARM64 DeviceTree updates for v6.17
This adds new machines and improves support for already supported
MediaTek SoCs.
In particular:
- New machine: MT8186 Steelix Squirtle Chromebook
- Steelix-Voltorb's two dts are merged in one
...and improvements for already supported SoCs and machines:
- Added reserved memory for AFE DMA for MT8173/83/86/92,
aligning audio related memory allocation between all of
the Chromebook SoCs
- Added second source components for Steelix, and marked the
multiple trackpads for Asurada as such
- MediaTek Genio 1200: Enabled support for the Audio DSP and sound
- MediaTek Genio 510/700/1200: Added support for the PMIC Keys
- MediaTek MT7988: Added Cache Coherent Interconnect for CPU DVFS
- MT7988A-BananaPi-R4: Enabled CCI, added GPIO LEDs
- Airoha EN7581: Added ethernet nodes to Evaluation Board
* tag 'mtk-dts64-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
arm64: dts: mediatek: mt8395-genio-1200-evk: Add MT6359 PMIC key support
arm64: dts: mediatek: mt8390-genio-common: Add Home MT6359 PMIC key support
arm64: dts: mediatek: mt7988a-bpi-r4: add gpio leds
arm64: dts: mediatek: mt7988a-bpi-r4: drop unused pins
arm64: dts: mediatek: mt7988a-bpi-r4: add proc-supply for cci
arm64: dts: mediatek: mt7988: add cci node
dt-bindings: interconnect: add mt7988-cci compatible
arm64: dts: airoha: en7581: Add ethernet nodes to EN7581 SoC evaluation board
arm64: dts: mediatek: mt8192-asurada-spherion: Mark trackpads as fail-needs-probe
arm64: dts: mediatek: mt8186: Add Squirtle Chromebooks
arm64: dts: mediatek: mt8186: Merge Voltorb device trees
arm64: dts: mediatek: mt8186-steelix: Mark second source components for probing
dt-bindings: arm: mediatek: Add MT8186 Squirtle Chromebooks
dt-bindings: arm: mediatek: Merge MT8186 Voltorb entries
arm64: dts: mediatek: mt8395-genio-1200-evk: Enable Audio DSP and sound card
arm64: dts: mediatek: mt8192-asurada: Reserve memory for audio frontend
arm64: dts: mediatek: mt8186-corsola: Reserve memory for audio frontend
arm64: dts: mediatek: mt8183-kukui: Reserve memory for audio frontend
arm64: dts: mediatek: mt8173: Reserve memory for audio frontend
Merge tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.17, round 1
Highlights:
----------
- MPU:
- STM32MP13:
-Add Ethernet MAC adress efuse support.
- STMP32MP15:
- Add stm32mp157f-DK2 board support. This board embedds the same
conectivity devices, DDR ... than stm32mp157c-dk2.
However there are two differences: STM32MP157F SoC which allows
overdrive OPP and the SCMI support for system features like
clocks and regulators.
- STM32MP25:
- Fix tick timer for low power use cases.
- Add timer support.
* tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
arm64: dts: st: remove empty line in stm32mp251.dtsi
arm64: dts: st: fix timer used for ticks
arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver
ARM: dts: stm32: add stm32mp157f-dk2 board support
dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible
ARM: dts: stm32: optee async notif interrupt for MP15 scmi variants
ARM: dts: stm32: use internal regulators bindings for MP15 scmi variants
dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers
ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx
ARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs
ARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx
arm64: defconfig: enable STM32 timers drivers
arm64: dts: st: add timer nodes on stm32mp257f-ev1
arm64: dts: st: add timer pins for stm32mp257f-ev1
arm64: dts: st: add timer nodes on stm32mp251
ARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses
Merge tag 'v6.17-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New boards: ROC-RK3588S-PC, Luckfox Omni3576, Radxa Rock 5T,
Sakura Pi RK3308B - all of them have the used soc in their name.
New overlays: RockPro64 screen, optional Sige5 Wifi/BT module,
ethernet-switch addon for Jaguar.
Added peripherals on rk3528 (spi, power-domain controller, gpu)
and sdio controller on rk3576.
DSI display support for the Gameforce-ACE handheld, a fix for the
cover-detection (closed/open) on the PineNote, camera support for
the Haikou Video Demo overlay on PX30 Ringneck as well as a number
of other newly enabled peripherals on a number of boards.
* tag 'v6.17-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (40 commits)
arm64: dts: rockchip: Enable eMMC HS200 mode on Radxa E20C
arm64: dts: rockchip: Add bluetooth support to ArmSoM Sige7
arm64: dts: rockchip: enable PCIe on ROCK 4D
arm64: dts: rockchip: Enable HDMI receiver on CM3588
arm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 on rk3576
arm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576
arm64: dts: rockchip: add DTs for Firefly ROC-RK3588S-PC
dt-bindings: arm: rockchip: Add Firefly ROC-RK3588S-PC
arm64: dts: rockchip: Enable GPU on Radxa E20C
arm64: dts: rockchip: Add GPU node for RK3528
arm64: dts: rockchip: support camera module on Haikou Video Demo on PX30 Ringneck
arm64: dts: rockchip: add label to first port of ISP on px30
arm64: dts: rockchip: fix endpoint dtc warning for PX30 ISP
arm64: dts: rockchip: Add power controller for RK3528
arm64: dts: rockchip: enable USB on Sige5
arm64: dts: rockchip: add overlay for the WiFi/BT module on Sige5 v1.2
arm64: dts: rockchip: add version-independent WiFi/BT nodes on Sige5
arm64: dts: rockchip: add SDIO controller on RK3576
arm64: dts: rockchip: Enable gpu on rk3576-evb1-v10
arm64: dts: rockchip: Update the PinePhone Pro panel description
...
arm64: dts: nuvoton: npcm8xx: Drop the GIC "ppi-partitions" node
The Arm GIC "ppi-partitions" node is only relevant to GICv3 and makes no
sense for GICv2 implementations which the GIC-400 is. PPIs in GICv2 have
no CPU affinity.
Merge tag 'renesas-dts-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.17 (take two)
- Add support for the Renesas Gray Hawk Single board with R-Car
V4M-7 (R8A779H2),
- Add eMMC and microSD expansion board support for the RZ/V2H and
RZ/V2N EVK development boards,
- Add GPIO keys and Ethernet support for the RZ/G3E SoM and SMARC
Carrier-II EVK development board,
- Add QSPI FLASH support for the RZ/V2H and RZ/V2N SoCs and their EVK
development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable serial NOR FLASH
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable serial NOR FLASH
arm64: dts: renesas: r9a09g057: Add XSPI node
arm64: dts: renesas: r9a09g056: Add XSPI node
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Fix pinctrl node name for GBETH1
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Fix pinctrl node name for GBETH1
arm64: dts: renesas: r8a779g3-sparrow-hawk-fan-pwm: Add missing install target
arm64: dts: renesas: rzg3e-smarc-som: Enable eth{0-1} (GBETH) interfaces
arm64: dts: renesas: r9a09g047e57-smarc: Add gpio keys
arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2H and RZ/V2N EVKs
arm64: dts: renesas: r8a779h2: Add Gray Hawk Single support
arm64: dts: renesas: Add Renesas R8A779H2 SoC support
arm64: dts: renesas: Factor out Gray Hawk Single board support
dt-bindings: clock: renesas,r9a09g056/57-cpg: Add XSPI core clock
Merge tag 'renesas-dt-bindings-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DT binding updates for v6.17 (take two)
- Document support for the Renesas Gray Hawk Single board with R-Car
V4M-7 (R8A779H2).
* tag 'renesas-dt-bindings-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: soc: renesas: Document R-Car V4M-7 Gray Hawk Single
Merge tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.17
1. New SoC - Exynos2200 SoC - with basic nodes, pin controllers,
clock controllers and initial USB support. Add board using it:
Samsung Galaxy S22+ (SM-S906B), called G0S.
3. Google GS101:
- Prepare to switching to architected timer, instead of Exynos MCT as
the primary one.
- Add secondary Maxim MAX77759 PMIC to Pixel boards, managing USB Type-C and
charger.
- Add incomplete description of the primary Samsung S2MPG10 PMIC.
Several bits, like regulators, are still missing, though.
- Add also secondary reboot-mode, via MAX77759 NVMEM.
- Switch the primary (SoC) reboot handler to Google specific
google,gs101-reboot which gives additional GS101 features (cold and
warm reboots).
This change will affect other users of this DTS, but to our
knowledge there is only Android, from which this change originates.
4. Exynos7870:
- Fix speed problems in USB gadget mode.
- Correct memory map to avoid crashes due to secure world.
* tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos7870-j6lte: reduce memory ranges to base amount
arm64: dts: exynos7870-on7xelte: reduce memory ranges to base amount
arm64: dts: exynos7870: add quirk to disable USB2 LPM in gadget mode
arm64: dts: exynos: gs101: switch to gs101 specific reboot
arm64: dts: exynos: gs101-pixel-common: add main PMIC node
arm64: dts: exynos: gs101: ufs: add dma-coherent property
arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-mode
arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-mode
arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC
arm64: dts: exynos5433: Align i2c-gpio node names with dtschema
arm64: dts: exynos: gs101: Add 'local-timer-stop' to cpuidle nodes
arm64: dts: exynosautov920: Add DT node for all SPI ports
arm64: dts: exynosautov920: add CMU_HSI2 clock DT nodes
MAINTAINERS: add entry for Samsung Exynos2200 SoC
arm64: dts: exynos: add initial support for Samsung Galaxy S22+
arm64: dts: exynos: add initial support for exynos2200 SoC
dt-bindings: arm: samsung: document g0s board binding
Merge tag 'dt-vt8500-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
VT8500 DTS ARM changes for v6.17
1. Several dtbs_check cleanups.
2. Add missing cache topology - L2 cache controller on WM8850/WM895.
* tag 'dt-vt8500-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950
ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller
ARM: dts: vt8500: Use generic node name for the SD/MMC controller
ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size
ARM: dts: vt8500: Add node address and reg in CPU nodes
Both the R5S and R5C have a MASKROM button connected via saradc.
For both the R5S as the R5C it's described on page 9 of their
respective schematic, identified as 'Recovery'.
arm64: dts: rockchip: Drop unneeded address+size-cells on px30
On nodes with compatible "rockchip,px30-usb2phy-grf", the #address-cells
and #size-cells are required and consequently their child nodes should
have unit addresses. That is not the case for the px30-pmugrf and
px30-grf nodes, so remove them there.
This fixes the following DTB validation warnings:
unnecessary #address-cells/#size-cells without "ranges",
"dma-ranges" or child "reg" property
arm64: dts: rockchip: Simplify mipi_out endpoint on rk3399 RP64 dtso
The only thing actually added here is a single endpoint on mipi_out,
which is already defined in rk3399-base.dtsi, so it's simpler to just
reference that phandle, which allows the removal of several properties.
arm64: dts: rockchip: Simplify edp endpoints on several rk3399 boards
The only thing actually added here is a single endpoint on edp_out,
which is already defined in rk3399-base.dtsi, so it's simpler to just
reference that phandle, which allows the removal of several properties.
This fixes the following DTB validation warnings:
graph node has single child node 'endpoint@0',
#address-cells/#size-cells are not necessary
arm64: dts: allwinner: a523: enable Mali GPU for all boards
All devices based on the A523/A527/H728/T527 processors contain a G57 MC1 GPU.
Enable the DT nodes for this GPU and specify a regulator that supplies power
to the SoC's VDD_GPU pins. The other parameters are set in the SoC dtsi,
so are board independent.
The Allwinner A523 SoC features the Mali-G57 MC1 GPU, which belongs
to the Mali Valhall (v9) family. There is a power domain specifically
for this GPU that needs to be enabled to utilize it.
To enable in a specific device, we need to enable the gpu node and specify
the “mali-supply” regulator additionally in the device tree.
dt-bindings: power: Add A523 PPU and PCK600 power controllers
The A523 PPU is likely the same kind of hardware seen on previous SoCs.
The A523 PCK600, as the name suggests, is likely a customized version
of ARM's PCK-600 power controller. Comparing the BSP driver against
ARM's PPU datasheet shows that the basic registers line up, but
Allwinner's hardware has some additional delay controls in the reserved
register range. As such it is likely not fully compatible with the
standard ARM version.
Document A523 PPU and PCK600 compatibles.
Also reorder the compatible string entries so they are grouped and
ordered by family first, then by SoC model.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20250712074021.805953-2-wens@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
arm64: dts: rockchip: Move dsi address+size-cells from SoC to rk3399 boards
The #address-cells and #size-cells properties are not useful on the DSI
controller node; they are only useful/required on ports and panel(s).
So remove them from the controller node and add them where actually
needed on the various rk3399 based boards.
This fixes the following DTB validation warnings:
unnecessary #address-cells/#size-cells without "ranges",
"dma-ranges" or child "reg" property
arm64: dts: rockchip: Move dsi address+size-cells from SoC to px30 boards
The #address-cells and #size-cells properties are not useful on the DSI
controller node; they are only useful/required on ports and panel(s).
So remove them from the controller node and add them where actually
needed on the various px30 based boards, which includes rk3326.
This fixes the following DTB validation warnings:
unnecessary #address-cells/#size-cells without "ranges",
"dma-ranges" or child "reg" property
arm64: dts: rockchip: Add reset button to NanoPi R5S
The NanoPi R5S LTS version has a reset button, which is connected via
GPIO. Note that the non-LTS version does not have the reset button and
therefore on page 19 of the schematic version 2204 it is marked 'NC',
but it is connected on the LTS version.
arm64: dts: rockchip: Add rtc0 alias for NanoPi R5S + R5C
The RTC_HCTOSYS_DEVICE module defaults to rtc0 and should (highly)
preferable be assigned to a battery backed RTC module as it is used to
(re)initialize the system clock.
The R5S and R5C have a connector for a RTC battery which is used by
HYM8563 RTC. Both devices also have another RTC from the rk809 PMIC.
To make sure the HYM8563 is always assigned rtc0, add an alias for it.
Frank Li [Thu, 22 May 2025 17:56:51 +0000 (13:56 -0400)]
arm64: dts: imx8q: add camera ov5640 support for imx8qm-mek and imx8qxp-mek
Add ov5640 overlay file for imx8qm-mek and imx8qxp-mek board. Camera can
connect different CSI port. So use dts overlay file to handle these
difference connect options.
Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the clock-frequency property to the cb_intosc_ls_clk and
cb_intosc_hs_div2_clk device tree nodes.
The f2s_free_clk is implemented by custom logic in the FPGA; so it
should be disabled in the dtsi by default and enabled by a
dts for a specific FPGA design on a specific board.
Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Sun, 22 Jun 2025 11:52:49 +0000 (06:52 -0500)]
arm64: dts: socfpga: swvp: remove phy-addr in the GMAC node
This addresses this warning:
socfpga_stratix10_swvp.dtb: ethernet@ff800000 (altr,socfpga-stmmac-a10-s10):
'phy-addr' does not match any of the regexes: '^pinctrl-[0-9]+$'
Dinh Nguyen [Thu, 5 Jun 2025 18:19:20 +0000 (13:19 -0500)]
arm64: dts: socfpga: swvp: remove cpu1-start-addr
The cpu1-start-addr property is only applicable to 32-bit SoCFPGA
platforms.
Removing this property will take care of warnings like this:
socfpga_stratix10_swvp.dtb: sysmgr@ffd12000: cpu1-start-addr:
False schema does not allow 4291846704
Dinh Nguyen [Wed, 4 Jun 2025 18:44:08 +0000 (13:44 -0500)]
arm64: dts: socfpga: agilex: fix dtbs_check warning for f2s-free-clk
The f2s-free-clk requires a clock-frequency value. We put in an
arbitrary value of 100 MHz for a constant. The true clock frequency
would get generated in an FPGA design and the bootloader will populated
in actual hardware designs.
This fixes warning like this:
arch/arm64/boot/dts/intel:34:8
4 f2s-free-clk (fixed-clock): 'clock-frequency' is a required property
arm64: dts: allwinner: a133-liontron-h-a133l: Add Ethernet support
The Liontron H-A133L board features an Ethernet controller with a
JLSemi JL1101 PHY. Its reset pin is tied to the PH12 GPIO.
Note that the reset pin must be handled as a bus-wide reset GPIO in
order to let the MDIO core properly reset it before trying to read
its identification registers. There's no other device on the MDIO bus.
The datasheet of the PHY mentions that the reset signal must be held
for 1 ms to take effect. Make it 2 ms (and the same for post-delay) to
be on the safe side without wasting too much time during boot.
Signed-off-by: Paul Kocialkowski <paulk@sys-base.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Andre Przywara <andre.przywara@arm.com> Link: https://patch.msgid.link/20250707165155.581579-5-paulk@sys-base.io Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The Allwinner A100/A133 Ethernet MAC (EMAC) is compatible with the A64
one and needs access to the syscon register for control of the
top-level integration of the unit.
Note that there are two such controllers on the sun50iw10 die, which are
the same unit with a different top-level syscon register offset.
arm64: dts: allwinner: a100: Add pin definitions for RGMII/RMII
The Allwinner A100/A133 supports both RGMII and RMII for its Ethernet
MAC (EMAC) controller. Add corresponding pin definitions.
Note that the sun50iw10 die actually includes two ethernet controllers,
the second of which is rarely exposed to pins. Call the first controller
"emac0" to distinguish it from the second that may be added later.
dt-bindings: Add Tegra264 clock and reset definitions
The BPMP firmware on Tegra264 defines a set of IDs for clock and reset
resources. These are not enumerations but provided by hardware, and 0 is
a reserved value, hence the numbering starts at 1.
Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Tue, 6 May 2025 13:31:11 +0000 (15:31 +0200)]
dt-bindings: firmware: Document Tegra264 BPMP
While the BPMP found on Tegra264 is similar to the versions found on
previous chips and should be backwards-compatible, some changes could
eventually be needed. Anticipate such changes and introduce a chip-
specific compatible string.
Thierry Reding [Tue, 6 May 2025 13:31:10 +0000 (15:31 +0200)]
dt-bindings: mailbox: tegra-hsp: Properly sort compatible string list
Device tree maintainers prefer all single entry cases to be grouped
under an enum. Furthermore, alphanumeric ordering is easier for the
majority of people to understand than ordering by release, which is
quirky.
Add bindings for the Memory Controller (MC) and External Memory
Controller (EMC) found on the Tegra264 SoC. Tegra264 SoC has a different
number of interrupt lines for MC sub-units: UCF_SOC, hub, hub common,
syncpoint and MC channel. The total number of interrupt lines is eight.
Update maxItems for MC interrupts accordingly.
This also adds a header containing the memory client ID definitions that
are used by the interconnects property in DT and the tegra_mc_client
table in the MC driver. These IDs are defined by the hardware, so the
numbering doesn't start at 0 and contains holes. Also added are the
stream IDs for various hardware blocks found on Tegra264. These are
allocated as blocks of 256 IDs and each block can be subdivided for
additional fine-grained isolation if needed.
Thierry Reding [Tue, 6 May 2025 13:31:08 +0000 (15:31 +0200)]
dt-bindings: tegra: pmc: Add Tegra264 compatible
The PMC found on Tegra264 is similar to the version in earlier chips but
some of the register offsets and bitfields differ, so add a specific
compatible string for this new generation.
Olivier Benjamin [Fri, 20 Jun 2025 15:21:35 +0000 (17:21 +0200)]
arm64: dts: rockchip: describe the OV8858 user camera on PinePhone Pro
Add the description of the front/user camera (OV8858) on the PinePhone Pro
to the device dts file.
It receives commands over SCCB, an I2C-compatible protocol, at
I2C address 0x36 and transmits data over CSI-MIPI.
I confirmed this address experimentally.
The pin control mapping was again extracted from the PinePhone Pro
schematic v1.0 as well as the RK3399 datasheet revision 1.8.
Table 2-3 in section 2.8 of the RK3399 datasheet contains the mapping
of IO functions for the SoC pins. Page 52 shows GPIO1_A4, page 54 shows
GPIO2_B4.
Olivier Benjamin [Fri, 20 Jun 2025 15:21:34 +0000 (17:21 +0200)]
arm64: dts: rockchip: describe I2c Bus 1 and IMX258 world camera on PinePhone Pro
Add the description of the rear/world camera (IMX258) on the PinePhone Pro
to the device dts file.
It receives commands on the I2C Bus 1 at address 0x1a and transmits data
over CSI-MIPI.
The I2C address for IMX258 can be found in the IMX258-0AQH5 Software
Reference Manual, page 24, section 2.3.1: 0b0011010 = 0x1a.
Section 3 indicates the module has 4 pairs of data lines. While 4-lane
mode is nominal, 2-lane mode should also be supported.
The pin muxing info was extracted from the PinePhone Pro schematic v1.0
as well as the RK3399 datasheet revision 1.8.
Table 2-3 in section 2.8 of the RK3399 datasheet contains the mapping
of IO functions for the SoC pins. Page 52 shows GPIO1_A0, page 54 shows
GPIO2_D4.
For I2C power, the PinePhone Pro schematic page 11 quadrants A4 and A5:
RK3399_J.AA8 and RK3399_J.Y8 get power from vcaa1v8_codec, so turn it on
The IMX258 also uses the following regulators, expected by its driver:
- vana (2.8V analog), called AVDD2V8_DVP on P.18 q.C1 and derived from
VCC1V8_S3 on P.13 q.B2
- vdig (1.2V digital core), called DVDD_DVP on P.18 q.C1 and shown on
P.18 q.D3 to be equivalent to VCC1V2_DVP derived from VCC3V3_SYS on
P.13 q.B3. Note that this regulator's voltage is inconsistently
labeled either 1.2V or 1.5V
RK3399_J.AG1 is GPIO4_A1/I2C1_SDA, RK3399_J.Y6 is GPIO4_A2/I2C1_SCL
This is the default pinctrl "i2c1_xfer" for i2c1 from rk3399-base.
Jonas Karlman [Sat, 21 Jun 2025 11:38:57 +0000 (11:38 +0000)]
arm64: dts: rockchip: Fix pinctrl node names for RK3528
Following warnings can be observed with CHECK_DTBS=y for the RK3528:
rk3528-pinctrl.dtsi:101.36-105.5: Warning (node_name_chars_strict):
/pinctrl/fephy/fephym0-led_dpx: Character '_' not recommended in node name
rk3528-pinctrl.dtsi:108.38-112.5: Warning (node_name_chars_strict):
/pinctrl/fephy/fephym0-led_link: Character '_' not recommended in node name
rk3528-pinctrl.dtsi:115.36-119.5: Warning (node_name_chars_strict):
/pinctrl/fephy/fephym0-led_spd: Character '_' not recommended in node name
rk3528-pinctrl.dtsi:122.36-126.5: Warning (node_name_chars_strict):
/pinctrl/fephy/fephym1-led_dpx: Character '_' not recommended in node name
rk3528-pinctrl.dtsi:129.38-133.5: Warning (node_name_chars_strict):
/pinctrl/fephy/fephym1-led_link: Character '_' not recommended in node name
rk3528-pinctrl.dtsi:136.36-140.5: Warning (node_name_chars_strict):
/pinctrl/fephy/fephym1-led_spd: Character '_' not recommended in node name
rk3528-pinctrl.dtsi:782.32-790.5: Warning (node_name_chars_strict):
/pinctrl/rgmii/rgmii-rx_bus2: Character '_' not recommended in node name
rk3528-pinctrl.dtsi:793.32-801.5: Warning (node_name_chars_strict):
/pinctrl/rgmii/rgmii-tx_bus2: Character '_' not recommended in node name
rk3528-pinctrl.dtsi:804.36-810.5: Warning (node_name_chars_strict):
/pinctrl/rgmii/rgmii-rgmii_clk: Character '_' not recommended in node name
rk3528-pinctrl.dtsi:813.36-823.5: Warning (node_name_chars_strict):
/pinctrl/rgmii/rgmii-rgmii_bus: Character '_' not recommended in node name
Quentin Schulz [Fri, 27 Jun 2025 10:53:57 +0000 (12:53 +0200)]
arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Tiger
The bootloader for RK3588 Tiger currently forces the PMIC reset behavior
(stored in RST_FUN bitfield in register SYS_CFG3 of the PMIC) to 0b1X
which is incorrect for our devices.
It is required to restart the PMU as otherwise the companion
microcontroller cannot detect the PMIC (and by extension the full
product and main SoC) being rebooted which is an issue as that is used
to reset a few things like the PWM beeper and watchdogs.
Let's add the new rockchip,reset-mode property to make sure the PMIC
reset behavior is the expected one.
Quentin Schulz [Fri, 27 Jun 2025 10:53:56 +0000 (12:53 +0200)]
arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Jaguar
The bootloader for RK3588 Jaguar currently forces the PMIC reset
behavior (stored in RST_FUN bitfield in register SYS_CFG3 of the PMIC)
to 0b1X which is incorrect for our devices.
It is required to restart the PMU as otherwise the companion
microcontroller cannot detect the PMIC (and by extension the full
product and main SoC) being rebooted which is an issue as that is used
to reset a few things like the PWM beeper and watchdogs.
Let's add the new rockchip,reset-mode property to make sure the PMIC
reset behavior is the expected one.
Quentin Schulz [Fri, 27 Jun 2025 10:53:55 +0000 (12:53 +0200)]
arm64: dts: rockchip: add header for RK8XX PMIC constants
To make it easier to read the device tree, let's add constants for the
rockchip,reset-mode property values that are currently only applicable
to RK806 PMIC.
arm64: dts: rockchip: theoretically enable Wi-Fi on ROCK 4D
The production version of the ROCK 4D appears to sport a AICSEMI
AIC8800D80 USB Wi-Fi + BT chipset. This chip does not yet have a
mainline driver.
Add the necessary rfkill node and wifi regulator node to at least make
it show up in lsusb output. The regulator is set as always-on, as like 2
hours deep into debugging why onboard_usb_dev.c wouldn't try enabling
the regulator the device needs to actually show up and thus bind to
onboard_usb_dev.c, I decided that it's not worth the effort.
arm64: dts: rockchip: adjust dcin regulator on ROCK 4D
The ROCK 4D's actual DC input is 5V, and the schematic names it as being
5V as well.
Rename the regulator, and change the voltage it claims to be at.
Furthermore, fix vcc_1v1_nldo_s3's vin-supply as coming from
vcc_5v0_sys, and not the DCIN, as per the schematic. This makes no
functional change; both regulators are always on, and one feeds into the
other.
Remove the gpio hog node which forces using DSI signals rather than
the second LVDS channels signals.
The dsi signals are not used in any of the current device trees.
Leave that decision to the actual device tree which will also define
the consumer of the signals.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The MUX which either outputs DSI or 2nd channel LVDS signals is part of
the SoM. Move the pinmuxing of the GPIO used for controlling the MUX
to the SoM dtsi file.
The IMX8M reference manuals indicate in the USDHC Clock generator section
that the clock rate for DDR is 1/2 the input clock therefore HS400 rates
clocked at 200Mhz require a 400Mhz SDHC clock.
This showed about a 1.5x improvement in read performance for the eMMC's
used on the various imx8m{m,n,p}-venice boards.
The IMX8M reference manuals indicate in the USDHC Clock generator section
that the clock rate for DDR is 1/2 the input clock therefore HS400 rates
clocked at 200Mhz require a 400Mhz SDHC clock.
This showed about a 1.5x improvement in read performance for the eMMC's
used on the various imx8m{m,n,p}-venice boards.
The IMX8M reference manuals indicate in the USDHC Clock generator section
that the clock rate for DDR is 1/2 the input clock therefore HS400 rates
clocked at 200Mhz require a 400Mhz SDHC clock.
This showed about a 1.5x improvement in read performance for the eMMC's
used on the various imx8m{m,n,p}-venice boards.
The IMX8M reference manuals indicate in the USDHC Clock generator section
that the clock rate for DDR is 1/2 the input clock therefore HS400 rates
clocked at 200Mhz require a 400Mhz SDHC clock.
This showed about a 1.5x improvement in read performance for the eMMC's
used on the various imx8m{m,n,p}-venice boards.
The IMX8M reference manuals indicate in the USDHC Clock generator section
that the clock rate for DDR is 1/2 the input clock therefore HS400 rates
clocked at 200Mhz require a 400Mhz SDHC clock.
This showed about a 1.5x improvement in read performance for the eMMC's
used on the various imx8m{m,n,p}-venice boards.
The IMX8M reference manuals indicate in the USDHC Clock generator section
that the clock rate for DDR is 1/2 the input clock therefore HS400 rates
clocked at 200Mhz require a 400Mhz SDHC clock.
This showed about a 1.5x improvement in read performance for the eMMC's
used on the various imx8mp-venice boards.
The IMX8M reference manuals indicate in the USDHC Clock generator section
that the clock rate for DDR is 1/2 the input clock therefore HS400 rates
clocked at 200Mhz require a 400Mhz SDHC clock.
This showed about a 1.5x improvement in read performance for the eMMC's
used on the various imx8m{m,n,p}-venice boards.
Fixes: 6f30b27c5ef5 ("arm64: dts: imx8mm: Add Gateworks i.MX 8M Mini Development Kits") Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Yannic Moog [Wed, 11 Jun 2025 13:05:31 +0000 (15:05 +0200)]
arm64: dts: add imx95-libra-rdk-fpsc board
Add device tree for the Libra-i.MX 95 FPSC board. The Libra is a
pure development board and has hardware to support FPSC-24-A.0 set of
features. The phyCORE-i.MX 95 FPSC [1] SoM uses only a subset of
the hardware features of the Libra board. The phyCORE-i.MX 95 FPSC
itself is a System on Module designed around the i.MX 95 SoC.
The SoM and board utilize the Future Proof Solder Core [2] BGA standard
to connect to each other.
To be able to easily map FPSC interface names to SoC interfaces, the
FPSC interface names are added as inline comments. Example:
Here, I2C2 is the FPSC interface name. The lpi2c5 instance of the i.MX 95
SoC is used to fulfill the i2c functionality and its signals are routed
to the FPSC I2C2 signal pins:
projects / thirdparty / kernel / stable.git / log
