Sam Day [Wed, 12 Feb 2025 07:01:39 +0000 (07:01 +0000)]
rng: msm: don't enable PRNG if it's already enabled
msm_rng_enable is supposed to skip writing to LFSR_CFG + CONFIG
registers in the PRNG_ block if PRNG_CONFIG_HW_ENABLE is already set.
The logic to test for this was inverted.
Without this fix, the driver was causing SError aborts on my MSM8916
device. Stephan Gerhold suggested this was probably because TZ has
marked this as a protected register, since it would also be using it for
RNG.
Fixes: 033ec636fcb ("rng: Add Qualcomm MSM PRNG driver") Suggested-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Sam Day <me@samcday.com> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Link: https://lore.kernel.org/r/20250212-msm-rng-fixes-v2-3-645cf8d3fd3c@samcday.com Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
mmc: msm_sdhci: Reset clocks before reconfiguration
U-Boot has to reconfigure the clocks that were set in the boot
loaders. However, in IPQ9574, the clocks have to be reset before
they can be reconfigured. Hence add code to do the relevant
resets.
Presently, get_function_mux returns an unsigned int and cannot
differentiate between failure and correct function value. Change its
return type to int and check for failure in the caller.
Additionally, updated drivers/pinctrl/qcom/pinctrl-*.c to accommodate the
above return type change. Only compile test done.
Simon Glass [Sun, 9 Feb 2025 16:07:18 +0000 (09:07 -0700)]
test/py: Show info about module-loading
It is sometimes tricky to figure out what modules test.py is loading
when it starts up. The result can be a silent failure with no clue as to
what when wrong.
Add a section which lists the modules loaded as well as those not
found.
Tom Rini [Fri, 14 Mar 2025 18:28:13 +0000 (12:28 -0600)]
Merge patch series "Enable USB MSC Boot for AM62, AM62A and AM62P"
Siddharth Vadapalli <s-vadapalli@ti.com> says:
This series adds config fragment for enabling USB MSC boot and USB
Storage devices which are applicable to AM62, AM62A and AM62P SoCs.
Series has been tested on AM62A7-SK, AM625-SK and AM62P5-SK for USB MSC
boot where the bootloaders were generated in the following manner:
1. AM62A7-SK (AM62A SoC):
- tiboot3.bin
=> am62ax_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
=> am62ax_evm_a53_defconfig + am62x_a53_usbmsc.config
2. AM625-SK (AM62 SoC):
- tiboot3.bin
=> am62x_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
=> am62x_evm_a53_defconfig + am62x_a53_usbmsc.config
3. AM62P5-SK (AM62P SoC):
- tiboot3.bin
=> am62px_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
=> am62px_evm_a53_defconfig + am62x_a53_usbmsc.config
The images were flashed to a USB Flash Drive and were connected to the
Type-C interface on each of the boards which supports USB MSC Boot.
The following device-tree changes were made across all of the boards:
https://gist.github.com/Siddharth-Vadapalli-at-TI/2afb913838c1d4005bc059910c09ab4b
configs: am62x_a53: introduce fragment for USB MSC boot
Introduce the config fragment for enabling USB MSC boot. USB MSC boot
involves fetching the next stage of the bootloader from a USB Mass Storage
device such as a USB Flash Drive with the USB controller on the SoC acting
as the USB Host.
configs: am62x_r5: introduce fragment for USB MSC boot
Introduce the config fragment for enabling USB MSC boot. USB MSC boot
involves fetching the next stage of the bootloader from a USB Mass Storage
device such as a USB Flash Drive with the USB controller on the SoC acting
as the USB Host.
The configuration options CONFIG_VIDCONSOLE_AS_LCD and CONFIG_VIDCONSOLE_AS_
NAME have been marked as obsolete and scheduled for deletion in late 2020.
That's already long overdue and the last remaining consumers of these options
have already migrated to using "vidconsole" in their "stdout" and "stderr"
environment variables, so let's delete these two configuration options.
Tom Rini [Fri, 14 Mar 2025 15:31:36 +0000 (09:31 -0600)]
Merge tag 'mmu-next-14032025' of https://source.denx.de/u-boot/custodians/u-boot-tpm into next
Up to now we configure the entire memory space for U-Boot as RWX.
For modern architectures and security requirements, it's better to
map the memory properly.
This pull request adds basics support for mapping the U-Boot binary with
proper (RO, RW, RW^X) memory permissions on aarch64 right after we
relocate U-Boot in the top of DRAM.
It's worrth noting that the linker script annotations are only added for
the aarch64 architecture. We can, in the future, try to unify the linker --
at least for the architectures that have enough in common and expand this
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:43 +0000 (15:54 +0200)]
arm64: Enable RW, RX and RO mappings for the relocated binary
Now that we have everything in place switch the page permissions for
.rodata, .text and .data just after we relocate everything in top of the
RAM.
Unfortunately we can't enable this by default, since we have examples of
U-Boot crashing due to invalid access. This usually happens because code
defines const variables that it later writes. So hide it behind a Kconfig
option until we sort it out.
It's worth noting that EFI runtime services are not covered by this
patch on purpose. Since the OS can call SetVirtualAddressMap which can
relocate runtime services, we need to set them to RX initially but remap
them as RWX right before ExitBootServices.
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:42 +0000 (15:54 +0200)]
treewide: Add a function to change page permissions
For armv8 we are adding proper page permissions for the relocated U-Boot
binary. Add a weak function that can be used across architectures to change
the page permissions
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:41 +0000 (15:54 +0200)]
arm64: mmu_change_region_attr() add an option not to break PTEs
The ARM ARM (Rev L.a) on section 8.17.1 describes the cases where
break-before-make is required when changing live page tables.
Since we can use a function to tweak block and page permissions,
where BBM is not required split the existing mmu_change_region_attr()
into two functions and create one that doesn't require BBM. Subsequent
patches will use the new function to map the U-Boot binary with proper
page permissions.
While at it add function descriptions in their header files.
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:40 +0000 (15:54 +0200)]
arm: Prepare linker scripts for memory permissions
Upcoming patches are switching the memory mappings to RW, RO, RX
after the U-Boot binary and its data are relocated. Add
annotations in the linker scripts to and mark text, data, rodata
sections and align them to a page boundary.
It's worth noting that .efi_runtime memory permissions are left
untouched for now. There's two problems with EFI currently.
The first problem is that we bundle data, rodata and text in a single
.efi_runtime section which also must be close to .text for now.
As a result we also dont change the permissions for anything contained
in CPUDIR/start.o. In order to fix that we have to decoule .text_rest,
.text and .efi_runtime and have the runtime services on their own
section with proper memory permission annotations (efi_rodata etc).
The efi runtime regions (.efi_runtime_rel) can be relocated by the OS when
the latter is calling SetVirtualAddressMap. Which means we have to
configure those pages as RX for U-Boot but convert them to RWX just before
ExitBootServices. It also needs extra code in efi_tuntime relocation
code since R_AARCH64_NONE are emitted as well if we page align the
section.
Due to the above ignore EFI for now and fix it later once we have the
rest in place.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:39 +0000 (15:54 +0200)]
doc: update meminfo with arch specific information
Since we added support in meminfo to dump live page tables, describe
the only working architecture for now (aarch64) and add links to public
documentation for further reading.
Paul Barker [Fri, 28 Feb 2025 10:04:33 +0000 (10:04 +0000)]
Kconfig: Introduce CONFIG_WERROR
Add a new config option under "General setup" to enable the -Werror flag
when building U-Boot. This is useful during development to help catch
mistakes.
This is based on a similar config option added to the Linux kernel by
Linus in 2021 - see Linux commit 3fe617ccafd6 ("Enable '-Werror' by
default for all kernel builds"). The modification of KBUILD_CFLAGS is
done in Makefile.extrawarn, matching where it was moved in the kernel by
Linux commit e88ca24319e4 ("kbuild: consolidate warning flags in
scripts/Makefile.extrawarn").
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Update rm-cfg.yaml and tifs-rm-cfg.yaml to account for the
changes added in the K3 Resource Partitioning Tool v1.18
The change enables resource sharing between A72_2 and MAIN_0_R5_0
for the BCDMA CSI RX and TX channels, J784S4 supports upto 12
CSI cameras and 16 channels would not be enough for all such use
cases for RTOS and Linux, thus sharing of resources in needed. Resource
sharing between A72 and R5 for BCDMA CSI channels allow Linux to use 32
channels at a time.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
[n-francis@ti.com: rebased and sent on behalf] Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Bryan Brattlof [Thu, 27 Feb 2025 17:14:41 +0000 (11:14 -0600)]
mach-k3: common_fdt: create a reserved memory node
Some device trees may not have a reserved-memory node. Rather than
exiting early we should create a new reserved-memory node along with
the memory carveout for the firmware we (U-Boot) have placed.
Signed-off-by: Bryan Brattlof <bb@ti.com> Acked-by: Andrew Davis <afd@ti.com>
Raymond Mao [Wed, 26 Feb 2025 14:19:51 +0000 (06:19 -0800)]
tools: add HOSTCFLAGS from openssl pkg-config
HOSTCFLAGS of some tools components (image-host, rsa-sign and
ecdsa-libcrypto) depend on the directory where openssl is installed.
Add them via pkg-config.
This fixes a potential build failure in tools when openssl in installed
in varied directories.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Peng Fan [Tue, 4 Mar 2025 06:57:40 +0000 (14:57 +0800)]
mailbox: add i.MX Messaging Unit (MU) driver
This patch provides a driver for i.MX Messaging Unit (MU) using the
commom mailbox framework.
This is ported from Linux (v6.12.8) driver
drivers/mailbox/imx-mailbox.c. Its commit SHA is: 39d7d6177f0c ("mailbox: imx: use device name in interrupt name")
Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
Marek Vasut [Tue, 11 Mar 2025 01:34:18 +0000 (02:34 +0100)]
ARM: dts: imx: Drop bogus regulator extras on DH i.MX6 DHCOM DRC02
The regulator extras should be placed in the USB H1 regulator node,
the /regulator-usb-h1-vbus. They are already present there in the
upstream DT, so delete this bogus node entirely.
On i.MX8M SoCs, the /firmware/optee Devicetree node is created just before
booting the OS when OP-TEE is found running. If the node already exists,
this results in an error, which prevents the OS to boot:
Could not create optee node.
ERROR: system-specific fdt fixup failed: FDT_ERR_EXISTS
- must RESET the board to recover.
failed to process device tree
On the i.MX8M systems where CONFIG_OF_SYSTEM_SETUP is defined, the
ft_add_optee_node() function is called before booting the OS. It will
create the OP-TEE Devicetree node and populate it with reserved memory
informations gathered at runtime.
On on most i.MX8M systems the Devicetree is built with an optee node if
CONFIG_OPTEE is defined. This node is indeed necessary for commands and
drivers communicating with OP-TEE, even before attempting OS boot.
The aforementioned issue can happen on the Compulab IOT-GATE-iMX8, which is
the only in-tree i.MX8M system where both CONFIG_OPTEE and
CONFIG_OF_SYSTEM_SETUP are defined (see the imx8mm-cl-iot-gate*
defconfigs).
Deal with an existing optee node gracefully at runtime to fix this issue.
toradex: apalis/colibri imx6: Select correct DTB for SoM v1.2+
When "fdtfile" is not set, use the "variant" environment variable to
select the correct DTB.
Apalis/Colibri iMX6 V1.2 replaced the STMPE811 ADC/Touch controller
which is EOL with the TLA2024 ADC and AD7879 touch controller. They thus
require a different DTB, which we can easily select with the variant env
variable.
Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
board: toradex: apalis/colibri imx6: Detect new v1.2 SoM variant
Apalis/Colibri iMX6 V1.2 will replace the STMPE811 ADC/Touch controller
which is EOL by the TLA2024 ADC and AD7879 touch controller.
To support this new version, we detect the presence of the TLA2024
during boot and set a new environment variable named "variant". This
will allow us and users to select the correct DT easily.
By probing via I2C we have a robust detection method instead of relying
on the existing "board_rev" environment variable which is set by the
config block. Users can use "variant" in their DT selection and do not
have to map the board revision to a device tree.
"variant" environment variable behaviour:
* Empty or absent for all versions below v1.2 (STMPE811)
* "-v1.2" for all versions starting from v1.2 (TLA2024 + AD7879)
Tom Rini [Thu, 27 Feb 2025 15:29:42 +0000 (09:29 -0600)]
mmc: fsl_esdhc: Migrate ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig
The flag for enabling the ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE quirk can be
handled easily enough in Kconfig. This lets us remove a function but not
obviously correct usage of the IS_ENABLED() macro.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Thu, 13 Mar 2025 15:53:12 +0000 (09:53 -0600)]
Merge patch series "xPL-stack cleanup"
Simon Glass <sjg@chromium.org> says:
This series was split from the VBE part H series. It adjusts the logic
for selecting the top of the stack so that it is more consistent across
xPL phases.
Simon Glass [Fri, 28 Feb 2025 12:20:25 +0000 (05:20 -0700)]
spl: Use CONFIG_VAL() to obtain the SPL stack
Now that we have the same option for SPL and TPL, simplify the logic for
determining the initial stack.
Note that this changes behaviour as current SPL_STACK is a fallback for
TPL. However, that was likely unintended and can be handled with Kconfig
defaults if needed.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Suggested-by: Tom Rini <trini@konsulko.com>
Simon Glass [Fri, 28 Feb 2025 12:20:23 +0000 (05:20 -0700)]
tpl: Rename TPL_NEEDS_SEPARATE_STACK to TPL_HAVE_INIT_STACK
The most common word for features that make a platform work is to use
'HAVE_xxx'. Rename this option to match.
Update the help to use the word 'phase' rather than 'stage', since
that is the current terminology. Also clarify that, absent this setting,
the stack pointer generally comes from the value used by U-Boot proper,
rather than SPL.
Move the option just above TPL_STACK which depends on it.
The sc5xx machine code includes implementations of board_init and
board_early_init_f which should not be included in the base soc support
code, as they should be implemented by a board where necessary.
This removes the default empty implementations of both from mach-sc5xx.
Greg Malysa [Fri, 28 Feb 2025 18:58:33 +0000 (13:58 -0500)]
arm: mach-sc5xx: Remove manual bss_clear
The arm library includes an implementation of bss_clear that is already
called from crt0.S. This re-clearing of BSS should not be performed in
the machine code and should therefore be removed.
Tom Rini [Thu, 13 Mar 2025 15:51:46 +0000 (09:51 -0600)]
Merge patch series "Update DDR Configurations"
Santhosh Kumar K <s-k6@ti.com> says:
This series is to update the DDR configurations of AM64x EVM, AM62x SK,
AM62x LP SK, AM62Ax SK and AM62Px SK boards according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.
- Add drivers for MFD STM32 TIMERS and STM32 PWM and enable them on stm32mp135f-dk
- Restrict _debug_uart_init() usage in STM32 serial driver
- Add support for environment in eMMC on STM32MP13xx DHCOR SoM
- Introduce DH STM32MP15xx DHSOM board specific defconfigs
- Fix CONFIG_BOOTCOUNT_ALTBOOTCMD update on DH STM32MP1 DHSOM
- Update maintainer for board stm32f746-disco
- Fix Linux cmdline for stm32f769-disco
- Cleanup in stm32f***-u-boot.dtsi and in board_late_init() by removing
legacy led and button management.
Tom Rini [Wed, 12 Mar 2025 16:25:33 +0000 (10:25 -0600)]
Merge patch series "binman: build_from_git: Add argument specifying branch"
This series from Leonard Anderweit <l.anderweit@phytec.de> provides some
improvements to the binman tool and i.MX specific tooling then makes use
of it.
Build the imx code singing tool from source instead of relying on the
distro to provide the tool.
Use the debian/unstable branch because the default branch is outdated.
The binary is supposed to be build with docker, work around that by selecting
the correct Makefile directly.
Also append the description and add a link to documentation.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de> Reviewed-by: Simon Glass <sjg@chromium.org>
binman: build_from_git: Add optional make path inside git repo
Add optional argument make_path to build_from git. The new argument
allows specifying the path to a Makefile in case it is not in the root
of the git repo.
Also adjust the corresponding test.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 12 Mar 2025 16:25:13 +0000 (10:25 -0600)]
Merge patch series "drivers: Driver support for ADI SC5xx SoCs"
Greg Malysa <malysagreg@gmail.com> says:
This series adds all of the supported peripheral drivers for the sc5xx
series of SoCs from Analog Devices and other drivers that are used by
the evaluation kits, such as a GPIO expander used by the EZLITE carrier
boards. This series passes gitlab CI tests.
spi: Add support for ADI SC5XX-family processor SPI peripherals
This adds support for the ADI-specific SPI driver present in the ADI
SC5xx line of SoCs. This IP block is distinct from the QSPI/OSPI block
that uses the Cadence driver. Both may be used at once with appropriate
pin muxing configuration.
Co-developed-by: Greg Malysa <malysagreg@gmail.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com> Co-developed-by: Angelo Dureghello <angelo.dureghello@timesys.com> Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Co-developed-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com> Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
remoteproc: Add in SHARC loading for ADI SC5XX-family processors
This adds the ability to load ldr-formatted files to the SHARC
coprocessors using the rproc interface. Only a minimal subset
of rproc functionality is supported: loading and starting
the remote core.
Secure boot and signed ldr verification are not available
at this time through the U-Boot interface.
Co-developed-by: Greg Malysa <malysagreg@gmail.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Co-developed-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com> Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Greg Malysa [Wed, 26 Feb 2025 17:30:31 +0000 (12:30 -0500)]
dma: Add driver for ADI SC5xx-family SoC MDMA functionality
Add a rudimentary MDMA driver for the Analog Devices SC5xx SoCs,
primarily intended for use with and tested against the QSPI/OSPI
IP included in the SoC.
Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
gpio: Add support for ADI ADP5588 GPIO expander chips
This adds support for the ADP588 GPIO expander from Analog Devices. It
is accessed over I2C and provides up to 18 pins. It is largely a port of
the Linux driver developed by Michael Hennerich
<michael.hennerich@analog.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Greg Malysa [Wed, 26 Feb 2025 17:30:24 +0000 (12:30 -0500)]
doc: Add dt-bindings and descriptions for ADI SC5xx-family pinctrl
This adds the necessary dt-bindings and documentation to use the ADI
SC5xx pinctrl driver in a device tree. It is not yet available upstream
in the Linux kernel. Eventually, it will be moved there.
Greg Malysa [Wed, 26 Feb 2025 17:30:23 +0000 (12:30 -0500)]
pinctrl: Add support for ADI SC5XX-family pinctrl
This adds support for pin configuration on the Analog Devices SC5XX SoC
family. This commit is largely a port of the Linux driver, which has not
yet been submitted upstream.
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Tom Rini [Wed, 12 Mar 2025 16:24:05 +0000 (10:24 -0600)]
Merge patch series "pci_auto: Downgrade prefetch if necessary"
This series from Patrick Rudolph <patrick.rudolph@9elements.com> fixes
an issue with how we treat PCIe vs PCI in some cases and fixes the
qemu-arm-sbsa reference platform support.
Patrick Rudolph [Wed, 26 Feb 2025 13:56:44 +0000 (14:56 +0100)]
emulation: qemu-sbsa: Enable PCI enumeration
Enable PCI enumeration by default to get the Bochs display driver up
and running before the boot medium is scanned.
This is just to enhance the user-experience while booting the machine.
TEST: U-Boot logo, version, log output and the U-Boot shell is visible
on the display device.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Patrick Rudolph [Wed, 26 Feb 2025 13:56:42 +0000 (14:56 +0100)]
pci_auto: Downgrade prefetch if necessary
Legacy PCI devices, like qemu's Bochs VGA device, are allowed to have
prefetchable 32-bit BARs, while PCIe devices are not allowed to have
32-bit prefetchable BARs. Typically prefetchable BARs are 64-bit and
typically the prefetch MMIO window is also 64-bit and placed above
4GiB, as it's the case on qemu sbsa-ref.
Currently the U-Boot code assumes that prefetchable BARs are
64-bit BARs and always tries to assign them into the prefetch
MMIO window.
When a 32-bit BAR is marked as prefetch, but the prefetch area is
not within the first 4GiB of the address space, then downgrade the
BAR and place it in the non-prefetch MMIO window.
For prefetch BARs there's no downside on being placed in non prefetch
MMIO areas, besides the possible slower performance when a driver tries
to map it Write-Combine.
TEST: Fixes pci_auto on QEMU sbsa-ref fails to autoconfigure BAR0.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Patrice Chotard [Thu, 30 Jan 2025 11:57:54 +0000 (12:57 +0100)]
serial: stm32: restrict _debug_uart_init() usage
Since commit 948da7773e34 ("arm: Add new config option ARCH_VERY_EARLY_INIT")
debug_uart_init() is called respectively in crt0.S and crt0_64.S.
That means that _debug_uart_init() is called for all STM32MP platforms
even for those which doesn't support SPL_BUILD.
So restrict _debug_uart_init() execution for platforms which can have
SPL_BUILD enabled (STM32MP1 platform only).
It's more needed to call debug_uart_init() in stm32mp1/cpu.c.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cheick Traore [Tue, 11 Mar 2025 14:30:36 +0000 (15:30 +0100)]
configs: stm32mp13: Enable MFD timer and PWM for stm32mp13_defconfig
Enable the following configs:
* CONFIG_MFD_STM32_TIMERS: enables support for the STM32 multifunction
timer
* CONFIG_DM_PWM: enables support for pulse-width modulation devices
* CONFIG_CMD_PWM: enables 'pwm' command to control PWM channels
* CONFIG_PWM_STM32: enables support for the STM32 PWM devices
Cheick Traore [Tue, 11 Mar 2025 14:30:35 +0000 (15:30 +0100)]
pwm: stm32: add driver to support pwm with timer
Add driver to support pwm on STM32MP1X SoCs. The PWM signal is generated
using a multifuntion timer which provide a pwm feature. Clock rate and
addresses are retrieved from the multifunction timer driver.
Cheick Traore [Tue, 11 Mar 2025 14:30:34 +0000 (15:30 +0100)]
mach-stm32: add multifunction timer driver support
Add support for STM32MP timer multi-function driver.
These timers can be use as counter, trigger or pwm generator.
This driver will be used to manage the main resources of the timer to
provide them to the functionnalities which need these ones.
Paul Barker [Tue, 4 Mar 2025 20:07:08 +0000 (20:07 +0000)]
net: ravb: Fix RX frame size limit
The value written to the RFLR register includes the length of the CRC
data at the end of each Ethernet frame. So we need to increase the value
written to this register to ensure that we can receive full size frames.
While we're here we can also copy the improved comment from the Linux
kernel.
Fixes: 8ae51b6f324e ("net: ravb: Add Renesas Ethernet RAVB driver") Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix comment Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Paul Barker [Tue, 4 Mar 2025 19:44:35 +0000 (19:44 +0000)]
clk: rzg2l: Ignore disable for core clocks
Following on from commit 9a699a0a0d62 ("clk: rzg2l: Ignore enable for
core clocks"), we also need to ignore attempts to disable core clocks to
avoid the need for conditionals around clk_disable_bulk() calls in
drivers which support both RZ/G2L and other Renesas SoCs.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 2 Mar 2025 01:24:50 +0000 (02:24 +0100)]
arm: mvebu: a38x: Switch back to mdio_alloc()
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 2 Mar 2025 01:24:49 +0000 (02:24 +0100)]
net: sh_eth: Switch back to mdio_alloc()
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.
This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.
Fixes: 08eefb5e792d ("net: sh_eth: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 2 Mar 2025 01:24:48 +0000 (02:24 +0100)]
net: ravb: Switch back to mdio_alloc()
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.
This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.
Fixes: 079eaca6e7b4 ("net: ravb: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>