ada: Assertion failure adding extra formals to late overriding subp.

gcc/ada/

* sem_ch6.adb (Parent_Subprogram): Complete assertion.

tree-optimization/111294 - better DCE after forwprop

The following adds more aggressive DCE to forwprop to clean up dead
stmts when folding a stmt leaves some operands unused.  The patch
uses simple_dce_from_worklist for this purpose, queueing original
operands before substitution and folding, but only if we folded the
stmt.

This removes one dead stmt biasing threading costs in a later pass
but it doesn't resolve the optimization issue in the PR yet.

PR tree-optimization/111294
* tree-ssa-forwprop.cc (pass_forwprop::execute): Track
operands that eventually become dead and use simple_dce_from_worklist
to remove their definitions if they did so.

* gcc.dg/tree-ssa/evrp10.c: Adjust.
* gcc.dg/tree-ssa/evrp6.c: Likewise.
* gcc.dg/tree-ssa/forwprop-31.c: Likewise.
* gcc.dg/tree-ssa/neg-cast-3.c: Likewise.

aarch64: Coerce addresses to be suitable for LD1RQ

In the following test:

  svuint8_t ld(uint8_t *ptr) { return svld1rq(svptrue_b8(), ptr + 2); }

ptr + 2 is a valid address for an Advanced SIMD load, but not for
an SVE load.  We therefore ended up generating:

        ldr     q0, [x0, 2]
        dup     z0.q, z0.q[0]

This patch makes us generate LD1RQ for that case too.  It takes the
slightly old-school approach of making the predicate broader than
the constraint.  That is: any valid memory address is accepted as
an operand before RA.  If the instruction remains during RA, LRA will
coerce the address to match the constraint.  If the instruction gets
split before RA, the splitter will load invalid addresses into a
scratch register.

gcc/
* config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
Accept all nonimmediate_operands, but keep the existing constraints.
If the instruction is split before RA, load invalid addresses into
a temporary register.
* config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.

gcc/testsuite/
* gcc.target/aarch64/sve/acle/general/ld1rq_1.c: New test.

libstdc++: Add dg-require-thread-fence in several tests

Some targets like arm-eabi with newlib and default settings rely on
__sync_synchronize() to ensure synchronization.  Newlib does not
implement it by default, to make users aware they have to take special
care.

This makes a few tests fail to link.

This patch requires the missing thread-fence effective target in the
tests that need it, making them UNSUPPORTED instead of FAIL and
UNRESOLVED.

2023-09-10  Christophe Lyon  <christophe.lyon@linaro.org>

libstdc++-v3/
* testsuite/29_atomics/atomic/compare_exchange_padding.cc: Likewise.
* testsuite/29_atomics/atomic/cons/value_init.cc: Likewise.
* testsuite/29_atomics/atomic_float/value_init.cc: Likewise.
* testsuite/29_atomics/atomic_integral/cons/value_init.cc: Likewise.
* testsuite/29_atomics/atomic_ref/compare_exchange_padding.cc: Likewise.
* testsuite/29_atomics/atomic_ref/generic.cc: Likewise.
* testsuite/29_atomics/atomic_ref/integral.cc: Likewise.
* testsuite/29_atomics/atomic_ref/pointer.cc: Likewise.

RISC-V: Fix ICE in get_avl_or_vl_reg

update v1 -> v2: Add available fortran compiler check in rvv-fortran.exp.

This patch fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111395 ICE

update v2 -> v3: Remove redundant format.

PR target/111395

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
(vector_insn_info::global_merge): Ditto.
(vector_insn_info::get_avl_or_vl_reg): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/fortran/pr111395.f90: New test.
* gcc.target/riscv/rvv/rvv-fortran.exp: New test.

RISC-V: Format VSETVL PASS code

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.

LoongArch: Change the value of branch_cost from 2 to 6.

gcc/ChangeLog:

* config/loongarch/loongarch-def.c: Modify the default value of
branch_cost.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/cmov_ii.c: New test.

libstdc++: Limit <stacktrace> synopsis test to normal namespace

libstdc++-v3/ChangeLog

* testsuite/19_diagnostics/stacktrace/synopsis.cc: Add
{ dg-require-normal-namespace "" }.

xtensa: Optimize several boolean evaluations of EQ/NE against constant zero

An idiomatic implementation of boolean evaluation of whether a register is
zero or not in Xtensa is to assign 0 and 1 to the temporary and destination,
and then issue the MOV[EQ/NE]Z machine instruction
(See 8.3.2 Instruction Idioms, Xtensa ISA refman., p.599):

;; A2 = (A3 != 0) ? 1 : 0;
movi.n a9, 1
movi.n a2, 0
movnez a2, a9, a3  ;; if (A3 != 0) A2 = A9;

As you can see in the above idiom, if the source and destination are the
same register, a move instruction from the source to another temporary
register must be prepended:

;; A2 = (A2 == 0) ? 1 : 0;
mov.n a10, a2
movi.n a9, 1
movi.n a2, 0
moveqz a2, a9, a10  ;; if (A10 == 0) A2 = A9;

Fortunately, we can reduce the number of instructions and temporary
registers with a few tweaks:

;; A2 = (A3 != 0) ? 1 : 0;
movi.n a2, 1
moveqz a2, a3, a3  ;; if (A3 == 0) A2 = A3;

;; A2 = (A2 != 0) ? 1 : 0;
movi.n a9, 1
movnez a2, a9, a2  ;; if (A2 != 0) A2 = A9;

;; A2 = (A3 == 0) ? 1 : 0;
movi.n a2, -1
        moveqz a2, a3, a3  ;; if (A3 == 0) A2 = A3;
        addi.n a2, a2, 1

;; A2 = (A2 == 0) ? 1 : 0;
movi.n a9, -1
movnez a2, a9, a2  ;; if (A2 != 0) A2 = A9;
addi.n a2, a2, 1

Additionally, if TARGET_NSA is configured, the fact that it returns 32 iff
the source of the NSAU machine instruction is 0, otherwise less than, can be
used in boolean evaluation of EQ comparison.

;; A2 = (A3 == 0) ? 1 : 0;
nsau a2, a3      ;; Source and destination can be the same register
srli a2, a2, 5

Furthermore, this patch also saves one instruction when determining whether
the ANDing with mask values in which 1s are lined up from the upper or lower
bit end (for example, 0xFFE00000 or 0x003FFFFF) is 0 or not.

gcc/ChangeLog:

* config/xtensa/xtensa.cc (xtensa_expand_scc):
Revert the changes from the last patch, as the work in the RTL
expansion pass is too far to determine the physical registers.
* config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
(eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.

LoongArch: Fix bug of '<optab>di3_fake'.

PR target/111334

gcc/ChangeLog:

* config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/pr111334.c: New test.

LoongArch: Add tests for ASX vector xvssran/xvssrani/xvssrarn/xvssrarni instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvssran.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrani.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrarn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrarni.c: New test.

LoongArch: Add tests for ASX vector xvssrln/xvssrlni/xvssrlrn/xvssrlrni instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvssrln.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrlni.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrlrn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrlrni.c: New test.

LoongArch: Add tests for ASX vector xvpackev/xvpackod/xvpickev/xvpickod/ xvpickve2gr/xvreplgr2vr/xvreplve/xvreplve0/xvreplvei/xvshuf4i/xvshuf instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvpackev.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpackod.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpickev.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpickod.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpickve.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpickve2gr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvreplgr2vr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvreplve.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvreplve0.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvreplvei.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvshuf4i_b.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvshuf_b.c: New test.

LoongArch: Add tests for ASX vector xvext2xv/xvexth/xvextins/xvilvh/xvilvl/xvinsgr2vr/ xvinsve0/xvprem/xvpremi instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvext2xv-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvext2xv-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvexth-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvexth-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvextrins.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvilvh.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvilvl.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvinsgr2vr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvinsve0.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvprem.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpremi.c: New test.

LoongArch: Add tests for ASX vector xvfcmp{saf/seq/sle/slt/sne/sor/sun} instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_saf_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_seq_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sle_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_slt_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sne_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sor_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sun_s.c: New test.

LoongArch: Add tests for ASX vector xvfcmp{caf/ceq/cle/clt/cne/cor/cun} instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_caf_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_ceq_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cle_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_clt_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cne_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cor_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cun_s.c: New test.

LoongArch: Add tests for ASX vector xvabsd/xvavg/xvavgr/xvbsll/xvbsrl/xvneg/ xvsat instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvabsd-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvabsd-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvavg-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvavg-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvavgr-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvavgr-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbsll_v.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbsrl_v.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvneg.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsat-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsat-2.c: New test.

LoongArch: Add tests for ASX vector xvfnmadd/xvfrstp/xvfstpi/xvhsubw/ xvmsub/xvrotr/xvrotri/xvld/xvst instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvfnmadd_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfnmadd_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfrstp.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfrstpi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvhsubw-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvhsubw-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvld.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmsub.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvrotr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvrotri.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvst.c: New test.

LoongArch: Add tests for ASX vector comparison and selection instruction.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvseq.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvseqi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsle-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsle-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslei-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslei-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslt-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslt-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslti-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslti-2.c: New test.

LoongArch: Add tests for ASX vector floating-point conversion instruction.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvfcvt.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcvth.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvffint-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvffint-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvffinth.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfrint_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfrint_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvftint-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvftint-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvftint-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvftintl.c: New test.

LoongArch: Add tests for ASX vector floating-point operation instruction.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvfadd_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfadd_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfclass_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfclass_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvflogb_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvflogb_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmadd_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmadd_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmax_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmax_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmaxa_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmaxa_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfsqrt_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfsqrt_s.c: New test.

LoongArch: Add tests for ASX xvldrepl/xvstelm instruction generation.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvldrepl.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvstelm.c: New test.

LoongArch: Add tests for ASX builtin functions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-builtin.c: New test.

LoongArch: Add tests for ASX vector xvbitclr/xvbitclri/xvbitrev/xvbitrevi/ xvbitsel/xvbitseli/xvbitset/xvbitseti/xvclo/xvclz/xvpcnt instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvbitclr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitclri.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitrev.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitrevi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitsel.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitseli.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitset.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitseti.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvclo.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvclz.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpcnt.c: New test.

LoongArch: Add tests for ASX vector xvextl/xvsra/xvsran/xvsrarn instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvextl-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvextl-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsra.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrai.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsran.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrani.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrar.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrari.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrarn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrarni.c: New test.

LoongArch: Add tests for ASX vector xvsll/xvsrl instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvsll.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslli.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsllwil-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsllwil-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrl.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrli.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrln.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlni.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlri.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlrn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlrni.c: New test.

LoongArch: Add tests for ASX vector xvand/xvandi/xvandn/xvor/xvori/ xvnor/xvnori/xvxor/xvxori instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvand.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvandi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvandn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvnor.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvnori.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvor.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvori.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvorn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvxor.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvxori.c: New test.

LoongArch: Add tests for ASX vector xvldi/xvmskgez/xvmskltz/xvmsknz/xvmuh /xvsigncov instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvldi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmskgez.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmskltz.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmsknz.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmuh-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmuh-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsigncov.c: New test.

LoongArch: Add tests for ASX vector xvmax/xvmaxi/xvmin/xvmini instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvmax-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmax-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaxi-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaxi-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmin-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmin-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmini-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmini-2.c: New test.

LoongArch: Add tests for ASX vector xvmul/xvmod/xvdiv instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvdiv-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvdiv-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmod-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmul.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwev-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwev-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwev-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwod-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwod-3.c: New test.

LoongArch: Add tests for ASX vector subtraction instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvssub-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssub-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsub.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwev-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwev-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwod-2.c: New test.

LoongArch: Add tests for ASX vector xvhadd/xvhaddw/xvmaddwev/xvmaddwod instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvhaddw-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvhaddw-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmadd.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwev-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwev-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwev-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwod-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwod-3.c: New test.

LoongArch: Add tests for ASX vector xvadd/xvadda/xvaddi/xvaddwev/ xvaddwodxvsadd instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvadd.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvadda.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwev-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwev-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwev-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwod-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwod-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsadd-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsadd-2.c: New test.

LoongArch: Add tests for SX vector vfmadd/vfnmadd/vld/vst instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vfmadd_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmadd_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfnmadd_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfnmadd_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vld.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vst.c: New test.

LoongArch: Add tests for SX vector vand/vandi/vandn/vor/vori/vnor/ vnori/vxor/vxori instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vand.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vandi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vandn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vnor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vnori.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vori.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vorn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vxor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vxori.c: New test.

LoongArch: Add tests for SX vector handling and shuffle instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vbsll.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbsrl.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vextrins.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vilvh.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vilvl.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vinsgr2vr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpackev.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpackod.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpickev.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpickod.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpickve2gr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpremi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vreplgr2vr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vreplve.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vreplvei.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vshuf.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vshuf4i.c: New test.

LoongArch: Add tests for SX vector vfcmp instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vfcmp_caf.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_ceq.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cle.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_clt.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cne.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cun.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_saf.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_seq.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sle.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_slt.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sne.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sun.c: New test.

LoongArch: Add tests for SX vector vfrstp/vfrstpi/vseq/vseqi/vsle /vslei/vslt/vslti instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vfrstp.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfrstpi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vseq.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vseqi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsle-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsle-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslei-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslei-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslt-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslt-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslti-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslti-2.c: New test.

LoongArch: Add tests for SX vector floating point arithmetic instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vfadd_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfadd_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfclass_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfclass_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vflogb_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vflogb_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmax_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmax_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmaxa_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmaxa_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfsqrt_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfsqrt_s.c: New test.

LoongArch: Add tests for SX vector vbitclr/vbitclri/vbitrev/vbitrevi/ vbitsel/vbitseli/vbitset/vbitseti/vclo/vclz/vpcnt instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vbitclr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitclri.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitrev.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitrevi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitsel.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitseli.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitset.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitseti.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vclo.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vclz.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpcnt.c: New test.

LoongArch: Add tests for SX vector vssran/vssrani/vssrarn/vssrarni/vssrln /vssrlni/vssrlrn/vssrlrni instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vssran.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrani.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrarn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrarni.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrln.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrlni.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrlrn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrlrni.c: New test.

LoongArch: Add tests for SX vector vrotr/vrotri/vsra/vsrai/vsran/vsrani /vsrarn/vsrarni instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vrotr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vrotri.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsra.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrai.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsran.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrani.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrar.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrari.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrarn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrarni.c: New test.

LoongArch: Add tests for SX vector vsll/vslli/vsrl/vsrli/vsrln/vsrlni/vsrlr /vsrlri/vslrlrn/vsrlrni instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vsll.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslli.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsllwil-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsllwil-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrl.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrli.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrln.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrlni.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrlr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrlri.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrlrn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrlrni.c: New test.

LoongArch: Add tests for SX vector vdiv/vmod instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vdiv-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vdiv-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmod-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmod-2.c: New test.

LoongArch: Add tests for SX vector vabsd/vmskgez/vmskltz/vmsknz/vsigncov instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vabsd-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vabsd-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmskgez.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmskltz.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmsknz.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsigncov.c: New test.

LoongArch: Add tests for SX vector vexth/vextl/vldi/vneg/vsat instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vexth-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vexth-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vextl-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vextl-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vldi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vneg.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsat-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsat-2.c: New test.

LoongArch: Add tests for SX vector vmax/vmaxi/vmin/vmini instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vmax-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmax-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaxi-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaxi-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmin-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmin-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmini-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmini-2.c: New test.

LoongArch: Add tests for SX vector vavg/vavgr instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vavg-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vavg-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vavgr-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vavgr-2.c: New test.

LoongArch: Add tests for the SX vector multiplication instruction.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vmuh-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmuh-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmul.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmulwev-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmulwev-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmulwev-3.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmulwod-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmulwod-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmulwod-3.c: New test.

LoongArch: Add tests for SX vector addition vsadd instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vsadd-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsadd-2.c: New test.

LoongArch: Add tests for SX vector subtraction instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vhsubw-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vhsubw-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmsub.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssub-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssub-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsub.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsubi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsubwev-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsubwev-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsubwod-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsubwod-2.c: New test.

LoongArch: Add tests for SX vector addition instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vadd.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vadda.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddwev-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddwev-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddwev-3.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddwod-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddwod-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddwod-3.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vhaddw-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vhaddw-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmadd.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwev-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwev-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwev-3.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwod-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwod-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwod-3.c: New test.

LoongArch: Add tests for SX vector floating-point instructions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-vfcvt-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcvt-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vffint-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vffint-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vffint-3.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfrint_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfrint_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vftint-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vftint-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vftint-3.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vftint-4.c: New test.

LoongArch: Add tests for Loongson SX builtin functions.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lsx/lsx-builtin.c: New test.

LoongArch: Add testsuite framework for Loongson SX/ASX.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/loongarch-vector.exp: New test.
* gcc.target/loongarch/vector/simd_correctness_check.h: New test.

LoongArch: Add tests of -mstrict-align option.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/strict-align.c: New test.

Daily bump.

libstdc++: [_GLIBCXX_INLINE_VERSION] Fix <format> friend declaration

GCC do not consider the inline namespace in friend function declarations.
This is PR c++/59526, we need to explicit this namespace.

libstdc++-v3/ChangeLog:

* include/std/format (std::__format::_Arg_store): Explicit version
namespace on make_format_args friend declaration.

modula2: -Wcase-enum detect singular/plural and use switch during build

This patch generates a singular or plural message relating to the
number of enums missing.  Use -Wcase-enum when building of the
modula-2 libraries and m2/stage2/cc1gm2.

gcc/m2/ChangeLog:

* Make-lang.in (GM2_FLAGS): Add -Wcase-enum.
(GM2_ISO_FLAGS): Add -Wcase-enum.
* gm2-compiler/M2CaseList.mod (EnumerateErrors): Issue
singular or plural start text prior to the enum list.
Remove unused parameter tokenno.
(EmitMissingRangeErrors): New procedure.
(MissingCaseBounds): Call EmitMissingRangeErrors.
(MissingCaseStatementBounds): Call EmitMissingRangeErrors.
* gm2-libs-iso/TextIO.mod: Fix spacing.

libgm2/ChangeLog:

* libm2cor/Makefile.am (libm2cor_la_M2FLAGS): Add
-Wcase-enum.
* libm2cor/Makefile.in: Regenerate.
* libm2iso/Makefile.am (libm2iso_la_M2FLAGS): Add
-Wcase-enum.
* libm2iso/Makefile.in: Regenerate.
* libm2log/Makefile.am (libm2log_la_M2FLAGS): Add
-Wcase-enum.
* libm2log/Makefile.in: Regenerate.
* libm2pim/Makefile.am (libm2pim_la_M2FLAGS): Add
-Wcase-enum.
* libm2pim/Makefile.in: Regenerate.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>

RISC-V: Support VLS modes VEC_EXTRACT auto-vectorization

This patch support VLS modes VEC_EXTRACT to fix PR111391:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111391

I need VLS modes VEC_EXTRACT to fix this issue.

I have run the whole gcc testsuite, notice this patch increase these 4 FAILs:
FAIL: c-c++-common/vector-subscript-4.c  -std=gnu++14  scan-tree-dump-not optimized "vector"
FAIL: c-c++-common/vector-subscript-4.c  -std=gnu++17  scan-tree-dump-not optimized "vector"
FAIL: c-c++-common/vector-subscript-4.c  -std=gnu++20  scan-tree-dump-not optimized "vector"
FAIL: c-c++-common/vector-subscript-4.c  -std=gnu++98  scan-tree-dump-not optimized "vector"

After analysis and comparing with LLVM:
https://godbolt.org/z/ozhfKhj5Y

with this patch, GCC generate similar codegen like LLVM (Previously it can not be vectorized).

This patch is the prerequisite patch to fix an ICE.

So let's ignore those increased 4 dump IR FAILs since ICE is un-acceptable wheras dump FAILs are acceptable (But we should remember and eventually fix dump IR FAILs too).

gcc/ChangeLog:

* config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
(@vec_extract<mode><vel>): Ditto.
* config/riscv/vector.md: Ditto

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/def.h: Add more def.
* gcc.target/riscv/rvv/autovec/vls/extract-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/extract-2.c: New test.

MATCH: Move `X <= MAX(X, Y)` before `MIN (X, C1) < C2` pattern

Since matching C1 as C2 here will decrease how much other simplifications
will need to happen to get the final answer.

OK? Bootstrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

* match.pd (`X <= MAX(X, Y)`):
Move before `MIN (X, C1) < C2` pattern.

MATCH: [PR111364] Add some more minmax cmp operand simplifications

This adds a few more minmax cmp operand simplifications which were missed before.
`MIN(a,b) < a` -> `a > b`
`MIN(a,b) >= a` -> `a <= b`
`MAX(a,b) > a` -> `a < b`
`MAX(a,b) <= a` -> `a >= b`

OK? Bootstrapped and tested on x86_64-linux-gnu.

Note gcc.dg/pr96708-negative.c needed to updated to remove the
check for MIN/MAX as they have been optimized (correctly) away.

PR tree-optimization/111364

gcc/ChangeLog:

* match.pd (`MIN (X, Y) == X`): Extend
to min/lt, min/ge, max/gt, max/le.

gcc/testsuite/ChangeLog:

* gcc.c-torture/execute/minmaxcmp-1.c: New test.
* gcc.dg/tree-ssa/minmaxcmp-2.c: New test.
* gcc.dg/pr96708-negative.c: Update testcase.
* gcc.dg/pr96708-positive.c: Add comment about `return 0`.

MATCH: Simplify `(X % Y) < Y` pattern.

This merges the two patterns to catch
`(X % Y) < Y` and `Y > (X % Y)` into one by
using :c on the comparison operator.
It does not change any code generation nor
anything else. It is more to allow for better
maintainability of this pattern.

OK? Bootstrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

PR tree-optimization/111345
* match.pd (`Y > (X % Y)`): Merge
into ...
(`(X % Y) < Y`): Pattern by adding `:c`
on the comparison.

tree-optimization/111387 - BB SLP and irreducible regions

When we split an irreducible region for BB vectorization analysis
the defensive handling of external backedge defs in
vect_get_and_check_slp_defs doesn't work since that relies on
dominance info to identify a backedge.  The testcase also shows
we are iterating over the function in a sub-optimal way which is
why we split the irreducible region in the first place.  The fix
is to mark backedges and use EDGE_DFS_BACK to identify them and
to use the region RPO compute which can produce a RPO order keeping
cycles in a better order (and as side effect marks backedges).

PR tree-optimization/111387
* tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
EDGE_DFS_BACK when doing BB vectorization.
(vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
to compute RPO and mark backedges.

* gcc.dg/torture/pr111387.c: New testcase.

RISC-V: Support cond vmulh.vv and vmulu.vv autovec patterns

This patch adds combine patterns to combine vmulh[u].vv + vcond_mask
to mask vmulh[u].vv. For vmulsu.vv, it can not be produced in midend
currently. We will send another patch to take this issue.

gcc/ChangeLog:

* config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
New combine pattern.
* config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
(<mulh_table><mode>3_highpart): Merged pattern.
(umul<mode>3_highpart): Mrege smul and umul.
* config/riscv/vector-iterators.md (umul): New iterators.
(UNSPEC_VMULHU): New iterators.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/cond/cond_mulh-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_mulh-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_mulh_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_mulh_run-2.c: New test.

RISC-V: Support cond vnsrl/vnsra autovec patterns

This patch add combine patterns to combine vnsra.w[vxi] + vcond_mask
to a mask vnsra.w[vxi].

gcc/ChangeLog:

* config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
New combine pattern.
(*cond_<any_shiftrt:optab>trunc<mode>): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c: New test.

RISC-V: Support cond vfsgnj.vv autovec patterns

This patch add combine patterns to combine vfsgnj.vv + vcond_mask
to mask vfsgnj.vv. For vfsgnjx.vv, it can not be produced in midend
currently. We will send another patch to take this issue.

gcc/ChangeLog:

* config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
(*cond_copysign<mode>): New combine pattern.
* config/riscv/riscv-v.cc (needs_fp_rounding): Extend.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/cond/cond_copysign-run.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv32gcv.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv64gcv.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_copysign-template.h: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_copysign-zvfh-run.c: New test.

tree-optimization/111397 - missed copy propagation involving abnormal dest

The following extends the previous enhancement to copy propagation
involving abnormals.  We can easily replace abnormal uses by not
abnormal uses and only need to preserve the abnormals in PHI arguments
flowing in from abnormal edges.  This changes the may_propagate_copy
argument indicating we are not propagating into a PHI node to indicate
whether we know we are not propagating into a PHI argument from an
abnormal PHI instead.

PR tree-optimization/111397
* tree-ssa-propagate.cc (may_propagate_copy): Change optional
argument to specify whether the PHI destination doesn't flow in
from an abnormal PHI.
(propagate_value): Adjust.
* tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
PHI dest.
* tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
Likewise.
(process_bb): Likewise.

* gcc.dg/uninit-pr111397.c: New testcase.

RISC-V: Bugfix PR111362 for incorrect frm emit

When the mode switching from NONE to CALL, we will restore the
frm but lack some check if we have static frm insn in cfun.

This patch would like to fix this by adding static frm insn check.

PR target/111362

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/no-honor-frm-1.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>

RISC-V: Remove redundant ABI test

We only support and report warning for RVV types.

We don't report warning for GNU vectors.
So this testcase checking is incorrect and the FAIL is bogus.

Remove it and commit it.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vector-abi-9.c: Removed.

Checking undefined_p before using the vr

For pattern "(X + C) / N": "div (plus@3 @0 INTEGER_CST@1) INTEGER_CST@2)",
Even if "X" has value-range and "X + C" does not overflow, "@3" may still
be undefined. Like below example:

_3 = _2 + -5;
if (0 != 0)
  goto <bb 3>; [34.00%]
else
  goto <bb 4>; [66.00%]
;;  succ:       3
;;              4

;; basic block 3, loop depth 0
;;  pred:       2
_5 = _3 / 5;
;;  succ:       4

The whole pattern "(_2 + -5 ) / 5" is in "bb 3", but "bb 3" would be
unreachable (because "if (0 != 0)" is always false).
And "get_range_query (cfun)->range_of_expr (vr3, @3)" is checked in
"bb 3", "range_of_expr" gets an "undefined vr3". Where "@3" is "_5".

So, before using "vr3", it would be safe to check "!vr3.undefined_p ()".

PR tree-optimization/111303

gcc/ChangeLog:

* match.pd ((X - N * M) / N): Add undefined_p checking.
((X + N * M) / N): Likewise.
((X + C) div_rshift N): Likewise.

gcc/testsuite/ChangeLog:

* gcc.dg/pr111303.c: New test.

Daily bump.

RISC-V: Enable vec_int testsuite for RVV VLA vectorization

This patch is the final version of enabling vect_int test for RVV.

There are still 80+ FAILs and they can't be fixed by adjusting testcases or target-supports.exp

Here is the analysis of **ALL** FAILs:

1. REAL highest priority FAILs:

ICE:

FAIL: gcc.dg/vect/vect-live-6.c (internal compiler error: in force_align_down_and_div, at poly-int.h:1903)
FAIL: gcc.dg/vect/vect-live-6.c (test for excess errors)
FAIL: gcc.dg/vect/vect-live-6.c -flto -ffat-lto-objects (internal compiler error: in force_align_down_and_div, at poly-int.h:1903)
FAIL: gcc.dg/vect/vect-live-6.c -flto -ffat-lto-objects (test for excess errors)

Execution fails:
FAIL: gcc.dg/vect/slp-reduc-7.c -flto -ffat-lto-objects execution test
FAIL: gcc.dg/vect/slp-reduc-7.c execution test
FAIL: gcc.dg/vect/vect-alias-check-10.c -flto -ffat-lto-objects execution test
FAIL: gcc.dg/vect/vect-alias-check-10.c execution test
FAIL: gcc.dg/vect/vect-alias-check-11.c -flto -ffat-lto-objects execution test
FAIL: gcc.dg/vect/vect-alias-check-11.c execution test
FAIL: gcc.dg/vect/vect-alias-check-12.c -flto -ffat-lto-objects execution test
FAIL: gcc.dg/vect/vect-alias-check-12.c execution test
FAIL: gcc.dg/vect/vect-alias-check-14.c -flto -ffat-lto-objects execution test
FAIL: gcc.dg/vect/vect-alias-check-14.c execution test
FAIL: gcc.dg/vect/vect-double-reduc-5.c -flto -ffat-lto-objects execution test
FAIL: gcc.dg/vect/vect-double-reduc-5.c execution test

These FAILs are REAL problem that we need to address first.

2. Missed optimizations due to lacking VLS modes patterns:

FAIL: gcc.dg/vect/pr57705.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorized 1 loop" 2
FAIL: gcc.dg/vect/pr57705.c scan-tree-dump-times vect "vectorized 1 loop" 2
FAIL: gcc.dg/vect/pr65518.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorized 0 loops in function" 2
FAIL: gcc.dg/vect/pr65518.c scan-tree-dump-times vect "vectorized 0 loops in function" 2
FAIL: gcc.dg/vect/slp-1.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorizing stmts using SLP" 4
FAIL: gcc.dg/vect/slp-1.c scan-tree-dump-times vect "vectorizing stmts using SLP" 4
FAIL: gcc.dg/vect/slp-12a.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorizing stmts using SLP" 1
FAIL: gcc.dg/vect/slp-12a.c scan-tree-dump-times vect "vectorizing stmts using SLP" 1
FAIL: gcc.dg/vect/slp-16.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorizing stmts using SLP" 2
FAIL: gcc.dg/vect/slp-16.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2
FAIL: gcc.dg/vect/slp-34-big-array.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorizing stmts using SLP" 2
FAIL: gcc.dg/vect/slp-34-big-array.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2
FAIL: gcc.dg/vect/slp-34.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorizing stmts using SLP" 2
FAIL: gcc.dg/vect/slp-34.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2
FAIL: gcc.dg/vect/slp-35.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorizing stmts using SLP" 1
FAIL: gcc.dg/vect/slp-35.c scan-tree-dump-times vect "vectorizing stmts using SLP" 1
FAIL: gcc.dg/vect/slp-43.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorized 1 loops" 13
FAIL: gcc.dg/vect/slp-43.c scan-tree-dump-times vect "vectorized 1 loops" 13
FAIL: gcc.dg/vect/slp-45.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorized 1 loops" 13
FAIL: gcc.dg/vect/slp-45.c scan-tree-dump-times vect "vectorized 1 loops" 13
FAIL: gcc.dg/vect/slp-47.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorizing stmts using SLP" 2
FAIL: gcc.dg/vect/slp-47.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2
FAIL: gcc.dg/vect/slp-48.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorizing stmts using SLP" 2
FAIL: gcc.dg/vect/slp-48.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2

These testcases need VLS modes vec_init patterns.

FAIL: gcc.dg/vect/vect-bic-bitmask-12.c -flto -ffat-lto-objects  scan-tree-dump dce7 "<=\\s*.+{ 255,.+}"
FAIL: gcc.dg/vect/vect-bic-bitmask-12.c scan-tree-dump dce7 "<=\\s*.+{ 255,.+}"
FAIL: gcc.dg/vect/vect-bic-bitmask-23.c -flto -ffat-lto-objects  scan-tree-dump dce7 "<=\\s*.+{ 255, 15, 1, 65535 }"
FAIL: gcc.dg/vect/vect-bic-bitmask-23.c scan-tree-dump dce7 "<=\\s*.+{ 255, 15, 1, 65535 }"

These testcases need VLS modes VCOND_MASK and vec_cmp patterns.

3. Maybe bogus dump check FAILs:

FAIL: gcc.dg/vect/vect-multitypes-11.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorized 1 loops" 1
FAIL: gcc.dg/vect/vect-multitypes-11.c scan-tree-dump-times vect "vectorized 1 loops" 1
FAIL: gcc.dg/vect/vect-outer-4c-big-array.c -flto -ffat-lto-objects  scan-tree-dump-times vect "zero step in outer loop." 1
FAIL: gcc.dg/vect/vect-outer-4c-big-array.c scan-tree-dump-times vect "zero step in outer loop." 1
FAIL: gcc.dg/vect/vect-reduc-dot-s16a.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vect_recog_dot_prod_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-dot-s16a.c scan-tree-dump-times vect "vect_recog_dot_prod_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-dot-s8a.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vect_recog_dot_prod_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-dot-s8a.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vect_recog_widen_mult_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-dot-s8a.c scan-tree-dump-times vect "vect_recog_dot_prod_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-dot-s8a.c scan-tree-dump-times vect "vect_recog_widen_mult_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-dot-s8b.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vect_recog_widen_mult_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-dot-s8b.c scan-tree-dump-times vect "vect_recog_widen_mult_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-dot-u16b.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vect_recog_dot_prod_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-dot-u16b.c scan-tree-dump-times vect "vect_recog_dot_prod_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-dot-u8a.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vect_recog_dot_prod_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-dot-u8a.c scan-tree-dump-times vect "vect_recog_dot_prod_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-dot-u8b.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vect_recog_dot_prod_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-dot-u8b.c scan-tree-dump-times vect "vect_recog_dot_prod_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-pattern-1a.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vect_recog_widen_sum_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-pattern-1a.c scan-tree-dump-times vect "vect_recog_widen_sum_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-pattern-1b-big-array.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vect_recog_widen_sum_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-pattern-1b-big-array.c scan-tree-dump-times vect "vect_recog_widen_sum_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-pattern-1c-big-array.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vect_recog_widen_sum_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-pattern-1c-big-array.c scan-tree-dump-times vect "vect_recog_widen_sum_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-pattern-2a.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vect_recog_widen_sum_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-pattern-2a.c scan-tree-dump-times vect "vect_recog_widen_sum_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-pattern-2b-big-array.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vect_recog_widen_sum_pattern: detected" 1
FAIL: gcc.dg/vect/vect-reduc-pattern-2b-big-array.c scan-tree-dump-times vect "vect_recog_widen_sum_pattern: detected" 1
FAIL: gcc.dg/vect/wrapv-vect-reduc-dot-s8b.c scan-tree-dump-times vect "vect_recog_dot_prod_pattern: detected" 1
FAIL: gcc.dg/vect/wrapv-vect-reduc-dot-s8b.c scan-tree-dump-times vect "vect_recog_widen_mult_pattern: detected" 1

These testcases because we don't support widen_sum/vec_unpack....etc patterns.
Currently, we don't support them since we don't see the benefits.
May support those patterns if they are beneficial ? Or Fix testcases ?

Conclusion:

IMHO, I think we can merge this patch after we addressed all REAL highest priority issues (1).

The rest FAILs are not big issues then we can reduce them by supporting more features (For example VLS modes).

Feel free to give any comments.

gcc/testsuite/ChangeLog:

* lib/target-supports.exp: Enable vect_int for RVV.

RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]

As this PR: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111337

We support VECTOR BOOL vcond_mask to fix this following ICE:
0x1a9e309 gimple_expand_vec_cond_expr
        ../../../../gcc/gcc/gimple-isel.cc:283
0x1a9ea56 execute
        ../../../../gcc/gcc/gimple-isel.cc:390

gcc/ChangeLog:

PR target/111337
* config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.

libgo: fix DejaGNU testsuite compiler when using build sysroot

Patch from Thomas Schwinge.

PR testsuite/109951
* configure.ac: 'AC_SUBST(SYSROOT_CFLAGS_FOR_TARGET)'.
* Makefile.in: Regenerate.
* configure: Likewise.
* testsuite/Makefile.in: Likewise.
* testsuite/lib/libgo.exp (libgo_init): If
'--with-build-sysroot=[...]' was specified, use it for build-tree
testing.
* testsuite/libgo-test-support.exp.in (GOC_UNDER_TEST): Don't set.
(SYSROOT_CFLAGS_FOR_TARGET): Set.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/527755

c++: __integer_pack with class argument [PR111357]

The argument might not already be an integer.

PR c++/111357

gcc/cp/ChangeLog:

* pt.cc (expand_integer_pack): Convert argument to int.

gcc/testsuite/ChangeLog:

* g++.dg/ext/integer-pack7.C: New test.

c++: ICE with -fno-exceptions and array init [PR107198]

The removed line no longer has an effect on anew5.C error recovery, and
removing it improves error recovery for this testcase.

PR c++/107198

gcc/cp/ChangeLog:

* typeck2.cc (process_init_constructor_array): Use VEC_INIT_EXPR
regardless of seen_error.

gcc/testsuite/ChangeLog:

* g++.dg/eh/no-exceptions1.C: New test.

math-opts: Add dbgcounter for FMA formation

This patch is a simple addition of a debug counter to FMA formation in
tree-ssa-math-opts.cc.  Given that issues with FMAs do occasionally
pop up, it seems genuinely useful.

I simply added an if right after the initial checks in
convert_mult_to_fma even though when FMA formation deferring is
active (i.e. when targeting Zen CPUs) this would interact with it (and
at this moment lead to producing all deferred candidates), so when
using the dbg counter to find a harmful set of FMAs, it is probably
best to also set param_avoid_fma_max_bits to zero.  I could not find a
better place which would not also make the code unnecessarily more
complicated.

gcc/ChangeLog:

2023-09-06  Martin Jambor  <mjambor@suse.cz>

* dbgcnt.def (form_fma): New.
* tree-ssa-math-opts.cc: Include dbgcnt.h.
(convert_mult_to_fma): Bail out if the debug counter say so.

MAINTAINERS: Add myself to write after approval

ChangeLog:

* MAINTAINERS: Add myself

RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert

Updates autovec instruction that was added after last patch and turns on the
assert statement to ensure all new instructions have a type.

* config/riscv/autovec-opt.md: Update type
* config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert

Reviewed-by: Jeff Law <jlaw@ventanamicro.com>
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>

libstdc++: Fix std::not_fn perfect forwarding [PR111327]

The previous patch fixed perfect forwarding in std::bind_front.
This patch fixes the same issue in std::not_fn.

PR libstdc++/111327

libstdc++-v3/ChangeLog:

* include/std/functional (_GLIBCXX_NOT_FN_CALL_OP): Also define
a deleted fallback operator() overload.  Constrain both the
enabled and deleted overloads accordingly.
* testsuite/20_util/function_objects/not_fn/111327.cc: New test.

libstdc++: Fix std::bind_front perfect forwarding [PR111327]

In order to properly implement a perfect forwarding call wrapper (without
C++23 deducing 'this') we need a total of 8 operator() overloads, 4
enabled ones and 4 deleted ones, i.e. two for each const/ref qual pair,
as described in section 5.5 of P0847R6.  Otherwise the wrapper may not
do the right thing if the underlying function object has a deleted
const/ref-qualified operator() overload.  This patch fixes this issue in
std::bind_front.

PR libstdc++/111327

libstdc++-v3/ChangeLog:

* include/std/functional (_Bind_front::operator()): Add deleted
fallback overloads for each const/ref qualifier pair.  Give the
enabled overloads dummy constraints to make each one more
specialized than the corresponding deleted overload.
* testsuite/20_util/function_objects/bind_front/111327.cc: New test.

libstdc++: Remove std::bind_front specialization for no bound args

The specialization used by std::bind_front when there are no bound args
(added by r13-4214-gcbd05ca5ab1231) seems to be mostly obsoleted by
r13-5033-ge2eab3c4edb6aa which added [[no_unique_address]] to the main
template's data members.  What's left to consider is the compile time
advantage of the specialization, which doesn't seem huge since it just
avoids using tuple<> (which is an explicit specialization anyway) and
expanding some pack expansions with an empty argument pack.  So this
patch removes this specialization; this means we have one less spot to
fix the PR libstdc++/111327 perfect forwarding bug.

libstdc++-v3/ChangeLog:

* include/std/functional (_Bind_front0): Remove.
(_Bind_front_t): Adjust.

aarch64: Make stack smash canary protect saved registers

AArch64 normally puts the saved registers near the bottom of the frame,
immediately above any dynamic allocations.  But this means that a
stack-smash attack on those dynamic allocations could overwrite the
saved registers without needing to reach as far as the stack smash
canary.

The same thing could also happen for variable-sized arguments that are
passed by value, since those are allocated before a call and popped on
return.

This patch avoids that by putting the locals (and thus the canary) below
the saved registers when stack smash protection is active.

The patch fixes CVE-2023-4039.

gcc/
* config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
New function.
(aarch64_layout_frame): Use it to decide whether locals should
go above or below the saved registers.
(aarch64_expand_prologue): Update stack layout comment.
Emit a stack tie after the final adjustment.

gcc/testsuite/
* gcc.target/aarch64/stack-protector-8.c: New test.
* gcc.target/aarch64/stack-protector-9.c: Likewise.

aarch64: Remove below_hard_fp_saved_regs_size

After previous patches, it's no longer necessary to store
saved_regs_size and below_hard_fp_saved_regs_size in the frame info.
All measurements instead use the top or bottom of the frame as
reference points.

gcc/
* config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
(aarch64_frame::below_hard_fp_saved_regs_size): Delete.
* config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.

aarch64: Explicitly record probe registers in frame info

The stack frame is currently divided into three areas:

A: the area above the hard frame pointer
B: the SVE saves below the hard frame pointer
C: the outgoing arguments

If the stack frame is allocated in one chunk, the allocation needs a
probe if the frame size is >= guard_size - 1KiB.  In addition, if the
function is not a leaf function, it must probe an address no more than
1KiB above the outgoing SP.  We ensured the second condition by

(1) using single-chunk allocations for non-leaf functions only if
    the link register save slot is within 512 bytes of the bottom
    of the frame; and

(2) using the link register save as a probe (meaning, for instance,
    that it can't be individually shrink wrapped)

If instead the stack is allocated in multiple chunks, then:

* an allocation involving only the outgoing arguments (C above) requires
  a probe if the allocation size is > 1KiB

* any other allocation requires a probe if the allocation size
  is >= guard_size - 1KiB

* second and subsequent allocations require the previous allocation
  to probe at the bottom of the allocated area, regardless of the size
  of that previous allocation

The final point means that, unlike for single allocations,
it can be necessary to have both a non-SVE register probe and
an SVE register probe.  For example:

* allocate A, probe using a non-SVE register save
* allocate B, probe using an SVE register save
* allocate C

The non-SVE register used in this case was again the link register.
It was previously used even if the link register save slot was some
bytes above the bottom of the non-SVE register saves, but an earlier
patch avoided that by putting the link register save slot first.

As a belt-and-braces fix, this patch explicitly records which
probe registers we're using and allows the non-SVE probe to be
whichever register comes first (as for SVE).

The patch also avoids unnecessary probes in sve/pcs/stack_clash_3.c.

gcc/
* config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
(aarch64_frame::hard_fp_save_and_probe): New fields.
* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
Rather than asserting that a leaf function saves LR, instead assert
that a leaf function saves something.
(aarch64_get_separate_components): Prevent the chosen probe
registers from being individually shrink-wrapped.
(aarch64_allocate_and_probe_stack_space): Remove workaround for
probe registers that aren't at the bottom of the previous allocation.

gcc/testsuite/
* gcc.target/aarch64/sve/pcs/stack_clash_3.c: Avoid redundant probes.

aarch64: Simplify probe of final frame allocation

Previous patches ensured that the final frame allocation only needs
a probe when the size is strictly greater than 1KiB.  It's therefore
safe to use the normal 1024 probe offset in all cases.

The main motivation for doing this is to simplify the code and
remove the number of special cases.

gcc/
* config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
Always probe the residual allocation at offset 1024, asserting
that that is in range.

gcc/testsuite/
* gcc.target/aarch64/stack-check-prologue-17.c: Expect the probe
to be at offset 1024 rather than offset 0.
* gcc.target/aarch64/stack-check-prologue-18.c: Likewise.
* gcc.target/aarch64/stack-check-prologue-19.c: Likewise.

aarch64: Put LR save probe in first 16 bytes

-fstack-clash-protection uses the save of LR as a probe for the next
allocation.  The next allocation could be:

* another part of the static frame, e.g. when allocating SVE save slots
  or outgoing arguments

* an alloca in the same function

* an allocation made by a callee function

However, when -fomit-frame-pointer is used, the LR save slot is placed
above the other GPR save slots.  It could therefore be up to 80 bytes
above the base of the GPR save area (which is also the hard fp address).

aarch64_allocate_and_probe_stack_space took this into account when
deciding how much subsequent space could be allocated without needing
a probe.  However, it interacted badly with:

      /* If doing a small final adjustment, we always probe at offset 0.
 This is done to avoid issues when LR is not at position 0 or when
 the final adjustment is smaller than the probing offset.  */
      else if (final_adjustment_p && rounded_size == 0)
residual_probe_offset = 0;

which forces any allocation that is smaller than the guard page size
to be probed at offset 0 rather than the usual offset 1024.  It was
therefore possible to construct cases in which we had:

* a probe using LR at SP + 80 bytes (or some other value >= 16)
* an allocation of the guard page size - 16 bytes
* a probe at SP + 0

which allocates guard page size + 64 consecutive unprobed bytes.

This patch requires the LR probe to be in the first 16 bytes of the
save area when stack clash protection is active.  Doing it
unconditionally would cause code-quality regressions.

Putting LR before other registers prevents push/pop allocation
when shadow call stacks are enabled, since LR is restored
separately from the other callee-saved registers.

The new comment doesn't say that the probe register is required
to be LR, since a later patch removes that restriction.

gcc/
* config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
the LR save slot is in the first 16 bytes of the register save area.
Only form STP/LDP push/pop candidates if both registers are valid.
(aarch64_allocate_and_probe_stack_space): Remove workaround for
when LR was not in the first 16 bytes.

gcc/testsuite/
* gcc.target/aarch64/stack-check-prologue-18.c: New test.
* gcc.target/aarch64/stack-check-prologue-19.c: Likewise.
* gcc.target/aarch64/stack-check-prologue-20.c: Likewise.

aarch64: Tweak stack clash boundary condition

The AArch64 ABI says that, when stack clash protection is used,
there can be a maximum of 1KiB of unprobed space at sp on entry
to a function.  Therefore, we need to probe when allocating
>= guard_size - 1KiB of data (>= rather than >).  This is what
GCC does.

If an allocation is exactly guard_size bytes, it is enough to allocate
those bytes and probe once at offset 1024.  It isn't possible to use a
single probe at any other offset: higher would conmplicate later code,
by leaving more unprobed space than usual, while lower would risk
leaving an entire page unprobed.  For simplicity, the code probes all
allocations at offset 1024.

Some register saves also act as probes.  If we need to allocate
more space below the last such register save probe, we need to
probe the allocation if it is > 1KiB.  Again, this allocation is
then sometimes (but not always) probed at offset 1024.  This sort of
allocation is currently only used for outgoing arguments, which are
rarely this big.

However, the code also probed if this final outgoing-arguments
allocation was == 1KiB, rather than just > 1KiB.  This isn't
necessary, since the register save then probes at offset 1024
as required.  Continuing to probe allocations of exactly 1KiB
would complicate later patches.

gcc/
* config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
Don't probe final allocations that are exactly 1KiB in size (after
unprobed space above the final allocation has been deducted).

gcc/testsuite/
* gcc.target/aarch64/stack-check-prologue-17.c: New test.

aarch64: Minor initial adjustment tweak

This patch just changes a calculation of initial_adjust
to one that makes it slightly more obvious that the total
adjustment is frame.frame_size.

gcc/
* config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
calculation of initial_adjust for frames in which all saves
are SVE saves.

aarch64: Simplify top of frame allocation

After previous patches, it no longer really makes sense to allocate
the top of the frame in terms of varargs_and_saved_regs_size and
saved_regs_and_above.

gcc/
* config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
the allocation of the top of the frame.

aarch64: Measure reg_offset from the bottom of the frame

reg_offset was measured from the bottom of the saved register area.
This made perfect sense with the original layout, since the bottom
of the saved register area was also the hard frame pointer address.
It became slightly less obvious with SVE, since we save SVE
registers below the hard frame pointer, but it still made sense.

However, if we want to allow different frame layouts, it's more
convenient and obvious to measure reg_offset from the bottom of
the frame.  After previous patches, it's also a slight simplification
in its own right.

gcc/
* config/aarch64/aarch64.h (aarch64_frame): Add comment above
reg_offset.
* config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
from the bottom of the frame, rather than the bottom of the saved
register area.  Measure reg_offset from the bottom of the frame
rather than the bottom of the saved register area.
(aarch64_save_callee_saves): Update accordingly.
(aarch64_restore_callee_saves): Likewise.
(aarch64_get_separate_components): Likewise.
(aarch64_process_components): Likewise.

aarch64: Tweak frame_size comment

This patch fixes another case in which a value was described with
an “upside-down” view.

gcc/
* config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.

aarch64: Rename hard_fp_offset to bytes_above_hard_fp

Similarly to the previous locals_offset patch, hard_fp_offset
was described as:

  /* Offset from the base of the frame (incomming SP) to the
     hard_frame_pointer.  This value is always a multiple of
     STACK_BOUNDARY.  */
  poly_int64 hard_fp_offset;

which again took an “upside-down” view: higher offsets meant lower
addresses.  This patch renames the field to bytes_above_hard_fp instead.

gcc/
* config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
to...
(aarch64_frame::bytes_above_hard_fp): ...this.
* config/aarch64/aarch64.cc (aarch64_layout_frame)
(aarch64_expand_prologue): Update accordingly.
(aarch64_initial_elimination_offset): Likewise.

aarch64: Rename locals_offset to bytes_above_locals

locals_offset was described as:

  /* Offset from the base of the frame (incomming SP) to the
     top of the locals area.  This value is always a multiple of
     STACK_BOUNDARY.  */

This is implicitly an “upside down” view of the frame: the incoming
SP is at offset 0, and anything N bytes below the incoming SP is at
offset N (rather than -N).

However, reg_offset instead uses a “right way up” view; that is,
it views offsets in address terms.  Something above X is at a
positive offset from X and something below X is at a negative
offset from X.

Also, even on FRAME_GROWS_DOWNWARD targets like AArch64,
target-independent code views offsets in address terms too:
locals are allocated at negative offsets to virtual_stack_vars.

It seems confusing to have *_offset fields of the same structure
using different polarities like this.  This patch tries to avoid
that by renaming locals_offset to bytes_above_locals.

gcc/
* config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
(aarch64_frame::bytes_above_locals): ...this.
* config/aarch64/aarch64.cc (aarch64_layout_frame)
(aarch64_initial_elimination_offset): Update accordingly.

aarch64: Only calculate chain_offset if there is a chain

After previous patches, it is no longer necessary to calculate
a chain_offset in cases where there is no chain record.

gcc/
* config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
calculation of chain_offset into the emit_frame_chain block.

aarch64: Tweak aarch64_save/restore_callee_saves

aarch64_save_callee_saves and aarch64_restore_callee_saves took
a parameter called start_offset that gives the offset of the
bottom of the saved register area from the current stack pointer.
However, it's more convenient for later patches if we use the
bottom of the entire frame as the reference point, rather than
the bottom of the saved registers.

Doing that removes the need for the callee_offset field.
Other than that, this is not a win on its own.  It only really
makes sense in combination with the follow-on patches.

gcc/
* config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
* config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
callee_offset handling.
(aarch64_save_callee_saves): Replace the start_offset parameter
with a bytes_below_sp parameter.
(aarch64_restore_callee_saves): Likewise.
(aarch64_expand_prologue): Update accordingly.
(aarch64_expand_epilogue): Likewise.

aarch64: Add bytes_below_hard_fp to frame info

Following on from the previous bytes_below_saved_regs patch, this one
records the number of bytes that are below the hard frame pointer.
This eventually replaces below_hard_fp_saved_regs_size.

If a frame pointer is not needed, the epilogue adds final_adjust
to the stack pointer before restoring registers:

     aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true);

Therefore, if the epilogue needs to restore the stack pointer from
the hard frame pointer, the directly corresponding offset is:

     -bytes_below_hard_fp + final_adjust

i.e. go from the hard frame pointer to the bottom of the frame,
then add the same amount as if we were using the stack pointer
from the outset.

gcc/
* config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
field.
* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
(aarch64_expand_epilogue): Use it instead of
below_hard_fp_saved_regs_size.

aarch64: Add bytes_below_saved_regs to frame info

The frame layout code currently hard-codes the assumption that
the number of bytes below the saved registers is equal to the
size of the outgoing arguments.  This patch abstracts that
value into a new field of aarch64_frame.

gcc/
* config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
field.
* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
and use it instead of crtl->outgoing_args_size.
(aarch64_get_separate_components): Use bytes_below_saved_regs instead
of outgoing_args_size.
(aarch64_process_components): Likewise.

aarch64: Explicitly handle frames with no saved registers

If a frame has no saved registers, it can be allocated in one go.
There is no need to treat the areas below and above the saved
registers as separate.

And if we allocate the frame in one go, it should be allocated
as the initial_adjust rather than the final_adjust.  This allows the
frame size to grow to guard_size - guard_used_by_caller before a stack
probe is needed.  (A frame with no register saves is necessarily a
leaf frame.)

This is a no-op as thing stand, since a leaf function will have
no outgoing arguments, and so all the frame will be above where
the saved registers normally go.

gcc/
* config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
allocate the frame in one go if there are no saved registers.