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14 months agovect: Tighten vect_determine_precisions_from_range [PR113281]
Richard Sandiford [Tue, 4 Jun 2024 07:47:48 +0000 (08:47 +0100)] 
vect: Tighten vect_determine_precisions_from_range [PR113281]

This was another PR caused by the way that
vect_determine_precisions_from_range handles shifts.  We tried to
narrow 32768 >> x to a 16-bit shift based on range information for
the inputs and outputs, with vect_recog_over_widening_pattern
(after PR110828) adjusting the shift amount.  But this doesn't
work for the case where x is in [16, 31], since then 32-bit
32768 >> x is a well-defined zero, whereas no well-defined
16-bit 32768 >> y will produce 0.

We could perhaps generate x < 16 ? 32768 >> x : 0 instead,
but since vect_determine_precisions_from_range was never really
supposed to rely on fix-ups, it seems better to fix that instead.

The patch also makes the code more selective about which codes
can be narrowed based on input and output ranges.  This showed
that vect_truncatable_operation_p was missing cases for
BIT_NOT_EXPR (equivalent to BIT_XOR_EXPR of -1) and NEGATE_EXPR
(equivalent to BIT_NOT_EXPR followed by a PLUS_EXPR of 1).

pr113281-1.c is the original testcase.  pr113281-[23].c failed
before the patch due to overly optimistic narrowing.  pr113281-[45].c
previously passed and are meant to protect against accidental
optimisation regressions.

gcc/
PR target/113281
* tree-vect-patterns.cc (vect_recog_over_widening_pattern): Remove
workaround for right shifts.
(vect_truncatable_operation_p): Handle NEGATE_EXPR and BIT_NOT_EXPR.
(vect_determine_precisions_from_range): Be more selective about
which codes can be narrowed based on their input and output ranges.
For shifts, require at least one more bit of precision than the
maximum shift amount.

gcc/testsuite/
PR target/113281
* gcc.dg/vect/pr113281-1.c: New test.
* gcc.dg/vect/pr113281-2.c: Likewise.
* gcc.dg/vect/pr113281-3.c: Likewise.
* gcc.dg/vect/pr113281-4.c: Likewise.
* gcc.dg/vect/pr113281-5.c: Likewise.

(cherry picked from commit 1a8261e047f7a2c2b0afb95716f7615cba718cd1)

14 months agovect: Fix access size alignment assumption [PR115192]
Richard Sandiford [Tue, 4 Jun 2024 07:47:47 +0000 (08:47 +0100)] 
vect: Fix access size alignment assumption [PR115192]

create_intersect_range_checks checks whether two access ranges
a and b are alias-free using something equivalent to:

  end_a <= start_b || end_b <= start_a

It has two ways of doing this: a "vanilla" way that calculates
the exact exclusive end pointers, and another way that uses the
last inclusive aligned pointers (and changes the comparisons
accordingly).  The comment for the latter is:

      /* Calculate the minimum alignment shared by all four pointers,
 then arrange for this alignment to be subtracted from the
 exclusive maximum values to get inclusive maximum values.
 This "- min_align" is cumulative with a "+ access_size"
 in the calculation of the maximum values.  In the best
 (and common) case, the two cancel each other out, leaving
 us with an inclusive bound based only on seg_len.  In the
 worst case we're simply adding a smaller number than before.

The problem is that the associated code implicitly assumed that the
access size was a multiple of the pointer alignment, and so the
alignment could be carried over to the exclusive end pointer.

The testcase started failing after g:9fa5b473b5b8e289b6542
because that commit improved the alignment information for
the accesses.

gcc/
PR tree-optimization/115192
* tree-data-ref.cc (create_intersect_range_checks): Take the
alignment of the access sizes into account.

gcc/testsuite/
PR tree-optimization/115192
* gcc.dg/vect/pr115192.c: New test.

(cherry picked from commit a0fe4fb1c8d7804515845dd5d2a814b3c7a1ccba)

14 months agoDaily bump.
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14 months agoalpha: Fix invalid RTX in divmodsi insn patterns [PR115297]
Uros Bizjak [Fri, 31 May 2024 13:52:03 +0000 (15:52 +0200)] 
alpha: Fix invalid RTX in divmodsi insn patterns [PR115297]

any_divmod instructions are modelled with invalid RTX:

  [(set (match_operand:DI 0 "register_operand" "=c")
        (sign_extend:DI (match_operator:SI 3 "divmod_operator"
                        [(match_operand:DI 1 "register_operand" "a")
                         (match_operand:DI 2 "register_operand" "b")])))
   (clobber (reg:DI 23))
   (clobber (reg:DI 28))]

where SImode divmod_operator (div,mod,udiv,umod) has DImode operands.

Wrap input operand with truncate:SI to make machine modes consistent.

PR target/115297

gcc/ChangeLog:

* config/alpha/alpha.md (<any_divmod:code>si3): Wrap DImode
operands 3 and 4 with truncate:SI RTX.
(*divmodsi_internal_er): Ditto for operands 1 and 2.
(*divmodsi_internal_er_1): Ditto.
(*divmodsi_internal): Ditto.
* config/alpha/constraints.md ("b"): Correct register
number in the description.

gcc/testsuite/ChangeLog:

* gcc.target/alpha/pr115297.c: New test.

(cherry picked from commit 0ac802064c2a018cf166c37841697e867de65a95)

14 months agoDaily bump.
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14 months agolibstdc++: Replace link to gcc-4.3.2 docs in manual [PR115269]
Jonathan Wakely [Wed, 29 May 2024 09:59:48 +0000 (10:59 +0100)] 
libstdc++: Replace link to gcc-4.3.2 docs in manual [PR115269]

Link to the docs for GCC trunk instead. For the release branches, the
link should be to the docs for appropriate release branch.

Also replace the incomplete/outdated list of explicit -std options with
a single entry for the -std option.

libstdc++-v3/ChangeLog:

PR libstdc++/115269
* doc/xml/manual/using.xml: Replace link to gcc-4.3.2 docs.
Replace list of -std=... options with a single entry for -std.
* doc/html/manual/using.html: Regenerate.

(cherry picked from commit b460ede64f9471589822831e04eecff4a3dbecf2)

14 months agoDaily bump.
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14 months agoMIPS16: Mark $2/$3 as clobbered if GP is used
YunQiang Su [Tue, 28 May 2024 18:28:25 +0000 (02:28 +0800)] 
MIPS16: Mark $2/$3 as clobbered if GP is used

PR Target/84790.
The gp init sequence
        li      $2,%hi(_gp_disp)
        addiu   $3,$pc,%lo(_gp_disp)
        sll     $2,16
        addu    $2,$3
is generated directly in `mips_output_function_prologue`, and does
not appear in the RTL.

So the IRA/IPA passes are not aware that $2/$3 have been clobbered,
so they may be used for cross (local) function call.

Let's mark $2/$3 clobber both:
  - Just after the UNSPEC_GP RTL of a function;
  - Just after a function call.

Reported-by: Matthias Schiffer <mschiffer@universe-factory.net>
Origin-Patch-by: Felix Fietkau <nbd@nbd.name>.
gcc
* config/mips/mips.cc(mips16_gp_pseudo_reg): Mark
MIPS16_PIC_TEMP and MIPS_PROLOGUE_TEMP clobbered.
(mips_emit_call_insn): Mark MIPS16_PIC_TEMP and
MIPS_PROLOGUE_TEMP clobbered if MIPS16 and CALL_CLOBBERED_GP.

(cherry picked from commit 915440eed21de367cb41857afb5273aff5bcb737)

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14 months agoubsan: Use right address space for MEM_REF created for bool/enum sanitization [PR115172]
Jakub Jelinek [Wed, 22 May 2024 07:12:28 +0000 (09:12 +0200)] 
ubsan: Use right address space for MEM_REF created for bool/enum sanitization [PR115172]

The following testcase is miscompiled, because -fsanitize=bool,enum
creates a MEM_REF without propagating there address space qualifiers,
so what should be normally loaded using say %gs:/%fs: segment prefix
isn't.  Together with asan it then causes that load to be sanitized.

2024-05-22  Jakub Jelinek  <jakub@redhat.com>

PR sanitizer/115172
* ubsan.cc (instrument_bool_enum_load): If rhs is not in generic
address space, use qualified version of utype with the right
address space.  Formatting fix.

* gcc.dg/asan/pr115172.c: New test.

(cherry picked from commit d3c506eff54fcbac389a529c2e98da108a410b7f)

14 months agoFortran: Fix SHAPE for zero-size arrays
Tobias Burnus [Mon, 20 May 2024 06:34:48 +0000 (08:34 +0200)] 
Fortran: Fix SHAPE for zero-size arrays

PR fortran/115150

gcc/fortran/ChangeLog:

* trans-intrinsic.cc (gfc_conv_intrinsic_bound): Fix SHAPE
for zero-size arrays

gcc/testsuite/ChangeLog:

* gfortran.dg/shape_12.f90: New test.

(cherry picked from commit b701306a9b38bd74cdc26c7ece5add22f2203b56)

14 months agoipa: Compare jump functions in ICF (PR 113907)
Martin Jambor [Tue, 28 May 2024 11:33:02 +0000 (13:33 +0200)] 
ipa: Compare jump functions in ICF (PR 113907)

This is a manual backport of r14-9840-g1162861439fd3c from master.
Manual because the bits and value range representation in jump
functions have changes during the gcc 14 development cycle.

In PR 113907 comment #58, Honza found a case where ICF thinks bodies
of functions are equivalent but becaise of difference in aliases in a
memory access, different aggregate jump functions are associated with
supposedly equivalent call statements.  This patch adds a way to
compare jump functions and plugs it into ICF to avoid the issue.

gcc/ChangeLog:

2024-05-14  Martin Jambor  <mjambor@suse.cz>

PR ipa/113907
* ipa-prop.h (ipa_jump_functions_equivalent_p): Declare.
(values_equal_for_ipcp_p): Likewise.
* ipa-prop.cc (ipa_agg_pass_through_jf_equivalent_p): New function.
(ipa_agg_jump_functions_equivalent_p): Likewise.
(ipa_jump_functions_equivalent_p): Likewise.
* ipa-cp.cc (values_equal_for_ipcp_p): Make function public.
* ipa-icf-gimple.cc: Include alloc-pool.h, symbol-summary.h, sreal.h,
ipa-cp.h and ipa-prop.h.
(func_checker::compare_gimple_call): Comapre jump functions.

gcc/testsuite/ChangeLog:

2024-05-10  Martin Jambor  <mjambor@suse.cz>

PR ipa/113907
* gcc.dg/lto/pr113907_0.c: New.
* gcc.dg/lto/pr113907_1.c: Likewise.
* gcc.dg/lto/pr113907_2.c: Likewise.

(cherry picked from commit 1db45e83021a8a87f41e22053910fcce6e8e2c2c)

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14 months agoc++: __is_constructible ref binding [PR100667]
Jason Merrill [Wed, 27 Mar 2024 20:14:01 +0000 (16:14 -0400)] 
c++: __is_constructible ref binding [PR100667]

The requirement that a type argument be complete is excessive in the case of
direct reference binding to the same type, which does not rely on any
properties of the type.  This is LWG 2939.

PR c++/100667

gcc/cp/ChangeLog:

* semantics.cc (same_type_ref_bind_p): New.
(finish_trait_expr): Use it.

gcc/testsuite/ChangeLog:

* g++.dg/ext/is_constructible8.C: New test.

(cherry picked from commit 8bb3ef3f6e335e8794590fb712a2661d11d21973)

14 months agoc++: fix PR111529 backport
Jason Merrill [Fri, 24 May 2024 15:19:29 +0000 (11:19 -0400)] 
c++: fix PR111529 backport

r12-10468-g19827831516023 added the ANNOTATE_EXPR in the wrong place,
leading to ICEs on several testcases.

gcc/cp/ChangeLog:

* pt.cc (tsubst_copy_and_build): Move ANNOTATE_EXPR out of
fallthrough path.

14 months agoc++: unroll pragma in templates [PR111529]
Jason Merrill [Fri, 22 Sep 2023 11:10:11 +0000 (12:10 +0100)] 
c++: unroll pragma in templates [PR111529]

We were failing to handle ANNOTATE_EXPR in tsubst_copy_and_build, leading to
problems with substitution of any wrapped expressions.

Let's also not tell users that lambda templates are available in C++14.

PR c++/111529

gcc/cp/ChangeLog:

* parser.cc (cp_parser_lambda_declarator_opt): Don't suggest
-std=c++14 for lambda templates.
* pt.cc (tsubst_expr): Move ANNOTATE_EXPR handling...
(tsubst_copy_and_build): ...here.

gcc/testsuite/ChangeLog:

* g++.dg/ext/unroll-4.C: New test.

(cherry picked from commit 9c62af101e11e1cce573c2b3d2e18b403412dbc8)

14 months agoc++: array of PMF [PR113598]
Jason Merrill [Thu, 25 Jan 2024 17:02:07 +0000 (12:02 -0500)] 
c++: array of PMF [PR113598]

Here AGGREGATE_TYPE_P includes pointers to member functions, which is not
what we want.  Instead we should use class||array, as elsewhere in the
function.

PR c++/113598

gcc/cp/ChangeLog:

* init.cc (build_vec_init): Don't use {} for PMF.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/initlist-pmf2.C: New test.

(cherry picked from commit 136a828754ff65079a834555582b49d54bd5bc64)

14 months agoc++: binding reference to comma expr [PR114561]
Jason Merrill [Tue, 2 Apr 2024 14:52:28 +0000 (10:52 -0400)] 
c++: binding reference to comma expr [PR114561]

We represent a reference binding where the referent type is more qualified
by a ck_ref_bind around a ck_qual.  We performed the ck_qual and then tried
to undo it with STRIP_NOPS, but that doesn't work if the conversion is
buried in COMPOUND_EXPR.  So instead let's avoid performing that fake
conversion in the first place.

PR c++/114561
PR c++/114562

gcc/cp/ChangeLog:

* call.cc (convert_like_internal): Avoid adding qualification
conversion in direct reference binding.

gcc/testsuite/ChangeLog:

* g++.dg/conversion/ref10.C: New test.
* g++.dg/conversion/ref11.C: New test.

(cherry picked from commit 5d7e9a35024f065b25f61747859c7cb7a770c92b)

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14 months agotestsuite: Verify r0-r3 are extended with CMSE
Torbjörn SVENSSON [Sat, 27 Apr 2024 13:57:27 +0000 (15:57 +0200)] 
testsuite: Verify r0-r3 are extended with CMSE

Add regression test to the existing zero/sign extend tests for CMSE to
verify that r0, r1, r2 and r3 are properly extended, not just r0.

boolCharShortEnumSecureFunc test is done using -O0 to ensure the
instructions are in a predictable order.

gcc/testsuite/ChangeLog:

* gcc.target/arm/cmse/extend-param.c: Add regression test. Add
-fshort-enums.
* gcc.target/arm/cmse/extend-return.c: Add -fshort-enums option.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
(cherry picked from commit 9ddad76e98ac8f257f90b3814ed3c6ba78d0f3c7)

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14 months agomiddle-end/110176 - wrong zext (bool) <= (int) 4294967295u folding
Richard Biener [Wed, 31 Jan 2024 13:40:24 +0000 (14:40 +0100)] 
middle-end/110176 - wrong zext (bool) <= (int) 4294967295u folding

The following fixes a wrong pattern that didn't match the behavior
of the original fold_widened_comparison in that get_unwidened
returned a constant always in the wider type.  But here we're
using (int) 4294967295u without the conversion applied.  Fixed
by doing as earlier in the pattern - matching constants only
if the conversion was actually applied.

PR middle-end/110176
* match.pd (zext (bool) <= (int) 4294967295u): Make sure
to match INTEGER_CST only without outstanding conversion.

* gcc.dg/torture/pr110176.c: New testcase.

(cherry picked from commit 22dbfbe8767ff4c1d93e39f68ec7c2d5b1358beb)

14 months agotree-optimization/111039 - abnormals and bit test merging
Richard Biener [Thu, 17 Aug 2023 11:10:14 +0000 (13:10 +0200)] 
tree-optimization/111039 - abnormals and bit test merging

The following guards the bit test merging code in if-combine against
the appearance of SSA names used in abnormal PHIs.

PR tree-optimization/111039
* tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
SSA_NAME_OCCURS_IN_ABNORMAL_PHI.

* gcc.dg/pr111039.c: New testcase.

(cherry picked from commit 482551a79a3d3f107f6239679ee74655cfe8707e)

14 months agotree-optimization/112281 - loop distribution and zero dependence distances
Richard Biener [Mon, 20 Nov 2023 12:39:52 +0000 (13:39 +0100)] 
tree-optimization/112281 - loop distribution and zero dependence distances

The following fixes an omission in dependence testing for loop
distribution.  When the overall dependence distance is not zero but
the dependence direction in the innermost common loop is = there is
a conflict between the partitions and we have to merge them.

PR tree-optimization/112281
* tree-loop-distribution.cc
(loop_distribution::pg_add_dependence_edges): For = in the
innermost common loop record a partition conflict.

* gcc.dg/torture/pr112281-1.c: New testcase.
* gcc.dg/torture/pr112281-2.c: Likewise.

(cherry picked from commit 3b34902417259031823bff7f853f615a60464bbd)

14 months agotree-optimization/112495 - alias versioning and address spaces
Richard Biener [Mon, 13 Nov 2023 09:20:37 +0000 (10:20 +0100)] 
tree-optimization/112495 - alias versioning and address spaces

We are not correctly handling differing address spaces in dependence
analysis runtime alias check generation so refuse to do that.

PR tree-optimization/112495
* tree-data-ref.cc (runtime_alias_check_p): Reject checks
between different address spaces.

* gcc.target/i386/pr112495.c: New testcase.

(cherry picked from commit 0f593c0521caab8cfac53514b1a5e7d0d0dd1932)

14 months agotree-optimization/112505 - bit-precision induction vectorization
Richard Biener [Thu, 11 Jan 2024 13:00:33 +0000 (14:00 +0100)] 
tree-optimization/112505 - bit-precision induction vectorization

Vectorization of bit-precision inductions isn't implemented but we
don't check this, instead we ICE during transform.

PR tree-optimization/112505
* tree-vect-loop.cc (vectorizable_induction): Reject
bit-precision induction.

* gcc.dg/vect/pr112505.c: New testcase.

(cherry picked from commit ec345df53556ec581590347f71c3d9ff3cdbca76)

14 months agodebug/112718 - reset all type units with -ffat-lto-objects
Richard Biener [Mon, 22 Jan 2024 14:42:59 +0000 (15:42 +0100)] 
debug/112718 - reset all type units with -ffat-lto-objects

When mixing -flto, -ffat-lto-objects and -fdebug-type-section we
fail to reset all type units after early output resulting in an
ICE when attempting to add then duplicate sibling attributes.

PR debug/112718
* dwarf2out.cc (dwarf2out_finish): Reset all type units
for the fat part of an LTO compile.

* gcc.dg/debug/pr112718.c: New testcase.

(cherry picked from commit 7218f5050cb7163edae331f54ca163248ab48bfa)

14 months agotree-optimization/112793 - SLP of constant/external code-generated twice
Richard Biener [Wed, 13 Dec 2023 13:23:31 +0000 (14:23 +0100)] 
tree-optimization/112793 - SLP of constant/external code-generated twice

The following makes the attempt at code-generating a constant/external
SLP node twice well-formed as that can happen when partitioning BB
vectorization attempts where we keep constants/externals unpartitioned.

PR tree-optimization/112793
* tree-vect-slp.cc (vect_schedule_slp_node): Already
code-generated constant/external nodes are OK.

* g++.dg/vect/pr112793.cc: New testcase.

(cherry picked from commit d782ec8362eadc3169286eb1e39c631effd02323)

14 months agotree-optimization/114027 - fix testcase
Richard Biener [Tue, 26 Mar 2024 08:46:06 +0000 (09:46 +0100)] 
tree-optimization/114027 - fix testcase

The following fixes out-of-bounds read in the testcase.

PR tree-optimization/114027
* gcc.dg/vect/pr114027.c: Fix iteration count.

(cherry picked from commit 4470611e20f3217ee81647b01fda65b6a62229aa)

14 months agotree-optimization/114027 - conditional reduction chain
Richard Biener [Thu, 22 Feb 2024 09:50:12 +0000 (10:50 +0100)] 
tree-optimization/114027 - conditional reduction chain

When we classify a conditional reduction chain as CONST_COND_REDUCTION
we fail to verify all involved conditionals have the same constant.
That's a quite unlikely situation so the following simply disables
such classification when there's more than one reduction statement.

PR tree-optimization/114027
* tree-vect-loop.cc (vecctorizable_reduction): Use optimized
condition reduction classification only for single-element
chains.

* gcc.dg/vect/pr114027.c: New testcase.

(cherry picked from commit 549f251f055e3a0b0084189a3012c4f15d635e75)

14 months agotree-optimization/114375 - disallow SLP discovery of permuted mask loads
Richard Biener [Mon, 18 Mar 2024 11:39:03 +0000 (12:39 +0100)] 
tree-optimization/114375 - disallow SLP discovery of permuted mask loads

We cannot currently handle permutations of mask loads in code generation
or permute optimization.  But we simply drop any permutation on the
floor, so the following instead rejects the SLP build rather than
producing wrong-code.  I've also made sure to reject them in
vectorizable_load for completeness.

PR tree-optimization/114375
* tree-vect-slp.cc (vect_build_slp_tree_2): Compute the
load permutation for masked loads but reject it when any
such is necessary.
* tree-vect-stmts.cc (vectorizable_load): Reject masked
VMAT_ELEMENTWISE and VMAT_STRIDED_SLP as those are not
supported.

* gcc.dg/vect/vect-pr114375.c: New testcase.

(cherry picked from commit 4f2a35a76cca503749c696e7772d2e8eadc77ba5)

14 months agotree-optimization/114231 - use patterns for BB SLP discovery root stmts
Richard Biener [Tue, 5 Mar 2024 09:55:56 +0000 (10:55 +0100)] 
tree-optimization/114231 - use patterns for BB SLP discovery root stmts

The following makes sure to use recognized patterns when vectorizing
roots during BB SLP discovery.  We need to apply those late since
during root discovery we've not yet done pattern recognition.
All parts of the vectorizer assume patterns get used, for the testcase
we mix this up when doing live lane computation.

PR tree-optimization/114231
* tree-vect-slp.cc (vect_analyze_slp): Lookup patterns when
processing a BB SLP root.

* gcc.dg/vect/pr114231.c: New testcase.

(cherry picked from commit 04fffbaa87997ac893a9aa68b674c938ba3ecddb)

14 months agomiddle-end/114734 - wrong code with expand_call_mem_ref
Richard Biener [Fri, 26 Apr 2024 13:47:13 +0000 (15:47 +0200)] 
middle-end/114734 - wrong code with expand_call_mem_ref

When expand_call_mem_ref looks at the definition of the address
argument to eventually expand a &TARGET_MEM_REF argument together
with a masked load it fails to honor constraints imposed by SSA
coalescing decisions.  The following fixes this.

PR middle-end/114734
* internal-fn.cc (expand_call_mem_ref): Use
get_gimple_for_ssa_name to get at the def stmt of the address
argument to honor SSA coalescing constraints.

(cherry picked from commit 20ebcaf826c91ddaf2aac35417ec1e5e6d31ad50)

14 months agolto/114655 - -flto=4 at link time doesn't override -flto=auto at compile time
Richard Biener [Tue, 9 Apr 2024 12:25:57 +0000 (14:25 +0200)] 
lto/114655 - -flto=4 at link time doesn't override -flto=auto at compile time

The following adjusts -flto option processing in lto-wrapper to have
link-time -flto override any compile time setting.

PR lto/114655
* lto-wrapper.cc (merge_flto_options): Add force argument.
(merge_and_complain): Do not force here.
(run_gcc): But here to make the link-time -flto option override
any compile-time one.

(cherry picked from commit 32fb04adae90a0ea68e64e8fc3cb04b613b2e9f3)

14 months agogcov-profile/114715 - missing coverage for switch
Richard Biener [Mon, 15 Apr 2024 09:09:17 +0000 (11:09 +0200)] 
gcov-profile/114715 - missing coverage for switch

The following avoids missing coverage for the line of a switch statement
which happens when gimplification emits a BIND_EXPR wrapping the switch
as that prevents us from setting locations on the containing statements
via annotate_all_with_location.  Instead set the location of the GIMPLE
switch directly.

PR gcov-profile/114715
* gimplify.cc (gimplify_switch_expr): Set the location of the
GIMPLE switch.

* gcc.misc-tests/gcov-24.c: New testcase.

(cherry picked from commit 5a3cc62dbb45185dd1ca32caec80d57a320ec5a0)

14 months agoDaily bump.
GCC Administrator [Thu, 16 May 2024 00:19:43 +0000 (00:19 +0000)] 
Daily bump.

14 months agoipa: Self-DCE of uses of removed call LHSs (PR 108007)
Martin Jambor [Mon, 8 Apr 2024 15:34:33 +0000 (17:34 +0200)] 
ipa: Self-DCE of uses of removed call LHSs (PR 108007)

PR 108007 is another manifestation where we rely on DCE to clean-up
after IPA-SRA and if the user explicitely switches DCE off, IPA-SRA
can leave behind statements which are fed uninitialized values and
trap, even though their results are themselves never used.

I have already fixed this for unused parameters in callees, this bug
shows that almost the same thing can happen for removed returns, on
the side of callers.  This means that the issue has to be fixed
elsewhere, in call redirection.  This patch adds a function which
looks for (and through, using a work-list) uses of operations fed
specific SSA names and removes them all.

That would have been easy if it wasn't for debug statements during
tree-inline (from which call redirection is also invoked).  Debug
statements are decoupled from the rest at this point and iterating
over uses of SSAs does not bring them up.  During tree-inline they are
handled especially at the end, I assume in order to make sure that
relative ordering of UIDs are the same with and without debug info.

This means that during tree-inline we need to make a hash of killed
SSAs, that we already have in copy_body_data, available to the
function making the purging.  So the patch duly does also that, making
the interface slightly ugly.  Moreover, all newly unused SSA names
need to be freed and as PR 112616 showed, it must be done in a defined
order, which is what newly added ipa_release_ssas_in_hash does.

This backport to gcc-13 also contains
54e505d0446f86b7ad383acbb8e5501f20872b64 in order not to reintroduce
PR 113757.

gcc/ChangeLog:

2024-04-05  Martin Jambor  <mjambor@suse.cz>

PR ipa/108007
PR ipa/112616
* cgraph.h (cgraph_edge): Add a parameter to
redirect_call_stmt_to_callee.
* ipa-param-manipulation.h (ipa_param_adjustments): Add a
parameter to modify_call.
(ipa_release_ssas_in_hash): Declare.
* cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
parameter killed_ssas, pass it to padjs->modify_call.
* ipa-param-manipulation.cc (purge_all_uses): New function.
(ipa_param_adjustments::modify_call): New parameter killed_ssas.
Instead of substituting uses, invoke purge_all_uses.  If
hash of killed SSAs has not been provided, create a temporary one
and release SSAs that have been added to it.
(compare_ssa_versions): New function.
(ipa_release_ssas_in_hash): Likewise.
* tree-inline.cc (redirect_all_calls): Create
id->killed_new_ssa_names earlier, pass it to edge redirection,
adjust a comment.
(copy_body): Release SSAs in id->killed_new_ssa_names.

gcc/testsuite/ChangeLog:

2024-01-15  Martin Jambor  <mjambor@suse.cz>

PR ipa/108007
PR ipa/112616
* gcc.dg/ipa/pr108007.c: New test.
* gcc.dg/ipa/pr112616.c: Likewise.

(cherry picked from commit 40ddc0b05a47f999b24f20c1becb79004995731b)

14 months agoipa: Force args obtined through pass-through maps to the expected type (PR 114247)
Martin Jambor [Tue, 14 May 2024 12:13:36 +0000 (14:13 +0200)] 
ipa: Force args obtined through pass-through maps to the expected type (PR 114247)

Interactions of IPA-CP and IPA-SRA on the same data is a rather big
source of issues, I'm afraid.  PR 113964 is a situation where IPA-CP
propagates an unsigned short in a union parameter into a function
which itself calls a different function which has a same union
parameter and both these union parameters are split with IPA-SRA.  The
leaf function however uses a signed short member of the union.

In the calling function, we get the unsigned constant as the
replacement for the union and it is then passed in the call without
any type compatibility checks.  Apparently on riscv64 it matters
whether the parameter is signed or unsigned short and so the leaf
function can see different values.

Fixed by using useless_type_conversion_p at the appropriate place and
if it fails, use force_value_to type as elsewhere in similar
situations.

gcc/ChangeLog:

2024-04-04  Martin Jambor  <mjambor@suse.cz>

PR ipa/114247
* ipa-param-manipulation.cc (ipa_param_adjustments::modify_call):
Force values obtined through pass-through maps to the expected
split type.

gcc/testsuite/ChangeLog:

2024-04-04  Patrick O'Neill  <patrick@rivosinc.com>
    Martin Jambor  <mjambor@suse.cz>

PR ipa/114247
* gcc.dg/ipa/pr114247.c: New test.

(cherry picked from commit 8cd0d29270d4ed86c69b80c08de66dcb6c1e22fe)

14 months agoDaily bump.
GCC Administrator [Wed, 15 May 2024 00:20:32 +0000 (00:20 +0000)] 
Daily bump.

14 months agoDaily bump.
GCC Administrator [Tue, 14 May 2024 00:19:28 +0000 (00:19 +0000)] 
Daily bump.

14 months agoFix range-ops operator_addr.
Andrew MacLeod [Fri, 10 May 2024 17:56:01 +0000 (13:56 -0400)] 
Fix range-ops operator_addr.

Lack of symbolic information prevents op1_range from being able to draw
the same conclusions as fold_range can.

PR tree-optimization/111009
gcc/
* range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
* value-range.h (contains_zero_p): New.

gcc/testsuite/
* gcc.dg/pr111009.c: New.

14 months agoDaily bump.
GCC Administrator [Mon, 13 May 2024 08:37:54 +0000 (08:37 +0000)] 
Daily bump.

14 months agoObjective-C, NeXT, v2: Correct a regression in code-gen.
Iain Sandoe [Tue, 30 Apr 2024 14:11:56 +0000 (15:11 +0100)] 
Objective-C, NeXT, v2: Correct a regression in code-gen.

There have been several changes in the ABI of Objective-C which
depend on the OS version targetted.  In this case Protocols and
LabelProtocols should be made weak/hidden/extern from macOS 10.7
however there was a mistake in the code causing this to occur
from macOS 10.6.  Fixed thus.

gcc/objc/ChangeLog:

* objc-next-runtime-abi-02.cc (WEAK_PROTOCOLS_AFTER): New.
(next_runtime_abi_02_protocol_decl): Use WEAK_PROTOCOLS_AFTER
to determine this ABI change.
(build_v2_protocol_list_address_table): Likewise.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
(cherry picked from commit 9b5c0be59d0f94df0517820f00b4520b5abddd8c)

14 months agoDaily bump.
GCC Administrator [Thu, 9 May 2024 11:00:45 +0000 (11:00 +0000)] 
Daily bump.

14 months agotestsuite: Fix up vector-subaccess-1.C test for ia32 [PR89224]
Jakub Jelinek [Thu, 9 May 2024 09:18:21 +0000 (11:18 +0200)] 
testsuite: Fix up vector-subaccess-1.C test for ia32 [PR89224]

The test FAILs on i686-linux due to
.../gcc/testsuite/g++.dg/torture/vector-subaccess-1.C:16:6: warning: SSE vector argument without SSE enabled changes the ABI [-Wpsabi]
excess warnings.

This fixes it by adding -Wno-psabi, like commonly done in other tests.

2024-05-09  Jakub Jelinek  <jakub@redhat.com>

PR c++/89224
* g++.dg/torture/vector-subaccess-1.C: Add -Wno-psabi as additional
options.

(cherry picked from commit 8fb65ec816ff8f0d529b6d30821abace4328c9a2)

14 months agoFix PR 110386: backprop vs ABSU_EXPR
Andrew Pinski [Sun, 24 Sep 2023 04:53:09 +0000 (21:53 -0700)] 
Fix PR 110386: backprop vs ABSU_EXPR

The issue here is that when backprop tries to go
and strip sign ops, it skips over ABSU_EXPR but
ABSU_EXPR not only does an ABS, it also changes the
type to unsigned.
Since strip_sign_op_1 is only supposed to strip off
sign changing operands and not ones that change types,
removing ABSU_EXPR here is correct. We don't handle
nop conversions so this does cause any missed optimizations either.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/110386

gcc/ChangeLog:

* gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.

gcc/testsuite/ChangeLog:

* gcc.c-torture/compile/pr110386-1.c: New test.
* gcc.c-torture/compile/pr110386-2.c: New test.

(cherry picked from commit 2bbac12ea7bd8a3eef5382e1b13f6019df4ec03f)

14 months agotestsuite: fix Wmismatched-new-delete-8.C with -m32
Marek Polacek [Thu, 22 Feb 2024 23:52:32 +0000 (18:52 -0500)] 
testsuite: fix Wmismatched-new-delete-8.C with -m32

This fixes
error: 'operator new' takes type 'size_t' ('unsigned int') as first parameter [-fpermissive]

gcc/testsuite/ChangeLog:

* g++.dg/warn/Wmismatched-new-delete-8.C: Use __SIZE_TYPE__.

(cherry picked from commit d34d7c74d51d365a3a4ddcd4383fc7c9f29020a1)

14 months agowarn-access: Fix handling of unnamed types [PR109804]
Andrew Pinski [Thu, 22 Feb 2024 04:12:21 +0000 (20:12 -0800)] 
warn-access: Fix handling of unnamed types [PR109804]

This looks like an oversight of handling DEMANGLE_COMPONENT_UNNAMED_TYPE.
DEMANGLE_COMPONENT_UNNAMED_TYPE only has the u.s_number.number set while
the code expected newc.u.s_binary.left would be valid.
So this treats DEMANGLE_COMPONENT_UNNAMED_TYPE like we treat function paramaters
(DEMANGLE_COMPONENT_FUNCTION_PARAM) and template paramaters (DEMANGLE_COMPONENT_TEMPLATE_PARAM).

Note the code in the demangler does this when it sets DEMANGLE_COMPONENT_UNNAMED_TYPE:
      ret->type = DEMANGLE_COMPONENT_UNNAMED_TYPE;
      ret->u.s_number.number = num;

Committed as obvious after bootstrap/test on x86_64-linux-gnu

PR tree-optimization/109804

gcc/ChangeLog:

* gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle
DEMANGLE_COMPONENT_UNNAMED_TYPE.

gcc/testsuite/ChangeLog:

* g++.dg/warn/Wmismatched-new-delete-8.C: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
(cherry picked from commit 1076ffda6ce5e6d5fc9577deaf8233e549e5787a)

14 months agoFix PR 111331: wrong code for `a > 28 ? MIN<a, 28> : 29`
Andrew Pinski [Fri, 8 Sep 2023 05:13:31 +0000 (22:13 -0700)] 
Fix PR 111331: wrong code for `a > 28 ? MIN<a, 28> : 29`

The problem here is after r6-7425-ga9fee7cdc3c62d0e51730,
the comparison to see if the transformation could be done was using the
wrong value. Instead of see if the inner was LE (for MIN and GE for MAX)
the outer value, it was comparing the inner to the value used in the comparison
which was wrong.

Committed to GCC 13 branch after bootstrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

PR tree-optimization/111331
* tree-ssa-phiopt.cc (minmax_replacement):
Fix the LE/GE comparison for the
`(a CMP CST1) ? max<a,CST2> : a` optimization.

gcc/testsuite/ChangeLog:

PR tree-optimization/111331
* gcc.c-torture/execute/pr111331-1.c: New test.
* gcc.c-torture/execute/pr111331-2.c: New test.
* gcc.c-torture/execute/pr111331-3.c: New test.

(cherry picked from commit 30e6ee074588bacefd2dfe745b188bb20c81fe5e)

14 months agoFold: Fix up merge_truthop_with_opposite_arm for NaNs [PR95351]
Andrew Pinski [Sun, 10 Mar 2024 22:17:09 +0000 (22:17 +0000)] 
Fold: Fix up merge_truthop_with_opposite_arm for NaNs [PR95351]

The problem here is that merge_truthop_with_opposite_arm would
use the type of the result of the comparison rather than the operands
of the comparison to figure out if we are honoring NaNs.
This fixes that oversight and now we get the correct results in this
case.

Committed as obvious after a bootstrap/test on x86_64-linux-gnu.

PR middle-end/95351

gcc/ChangeLog:

* fold-const.cc (merge_truthop_with_opposite_arm): Use
the type of the operands of the comparison and not the type
of the comparison.

gcc/testsuite/ChangeLog:

* gcc.dg/float_opposite_arm-1.c: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
(cherry picked from commit 31ce2e993d09dcad1ce139a2848a28de5931056d)

14 months agolibstdc++: Fix conversion of simd to vector builtin
Matthias Kretz [Mon, 22 Apr 2024 14:12:34 +0000 (16:12 +0200)] 
libstdc++: Fix conversion of simd to vector builtin

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:

PR libstdc++/114803
* include/experimental/bits/simd_builtin.h
(_SimdBase2::operator __vector_type_t): There is no __builtin()
function in _SimdWrapper, instead use its conversion operator.
* testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc: New
test.

(cherry picked from commit 7ef139146a8923a8719873ca3fdae175668e8d63)

14 months agolibstdc++: Silence irrelevant warnings in <experimental/simd>
Matthias Kretz [Wed, 17 Apr 2024 08:35:47 +0000 (10:35 +0200)] 
libstdc++: Silence irrelevant warnings in <experimental/simd>

Avoid
-Wnarrowing in C code;
-Wtautological-compare in unconditional static_assert (necessary for
faking a dependency on a template parameter)

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:

* include/experimental/bits/simd.h: Ignore -Wnarrowing for
arm_neon.h.
(__int_for_sizeof): Replace tautological compare with checking
for invalid template parameter value.
* include/experimental/bits/simd_builtin.h (__extract_part):
Remove tautological compare by combining two static_assert.

(cherry picked from commit e7a3ad29c9c832b6ae999cbfb0af89e121959030)

14 months agolibstdc++: Add include guard to simd-internal header
Matthias Kretz [Wed, 17 Apr 2024 08:12:42 +0000 (10:12 +0200)] 
libstdc++: Add include guard to simd-internal header

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:

* include/experimental/bits/numeric_traits.h: Add include guard.

(cherry picked from commit 3cfe94ad28102618c14a91c0a83d9e5cc7df69d7)

14 months agolibstdc++: Avoid ill-formed types on ARM
Matthias Kretz [Wed, 17 Apr 2024 07:11:25 +0000 (09:11 +0200)] 
libstdc++: Avoid ill-formed types on ARM

This resolves failing tests in check-simd.

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:

PR libstdc++/114750
* include/experimental/bits/simd_builtin.h
(_SimdImplBuiltin::_S_load, _S_store): Fall back to copying
scalars if the memory type cannot be vectorized for the target.

(cherry picked from commit 0fc7f3c6adc8543f55ec35b309016d9d9c4ddd35)

14 months agolibstdc++: Add masked ++/-- implementation for sizeof < 16
Matthias Kretz [Wed, 27 Mar 2024 12:41:25 +0000 (13:41 +0100)] 
libstdc++: Add masked ++/-- implementation for sizeof < 16

This resolves further failures (-Wreturn-type warnings) and test
failures for where-* tests targeting AVX-512.

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:

* include/experimental/bits/simd_x86.h (_S_masked_unary):
Cast inputs < 16 bytes to 16 byte vectors before calling the
right subtraction builtin. Before returning, truncate to the
return vector type.

(cherry picked from commit a6c630c314b099f64d79055964d88b257459cf13)

14 months agolibstdc++: Fix call signature of builtins from masked ++/--
Matthias Kretz [Wed, 27 Mar 2024 07:49:43 +0000 (08:49 +0100)] 
libstdc++: Fix call signature of builtins from masked ++/--

This resolves failures in the "expensive" where-* test of check-simd
when targeting AVX-512.

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:

* include/experimental/bits/simd_x86.h (_S_masked_unary): Call
the 4- and 8-byte variants of __builtin_ia32_subp[ds] without
rounding direction argument.

(cherry picked from commit 0ac2c0f0687b321ab54de271d788b4e0a287b4e2)

14 months agolibstdc++: Avoid vector casts while still avoiding PR90424
Matthias Kretz [Fri, 2 Jun 2023 19:33:04 +0000 (21:33 +0200)] 
libstdc++: Avoid vector casts while still avoiding PR90424

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:

PR libstdc++/109822
* include/experimental/bits/simd_builtin.h (_S_store): Rewrite
to avoid casts to other vector types. Implement store as
succession of power-of-2 sized memcpy to avoid PR90424.

(cherry picked from commit 9165ede56ababd6471e7a2ce4eab30f3d5129e14)

14 months agolibstdc++: Replace use of incorrect non-temporal store
Matthias Kretz [Fri, 2 Jun 2023 11:44:22 +0000 (13:44 +0200)] 
libstdc++: Replace use of incorrect non-temporal store

The call to the base implementation sometimes didn't find a matching
signature because the _Abi parameter of _SimdImpl* was "wrong" after
conversion. It has to call into <new ABI tag>::_SimdImpl instead of the
current ABI tag's _SimdImpl. This also reduces the number of possible
template instantiations.

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:

PR libstdc++/110054
* include/experimental/bits/simd_builtin.h (_S_masked_store):
Call into deduced ABI's SimdImpl after conversion.
* include/experimental/bits/simd_x86.h (_S_masked_store_nocvt):
Don't use _mm_maskmoveu_si128. Use the generic fall-back
implementation. Also fix masked stores without SSE2, which
were not doing anything before.

(cherry picked from commit 27e45b7597d6fb1a71927d658a0294797b720c0a)

14 months agolibstdc++: Protect against macros
Matthias Kretz [Fri, 2 Jun 2023 19:21:36 +0000 (21:21 +0200)] 
libstdc++: Protect against macros

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:

* include/experimental/bits/simd.h (__bit_cast): Use
__gnu__::__vector_size__ instead of gnu::vector_size.

(cherry picked from commit ce2188e4320cbb46d6246bd3f478ba20440c62f3)

14 months agoc++/c-common: Fix convert_vector_to_array_for_subscript for qualified vector types...
Andrew Pinski [Tue, 20 Feb 2024 21:38:28 +0000 (13:38 -0800)] 
c++/c-common: Fix convert_vector_to_array_for_subscript for qualified vector types [PR89224]

After r7-987-gf17a223de829cb, the access for the elements of a vector type would lose the qualifiers.
So if we had `constvector[0]`, the type of the element of the array would not have const on it.
This was due to a missing build_qualified_type for the inner type of the vector when building the array type.
We need to add back the call to build_qualified_type and now the access has the correct qualifiers. So the
overloads and even if it is a lvalue or rvalue is correctly done.

Note we correctly now reject the testcase gcc.dg/pr83415.c which was incorrectly accepted after r7-987-gf17a223de829cb.

Built and tested for aarch64-linux-gnu.

PR c++/89224

gcc/c-family/ChangeLog:

* c-common.cc (convert_vector_to_array_for_subscript): Call build_qualified_type
for the inner type.

gcc/cp/ChangeLog:

* constexpr.cc (cxx_eval_array_reference): Compare main variants
for the vector/array types instead of the types directly.

gcc/testsuite/ChangeLog:

* g++.dg/torture/vector-subaccess-1.C: New test.
* gcc.dg/pr83415.c: Change warning to error.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
(cherry picked from commit 4421d35167b3083e0f2e4c84c91fded09a30cf22)

15 months agoAVR: Backport device support from v13.3.
Georg-Johann Lay [Tue, 7 May 2024 12:00:43 +0000 (14:00 +0200)] 
AVR: Backport device support from v13.3.

gcc/
* config/avr/avr-mcus.def: Add new MCUs (copy from gcc-13).
* doc/avr-mmcu.texi: Rebuild.

15 months agoAVR: ipa/92606 - Don't optimize PROGMEM data against non-PROGMEM.
Georg-Johann Lay [Fri, 3 May 2024 16:47:50 +0000 (18:47 +0200)] 
AVR: ipa/92606 - Don't optimize PROGMEM data against non-PROGMEM.

ipa/92606: Inter-procedural analysis optimizes data across
address-spaces and PROGMEM.  As of v14, the PROGMEM part is
still not fixed (and there is still no target hook as proposed
in PR92932).  Just disable respective bogus optimization.

PR ipa/92606
gcc/
* config/avr/avr.cc (avr_option_override): Set
flag_ipa_icf_variables = 0.
gcc/testsuite/
* gcc.target/avr/torture/pr92606.c: New test.

(cherry picked from commit 08e752e72363ae7fd5a5fcb70913a0f7b240387b)

15 months agoDaily bump.
GCC Administrator [Tue, 7 May 2024 00:22:06 +0000 (00:22 +0000)] 
Daily bump.

15 months agoFortran: Add error for subroutine passed to a variable dummy [PR106999]
Paul Thomas [Tue, 2 Apr 2024 14:53:29 +0000 (15:53 +0100)] 
Fortran: Add error for subroutine passed to a variable dummy [PR106999]

2024-04-02  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/106999
* interface.cc (gfc_compare_interfaces): Add error for a
subroutine proc pointer passed to a variable formal.
(compare_parameter): If a procedure pointer is being passed to
a non-procedure formal arg, and there is an an interface, use
gfc_compare_interfaces to check and provide a more useful error
message.

gcc/testsuite/
PR fortran/106999
* gfortran.dg/pr106999.f90: New test.

(cherry picked from commit a7aa9455a8b9cb080649a7357b7360f2d99bcbf1)

15 months agoFortran: Fix ICE and clear incorrect error messages [PR114739]
Paul Thomas [Mon, 6 May 2024 07:21:14 +0000 (08:21 +0100)] 
Fortran: Fix ICE and clear incorrect error messages [PR114739]

2024-05-06  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/114739
* primary.cc (gfc_match_varspec): Check for default type before
checking for derived types with the right component name.

gcc/testsuite/
PR fortran/114739
* gfortran.dg/pr114739.f90: New test.
* gfortran.dg/derived_comp_array_ref_8.f90: Add 'implicit none'
for consistency with expected error message.
* gfortran.dg/nullify_4.f90: ditto
* gfortran.dg/pointer_init_6.f90: ditto
* gfortran.dg/pr107397.f90: ditto
* gfortran.dg/pr88138.f90: ditto

(cherry picked from commit 094f8a36dffea52fe6a64596203b82648a3f6121)

15 months agoDaily bump.
GCC Administrator [Mon, 6 May 2024 00:21:03 +0000 (00:21 +0000)] 
Daily bump.

15 months agoDaily bump.
GCC Administrator [Sun, 5 May 2024 00:20:39 +0000 (00:20 +0000)] 
Daily bump.

15 months agoDaily bump.
GCC Administrator [Sat, 4 May 2024 00:19:59 +0000 (00:19 +0000)] 
Daily bump.

15 months agoDaily bump.
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15 months agotree-optimization/114672 - WIDEN_MULT_PLUS_EXPR type mismatch
Richard Biener [Wed, 10 Apr 2024 08:33:40 +0000 (10:33 +0200)] 
tree-optimization/114672 - WIDEN_MULT_PLUS_EXPR type mismatch

The following makes sure to restrict WIDEN_MULT*_EXPR to a mode
precision final compute type as the mode is used to find the optab
and type checking chokes when seeing bit-precisions later which
would likely also not properly expanded to RTL.

PR tree-optimization/114672
* tree-ssa-math-opts.cc (convert_plusminus_to_widen): Only
allow mode-precision results.

* gcc.dg/torture/pr114672.c: New testcase.

(cherry picked from commit 912753cc5f18d786e334dd425469fa7f93155661)

15 months agors6000: Add OPTION_MASK_POWER8 [PR101865]
Will Schmidt [Fri, 12 Apr 2024 19:55:16 +0000 (14:55 -0500)] 
rs6000: Add OPTION_MASK_POWER8 [PR101865]

The bug in PR101865 is the _ARCH_PWR8 predefine macro is conditional upon
TARGET_DIRECT_MOVE, which can be false for some -mcpu=power8 compiles if the
-mno-altivec or -mno-vsx options are used.  The solution here is to create
a new OPTION_MASK_POWER8 mask that is true for -mcpu=power8, regardless of
Altivec or VSX enablement.

Unfortunately, the only way to create an OPTION_MASK_* mask is to create
a new option, which we have done here, but marked it as WarnRemoved since
we do not want users using it.  For stage1, we will look into how we can
create ISA mask flags for use in the compiler without the need for explicit
options.

2024-04-12  Will Schmidt  <will_schmidt@linux.ibm.com>
    Peter Bergner  <bergner@linux.ibm.com>

gcc/
PR target/101865
* config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported): Use
TARGET_POWER8.
* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use
OPTION_MASK_POWER8.
* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_POWER8.
(ISA_2_7_MASKS_SERVER): Likewise.
* config/rs6000/rs6000.cc (rs6000_option_override_internal): Update
comment.  Use OPTION_MASK_POWER8 and TARGET_POWER8.
* config/rs6000/rs6000.h (TARGET_SYNC_HI_QI): Use TARGET_POWER8.
* config/rs6000/rs6000.md (define_attr "isa"): Add p8.
(define_attr "enabled"): Handle it.
(define_insn "prefetch"): Use TARGET_POWER8.
* config/rs6000/rs6000.opt (mpower8-internal): New.

gcc/testsuite/
PR target/101865
* gcc.target/powerpc/predefine-p7-novsx.c: New test.
* gcc.target/powerpc/predefine-p8-noaltivec-novsx.c: New test.
* gcc.target/powerpc/predefine-p8-noaltivec.c: New test.
* gcc.target/powerpc/predefine-p8-novsx.c: New test.
* gcc.target/powerpc/predefine-p8-pragma-vsx.c: New test.
* gcc.target/powerpc/predefine-p9-novsx.c: New test.

(cherry picked from commit aa57af93ba22865be747f926e4e5f219e7f8758a)

15 months agors6000: Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR [PR101865]
Peter Bergner [Tue, 9 Apr 2024 20:24:39 +0000 (15:24 -0500)] 
rs6000: Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR [PR101865]

This is a cleanup patch in preparation to fixing the real bug in PR101865.
TARGET_DIRECT_MOVE is redundant with TARGET_P8_VECTOR, so alias it to that.
Also replace all usages of OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR
and delete the now dead mask.

2024-04-09  Peter Bergner  <bergner@linux.ibm.com>

gcc/
PR target/101865
* config/rs6000/rs6000.h (TARGET_DIRECT_MOVE): Define.
* config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace
OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR.  Delete redundant
OPTION_MASK_DIRECT_MOVE usage.  Delete TARGET_DIRECT_MOVE dead code.
(rs6000_opt_masks): Neuter the "direct-move" option.
* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Replace
OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR.  Delete useless
comment.
* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete
OPTION_MASK_DIRECT_MOVE.
(OTHER_P8_VECTOR_MASKS): Likewise.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.opt (mdirect-move): Remove Mask and Var.

(cherry picked from commit 7924e352523b37155ed9d76dc426701de9d11a22)

15 months agoDaily bump.
GCC Administrator [Thu, 2 May 2024 00:19:58 +0000 (00:19 +0000)] 
Daily bump.

15 months agors6000: Don't ICE when compiling the __builtin_vsx_splat_2di [PR113950]
Jeevitha [Mon, 29 Apr 2024 04:38:41 +0000 (23:38 -0500)] 
rs6000: Don't ICE when compiling the __builtin_vsx_splat_2di [PR113950]

When we expand the __builtin_vsx_splat_2di built-in, we were allowing immediate
value for second operand which causes an unrecognizable insn ICE. Even though
the immediate value was forced into a register, it wasn't correctly assigned
to the second operand. So corrected the assignment of op1 to operands[1].

2024-03-07  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>

gcc/
PR target/113950
* config/rs6000/vsx.md (vsx_splat_<mode>): Correct assignment to operand1
and simplify else if with else.

gcc/testsuite/
PR target/113950
* gcc.target/powerpc/pr113950.c: New testcase.

(cherry picked from commit fa0468877869f52b05742de6deef582e4dd296fc)

15 months agoDaily bump.
GCC Administrator [Wed, 1 May 2024 00:20:14 +0000 (00:20 +0000)] 
Daily bump.

15 months agomatch.pd: Only merge truncation with conversion for -fno-signed-zeros
Joe Ramsay [Fri, 15 Mar 2024 09:20:45 +0000 (09:20 +0000)] 
match.pd: Only merge truncation with conversion for -fno-signed-zeros

This optimisation does not honour signed zeros, so should not be
enabled except with -fno-signed-zeros.

gcc/ChangeLog:

* match.pd: Fix truncation pattern for -fno-signed-zeroes

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/no_merge_trunc_signed_zero.c: New test.

(cherry picked from commit 7dd3b2b09cbeb6712ec680a0445cb0ad41070423)

15 months agoLoongArch: Fix eh_return epilogue for normal returns.
Yang Yujie [Fri, 8 Dec 2023 10:01:18 +0000 (18:01 +0800)] 
LoongArch: Fix eh_return epilogue for normal returns.

On LoongArch, the regitsters $r4 - $r7 (EH_RETURN_DATA_REGNO) will be saved
and restored in the function prologue and epilogue if the given function calls
__builtin_eh_return.  This causes the return value to be overwritten on normal
return paths and breaks a rare case of libgcc's _Unwind_RaiseException.

gcc/ChangeLog:

PR target/114848
* config/loongarch/loongarch.cc: Do not restore the saved eh_return
data registers ($r4-$r7) for a normal return of a function that calls
__builtin_eh_return elsewhere.
* config/loongarch/loongarch-protos.h: Same.
* config/loongarch/loongarch.md: Same.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/eh_return-normal-return.c: New test.

(cherry picked from commit 4b421728289e6f1caa0dfaa953a11698ab95d37d)

15 months agoDaily bump.
GCC Administrator [Tue, 30 Apr 2024 00:19:59 +0000 (00:19 +0000)] 
Daily bump.

15 months agoDaily bump.
GCC Administrator [Mon, 29 Apr 2024 00:20:30 +0000 (00:20 +0000)] 
Daily bump.

15 months agoDaily bump.
GCC Administrator [Sun, 28 Apr 2024 00:19:55 +0000 (00:19 +0000)] 
Daily bump.

15 months agoDaily bump.
GCC Administrator [Sat, 27 Apr 2024 00:19:59 +0000 (00:19 +0000)] 
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15 months agoFortran: Fix assumed length chars and len inquiry [PR103716]
Paul Thomas [Tue, 23 May 2023 05:46:37 +0000 (06:46 +0100)] 
Fortran: Fix assumed length chars and len inquiry [PR103716]

2023-05-23  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/103716
* resolve.cc (gfc_resolve_ref): Conversion of array_ref into an
element should be done for all characters without a len expr,
not just deferred lens, and for integer expressions.
* trans-expr.cc (conv_inquiry): For len and kind inquiry refs,
set the se string_length to NULL_TREE.

gcc/testsuite/
PR fortran/103716
* gfortran.dg/pr103716.f90 : New test.

(cherry picked from commit 842a432b02238361ecc601d301ac400a7f30f4fa)

15 months agoaarch64: Fix SCHEDULER_IDENT for Cortex-A510
Richard Ball [Fri, 26 Apr 2024 17:21:07 +0000 (18:21 +0100)] 
aarch64: Fix SCHEDULER_IDENT for Cortex-A510

The SCHEDULER_IDENT for this CPU was incorrectly
set to cortexa55. This can cause
sub-optimal asm to be generated.

gcc/ChangeLog:
PR target/114272
* config/aarch64/aarch64-cores.def (AARCH64_CORE):
Change SCHEDULER_IDENT from cortexa55 to cortexa53
for Cortex-A510.

15 months agogfortran: Allow ref'ing PDT's len() in parameter-initializer.
Andre Vehreschild [Wed, 12 Jul 2023 10:51:30 +0000 (12:51 +0200)] 
gfortran: Allow ref'ing PDT's len() in parameter-initializer.

Fix declaring a parameter initialized using a pdt_len reference
not simplifying the reference to a constant.

2023-07-12  Andre Vehreschild  <vehre@gcc.gnu.org>

gcc/fortran/ChangeLog:

PR fortran/102003
* expr.cc (find_inquiry_ref): Replace len of pdt_string by
constant.
(simplify_ref_chain): Ensure input to find_inquiry_ref is
NULL.
(gfc_match_init_expr): Prevent PDT analysis for function calls.
(gfc_pdt_find_component_copy_initializer): Get the initializer
value for given component.
* gfortran.h (gfc_pdt_find_component_copy_initializer): New
function.
* simplify.cc (gfc_simplify_len): Replace len() of PDT with pdt
component ref or constant.

gcc/testsuite/ChangeLog:

* gfortran.dg/pdt_33.f03: New test.

(cherry picked from commit f9182da3213aa57c16dd0b52862126de4a259f6a)

15 months agoDaily bump.
GCC Administrator [Fri, 26 Apr 2024 00:20:25 +0000 (00:20 +0000)] 
Daily bump.

15 months agoarm: Zero/Sign extends for CMSE security
Richard Ball [Thu, 25 Apr 2024 14:30:42 +0000 (15:30 +0100)] 
arm: Zero/Sign extends for CMSE security

Co-Authored by: Andre Simoes Dias Vieira <Andre.SimoesDiasVieira@arm.com>

This patch makes the following changes:

1) When calling a secure function from non-secure code then any arguments
   smaller than 32-bits that are passed in registers are zero- or sign-extended.
2) After a non-secure function returns into secure code then any return value
   smaller than 32-bits that is passed in a register is  zero- or sign-extended.

This patch addresses the following CVE-2024-0151.

gcc/ChangeLog:
PR target/114837
* config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear):
Add zero/sign extend.
(arm_expand_prologue): Add zero/sign extend.

gcc/testsuite/ChangeLog:

* gcc.target/arm/cmse/extend-param.c: New test.
* gcc.target/arm/cmse/extend-return.c: New test.

(cherry picked from commit ad45086178d833254d66fab518b14234418f002b)

15 months agors6000: Fix wrong align passed to build_aligned_type [PR88309]
Kewen Lin [Tue, 9 Apr 2024 02:01:36 +0000 (21:01 -0500)] 
rs6000: Fix wrong align passed to build_aligned_type [PR88309]

As the comments in PR88309 show, there are two oversights
in rs6000_gimple_fold_builtin that pass align in bytes to
build_aligned_type but which actually requires align in
bits, it causes unexpected ICE or hanging in function
is_miss_rate_acceptable due to zero align_unit value.

This patch is to fix them by converting bytes to bits, add
an assertion on positive align_unit value and notes function
build_aligned_type requires align measured in bits in its
function comment.

PR target/88309

Co-authored-by: Andrew Pinski <quic_apinski@quicinc.com>
gcc/ChangeLog:

* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Fix
wrong align passed to function build_aligned_type.
* tree-ssa-loop-prefetch.cc (is_miss_rate_acceptable): Add an
assertion to ensure align_unit should be positive.
* tree.cc (build_qualified_type): Update function comments.

gcc/testsuite/ChangeLog:

* gcc.target/powerpc/pr88309.c: New test.

15 months agoDaily bump.
GCC Administrator [Thu, 25 Apr 2024 00:20:15 +0000 (00:20 +0000)] 
Daily bump.

15 months agoDaily bump.
GCC Administrator [Wed, 24 Apr 2024 00:20:32 +0000 (00:20 +0000)] 
Daily bump.

15 months agotsan: Don't instrument non-generic AS accesses [PR111736]
Jakub Jelinek [Tue, 26 Mar 2024 10:06:15 +0000 (11:06 +0100)] 
tsan: Don't instrument non-generic AS accesses [PR111736]

Similar to the asan and ubsan changes, we shouldn't instrument non-generic
address space accesses with tsan, because we just have library functions
which take address of the objects as generic address space pointers, so they
can't handle anything else.

2024-03-26  Jakub Jelinek  <jakub@redhat.com>

PR sanitizer/111736
* tsan.cc (instrument_expr): Punt on non-generic address space
accesses.

* gcc.dg/tsan/pr111736.c: New test.

(cherry picked from commit 471967ab8b4c49338ba77defbe24b06cc51c0093)