avieira [Tue, 13 Nov 2018 14:11:46 +0000 (14:11 +0000)]
[PATCH][GCC] Make DR_TARGET_ALIGNMENT compile time variable
This patch enables targets to describe DR_TARGET_ALIGNMENT as a compile-time
variable. It does so by turning the variable into a 'poly_uint64'.
gcc/ChangeLog:
2018-11-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/aarch64/aarch64.c
(aarch64_vectorize_preferred_vector_alignment): Change return type to
poly_uint64.
(aarch64_simd_vector_alignment_reachable): Adapt to preferred vector
alignment being a poly int.
* doc/tm.texi (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Change
return type to poly_uint64.
* target.def (default_preferred_vector_alignment): Likewise.
* targhooks.c (default_preferred_vector_alignment): Likewise.
* targhooks.h (default_preferred_vector_alignment): Likewise.
* tree-vect-data-refs.c (vect_calculate_target_alignment): Likewise.
(vect_compute_data_ref_alignment): Adapt to vector alignment being a
poly int.
(vect_update_misalignment_for_peel): Likewise.
(vect_enhance_data_refs_alignment): Likewise.
(vect_find_same_alignment_drs): Likewise.
(vect_duplicate_ssa_name_ptr_info): Likewise.
(vect_setup_realignment): Likewise.
(vect_can_force_dr_alignment_p): Change alignment parameter type to
poly_uint64.
* tree-vect-loop-manip.c (get_misalign_in_elems): Learn to construct a
mask with a compile time variable vector alignment.
(vect_gen_prolog_loop_niters): Adapt to vector alignment being a poly
int.
(vect_do_peeling): Exit early if vector alignment is not constant.
* tree-vect-stmts.c (ensure_base_align): Adapt to vector alignment being
a poly int.
(vectorizable_store): Likewise.
(vectorizable_load): Likweise.
* tree-vectorizer.h (struct dr_vec_info): Make target_alignment field a
poly_uint64.
(vect_known_alignment_in_bytes): Adapt to vector alignment being a
poly int.
(vect_can_force_dr_alignment_p): Change alignment parameter type to
poly_uint64.
amodra [Tue, 13 Nov 2018 13:01:36 +0000 (13:01 +0000)]
[RS6000] Don't put large integer constants in TOC for -mcmodel=medium
For -mcmodel=medium we can use toc-relative addressing to access
constants placed in read-only data, which is better since they can be
merged when in .rodata.cst8.
* config/rs6000/linux64.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Exclude
integer constants when -mcmodel=medium.
claziss [Tue, 13 Nov 2018 12:51:30 +0000 (12:51 +0000)]
[ARC] Do not emit ZOL in the presence of text jump tables.
Avoid emitting lp instruction when in its ZOL body we find a jump
table data in text section. One of the reason is the jump tables size
can be changed latter on, hence the total ZOL length may be wrongly
computed.
claziss [Tue, 13 Nov 2018 12:51:19 +0000 (12:51 +0000)]
[ARC] Update EH code.
Our ABI says the blink is pushed first on stack followed by an unknown
number of register saves, and finally by fp. Hence we cannot use the
EH_RETURN_ADDRESS macro as the stack is not finalized at that moment.
The alternative is to use the eh_return pattern and to initialize all
the bits after register allocation when the stack layout is finalized.
* config/arc/arc.c (arc_eh_return_address_location): Repurpose it
to fit the eh_return pattern.
* config/arc/arc.md (eh_return): Define.
(VUNSPEC_ARC_EH_RETURN): Likewise.
* config/arc/arc-protos.h (arc_eh_return_address_location): Match
new implementation.
* config/arc/arc.h (EH_RETURN_HANDLER_RTX): Remove it.
claziss [Tue, 13 Nov 2018 12:07:12 +0000 (12:07 +0000)]
[ARC] Refurbish and improve prologue/epilogue functions.
Reimplement how prologue and epilogue is emitted to accomodate
enter/leave instructions, as well as improving the size of the
existing techinques.
The following modifications are added:
- millicode thunk calls can be now selected regardless of the
optimization level. However they are enabled for size optimizations
by default. Also, the millicode optimization is turned off when we
compile for long jumps.
- the compiler is able to use enter/leave instructions for prologue
and epilogue. As these instructions are not ABI compatible we gurad
them under a switch (i.e., -mcode-density-frame). When this option
is on, the compiler will try emitting enter/leave instructions, if
not, then millicode thunk calls (if enabled), and latter the regular
push/pop instructions.
- The prologue/epilogue is now optimized to use pointer walks, hence
improving the chance to have push_s/pop_s instructions emitted. It
also tries to combine the stack adjustments with load/store
operations.
claziss [Tue, 13 Nov 2018 12:06:58 +0000 (12:06 +0000)]
[ARC] Add peephole rules to combine store/loads into double store/loads
Simple peephole rules which combines multiple ld/st instructions into
64-bit load/store instructions. It only works for architectures which
are having double load/store option on.
gcc/
Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (gen_operands_ldd_std): Add.
* config/arc/arc.c (operands_ok_ldd_std): New function.
(mem_ok_for_ldd_std): Likewise.
(gen_operands_ldd_std): Likewise.
* config/arc/arc.md: Add peephole2 rules for std/ldd.
ebotcazou [Tue, 13 Nov 2018 09:56:46 +0000 (09:56 +0000)]
* toplev.c (output_stack_usage): Turn test on flag_stack_usage into
test on stack_usage_file.
(lang_dependent_init): Do not open the .su file if generating LTO.
xianmiao [Tue, 13 Nov 2018 09:12:36 +0000 (09:12 +0000)]
2018-11-13 Xianmiao Qu <xianmiao_qu@c-sky.com>
libgcc/
* config/csky/linux-unwind.h (_sig_ucontext_t): Remove.
(csky_fallback_frame_state): Modify the check of the
instructions to adapt to changes in the kernel
jason [Tue, 13 Nov 2018 04:49:09 +0000 (04:49 +0000)]
Implement P0315R4, Lambdas in unevaluated contexts.
When lambdas were added in C++11 they were banned from unevaluated contexts
as a way to avoid needing to deal with them in mangling or SFINAE. This
proposal avoids that with a more narrow proposal: lambdas never compare as
equivalent (so we don't need to mangle them), and substitution failures
within a lambda are hard errors. Lambdas appearing in places that types
couldn't previously have been declared introduces various complications; in
particular, it seems likely to mean types with no linkage being used more
broadly, risking ODR violations. I want to follow up this patch with some
related diagnostics.
* decl2.c (min_vis_expr_r): Handle LAMBDA_EXPR.
* mangle.c (write_expression): Handle LAMBDA_EXPR.
* parser.c (cp_parser_lambda_expression): Allow lambdas in
unevaluated context. Start the tentative firewall sooner.
(cp_parser_lambda_body): Use cp_evaluated.
* pt.c (iterative_hash_template_arg): Handle LAMBDA_EXPR.
(tsubst_function_decl): Substitute a lambda even if it isn't
dependent.
(tsubst_lambda_expr): Use cp_evaluated. Always complain.
(tsubst_copy_and_build) [LAMBDA_EXPR]: Do nothing if tf_partial.
* semantics.c (begin_class_definition): Allow in template parm list.
* tree.c (strip_typedefs_expr): Pass through LAMBDA_EXPR.
(cp_tree_equal): Handle LAMBDA_EXPR.
jason [Tue, 13 Nov 2018 04:47:20 +0000 (04:47 +0000)]
Avoid double substitution with complete explicit template arguments.
Previously, when we got a function template with explicit arguments for all
of the template parameters, we still did "deduction", which of course
couldn't deduce anything, but did other deduction-time checking of
non-dependent conversions and such. This broke down with the unevaluated
lambdas patch (to follow): substituting into the lambda multiple times, once
to get the function type for deduction and then again to generate the actual
decl, doesn't work, since different substitutions of a lambda produce
different types. I believe that skipping the initial substitution when we
have all the arguments is still conformant, and produces better diagnostics
for some testcases.
* pt.c (fn_type_unification): If we have a full set of explicit
arguments, go straight to substitution.
jason [Tue, 13 Nov 2018 04:46:20 +0000 (04:46 +0000)]
* decl2.c (min_vis_expr_r, expr_visibility): New.
We weren't properly constraining visibility based on names that appear in
the mangled representation of expressions. This was made more obvious
by the upcoming unevaluated lambdas patch.
jason [Tue, 13 Nov 2018 04:40:01 +0000 (04:40 +0000)]
Implement P0722R3, destroying operator delete.
A destroying operator delete takes responsibility for calling the destructor
for the object it is deleting; this is intended to be useful for sized
delete of a class allocated with a trailing buffer, where the compiler can't
know the size of the allocation, and so would pass the wrong size to the
non-destroying sized operator delete.
jason [Tue, 13 Nov 2018 04:34:59 +0000 (04:34 +0000)]
Implement P0780R2, pack expansion in lambda init-capture.
Mostly this was straightforward; the tricky bit was finding, in the
instantiation, the set of capture proxies built when instantiating the
init-capture. The comment in lookup_init_capture_pack goes into detail.
* parser.c (cp_parser_lambda_introducer): Parse pack init-capture.
* pt.c (tsubst_pack_expansion): Handle init-capture packs.
(lookup_init_capture_pack): New.
(tsubst_expr) [DECL_EXPR]: Use it.
(tsubst_lambda_expr): Remember field pack expansions for
init-captures.
jason [Tue, 13 Nov 2018 04:33:57 +0000 (04:33 +0000)]
* cp-tree.h (struct cp_evaluated): New.
This patch simplifies the saving/clearing/restoring of
cp_unevaluated_operand and c_inhibit_evaluation_warnings in the presence of
mid-block returns.
* init.c (get_nsdmi): Use it.
* parser.c (cp_parser_enclosed_template_argument_list): Use it.
* pt.c (coerce_template_parms, tsubst_aggr_type): Use it.
amodra [Tue, 13 Nov 2018 03:03:10 +0000 (03:03 +0000)]
[RS6000] Ignore "c", "l" and "h" for register preference
This catches a few places where move insn patterns don't slightly
disparage CTR, LR and VRSAVE regs. Also fixes the doc for the rs6000
h constraint, and removes an r->cl alternative covered by r->h.
* gcc/doc/md.texi (Machine Constraints): Correct rs6000 h constraint
description.
* config/rs6000/rs6000.md (movsi_internal1): Delete MT%0 case
covered by alternative.
(movcc_internal1): Ignore h for register preference.
(mov<mode>_hardfloat64): Likewise.
(mov<mode>_softfloat): Ignore c, l, h for register preference.
PR middle-end/86677
PR middle-end/87528
* tree-scalar-evolution.c (expression_expensive_p): Make BUILTIN POPCOUNT
as expensive when backend does not define it.
macro [Mon, 12 Nov 2018 23:16:40 +0000 (23:16 +0000)]
MIPS: Default to --with-llsc for the R5900 Linux target as well
The Linux kernel requires and emulates LL and SC for the R5900 too. The
special --without-llsc default for the R5900 is therefore not applicable
in that case.
Reviewed-by: Maciej W. Rozycki <macro@linux-mips.org>
2018-11-12 Fredrik Noring <noring@nocrew.org>
gcc/
* config.gcc: Update with-llsc defaults for MIPS r5900.
renlin [Mon, 12 Nov 2018 16:47:24 +0000 (16:47 +0000)]
[PR87815]Don't generate shift sequence for load replacement in DSE when the mode size is not compile-time constant
The patch adds a check if the gap is compile-time constant.
This happens when dse decides to replace the load with previous store value.
The problem is that, shift sequence could not accept compile-time non-constant
mode operand.
gcc/
2018-11-12 Renlin Li <renlin.li@arm.com>
PR target/87815
* dse.c (get_stored_val): Add check for compile-time
constantness of gap.
redi [Mon, 12 Nov 2018 15:25:40 +0000 (15:25 +0000)]
PR libstdc++/87963 fix build for 64-bit mingw
PR libstdc++/87963
* src/c++17/memory_resource.cc (chunk::_M_bytes): Change type from
unsigned to uint32_t.
(chunk): Fix static assertion for 64-bit targets that aren't LP64.
(bigblock::all_ones): Fix undefined shift.
sudi [Mon, 12 Nov 2018 14:58:39 +0000 (14:58 +0000)]
[GCC, ARM] Enable armv8.5-a and add +sb and +predres for previous ARMv8-a in ARM
This patch adds -march=armv8.5-a to the Arm backend.
Armv8.5-A also adds two new security features:
- Speculation Barrier instruction
- Execution and Data Prediction Restriction Instructions
These are made optional to all older Armv8-A versions. Thus we are adding two
new options "+sb" and "+predres" to all older Armv8-A. These are passed on to
the assembler and have no code generation effects and have already gone in the
trunk of binutils.
*** gcc/ChangeLog ***
2018-11-12 Sudakshina Das <sudi.das@arm.com>
* config/arm/arm-cpus.in (armv8_5, sb, predres): New features.
(ARMv8_5a): New fgroup.
(armv8.5-a): New arch.
(armv8-a, armv8.1-a, armv8.2-a, armv8.3-a, armv8.4-a): New options
sb and predres.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/t-aprofile: Add matching rules for -march=armv8.5-a
* config/arm/t-arm-elf (all_v8_archs): Add armv8.5-a.
* config/arm/t-multilib (v8_5_a_simd_variants): New variable.
Add matching rules for -march=armv8.5-a and extensions.
* doc/invoke.texi (ARM options): Document -march=armv8.5-a.
Add sb and predres to all armv8-a except armv8.5-a.
*** gcc/testsuite/ChangeLog ***
2018-11-12 Sudakshina Das <sudi.das@arm.com>
* gcc.target/arm/multilib.exp: Add some -march=armv8.5-a
combination tests.
gcc/
* doc/extend.texi (Common Type Attributes): For the align type
attribute, copy language about decreasing alignment from the
corresponding variable attribute.
rguenth [Sun, 11 Nov 2018 08:51:34 +0000 (08:51 +0000)]
2018-11-11 Richard Biener <rguenther@suse.de>
* tree-vrp.h (class value_range_base): New base class for
value_range containing all but the m_equiv member.
(dump_value_range_base): Add.
(range_includes_zero_p): Work on value_range_base.
* tree-vrp.c (value_range_base::set): Split out base handling
from...
(value_range::set): this.
(value_range::set_equiv): New.
(value_range_base::value_range_base): New constructors.
(value_range_base::check): Split out base handling from...
(value_range::check): this.
(value_range::equal_p): Refactor in terms of
ignore_equivs_equal_p which is now member of the base.
(value_range_base::set_undefined): New.
(value_range_base::set_varying): Likewise.
(value_range_base::dump):Split out base handling from...
(value_range::dump): this.
(value_range_base::set_and_canonicalize): Split out base handling
from...
(value_range::set_and_canonicalize): this.
(value_range_base::union_): New.
* ipa-prop.h (struct ipa_jump_func): Use value_range_base *
for m_vr.
* ipa-cp.c (class ipcp_vr_lattice): Use value_range_base
instead of value_range everywhere.
(ipcp_vr_lattice::print): Use dump_value_range_base.
(ipcp_vr_lattice::meet_with): Adjust.
(ipcp_vr_lattice::meet_with_1): Likewise.
(ipa_vr_operation_and_type_effects): Likewise.
(propagate_vr_across_jump_function): Likewise.
* ipa-prop.c (struct ipa_vr_ggc_hash_traits): Likewise.
(ipa_get_value_range): Likewise.
(ipa_set_jfunc_vr): Likewise.
(ipa_compute_jump_functions_for_edge): Likewise.
redi [Sun, 11 Nov 2018 05:17:03 +0000 (05:17 +0000)]
Implement P0318R1 unwrap_ref_decay and unwrap_reference
Implement P0318R1 unwrap_ref_decay and unwrap_reference
* include/std/type_traits (unwrap_reference, unwrap_reference_t)
(unwrap_ref_decay, unwrap_ref_decay_t): New traits and aliases.
* testsuite/20_util/unwrap_reference/1.cc: New test.
* testsuite/20_util/unwrap_reference/2.cc: New test.
segher [Sat, 10 Nov 2018 23:12:48 +0000 (23:12 +0000)]
combine: More make_more_copies
This makes make_more_copies do what its documentation says, that is,
only make an intermediate pseudo if copying to a pseudo.
This regressed generated code quality when we didn't keep the original
notes that were on the copy, but since r265582 we do, and only allowing
pseudos now is a win. It also simplifies the code.
* combine.c (make_more_copies): Only make an intermediate copy if the
dest of a move is a pseudo.
iii [Fri, 9 Nov 2018 20:33:19 +0000 (20:33 +0000)]
S/390: Allow relative addressing of literal pool entries
r265490 allowed the compiler to choose in a more flexible way whether to
use load or load-address-relative-long (LARL) instruction. When it
chose LARL for literal pool references, the latter ones were rewritten
by pass_s390_early_mach to use UNSPEC_LTREF, which assumes base register
usage, which in turn is not compatible with LARL. The end result was an
ICE because of unrecognizable insn.
UNSPEC_LTREF and friends are necessary in order to communicate the
dependency on the base register to pass_sched2. When relative
addressing is used, no base register is necessary, so in such cases the
rewrite must be avoided.
gcc/ChangeLog:
2018-11-09 Ilya Leoshkevich <iii@linux.ibm.com>
PR target/87762
* config/s390/s390.c (s390_safe_relative_long_p): New function.
(annotate_constant_pool_refs): Skip insns which support
relative addressing.
(annotate_constant_pool_refs_1): New helper function.
(find_constant_pool_ref): Skip insns which support relative
addression.
(find_constant_pool_ref_1): New helper function.
(replace_constant_pool_ref): Skip insns which support
relative addressing.
(replace_constant_pool_ref_1): New helper function.
(s390_mainpool_start): Adapt to the new signature.
(s390_mainpool_finish): Likewise.
(s390_chunkify_start): Likewise.
(s390_chunkify_finish): Likewise.
(pass_s390_early_mach::execute): Likewise.
(s390_prologue_plus_offset): Likewise.
(s390_emit_prologue): Likewise.
(s390_emit_epilogue): Likewise.
jakub [Fri, 9 Nov 2018 20:17:40 +0000 (20:17 +0000)]
* affinity-fmt.c: Include inttypes.h if HAVE_INTTYPES_H.
(gomp_display_affinity): Use __builtin_choose_expr to handle
properly handle argument having integral, or pointer or some other
type. If inttypes.h is available and PRIx64 is defined, use PRIx64
with uint64_t type instead of %llx and unsigned long long.
ian [Fri, 9 Nov 2018 19:03:59 +0000 (19:03 +0000)]
cmd/cgo: fix typo in gccgo name mangling recipe
The code to implement new-style gccgo name mangling had a recipe that
didn't quite match the one in the compiler (incorrect handling for
'.'). This showed up as a failure in the gotools cgo test if the
directory containing the test run included a "." character.
PR middle-end/81824
* attribs.c (has_attribute): New helper function.
(decls_mismatched_attributes, maybe_diag_alias_attributes): Same.
* attribs.h (decls_mismatched_attributes): Declare.
* cgraphunit.c (handle_alias_pairs): Call maybe_diag_alias_attributes.
(maybe_diag_incompatible_alias): Use OPT_Wattribute_alias_.
* common.opt (-Wattribute-alias): Take an argument.
(-Wno-attribute-alias): New option.
* doc/extend.texi (Common Function Attributes): Document copy.
(Common Variable Attributes): Same.
* doc/invoke.texi (-Wmissing-attributes): Document enhancement.
(-Wattribute-alias): Document new option argument.
gcc/testsuite/ChangeLog:
PR middle-end/81824
* gcc.dg/Wattribute-alias.c: New test.
* gcc.dg/Wmissing-attributes.c: New test.
* gcc.dg/attr-copy.c: New test.
* gcc.dg/attr-copy-2.c: New test.
* gcc.dg/attr-copy-3.c: New test.
* gcc.dg/attr-copy-4.c: New test.
marxin [Fri, 9 Nov 2018 15:04:52 +0000 (15:04 +0000)]
Come up with -fipa-reference-addressable flag.
2018-11-09 Martin Liska <mliska@suse.cz>
* cgraph.h (ipa_discover_readonly_nonaddressable_vars): Rename
to ...
(ipa_discover_variable_flags): ... this.
* common.opt: Come up with new flag -fipa-reference-addressable.
* doc/invoke.texi: Document it.
* ipa-reference.c (propagate): Call the renamed fn.
* ipa-visibility.c (whole_program_function_and_variable_visibility):
Likewise.
* ipa.c (ipa_discover_readonly_nonaddressable_vars): Renamed to
...
(ipa_discover_variable_flags): ... this. Discover
non-addressable variables only with the newly added flag.
* opts.c: Enable the newly added flag with -O1 and higher
optimization level.
2018-11-09 Martin Liska <mliska@suse.cz>
jakub [Fri, 9 Nov 2018 13:02:50 +0000 (13:02 +0000)]
2018-11-09 Jakub Jelinek <jakub@redhat.com>
* gcc.dg/gomp/workshare-reduction-1.c: New test.
* gcc.dg/gomp/workshare-reduction-2.c: New test.
* gcc.dg/gomp/workshare-reduction-3.c: New test.
* gcc.dg/gomp/workshare-reduction-4.c: New test.
* gcc.dg/gomp/workshare-reduction-5.c: New test.
* gcc.dg/gomp/workshare-reduction-6.c: New test.
* gcc.dg/gomp/workshare-reduction-7.c: New test.
* gcc.dg/gomp/workshare-reduction-8.c: New test.
* gcc.dg/gomp/workshare-reduction-9.c: New test.
* gcc.dg/gomp/workshare-reduction-10.c: New test.
* gcc.dg/gomp/workshare-reduction-11.c: New test.
* gcc.dg/gomp/workshare-reduction-12.c: New test.
* gcc.dg/gomp/workshare-reduction-13.c: New test.
* gcc.dg/gomp/workshare-reduction-14.c: New test.
* gcc.dg/gomp/workshare-reduction-15.c: New test.
* gcc.dg/gomp/workshare-reduction-16.c: New test.
* gcc.dg/gomp/workshare-reduction-17.c: New test.
* gcc.dg/gomp/workshare-reduction-18.c: New test.
* gcc.dg/gomp/workshare-reduction-19.c: New test.
* gcc.dg/gomp/workshare-reduction-20.c: New test.
* gcc.dg/gomp/workshare-reduction-21.c: New test.
* gcc.dg/gomp/workshare-reduction-22.c: New test.
* gcc.dg/gomp/workshare-reduction-23.c: New test.
* gcc.dg/gomp/workshare-reduction-24.c: New test.
* gcc.dg/gomp/workshare-reduction-25.c: New test.
* gcc.dg/gomp/workshare-reduction-26.c: New test.
* gcc.dg/gomp/workshare-reduction-27.c: New test.
* gcc.dg/gomp/workshare-reduction-28.c: New test.
* gcc.dg/gomp/workshare-reduction-29.c: New test.
* gcc.dg/gomp/workshare-reduction-30.c: New test.
* gcc.dg/gomp/workshare-reduction-31.c: New test.
* gcc.dg/gomp/workshare-reduction-32.c: New test.
* gcc.dg/gomp/workshare-reduction-33.c: New test.
* gcc.dg/gomp/workshare-reduction-34.c: New test.
* gcc.dg/gomp/workshare-reduction-35.c: New test.
* gcc.dg/gomp/workshare-reduction-36.c: New test.
* gcc.dg/gomp/workshare-reduction-37.c: New test.
* gcc.dg/gomp/workshare-reduction-38.c: New test.
* gcc.dg/gomp/workshare-reduction-39.c: New test.
* gcc.dg/gomp/workshare-reduction-40.c: New test.
* gcc.dg/gomp/workshare-reduction-41.c: New test.
* gcc.dg/gomp/workshare-reduction-42.c: New test.
* gcc.dg/gomp/workshare-reduction-43.c: New test.
* gcc.dg/gomp/workshare-reduction-44.c: New test.
* gcc.dg/gomp/workshare-reduction-45.c: New test.
* gcc.dg/gomp/workshare-reduction-46.c: New test.
* gcc.dg/gomp/workshare-reduction-47.c: New test.
* gcc.dg/gomp/workshare-reduction-48.c: New test.
* gcc.dg/gomp/workshare-reduction-49.c: New test.
* gcc.dg/gomp/workshare-reduction-50.c: New test.
* gcc.dg/gomp/workshare-reduction-51.c: New test.
* gcc.dg/gomp/workshare-reduction-52.c: New test.
* gcc.dg/gomp/workshare-reduction-53.c: New test.
* gcc.dg/gomp/workshare-reduction-54.c: New test.
* gcc.dg/gomp/workshare-reduction-55.c: New test.
* gcc.dg/gomp/workshare-reduction-56.c: New test.
* gcc.dg/gomp/workshare-reduction-57.c: New test.
* gcc.dg/gomp/workshare-reduction-58.c: New test.
libgomp/
* testsuite/libgomp.c-c++-common/task-reduction-13.c: New test.
* testsuite/libgomp.c-c++-common/task-reduction-14.c: New test.
rearnsha [Fri, 9 Nov 2018 10:58:59 +0000 (10:58 +0000)]
arm - use the new CPU alias option to simplify the list of CPUs.
This patch simplifies the table of CPUs supported in GCC by making
use of the new alias feature. Most of the changes are fairly
straight-forward:
- arm7tdmi and arm7tdmi-s are the same thing.
- arm710t, arm720t and arm740t differ only in features external to the core
- arm920 and arm920t are the same thing; arm922t and arm940t differ from
arm920t only in features external to the core; ep9312 is an arm920t-derived
core that we continue to recognize for legacy reasons.
- arm10tdmi and arm1020t differ only in features external to the core.
- arm9e, arm946te-s, arm966e-s and arm968e-s differ only in features external
to the core.
- arm10e, arm1020e and arm1022e differ only in features external to the core.
The arm10e/arm1020e/arm1022e change is the only one which changes
behaviour of the compiler slightly. Previously, and for no reason
that I can remember, the scheduler for arm1020e/arm1022e was not used
for arm10e: this was probably an oversight. The unification means
that the same scheduler is now used for all three cores.
* config/arm/arm-cpus.in (arm7tdmi): Add an alias for arm7tdmi-s.
(arm7tdmi-s): Delete CPU.
(arm710t): Add aliases for arm720t and arm740t.
(arm720t, arm740t): Delete CPUs.
(arm920t): Add aliases for arm920, arm922t and arm940t.
(arm920, arm922t, arm940t): Delete CPUs.
(arm10tdmi): Add alias for arm1020t.
(arm1020t): Delete CPU.
(arm9e): Add aliases for arm946e-s, arm966e-s and arm968e-s.
(arm946e-s, arm966e-s, arm968e-s): Delete CPUs.
(arm10e): Add aliases for arm1020e and arm1022e.
(arm1020e, arm1022e): Delete CPU.
* config/arm/arm.md (generic_sched): Remove entries that are now
handled by aliases.
(generic_vfp): Likewise.
* config/arm/arm1020e.md: Simplify tuning selection based on alias
changes.
* config/arm/arm-tune.md: Regenerated.
* config/arm/arm-tables.opt: Regenerated.
rguenth [Fri, 9 Nov 2018 10:53:31 +0000 (10:53 +0000)]
2018-11-09 Richard Biener <rguenther@suse.de>
PR tree-optimization/87621
* tree-vect-loop.c (vectorizable_reduction): Handle reduction
op with only phi inputs.
* tree-ssa-loop-ch.c: Include tree-ssa-sccvn.h.
(ch_base::copy_headers): Run CSE on copied loop headers.
(pass_ch_vect::process_loop_p): Simplify.
aoliva [Fri, 9 Nov 2018 10:16:09 +0000 (10:16 +0000)]
[PR86438] compare-elim: cope with set of in_b
When in_a resolves to a register set in the prev_clobber insn, we may
use the SET_SRC for the compare instead. However, when in_b so
resolves, we proceed to use the reg with its earlier value. When both
resolve to the same register and prev_clobber is an insn that modifies
the register, this arrangement may cause the compare to match (when it
shouldn't) and the elimination of the compare to incorrectly succeed.
aoliva [Fri, 9 Nov 2018 10:15:46 +0000 (10:15 +0000)]
[PR87793] reject non-toplevel unspecs in debug loc exprs on x86
Before revision 254025, we'd reject UNSPECs in debug loc exprs.
TARGET_CONST_NOT_OK_FOR_DEBUG_P still rejects that by default, on all
ports that override it, except for x86, that accepts @gotoff unspecs.
We can indeed accept them in top-level expressions, but not as
subexpressions: the assembler rejects the difference between two
@gotoff symbols, for example.
We could simplify such a difference and drop the @gotoffs, provided
that the symbols are in the same section; we could also accept
@gotoffs plus literal constants. However, accepting those but
rejecting such combinations as subexpressions would be ugly, and most
likely not worth the trouble: sym@gotoff+litconst hardly makes sense
as a standalone expression, and the difference between @gotoffs should
be avoided to begin with, as follows.
Ideally, the debug loc exprs would use the symbolic data in
REG_EQUIV/REG_EQUAL notes, or delegitimized addresses, instead of
simplifying the difference between two legitimized addresses so that
the occurrences of the GOT register cancel each other. That would
require some more elaborate surgery in var-tracking and cselib than
would be appropriate at this stage.
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