Jonathan Wakely [Tue, 6 May 2014 13:27:46 +0000 (14:27 +0100)]
Backport libstdc++/60594 fix from mainline.
PR libstdc++/60594
* include/std/functional (function::_Callable): Exclude own type
from the callable checks.
* testsuite/20_util/function/60594.cc: New.
Richard Biener [Tue, 6 May 2014 09:02:08 +0000 (09:02 +0000)]
backport: [multiple changes]
2014-05-06 Richard Biener <rguenther@suse.de>
Backport from mainline
2014-04-17 Richard Biener <rguenther@suse.de>
PR middle-end/60849
* tree-ssa-propagate.c (valid_gimple_rhs_p): Only allow effective
boolean results for comparisons.
* g++.dg/opt/pr60849.C: New testcase.
2014-04-07 Richard Biener <rguenther@suse.de>
PR tree-optimization/60766
* tree-ssa-loop-ivopts.c (cand_value_at): Compute in an
unsigned type.
(may_eliminate_iv): Convert cand_value_at result to desired
type.
* gcc.dg/torture/pr60766.c: New testcase.
2014-04-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/60903
* tree-ssa-loop-im.c (execute_sm_if_changed): Properly apply
IRREDUCIBLE_LOOP loop flags to newly created BBs and edges.
Richard Biener [Mon, 5 May 2014 13:48:42 +0000 (13:48 +0000)]
Backport PRs 59817, 60453, 60750, 60836, 60895
2014-05-05 Richard Biener <rguenther@suse.de>
Backport from mainline
2014-04-23 Richard Biener <rguenther@suse.de>
PR middle-end/60895
* tree-inline.c (declare_return_variable): Use mark_addressable.
* g++.dg/torture/pr60895.C: New testcase.
2014-04-07 Richard Biener <rguenther@suse.de>
PR middle-end/60750
* tree-ssa-operands.c (maybe_add_call_vops): Also add VDEFs
for noreturn calls.
* tree-cfgcleanup.c (fixup_noreturn_call): Do not remove VDEFs.
* g++.dg/torture/pr60750.C: New testcase.
* gcc.dg/tree-ssa/20040517-1.c: Adjust.
2014-04-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/59817
PR tree-optimization/60453
* graphite-scop-detection.c (graphite_can_represent_scev): Complete
recursion to catch all CHRECs in the scalar evolution and restrict
the predicate for the remains appropriately.
* gfortran.dg/graphite/pr59817.f: New testcase.
* gcc.dg/graphite/pr59817-1.c: Likewise.
* gcc.dg/graphite/pr59817-2.c: Likewise.
2014-04-17 Richard Biener <rguenther@suse.de>
PR tree-optimization/60836
* tree-vect-loop.c (vect_create_epilog_for_reduction): Force
initial PHI args to be gimple values.
Bill Schmidt [Fri, 2 May 2014 21:51:09 +0000 (21:51 +0000)]
re PR tree-optimization/60930 (Wrong folding of - ((unsigned long long) a * (unsigned long long) (unsigned int)-1))
[gcc]
2014-05-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR tree-optimization/60930
* gimple-ssa-strength-reduction.c (create_mul_imm_cand): Reject
creating a multiply candidate by folding two constant
multiplicands when the result overflows.
[gcc/testsuite]
2014-05-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR tree-optimization/60930
* gcc.dg/torture/pr60930.c: New test.
* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
support for decimal floating point builtin functions.
(rs6000_expand_ternop_builtin): Add checks for the new builtin
functions that take constant arguments.
(rs6000_invalid_builtin): Add decimal floating point builtin
support.
(rs6000_init_builtins): Setup long double, _Decimal64, and
_Decimal128 types for new builtin functions.
(builtin_function_type): Set the unsigned flags appropriately for
the new builtin functions.
(rs6000_opt_masks): Add support for decimal floating point builtin
functions.
* config/rs6000/rs6000.h (RS6000_BTM_DFP): Add support for decimal
floating point builtin functions.
(RS6000_BTM_COMMON): Likewise.
(RS6000_BTI_long_double): Likewise.
(RS6000_BTI_dfloat64): Likewise.
(RS6000_BTI_dfloat128): Likewise.
(long_double_type_internal_node): Likewise.
(dfloat64_type_internal_node): Likewise.
(dfloat128_type_internal_node): Likewise.
* config/rs6000/altivec.h (UNSPEC_BCDADD): Add support for ISA
2.07 bcd arithmetic instructions.
(UNSPEC_BCDSUB): Likewise.
(UNSPEC_BCD_OVERFLOW): Likewise.
(UNSPEC_BCD_ADD_SUB): Likewise.
(bcd_add_sub): Likewise.
(BCD_TEST): Likewise.
(bcd<bcd_add_sub>): Likewise.
(bcd<bcd_add_sub>_test): Likewise.
(bcd<bcd_add_sub>_test2): Likewise.
(bcd<bcd_add_sub>_<code>): Likewise.
(peephole2 for combined bcd ops): Likewise.
* config/rs6000/dfp.md (UNSPEC_DDEDPD): Add support for new
decimal floating point builtin functions.
(UNSPEC_DENBCD): Likewise.
(UNSPEC_DXEX): Likewise.
(UNSPEC_DIEX): Likewise.
(UNSPEC_DSCLI): Likewise.
(UNSPEC_DSCRI): Likewise.
(D64_D128): Likewise.
(dfp_suffix): Likewise.
(dfp_ddedpd_<mode>): Likewise.
(dfp_denbcd_<mode>): Likewise.
(dfp_dxex_<mode>): Likewise.
(dfp_diex_<mode>): Likewise.
(dfp_dscli_<mode>): Likewise.
(dfp_dscri_<mode>): Likewise.
* config/rs6000/rs6000.md (UNSPEC_ADDG6S): Add support for new BCD
builtin functions.
(UNSPEC_CDTBCD): Likewise.
(UNSPEC_CBCDTD): Likewise.
(UNSPEC_DIVE): Add support for new extended divide builtin
functions.
(UNSPEC_DIVEO): Likewise.
(UNSPEC_DIVEU): Likewise.
(UNSPEC_DIVEUO): Likewise.
(UNSPEC_UNPACK_128BIT): Add support for new builtin functions to
pack/unpack 128-bit types.
(UNSPEC_PACK_128BIT): Likewise.
(idiv_ldiv): New mode attribute to set the 32/64-bit divide type.
(udiv<mode>3): Use idiv_ldiv mode attribute.
(div<mode>3): Likewise.
(addg6s): Add new BCD builtin functions.
(cdtbcd): Likewise.
(cbcdtd): Likewise.
(UNSPEC_DIV_EXTEND): Add support for new extended divide
instructions.
(div_extend): Likewise.
(div<div_extend>_<mode>"): Likewise.
(FP128_64): Add support for new builtin functions to pack/unpack
128-bit types.
(unpack<mode>): Likewise.
(unpacktf_0): Likewise.
(unpacktf_1): Likewise.
(unpack<mode>_dm): Likewise.
(unpack<mode>_nodm): Likewise.
(pack<mode>): Likewise.
(unpackv1ti): Likewise.
(packv1ti): Likewise.
[gcc/testsuite]
2014-04-30 Michael Meissner <meissner@linux.vnet.ibm.com>
Back port from mainline
2014-04-24 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/pack01.c: New test to test the new pack and
unpack builtin functionss for 128-bit types.
* gcc.target/powerpc/pack02.c: Likewise.
* gcc.target/powerpc/pack03.c: Likewise.
* gcc.target/powerpc/extend-divide-1.c: New test to test extended
divide builtin functionss.
* gcc.target/powerpc/extend-divide-2.c: Likewise.
* gcc.target/powerpc/bcd-1.c: New test for the new BCD builtin
functions.
* gcc.target/powerpc/bcd-2.c: Likewise.
* gcc.target/powerpc/bcd-3.c: Likewise.
* gcc.target/powerpc/dfp-builtin-1.c: New test for the new DFP
builtin functionss.
* gcc.target/powerpc/dfp-builtin-2.c: Likewise.
Eric Botcazou [Mon, 28 Apr 2014 10:05:29 +0000 (10:05 +0000)]
configure.ac: Tweak GAS check for LEON instructions on SPARC.
* configure.ac: Tweak GAS check for LEON instructions on SPARC.
* configure: Regenerate.
* config/sparc/sparc.opt (muser-mode): New option.
* config/sparc/sync.md (atomic_compare_and_swap<mode>_1): Do not enable
for LEON3.
(atomic_compare_and_swap_leon3_1): New instruction for LEON3.
* doc/invoke.texi (SPARC options): Document -muser-mode.
* config/rs6000/altivec.md (UNSPEC_VBPERMQ): Add support for the
vbpermq instruction.
(altivec_vbpermq): Likewise.
PR target/60672
* config/rs6000/altivec.h (vec_xxsldwi): Add missing define to
enable use of xxsldwi and xxpermdi builtin functions.
(vec_xxpermdi): Likewise.
* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
Document use of vec_xxsldwi and vec_xxpermdi builtins.
[gcc/testsuite]
2014-04-23 Michael Meissner <meissner@linux.vnet.ibm.com>
Back port from main line:
2014-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p8vector-vbpermq.c: New test to test the
vbpermq builtin.
* config/rs6000/altivec.md (UNSPEC_VBPERMQ): Add support for the
vbpermq instruction.
(altivec_vbpermq): Likewise.
PR target/60672
* config/rs6000/altivec.h (vec_xxsldwi): Add missing define to
enable use of xxsldwi and xxpermdi builtin functions.
(vec_xxpermdi): Likewise.
* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
Document use of vec_xxsldwi and vec_xxpermdi builtins.
[gcc/testsuite]
2014-04-23 Michael Meissner <meissner@linux.vnet.ibm.com>
Back port from main line:
2014-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p8vector-vbpermq.c: New test to test the
vbpermq builtin.
Bill Schmidt [Tue, 15 Apr 2014 18:30:21 +0000 (18:30 +0000)]
revert: [multiple changes]
2014-04-15 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR target/60839
Revert the following patch
2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Back port mainline subversion id 209025.
2014-04-02 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60735
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
software floating point or no floating point registers, do not
allow any type in the FPRs. Eliminate a test for SPE SIMD types
in GPRs that occurs after we tested for GPRs that would never be
true.
* config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
since the FMOVE64 type is DFmode/DDmode. If TARGET_E500_DOUBLE,
specifically allow DDmode, since that does not use the SPE SIMD
instructions.
Andreas Krebbel [Fri, 11 Apr 2014 10:47:36 +0000 (10:47 +0000)]
htm-nofloat-1.c: Rename to ...
2014-04-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gcc.target/s390/htm-nofloat-1.c: Rename to ...
* gcc.target/s390/htm-nofloat-compile-1.c: ... this one.
* gcc.target/s390/htm-nofloat-2.c: Add check for htm target and
rename to ...
* gcc.target/s390/htm-nofloat-1.c: ... this one.
* gcc.target/s390/s390.exp: Make sure the assembler supports htm
instructions as well.
Jakub Jelinek [Thu, 10 Apr 2014 07:47:55 +0000 (09:47 +0200)]
backport: re PR middle-end/36282 (Spurious warning "asm declaration ignored due to conflict with previous rename")
Backport from mainline
2014-03-13 Jakub Jelinek <jakub@redhat.com>
PR middle-end/36282
* c-pragma.c (apply_pragma_weak): Only look at
TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl)) if
DECL_ASSEMBLER_NAME_SET_P (decl).
(maybe_apply_pending_pragma_weaks): Exit early if
vec_safe_is_empty (pending_weaks) rather than only when
!pending_weaks.
(maybe_apply_pragma_weak): Likewise. If !DECL_ASSEMBLER_NAME_SET_P,
set assembler name back to NULL afterwards.
* c-c++-common/pr36282-1.c: New test.
* c-c++-common/pr36282-2.c: New test.
* c-c++-common/pr36282-3.c: New test.
* c-c++-common/pr36282-4.c: New test.
Bill Schmidt [Wed, 9 Apr 2014 20:15:57 +0000 (20:15 +0000)]
backport: [multiple changes]
2014-04-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline r208750
2014-03-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_expand_vector_set): Generate a
pattern for vector nor instead of subtract from splat(-1).
(altivec_expand_vec_perm_const_le): Likewise.
Backport from mainline r209235
2014-04-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_expand_vector_set): Use vnand
instead of vnor to exploit possible fusion opportunity in the
future.
(altivec_expand_vec_perm_const_le): Likewise.
Backport from mainline
2013-09-14 Iain Sandoe <iains@gcc.gnu.org>
gcc:
PR target/48094
* config/darwin.c (darwin_objc2_section): Note if ObjC Metadata is seen.
(darwin_objc1_section): Likewise.
(darwin_file_end): Emit Image Info section when required.
PR target/54083
* gcc.dg/attr-weakref-1.c: Allow the test on darwin with
the additional options -Wl,-undefined,dynamic_lookup and
-Wl,-flat_namespace
* gcc.dg/torture/pr53922.c: Additional option
-Wl,-flat_namespace for darwin[89].
Alan Modra [Sat, 5 Apr 2014 10:26:19 +0000 (20:56 +1030)]
Apply from mainline 2014-01-28 Alan Modra <amodra@gmail.com>
Apply from mainline
2014-01-28 Alan Modra <amodra@gmail.com>
* Makefile.in (BUILD_CPPFLAGS): Do not use ALL_CPPFLAGS.
* configure.ac <recursive call for build != host>: Define
GENERATOR_FILE. Comment. Use CXX_FOR_BUILD, CXXFLAGS_FOR_BUILD
and LD_FOR_BUILD too.
* configure: Regenerate.
Bill Schmidt [Fri, 4 Apr 2014 15:14:01 +0000 (15:14 +0000)]
backport: re PR target/60735 (GCC targeting E500 with SPE has errors with the _Decimal64 type)
[gcc]
2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Back port mainline subversion id 209025.
2014-04-02 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60735
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
software floating point or no floating point registers, do not
allow any type in the FPRs. Eliminate a test for SPE SIMD types
in GPRs that occurs after we tested for GPRs that would never be
true.
* config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
since the FMOVE64 type is DFmode/DDmode. If TARGET_E500_DOUBLE,
specifically allow DDmode, since that does not use the SPE SIMD
instructions.
Bill Schmidt [Fri, 4 Apr 2014 15:12:10 +0000 (15:12 +0000)]
backport: rs6000.c (IN_NAMED_SECTION): New macro.
[gcc]
2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline r205308
2013-11-23 David Edelsohn <dje.gcc@gmail.com>
* config/rs6000/rs6000.c (IN_NAMED_SECTION): New macro.
(rs6000_xcoff_select_section): Place decls with stricter alignment
into named sections.
(rs6000_xcoff_unique_section): Allow unique sections for
uninitialized data with strict alignment.
[gcc/testsuite]
2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
2013-04-05 David Edelsohn <dje.gcc@gmail.com>
* gcc.target/powerpc/sd-vsx.c: Skip on AIX.
* gcc.target/powerpc/sd-pwr6.c: Same.
Bill Schmidt [Fri, 4 Apr 2014 15:10:24 +0000 (15:10 +0000)]
backport: [multiple changes]
2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Back port from trunk
2013-04-25 Alan Modra <amodra@gmail.com>
PR target/57052
* config/rs6000/rs6000.md (rotlsi3_internal7): Rename to
rotlsi3_internal7le and condition on !BYTES_BIG_ENDIAN.
(rotlsi3_internal8be): New BYTES_BIG_ENDIAN insn.
Repeat for many other rotate/shift and mask patterns using subregs.
Name lshiftrt insns.
(ashrdisi3_noppc64): Rename to ashrdisi3_noppc64be and condition
on WORDS_BIG_ENDIAN.
2013-06-07 Alan Modra <amodra@gmail.com>
* config/rs6000/rs6000.c (rs6000_option_override_internal): Don't
override user -mfp-in-toc.
(offsettable_ok_by_alignment): Consider just the current access
rather than the whole object, unless BLKmode. Handle
CONSTANT_POOL_ADDRESS_P constants that lack a decl too.
(use_toc_relative_ref): Allow CONSTANT_POOL_ADDRESS_P constants
for -mcmodel=medium.
* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Don't
override user -mfp-in-toc or -msum-in-toc. Default to
-mno-fp-in-toc for -mcmodel=medium.
Bill Schmidt [Fri, 4 Apr 2014 15:08:45 +0000 (15:08 +0000)]
backport: vector.md (VEC_L): Add V1TI mode to vector types.
[gcc]
2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Back port from trunk
2014-03-12 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/vector.md (VEC_L): Add V1TI mode to vector types.
(VEC_M): Likewise.
(VEC_N): Likewise.
(VEC_R): Likewise.
(VEC_base): Likewise.
(mov<MODE>, VEC_M modes): If we are loading TImode into VSX
registers, we need to swap double words in little endian mode.
* config/rs6000/rs6000-modes.def (V1TImode): Add new vector mode
to be a container mode for 128-bit integer operations added in ISA
2.07. Unlike TImode and PTImode, the preferred register set is
the Altivec/VMX registers for the 128-bit operations.
* config/rs6000/rs6000-builtin.def (BU_P8V_AV_3): Add new support
macros for creating ISA 2.07 normal and overloaded builtin
functions with 3 arguments.
(BU_P8V_OVERLOAD_3): Likewise.
(VPERM_1T): Add support for V1TImode in 128-bit vector operations
for use as overloaded functions.
(VPERM_1TI_UNS): Likewise.
(VSEL_1TI): Likewise.
(VSEL_1TI_UNS): Likewise.
(ST_INTERNAL_1ti): Likewise.
(LD_INTERNAL_1ti): Likewise.
(XXSEL_1TI): Likewise.
(XXSEL_1TI_UNS): Likewise.
(VPERM_1TI): Likewise.
(VPERM_1TI_UNS): Likewise.
(XXPERMDI_1TI): Likewise.
(SET_1TI): Likewise.
(LXVD2X_V1TI): Likewise.
(STXVD2X_V1TI): Likewise.
(VEC_INIT_V1TI): Likewise.
(VEC_SET_V1TI): Likewise.
(VEC_EXT_V1TI): Likewise.
(EQV_V1TI): Likewise.
(NAND_V1TI): Likewise.
(ORC_V1TI): Likewise.
(VADDCUQ): Add support for 128-bit integer arithmetic instructions
added in ISA 2.07. Add both normal 'altivec' builtins, and the
overloaded builtin.
(VADDUQM): Likewise.
(VSUBCUQ): Likewise.
(VADDEUQM): Likewise.
(VADDECUQ): Likewise.
(VSUBEUQM): Likewise.
(VSUBECUQ): Likewise.
* config/rs6000/rs6000-c.c (__int128_type): New static to hold
__int128_t and __uint128_t types.
(__uint128_type): Likewise.
(altivec_categorize_keyword): Add support for vector __int128_t,
vector __uint128_t, vector __int128, and vector unsigned __int128
as a container type for TImode operations that need to be done in
VSX/Altivec registers.
(rs6000_macro_to_expand): Likewise.
(altivec_overloaded_builtins): Add ISA 2.07 overloaded functions
to support 128-bit integer instructions vaddcuq, vadduqm,
vaddecuq, vaddeuqm, vsubcuq, vsubuqm, vsubecuq, vsubeuqm.
(altivec_resolve_overloaded_builtin): Add support for V1TImode.
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Add support
for V1TImode, and set up preferences to use VSX/Altivec
registers. Setup VSX reload handlers.
(rs6000_debug_reg_global): Likewise.
(rs6000_init_hard_regno_mode_ok): Likewise.
(rs6000_preferred_simd_mode): Likewise.
(vspltis_constant): Do not allow V1TImode as easy altivec
constants.
(easy_altivec_constant): Likewise.
(output_vec_const_move): Likewise.
(rs6000_expand_vector_set): Convert V1TImode set and extract to
simple move.
(rs6000_expand_vector_extract): Likewise.
(reg_offset_addressing_ok_p): Setup V1TImode to use VSX reg+reg
addressing.
(rs6000_const_vec): Add support for V1TImode.
(rs6000_emit_le_vsx_load): Swap double words when loading or
storing TImode/V1TImode.
(rs6000_emit_le_vsx_store): Likewise.
(rs6000_emit_le_vsx_move): Likewise.
(rs6000_emit_move): Add support for V1TImode.
(altivec_expand_ld_builtin): Likewise.
(altivec_expand_st_builtin): Likewise.
(altivec_expand_vec_init_builtin): Likewise.
(altivec_expand_builtin): Likewise.
(rs6000_init_builtins): Add support for V1TImode type. Add
support for ISA 2.07 128-bit integer builtins. Define type names
for the VSX/Altivec vector types.
(altivec_init_builtins): Add support for overloaded vector
functions with V1TImode type.
(rs6000_preferred_reload_class): Prefer Altivec registers for
V1TImode.
(rs6000_move_128bit_ok_p): Move 128-bit move/split validation to
external function.
(rs6000_split_128bit_ok_p): Likewise.
(rs6000_handle_altivec_attribute): Create V1TImode from vector
__int128_t and vector __uint128_t.
* config/rs6000/vsx.md (VSX_L): Add V1TImode to vector iterators
and mode attributes.
(VSX_M): Likewise.
(VSX_M2): Likewise.
(VSm): Likewise.
(VSs): Likewise.
(VSr): Likewise.
(VSv): Likewise.
(VS_scalar): Likewise.
(VS_double): Likewise.
(vsx_set_v1ti): New builtin function to create V1TImode from
TImode.
* config/rs6000/rs6000.h (TARGET_VADDUQM): New macro to say
whether we support the ISA 2.07 128-bit integer arithmetic
instructions.
(ALTIVEC_OR_VSX_VECTOR_MODE): Add V1TImode.
(enum rs6000_builtin_type_index): Add fields to hold V1TImode
and TImode types for use with the builtin functions.
(V1TI_type_node): Likewise.
(unsigned_V1TI_type_node): Likewise.
(intTI_type_internal_node): Likewise.
(uintTI_type_internal_node): Likewise.
2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Back port from trunk
2014-03-12 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p8vector-int128-1.c: New test to test ISA
2.07 128-bit arithmetic.
* gcc.target/powerpc/p8vector-int128-2.c: Likewise.
* gcc.target/powerpc/timode_off.c: Restrict cpu type to power5,
due to when TImode is allowed in VSX registers, the allowable
address modes for TImode is just a single indirect address in
order for the value to be loaded and store in either GPR or VSX
registers. This affects the generated code, and it would cause
this test to fail, when such an option is used.
Bill Schmidt [Fri, 4 Apr 2014 15:05:34 +0000 (15:05 +0000)]
backport: [multiple changes]
2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Apply mainline r207798
2014-02-26 Alan Modra <amodra@gmail.com>
PR target/58675
PR target/57935
* config/rs6000/rs6000.c (rs6000_secondary_reload_inner): Use
find_replacement on parts of insn rtl that might be reloaded.
Backport from mainline r208287
2014-03-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_preferred_reload_class): Disallow
reload of PLUS rtx's outside of GENERAL_REGS or BASE_REGS; relax
constraint on constants to permit them being loaded into
GENERAL_REGS or BASE_REGS.
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