]> git.ipfire.org Git - thirdparty/gcc.git/log
thirdparty/gcc.git
2 weeks agotree-optimization/120924 - up --param uninit-max-chain-len
Richard Biener [Fri, 18 Jul 2025 07:02:09 +0000 (09:02 +0200)] 
tree-optimization/120924 - up --param uninit-max-chain-len

The PR shows that the uninit analysis limits are set too low in
cases we lower switches to ifs as happens on s390x for a linux
kernel TU.  This causes false positive uninit diagnostics as we
abort the attempt to prove that a value is initialized on all
paths.  The new testcase only would require upping to 9.

PR tree-optimization/120924
* params.opt (uninit-max-chain-len): Up from 8 to 12.

* gcc.dg/uninit-pr120924.c: New testcase.

(cherry picked from commit cf9a479e3f909d5217e954788eb3c5b569e4bc52)

2 weeks ago[PATCH] PR modula2/120912: Request for a procedure to obtain a file from an IOChan
Gaius Mulley [Fri, 18 Jul 2025 09:04:37 +0000 (10:04 +0100)] 
[PATCH] PR modula2/120912: Request for a procedure to obtain a file from an IOChan

This patch introduces the procedure GetFile into the supplementary
ISO style library IOChanUtils.

gcc/m2/ChangeLog:

PR modula2/120912
* gm2-libs-iso/IOChanUtils.def (GetFile): New procedure function.
* gm2-libs-iso/IOChanUtils.mod (GetFile): New procedure function.

(cherry picked from commit 15670d4477ce219c017bd52417a6074b981fb197)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks agotree-optimization/121059 - fixup loop mask query
Richard Biener [Mon, 14 Jul 2025 12:09:28 +0000 (14:09 +0200)] 
tree-optimization/121059 - fixup loop mask query

When we opportunistically mask an operand of a AND with an already
available loop mask we need to query that set with the correct number
of masks we expect.

PR tree-optimization/121059
* tree-vect-stmts.cc (vectorizable_operation): Query
scalar_cond_masked_set with the correct number of masks.

* gcc.dg/vect/pr121059.c: New testcase.

Co-Authored-By: Richard Sandiford <richard.sandiford@arm.com>
(cherry picked from commit 71be87055548cf942c7bc56d10ffd479db8569e4)

2 weeks agotree-optimization/121049 - avoid loop masking with even/odd reduction
Richard Biener [Wed, 16 Jul 2025 13:07:58 +0000 (15:07 +0200)] 
tree-optimization/121049 - avoid loop masking with even/odd reduction

The following disables loop masking when we are using an even/odd
widening operation in a reduction because the loop mask then aligns
to the wrong elements.

PR tree-optimization/121049
* internal-fn.h (widening_evenodd_fn_p): Declare.
* internal-fn.cc (widening_evenodd_fn_p): New function.
* tree-vect-stmts.cc (vectorizable_conversion): When using
an even/odd widening function disable loop masking.

* gcc.dg/vect/pr121049.c: New testcase.

(cherry picked from commit bc5570f7ef796fa7f5ab89b34ed9de2be5299f0e)

2 weeks agotree-optimization/121035 - handle stray VN values without expression
Richard Biener [Wed, 16 Jul 2025 18:19:44 +0000 (20:19 +0200)] 
tree-optimization/121035 - handle stray VN values without expression

When VN iterates we can end up with unreachable inserted expressions
in the expression tables which in turn will not be added to their
value by PREs compute_avail.  This will later ICE when we pick
them up and want to generate them.  Deal with this by giving up.

PR tree-optimization/121035
* tree-ssa-pre.cc (find_or_generate_expression): Handle
values without expression.

* gcc.dg/pr121035.c: New testcase.

(cherry picked from commit 9af57c471087a3a1b87621bce1208d6c77ba2a4a)

2 weeks ago[PATCH] [PR modula2/117203] Followup add Delete procedure function
Gaius Mulley [Fri, 18 Jul 2025 07:48:22 +0000 (08:48 +0100)] 
[PATCH] [PR modula2/117203] Followup add Delete procedure function

This patch provides GetFileName procedure function for
FIO.File, FileSystem.File and IOChan.ChanId.  The
return result from these procedures can be passed into
StringFileSysOp.Unlink to complete the required delete.

gcc/m2/ChangeLog:

PR modula2/117203
* gm2-libs-log/FileSystem.def (GetFileName): New
procedure function.
(WriteString): New procedure.
* gm2-libs-log/FileSystem.mod (GetFileName): New
procedure function.
(WriteString): New procedure.
* gm2-libs/SFIO.def (GetFileName): New procedure function.
* gm2-libs/SFIO.mod (GetFileName): New procedure function.
* gm2-libs-iso/IOChanUtils.def: New file.
* gm2-libs-iso/IOChanUtils.mod: New file.

libgm2/ChangeLog:

PR modula2/117203
* libm2iso/Makefile.am (M2DEFS): Add IOChanUtils.def.
(M2MODS): Add IOChanUtils.mod.
* libm2iso/Makefile.in: Regenerate.

gcc/testsuite/ChangeLog:

PR modula2/117203
* gm2/isolib/run/pass/testdelete2.mod: New test.
* gm2/pimlib/logitech/run/pass/testdelete2.mod: New test.
* gm2/pimlib/run/pass/testdelete.mod: New test.

(cherry picked from commit 620a40fa8843dd7f80547bbd63549abc8bbe9521)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks agogimple-fold: Fix up big endian _BitInt adjustment [PR121131]
Jakub Jelinek [Fri, 18 Jul 2025 07:20:30 +0000 (09:20 +0200)] 
gimple-fold: Fix up big endian _BitInt adjustment [PR121131]

The following testcase ICEs because SCALAR_INT_TYPE_MODE of course
doesn't work for large BITINT_TYPE types which have BLKmode.
native_encode* as well as e.g. r14-8276 use in cases like these
GET_MODE_SIZE (SCALAR_INT_TYPE_MODE ()) and TREE_INT_CST_LOW (TYPE_SIZE_UNIT
()) for the BLKmode ones.
In this case, it wants bits rather than bytes, so I've used
GET_MODE_BITSIZE like before and TYPE_SIZE otherwise.

Furthermore, the patch only computes encoding_size for big endian
targets, for little endian we don't really adjust anything, so there
is no point computing it.

2025-07-18  Jakub Jelinek  <jakub@redhat.com>

PR tree-optimization/121131
* gimple-fold.cc (fold_nonarray_ctor_reference): Use
TREE_INT_CST_LOW (TYPE_SIZE ()) instead of
GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE ()) for BLKmode BITINT_TYPEs.
Don't compute encoding_size at all for little endian targets.

* gcc.dg/bitint-124.c: New test.

(cherry picked from commit 90955b2f61f787ebc446f0a105b5f49672388d89)

2 weeks ago[PATCH] [PR modula2/120731] error in Strings.Pos causing sigsegv
Gaius Mulley [Fri, 18 Jul 2025 07:02:52 +0000 (08:02 +0100)] 
[PATCH] [PR modula2/120731] error in Strings.Pos causing sigsegv

This patch corrects the m2log library procedure function
Strings.Pos which incorrectly sliced the wrong component
of the source string.  The incorrect slice could cause
a sigsegv if negative slice indices were generated.

gcc/m2/ChangeLog:

PR modula2/120731
* gm2-libs-log/Strings.def (Delete): Rewrite comment.
* gm2-libs-log/Strings.mod (Pos): Rewrite.
(PosLower): New procedure function.

gcc/testsuite/ChangeLog:

PR modula2/120731
* gm2/pimlib/logitech/run/pass/teststrings.mod: New test.

(cherry picked from commit fc276742e0db337c4d13e6c474abafd4796a6b69)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks ago[PATCH] [modula2] Comment tidyup in gm2-compiler/M2GCCDeclare.mod
Gaius Mulley [Fri, 18 Jul 2025 07:01:58 +0000 (08:01 +0100)] 
[PATCH] [modula2] Comment tidyup in gm2-compiler/M2GCCDeclare.mod

This patch reformats three comments in the GNU GCC style.

gcc/m2/ChangeLog:

* gm2-compiler/M2GCCDeclare.mod (StartDeclareModuleScopeSeparate):
Reformat statement comments.
(StartDeclareModuleScopeWholeProgram): Ditto.

(cherry picked from commit 7a7cc65b8987b9b05fb8fb75824e2000861e6c30)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks ago[PATCH] PR modula2/120673: Mutually dependent types crash the compiler
Gaius Mulley [Fri, 18 Jul 2025 00:47:40 +0000 (01:47 +0100)] 
[PATCH] PR modula2/120673: Mutually dependent types crash the compiler

This patch fixes an ICE which will occur if cyclic dependent types
are used when declaring a variable.  This patch detects the
cyclic dependency and issues an error message for each outstanding
component.

gcc/m2/ChangeLog:

PR modula2/120673
* gm2-compiler/M2GCCDeclare.mod (ErrorDepList): New
global variable set containing every errant dependency symbol.
(mystop): Remove.
(EmitCircularDependancyError): Replace with ...
(EmitCircularDependencyError): ... this.
(AssertAllTypesDeclared): Rewrite.
(DoVariableDeclaration): Ditto.
(TypeDependentsDeclared): New procedure function.
(PrepareGCCVarDeclaration): Ditto.
(DeclareVariable): Remove assert.
(DeclareLocalVariable): Ditto.
(Constructor): Initialize ErrorDepList.
* gm2-compiler/M2MetaError.mod (doErrorScopeProc): Rewrite
and ensure that a symbol with a module scope does not lookup
from a definition module.
* gm2-compiler/P2SymBuild.mod (BuildType): Rewrite so that
a synonym type is created using the token refering to the name
on the lhs.

gcc/testsuite/ChangeLog:

PR modula2/120673
* gm2/pim/fail/badmodvar.mod: New test.
* gm2/pim/fail/cyclictypes.mod: New test.
* gm2/pim/fail/cyclictypes2.mod: New test.
* gm2/pim/fail/cyclictypes4.mod: New test.

(cherry picked from commit fba2f08152375e2c1c167ec921a0197e4c07efc6)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks agoDaily bump.
GCC Administrator [Fri, 18 Jul 2025 00:23:35 +0000 (00:23 +0000)] 
Daily bump.

2 weeks ago[PATCH] PR modula2/119650: Regenerate target independent documentation
Gaius Mulley [Thu, 17 Jul 2025 21:51:45 +0000 (22:51 +0100)] 
[PATCH] PR modula2/119650: Regenerate target independent documentation

This patch regenerates the target independent documentation
triggered by the additional library modules.

gcc/m2/ChangeLog:

PR modula2/119650
* gm2-libs/ARRAYOFCHAR.def: Remove comment about non
existent read.
* target-independent/m2/Builtins.texi: Regenerate.
* target-independent/m2/SYSTEM-iso.texi: Ditto.
* target-independent/m2/SYSTEM-pim.texi: Ditto.
* target-independent/m2/gm2-libs.texi: Ditto.

(cherry picked from commit c291bde420556c69423961f59ef6765dc6c4c547)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks ago[PATCH] PR modula2/120606: FOR loop ICE if the last expression uses an array
Gaius Mulley [Thu, 17 Jul 2025 19:41:10 +0000 (20:41 +0100)] 
[PATCH] PR modula2/120606: FOR loop ICE if the last expression uses an array

This patch fixes the ICE which occurs if the last expression is an array.
It ensures that the start and end values of the for loop expressions are
dereferenced.

gcc/m2/ChangeLog:

PR modula2/120606
* gm2-compiler/M2Quads.mod (ForLoopLastIterator): Dereference
start and end expressions e1 and e2 respectively.

gcc/testsuite/ChangeLog:

PR modula2/120606
* gm2/pim/pass/forarray.mod: New test.

(cherry picked from commit 639a147414ab2b870f9482123fcaa1821e0d5475)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks ago[PATCH] [PR modula2/119650, PR modula2/117203]: WriteString and Delete are missing...
Gaius Mulley [Thu, 17 Jul 2025 16:51:03 +0000 (17:51 +0100)] 
[PATCH] [PR modula2/119650, PR modula2/117203]: WriteString and Delete are missing from base libraries

This patch introduces a Write procedure for an array of char,
the string and char datatype.  It uses the m2r10 style of
naming the module on the datatype.  This uncovered a bug
in the import handling inside Quadident.  It also includes
an Unlink procedure from a new module FileSysOp and a String
interface to this module.

gcc/m2/ChangeLog:

PR modula2/119650
PR modula2/117203
* gm2-compiler/P2Build.bnf (CheckModuleQualident): New
procedure.
(Qualident): Rewrite.
* gm2-compiler/P3Build.bnf (PushTFQualident): New procedure.
(CheckModuleQualident): Ditto.
(Qualident): Rewrite.
* gm2-compiler/PCBuild.bnf (PushTFQualident): New procedure.
(CheckModuleQualident): Ditto.
(Qualident): Rewrite.
* gm2-compiler/PHBuild.bnf (PushTFQualident): New procedure.
(CheckModuleQualident): Ditto.
(Qualident): Rewrite.
* gm2-libs/ARRAYOFCHAR.def: New file.
* gm2-libs/ARRAYOFCHAR.mod: New file.
* gm2-libs/CFileSysOp.def: New file.
* gm2-libs/CHAR.def: New file.
* gm2-libs/CHAR.mod: New file.
* gm2-libs/FileSysOp.def: New file.
* gm2-libs/FileSysOp.mod: New file.
* gm2-libs/String.def: New file.
* gm2-libs/String.mod: New file.
* gm2-libs/StringFileSysOp.def: New file.
* gm2-libs/StringFileSysOp.mod: New file.

libgm2/ChangeLog:

PR modula2/119650
PR modula2/117203
* libm2pim/Makefile.am (M2MODS): Add ARRAYOFCHAR,
CHAR.mod, StringFileSysOp.mod and String.mod.
(M2DEFS): Add ARRAYOFCHAR, CHAR.mod,
StringFileSysOp.mod and String.mod.
(libm2pim_la_SOURCES): Add CFileSysOp.c.
* libm2pim/Makefile.in: Regenerate.
* libm2pim/CFileSysOp.cc: New file.

gcc/testsuite/ChangeLog:

PR modula2/119650
* gm2/iso/fail/CHAR.mod: New test.
* gm2/iso/run/pass/CHAR.mod: New test.
* gm2/iso/run/pass/importself.mod: New test.
* gm2/pimlib/run/pass/testwrite.mod: New test.
* gm2/pimlib/run/pass/testwritechar.mod: New test.

(cherry picked from commit d1c3cfa3296ae5010c514d67f57acf144a299c7a)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks agoc++: constexpr array testcase [PR87097]
Jason Merrill [Thu, 17 Jul 2025 13:46:35 +0000 (09:46 -0400)] 
c++: constexpr array testcase [PR87097]

This seems to have been fixed by r15-7260 for PR118285, but is sufficiently
different to merit its own test.

PR c++/87097

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/constexpr-array29.C: New test.

2 weeks ago[PATCH] PR modula2/120542: Return statement in the main procedure crashes the compiler
Gaius Mulley [Thu, 17 Jul 2025 12:57:52 +0000 (13:57 +0100)] 
[PATCH] PR modula2/120542: Return statement in the main procedure crashes the compiler

The patch checks whether a return statement is allowed.  It also checks
to see that a return expression is allowed.

gcc/m2/ChangeLog:

PR modula2/120542
* gm2-compiler/M2Quads.mod (BuildReturnLower): New procedure.
(BuildReturn): Allow return without an expression from
module initialization blocks.  Generate an error if an
expression is provided.  Call BuildReturnLower if no error
was seen.

gcc/testsuite/ChangeLog:

PR modula2/120542
* gm2/iso/fail/badreturn.mod: New test.
* gm2/iso/fail/badreturn2.mod: New test.
* gm2/iso/pass/modulereturn.mod: New test.
* gm2/iso/pass/modulereturn2.mod: New test.

(cherry picked from commit 16ab791531ec16fd4596a25efbe6b42e6c16171f)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks ago[PATCH] PR modula2/120474: InOut buffering should flush the WriteLn before the Read
Gaius Mulley [Thu, 17 Jul 2025 09:17:34 +0000 (10:17 +0100)] 
[PATCH] PR modula2/120474: InOut buffering should flush the WriteLn before the Read

This patch adds a BufferFlush to InOut.mod:LocalWrite.

gcc/m2/ChangeLog:

PR modula2/120474
* gm2-libs-log/InOut.mod (LocalWrite): Call FIO.FlushBuffer.

(cherry picked from commit 13498bf4fcff4c0633678c53a46b6be425d2904c)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks agoLoongArch: Prevent subreg of subreg in CRC [PR 120807]
Xi Ruoyao [Wed, 2 Jul 2025 07:28:33 +0000 (15:28 +0800)] 
LoongArch: Prevent subreg of subreg in CRC [PR 120807]

The register_operand predicate can match subreg, then we'd have a subreg
of subreg and it's invalid.  Use lowpart_subreg to avoid the nested
 subreg.

gcc/ChangeLog:

PR target/120807
* config/loongarch/loongarch.md (crc_combine): Avoid nested
subreg.

gcc/testsuite/ChangeLog:

PR target/120807
* gcc.c-torture/compile/pr120807.c: New test.

(cherry picked from commit 113ed3adc03f79f09ffe00d429d18f89f335b188)

2 weeks agoDaily bump.
GCC Administrator [Thu, 17 Jul 2025 00:22:59 +0000 (00:22 +0000)] 
Daily bump.

2 weeks ago[PATCH] PR modula2/120497: error is generated for good code when returning a pointer...
Gaius Mulley [Wed, 16 Jul 2025 20:17:51 +0000 (21:17 +0100)] 
[PATCH] PR modula2/120497: error is generated for good code when returning a pointer var variable

The return type checking needs to skip over the Lvalue part of the VAR
parameter or variable.

gcc/m2/ChangeLog:

PR modula2/120497
* gm2-compiler/M2Range.mod (IsAssignmentCompatible): Remove from
import list.
(FoldTypeReturnFunc): Rewrite to skip the Lvalue of a var
variable.
(CodeTypeReturnFunc): Ditto.
(CodeTypeIndrX): Call AssignmentTypeCompatible rather than
IsAssignmentCompatible.
(FoldTypeIndrX): Ditto.

gcc/testsuite/ChangeLog:

PR modula2/120497
* gm2/pim/pass/ReturnType.mod: New test.
* gm2/pim/pass/ReturnType2.mod: New test.

(cherry picked from commit 170717fa243ef466a99498113167627539af4553)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks ago[PATCH] PR modula2/120389 Assigning wrong type to an array causes an ICE
Gaius Mulley [Wed, 16 Jul 2025 18:33:37 +0000 (19:33 +0100)] 
[PATCH] PR modula2/120389 Assigning wrong type to an array causes an ICE

Although cherry picked as described.  The cherry pick does not include
the command option (-fm2-strict-type-reason) introduced in:
gcc/m2/gm2-lang.cc, gcc/m2/lang.opt and gcc/doc/gm2.texi from the
original patch.

This patch provides follow on fixes for undetected type violations
which can occur then Lvalues are generated during assignment.
For example array accesses and with statements.  The type checker
M2Check.mod has been overhauled and cleaned up.

gcc/m2/ChangeLog:

PR modula2/120389
* gm2-compiler/M2Check.def (AssignmentTypeCompatible): Add new
parameter enableReason.
* gm2-compiler/M2Check.mod (EquivalenceProcedure): New type.
(falseReason2): New procedure function.
(falseReason1): Ditto.
(falseReason0): Ditto.
(checkTypeEquivalence): Rewrite.
(checkUnboundedArray): Ditto.
(checkUnbounded): Ditto.
(checkArrayTypeEquivalence): Ditto.
(checkCharStringTypeEquivalence): Ditto.
(buildError4): Add false reason.
(buildError2): Ditto.
(IsTyped): Use GetDType.
(IsTypeEquivalence): New procedure function.
(checkVarTypeEquivalence): Ditto.
(checkVarEquivalence ): Rewrite.
(checkConstMeta): Ditto.
(checkEnumField): New procedure function.
(checkEnumFieldEquivalence): Ditto.
(checkSubrangeTypeEquivalence): Rewrite.
(checkSystemEquivalence): Ditto.
(checkTypeKindViolation): Ditto.
(doCheckPair): Ditto.
(InitEquivalenceArray): New procedure.
(addEquivalence): Ditto.
(checkProcType): Rewrite.
(deconstruct): Deallocate reason string.
(AssignmentTypeCompatible): Initialize reason and reasonEnable
fields.
(ParameterTypeCompatible): Ditto.
(doExpressionTypeCompatible): Ditto.
* gm2-compiler/M2GenGCC.mod (CodeIndrX) Rewrite.
(CheckBinaryExpressionTypes): Rewrite and simplify now that the
type checker is more robust.
(CheckElementSetTypes): Ditto.
(CodeXIndr): Add new range assignment type check.
* gm2-compiler/M2MetaError.def: Correct comments.
* gm2-compiler/M2Options.def (SetStrictTypeAssignment): New procedure.
(SetStrictTypeReason): Ditto.
* gm2-compiler/M2Options.mod: (SetStrictTypeAssignment): New procedure.
(SetStrictTypeReason): Ditto.
(StrictTypeReason): Initialize.
(StrictTypeAssignment): Ditto.
* gm2-compiler/M2Quads.mod (CheckBreak): Delete.
(BreakQuad): New global variable.
(BreakAtQuad): Delete.
(gdbhook): New procedure.
(BreakWhenQuadCreated): Ditto.
(CheckBreak): Ditto.
(Init): Call BreakWhenQuadCreated and gdbhook.
(doBuildAssignment): Add type assignment range check.
(CheckProcTypeAndProcedure): Only check if the procedure
types differ.
(doIndrX): Add type IndrX range check.
(CheckReturnType): Add range return type check.
* gm2-compiler/M2Range.def (InitTypesIndrXCheck): New procedure
function.
(InitTypesReturnTypeCheck): Ditto.
* gm2-compiler/M2Range.mod (InitTypesIndrXCheck): New procedure
function.
(InitTypesReturnTypeCheck): Ditto.
(HandlerExists): Add new clauses.
(FoldAssignment): Pass extra FALSE parameter to
AssignmentTypeCompatible.
(FoldTypeReturnFunc): New procedure.
(FoldTypeAssign): Ditto.
(FoldTypeIndrX): Ditto.
(CodeTypeAssign): Rewrite.
(CodeTypeIndrX): New procedure.
(CodeTypeReturnFunc): Ditto.
(FoldTypeCheck): Add new case clauses.
(CodeTypeCheck): Ditto.
(FoldRangeCheckLower): Ditto.
(IssueWarning): Ditto.
* gm2-gcc/m2options.h (M2Options_SetStrictTypeAssignment): New
function prototype.
(M2Options_SetStrictTypeReason): Ditto.

gcc/testsuite/ChangeLog:

PR modula2/120389
* gm2/pim/fail/testcharint.mod: New test.
* gm2/pim/fail/testindrx.mod: New test.
* gm2/pim/pass/testxindr.mod: New test.
* gm2/pim/pass/testxindr2.mod: New test.
* gm2/pim/pass/testxindr3.mod: New test.

(cherry picked from commit e131ba3de5f487f5e957ba1b011c960fce557c7b)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks agoFortran: Fix ICE in ASSOCIATE with user defined operator [PR121060]
Paul Thomas [Wed, 16 Jul 2025 05:16:57 +0000 (06:16 +0100)] 
Fortran: Fix ICE in ASSOCIATE with user defined operator [PR121060]

2025-07-16  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/121060
* interface.cc (matching_typebound_op): Defer determination of
specific procedure until resolution by returning NULL.

gcc/testsuite/
PR fortran/121060
* gfortran.dg/associate_75.f90: New test.

(cherry picked from commit 82e912344d28cf1a69e5f8e047203ea7eb625302)

2 weeks agoi386: Decouple AMX-AVX512 from AVX10.2 and imply AVX512F
Haochen Jiang [Tue, 15 Jul 2025 02:44:54 +0000 (10:44 +0800)] 
i386: Decouple AMX-AVX512 from AVX10.2 and imply AVX512F

In ISE058, the AVX10.2 imply is removed from AMX-AVX512. This
leads to re-consideration on the imply for AMX-AVX512.

Since it is using zmm register and using zmm register only, we
need to at least imply AVX512F. AVX512VL is not needed.

On the other hand, if we imply AVX10.1 for AMX-AVX512, it will
cause -mno-avx10.1 disabling AMX-AVX512. This would be a surprise
for users.

Based on the two reasons above, the patch is decoupling AMX-AVX512
from AVX10.2 and imply AVX512F.

gcc/ChangeLog:

* common/config/i386/i386-common.cc
(OPTION_MASK_ISA2_AMX_AVX512_SET): Do not set AVX10.2.
(OPTION_MASK_ISA2_AVX10_2_UNSET): Remove AMX-AVX512 unset.
(OPTION_MASK_ISA2_AVX512F_UNSET): Unset AMX-AVX512.
(ix86_handle_option): Imply AVX512F for AMX-AVX512.

gcc/testsuite/ChangeLog:

* gcc.target/i386/amxavx512-cvtrowd2ps-2.c: Add -mavx512fp16 to
use FP16 related intrins for convert.
* gcc.target/i386/amxavx512-cvtrowps2bf16-2.c: Ditto.
* gcc.target/i386/amxavx512-cvtrowps2ph-2.c: Ditto.
* gcc.target/i386/amxavx512-movrow-2.c: Ditto.

2 weeks agoDaily bump.
GCC Administrator [Wed, 16 Jul 2025 00:23:04 +0000 (00:23 +0000)] 
Daily bump.

2 weeks ago[PATCH] PR modula2/120389 ICE if assigning a constant char to an integer array
Gaius Mulley [Tue, 15 Jul 2025 18:38:04 +0000 (19:38 +0100)] 
[PATCH] PR modula2/120389 ICE if assigning a constant char to an integer array

This patch fixes an ICE which occurs if a constant char is assigned
into an integer array.  The fix it to introduce type checking in
M2GenGCC.mod:CodeXIndr.

gcc/m2/ChangeLog:

PR modula2/120389
* gm2-compiler/M2GenGCC.mod (CodeXIndr): Check to see that
the type of left is assignment compatible with the type of
right.

gcc/testsuite/ChangeLog:

PR modula2/120389
* gm2/iso/fail/badarray3.mod: New test.

(cherry picked from commit 895a8abad245365940939911e3d0de850522791e)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks agoopenmp, fortran: Fix ICE when the procedure name cannot be found in declare variant...
Kwok Cheung Yeung [Tue, 15 Jul 2025 14:26:26 +0000 (15:26 +0100)] 
openmp, fortran: Fix ICE when the procedure name cannot be found in declare variant directives [PR104428]

The result of searching for the procedure name symbol should be checked in
case the symbol cannot be found to avoid a null dereference.

gcc/fortran/

PR fortran/104428
* trans-openmp.cc (gfc_trans_omp_declare_variant): Check that proc_st
is non-NULL before dereferencing.  Add line number to error message.

gcc/testsuite/

PR fortran/104428
* gfortran.dg/gomp/pr104428.f90: New.

(cherry picked from commit a05c4f4ee48f76e518dbd2a96e5083f4df833df7)

3 weeks agoFortran: Ensure finalizers are created correctly [PR120637]
Andre Vehreschild [Wed, 25 Jun 2025 12:46:16 +0000 (14:46 +0200)] 
Fortran: Ensure finalizers are created correctly [PR120637]

Finalize_component freeed an expression that it used to remember which
components in which context it had finalized already.  While it makes
sense to free the copy of the expression, if it is unused, it causes
issues, when comparing to a non existent expression. This is now
detected by returning true, when the expression has been used.

PR fortran/120637

gcc/fortran/ChangeLog:

* class.cc (finalize_component): Return true, when a finalizable
component was detect and do not free it.

gcc/testsuite/ChangeLog:

* gfortran.dg/asan/finalize_1.f90: New test.

(cherry picked from commit d1f05661fa6c8a6ea6f59ad365a84469100e425e)

3 weeks agocrc: Error out on non-constant poly arguments for the crc builtins [PR120709]
Andrew Pinski [Sun, 6 Jul 2025 17:20:26 +0000 (10:20 -0700)] 
crc: Error out on non-constant poly arguments for the crc builtins [PR120709]

These builtins requires a constant integer for the third argument but currently
there is assert rather than error. This fixes that and updates the documentation too.
Uses the same terms as was being used for the __builtin_prefetch arguments.

Bootstrapped and tested on x86_64-linux-gnu.

PR middle-end/120709

gcc/ChangeLog:

* builtins.cc (expand_builtin_crc_table_based): Error out
instead of asserting the 3rd argument is an integer constant.
* internal-fn.cc (expand_crc_optab_fn): Likewise.
* doc/extend.texi (crc): Document requirement of the poly argument
being a constant.

gcc/testsuite/ChangeLog:

* gcc.dg/crc-non-cst-poly-1.c: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
(cherry picked from commit be07dd9a96a7a6f8fb59c939eda84d74b54f8182)

3 weeks agoDaily bump.
GCC Administrator [Tue, 15 Jul 2025 00:23:43 +0000 (00:23 +0000)] 
Daily bump.

3 weeks agoaarch64: PR target/120999: Adjust operands for movprfx alternative of NBSL implementa...
Kyrylo Tkachov [Wed, 9 Jul 2025 17:04:01 +0000 (10:04 -0700)] 
aarch64: PR target/120999: Adjust operands for movprfx alternative of NBSL implementation of NOR

While the SVE2 NBSL instruction accepts MOVPRFX to add more flexibility
due to its tied operands, the destination of the movprfx cannot be also
a source operand.  But the offending pattern in aarch64-sve2.md tries
to do exactly that for the "=?&w,w,w" alternative and gas warns for the
attached testcase.

This patch adjusts that alternative to avoid taking operand 0 as an input
in the NBSL again.

So for the testcase in the patch we now generate:
nor_z:
        movprfx z0, z1
        nbsl    z0.d, z0.d, z2.d, z1.d
        ret

instead of the previous:
nor_z:
        movprfx z0, z1
        nbsl    z0.d, z0.d, z2.d, z0.d
        ret

which generated a gas warning.

Bootstrapped and tested on aarch64-none-linux-gnu.

Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
gcc/

PR target/120999
* config/aarch64/aarch64-sve2.md (*aarch64_sve2_nor<mode>):
Adjust movprfx alternative.

gcc/testsuite/

PR target/120999
* gcc.target/aarch64/sve2/pr120999.c: New test.

(cherry picked from commit b7bd72ce71df5266e7a7039da318e49862389a72)

3 weeks agoaarch64: Fix up commutative and early-clobber markers on compact insns
Richard Earnshaw [Mon, 14 Apr 2025 15:41:16 +0000 (16:41 +0100)] 
aarch64: Fix up commutative and early-clobber markers on compact insns

For constraints there are operand modifiers and constraint qualifiers.
Operand modifiers apply to all alternatives and must appear, in
traditional syntax before the first alternative.  Constraint
qualifiers, on the other hand must appear in each alternative to which
they apply.

There's no easy way to validate the distinction in the traditional md
format, but when using the new compact format we can enforce some
semantic checking of these characters to avoid some potentially
surprising code generation.

Fortunately, all of these errors are benign, but the two misplaced
early-clobber markers were quite suspicious at first sight - it's only
by luck that the second alternative does not need an early-clobber.

The syntax checking will be added in the following patch, but first of
all, fix up the errors in aarch64.md.

gcc/
* config/aarch64/aarch64-sve.md (@aarch64_pred_<optab><mode>): Move
commutative marker to the cons specification.
(add<mode>3): Likewise.
(@aarch64_pred_<su>abd<mode>): Likewise.
(@aarch64_pred_<optab><mode>): Likewise.
(*cond_<optab><mode>_z): Likewise.
(<optab><mode>3): Likewise.
(@aarch64_pred_<optab><mode>): Likewise.
(*aarch64_pred_abd<mode>_relaxed): Likewise.
(*aarch64_pred_abd<mode>_strict): Likewise.
(@aarch64_pred_<optab><mode>): Likewise.
(@aarch64_pred_<optab><mode>): Likewise.
(@aarch64_pred_fma<mode>): Likewise.
(@aarch64_pred_fnma<mode>): Likewise.
(@aarch64_pred_<optab><mode>): Likewise.

* config/aarch64/aarch64-sve2.md (@aarch64_sve_<su>clamp<mode>): Move
commutative marker to the cons specification.
(*aarch64_sve_<su>clamp<mode>_x): Likewise.
(@aarch64_sve_fclamp<mode>): Likewise.
(*aarch64_sve_fclamp<mode>_x): Likewise.
(*aarch64_sve2_nor<mode>): Likewise.
(*aarch64_sve2_nand<mode>): Likewise.
(*aarch64_pred_faminmax_fused): Likewise.

* config/aarch64/aarch64.md (*loadwb_pre_pair_<ldst_sz>): Move the
early-clobber marker to the relevant alternative.
(*storewb_pre_pair_<ldst_sz>): Likewise.
(*add<mode>3_aarch64): Move commutative marker to the cons
specification.
(*addsi3_aarch64_uxtw): Likewise.
(*add<mode>3_poly_1): Likewise.
(add<mode>3_compare0): Likewise.
(*addsi3_compare0_uxtw): Likewise.
(*add<mode>3nr_compare0): Likewise.
(<optab><mode>3): Likewise.
(*<optab>si3_uxtw): Likewise.
(*and<mode>3_compare0): Likewise.
(*andsi3_compare0_uxtw): Likewise.
(@aarch64_and<mode>3nr_compare0): Likewise.

(cherry picked from commit f260146bc05f6fba7b2a67a62063c770588b769d)

3 weeks ago[committed] [PR rtl-optimization/120242] Fix SUBREG_PROMOTED_VAR_P after ext-dce...
Jeff Law [Mon, 30 Jun 2025 20:38:33 +0000 (14:38 -0600)] 
[committed] [PR rtl-optimization/120242] Fix SUBREG_PROMOTED_VAR_P after ext-dce's actions

I've gone back and forth of these problems multiple times.  We have two passes,
ext-dce and combine which eliminate extensions using totally different
mechanisms.

ext-dce looks for cases where the state of upper bits in an object aren't
observable and if they aren't observable, then eliminates extensions which set
those bits.

combine looks for cases where we know the state of the upper bits and can prove
an extension is just setting those bits to their prior value.  Combine also
looks for cases where the precise extension isn't really important, just the
knowledge that the upper bits are zero or sign extended from a narrower mode
is needed.

Combine relies heavily on the SUBREG_PROMOTED_VAR state to do its job.  If the
actions of ext-dce (or any other pass for that matter) make
SUBREG_PROMOTED_VAR's state inconsistent with combine's expectations, then
combine can end up generating incorrect code.

--

When ext-dce eliminates an extension and turns it into a subreg copy (without
any known SUBREG_PROMOTED_VAR state).  Since we can no longer guarantee the
destination object has any known extension state, we scurry around and wipe
SUBREG_PROMOTED_VAR state for the destination object.

That's fine and dandy, but ultimately insufficient.  Consider if the
destination of the optimized extension was used as a source in a simple copy
insn.  Furthermore assume that the destination of that copy is used within a
SUBREG expression with SUBREG_PROMOTED_VAR set.  ext-dce's actions have
clobbered the SUBREG_PROMOTED_VAR state on the destination of that copy, albeit
indirectly.

This patch addresses this problem by taking the set of pseudos directly
impacted by ext-dce's actions and expands that set by building a transitive
closure for pseudos connected via copies.  We then scurry around finding
SUBREG_PROMOTED_VAR state to wipe for everything in that expanded set of
pseudos.  Voila, everything just works.

--

The other approach here would be to further expand the liveness sets inside
ext-dce.  That's a simpler path forward, but ultimately regresses the quality
of codes we do care about.

One good piece of news is that with the transitive closure bits in place, we
can eliminate a bit of the live set expansion we had in place for
SUBREG_PROMOTED_VAR objects.

--

So let's take one case of the 5 that have been reported.

In ext-dce we have this insn:

> (insn 29 27 30 3 (set (reg:DI 134 [ al_lsm.9 ])
>         (zero_extend:DI (subreg:HI (reg:DI 162) 0))) "j.c":17:17 552 {*zero_extendhidi2_bitmanip}
>      (expr_list:REG_DEAD (reg:DI 162)
>         (nil)))

There are reachable uses of (reg 134):

> (insn 49 47 52 6 (set (mem/c:HI (lo_sum:DI (reg/f:DI 186)
>                 (symbol_ref:DI ("al") [flags 0x86]  <var_decl 0x7ffff73c2da8 al>)) [2 al+0 S2 A16])
>         (subreg/s/v:HI (reg:DI 134 [ al_lsm.9 ]) 0)) 279 {*movhi_internal}
>      (expr_list:REG_DEAD (reg/f:DI 186)
>         (nil)))Obviously safe if we were to remove the extension.

> (insn 52 49 53 6 (set (reg:DI 176)
>         (and:DI (reg:DI 134 [ al_lsm.9 ])
>             (const_int 5 [0x5]))) "j.c":21:12 106 {*anddi3}
>      (expr_list:REG_DEAD (reg:DI 134 [ al_lsm.9 ])
>         (nil)))
> (insn 53 52 56 6 (set (reg:SI 177 [ _8 ])
>         (zero_extend:SI (subreg:HI (reg:DI 176) 0))) "j.c":21:12 551 {*zero_extendhisi2_bitmanip}
>      (expr_list:REG_DEAD (reg:DI 176)
>         (nil))) Safe to remove the extension as we only read the low 16 bits from the destination register (reg 176) in insn 53.

> (insn 27 26 29 3 (set (reg:DI 162)
>         (sign_extend:DI (plus:SI (subreg/s/v:SI (reg:DI 134 [ al_lsm.9 ]) 0)
>                 (const_int 1 [0x1])))) "j.c":17:17 8 {addsi3_extended}
>      (expr_list:REG_DEAD (reg:DI 134 [ al_lsm.9 ])
>         (nil)))
> (insn 29 27 30 3 (set (reg:DI 134 [ al_lsm.9 ])
>         (zero_extend:DI (subreg:HI (reg:DI 162) 0))) "j.c":17:17 552 {*zero_extendhidi2_bitmanip}
>      (expr_list:REG_DEAD (reg:DI 162)
>         (nil)))

Again, not as obvious as the first case, but we only read the low 16 bits from
(reg 162) in insn 29.  So those upper bits in (reg 134) don't matter.

> (insn 26 92 27 3 (set (reg:DI 144 [ ivtmp.17 ])
>         (reg:DI 134 [ al_lsm.9 ])) 277 {*movdi_64bit}
>      (nil))
> (insn 30 29 31 3 (set (reg:DI 135 [ al.2_3 ])
>         (sign_extend:DI (subreg/s/v:HI (reg:DI 144 [ ivtmp.17 ]) 0))) "j.c":17:9 558 {*extendhidi2_bitmanip}
>      (expr_list:REG_DEAD (reg:DI 144 [ ivtmp.17 ])
>         (nil)))Also safe in isolation.  But worth noting that if we remove the extension at insn 29, then the promoted status on (reg:DI 144) in insn 30 is no longer valid.

Setting aside the promoted state of (reg:DI 144) at insn 30 for a minute, let's
look into combine.

> (insn 26 92 27 3 (set (reg:DI 144 [ ivtmp.17 ])
>         (reg:DI 134 [ al_lsm.9 ])) 277 {*movdi_64bit}
>      (nil))   [ ... ]
> (insn 30 29 31 3 (set (reg:DI 135 [ al.2_3 ])
>         (sign_extend:DI (subreg/s/v:HI (reg:DI 144 [ ivtmp.17 ]) 0))) "j.c":17:9 558 {*extendhidi2_bitmanip}
>      (expr_list:REG_DEAD (reg:DI 144 [ ivtmp.17 ])
>         (nil)))
> (jump_insn 31 30 32 3 (set (pc)
>         (if_then_else (eq (reg:DI 135 [ al.2_3 ])
>                 (const_int 0 [0]))
>             (label_ref:DI 41)
>             (pc))) "j.c":4:55 371 {*branchdi}
>      (int_list:REG_BR_PROB 536870913 (nil))
>  -> 41)

Combine will do its thing on insns 30/31.  Essentially the sign extension is
not necessary in this context, assuming the promoted subreg status in insn 30
-- the equality test doesn't really care about the kind of extension, just
knowing the value is extended is enough to safely elide the extension.

And now we've come to the crux the problem.  That promotion state needs to be
adjusted.  The new ext-dce code will see that copy at insn 26 and add (reg 144)
to the set of registers that need promotion state wiped.  And everything is
happy after that.

The other cases are similar in nature.

--

This has been bootstrapped and regression tested on x86_64 and aarch64.
Variants have bootstrapped & regression tested on several other platforms and
it's survived testing on the crosses as well.

Pushing to the trunk...

PR rtl-optimization/120242
PR rtl-optimization/120627
PR rtl-optimization/120736
PR rtl-optimization/120813
gcc/

* ext-dce.cc (ext_dce_process_uses): Remove some cases where we
unnecessarily expanded live sets for promoted subregs.
(expand_changed_pseudos): New function.
(reset_subreg_promoted_p): Use it.

gcc/testsuite/

* gcc.dg/torture/pr120242.c: New test.
* gcc.dg/torture/pr120627.c: Likewise.
* gcc.dg/torture/pr120736.c: Likewise.
* gcc.dg/torture/pr120813.c: Likewise.

(cherry picked from commit 41155992d572030f7918682b2642365ada1f4fbf)

3 weeks agoRISC-V: prefetch: fix LRA failing to allocate reg [PR118241]
Vineet Gupta [Fri, 4 Jul 2025 19:33:51 +0000 (12:33 -0700)] 
RISC-V: prefetch: fix LRA failing to allocate reg [PR118241]

prefetch was recently fixed/tightened (with Q reg constraint) to only
support right address patterns (REG or REG+D with lower 5 bits clear).
However in some cases that's too restrictive for LRA and it fails to
allocate a reg resulting in following ICE...

| gcc/testsuite/gcc.target/riscv/pr118241-b.cc:31:19: error: unable to generate reloads for:
|   31 | void m() { a.l(); }
|      |                   ^
|(insn 26 25 27 7 (prefetch (mem/f:DI (plus:DI (reg/f:DI 143 [ _5 ])
|                (const_int 56 [0x38])) [5 _5->batch[6]+0 S8 A64])
|        (const_int 0 [0])
|        (const_int 3 [0x3])) "gcc/testsuite/gcc.target/riscv/pr118241-b.cc":18:29 498 {prefetch}
|     (expr_list:REG_DEAD (reg/f:DI 142 [ _5->batch[6] ])
|        (nil)))
|during RTL pass: reload

Fix that by providing a fallback alternative register constraint to reload the address.

PR target/118241

gcc/ChangeLog:

* config/riscv/riscv.md (prefetch): Add alternative "r".

gcc/testsuite/ChangeLog:

* gcc.target/riscv/pr118241-b.cc: New test.

Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
(cherry picked from commit f2a3ab7ebf3c40da77f54e8329272fe048ec48a6)

3 weeks agoRISC-V: prefetch: const offset needs to have 5 bits zero, not 4
Vineet Gupta [Fri, 4 Jul 2025 19:33:09 +0000 (12:33 -0700)] 
RISC-V: prefetch: const offset needs to have 5 bits zero, not 4

Spotted this by chance as I saw a similar fixup in comment.
From comments, I think this is needed, but I've not hit any issues due
to this.

gcc/ChangeLog:

* config/riscv/predicates.md (prefetch_operand): mack 5 bits.

Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
(cherry picked from commit b960201091fcab631a34a8c8d5b30e9f297dfbe5)

3 weeks ago[RISC-V][PR target/118241] Fix data prefetch predicate/constraint for RISC-V
Jeff Law [Tue, 24 Jun 2025 00:27:49 +0000 (18:27 -0600)] 
[RISC-V][PR target/118241] Fix data prefetch predicate/constraint for RISC-V

Fix typo in comment spotted by Peter B.

PR target/118241
gcc/
* config/riscv/predicates.md: Fix comment typo in recent change.

(cherry picked from commit bf7162b321128ba93521a824e5a7a00d1cc3d1f8)

3 weeks ago[RISC-V][PR target/118241] Fix data prefetch predicate/constraint for RISC-V
Jeff Law [Sat, 21 Jun 2025 14:24:58 +0000 (08:24 -0600)] 
[RISC-V][PR target/118241] Fix data prefetch predicate/constraint for RISC-V

The RISC-V prefetch support is broken in a few ways.  This addresses the data
side prefetch problems.  I'd mistakenly thought this BZ was a prefetch.i
related (which has deeper problems).

The basic problem is we were accepting any valid address when in fact there are
restrictions.  This patch more precisely defines the predicate such that we
allow

REG
REG+D

Where D must have the low 5 bits clear.  Note that absolute addresses fall into
the REG+D form using the x0 for the register operand since it always has the
value zero.  The test verifies REG, REG+D, ABS addressing modes that are valid
as well as REG+D and ABS which must be reloaded into a REG because the
displacement has low bits set.

An earlier version of this patch has gone through testing in my tester on rv32
and rv64.  Obviously I'll wait for pre-commit CI to do its thing before moving
forward.

This is a good backport candidate after simmering on the trunk for a bit.

PR target/118241
gcc/
* config/riscv/predicates.md (prefetch_operand): New predicate.
* config/riscv/constraints.md (Q): New constraint.
* config/riscv/riscv.md (prefetch): Use new predicate and constraint.
(riscv_prefetchi_<mode>): Similarly.

gcc/testsuite/
* gcc.target/riscv/pr118241.c: New test.

(cherry picked from commit 49199bb29628365fc6c60bd185808a1bad65086d)

3 weeks agoAda: Add missing guard before accessing the Underlying_Record_View field
Eric Botcazou [Mon, 14 Jul 2025 10:11:44 +0000 (12:11 +0200)] 
Ada: Add missing guard before accessing the Underlying_Record_View field

It is necessary when GNAT extensions are enabled (-gnatX switch).

gcc/ada/
PR ada/121056
* sem_ch4.adb (Try_Object_Operation.Try_Primitive_Operation): Add
test on Is_Record_Type before accessing Underlying_Record_View.

gcc/testsuite/
* gnat.dg/deref4.adb: New test.
* gnat.dg/deref4_pkg.ads: New helper.

3 weeks agox86-64: Add RDI clobber to 64-bit dynamic TLS patterns
H.J. Lu [Thu, 3 Jul 2025 02:54:39 +0000 (10:54 +0800)] 
x86-64: Add RDI clobber to 64-bit dynamic TLS patterns

*tls_global_dynamic_64_largepic, *tls_local_dynamic_64_<mode> and
*tls_local_dynamic_base_64_largepic use RDI as the __tls_get_addr
argument.  Add RDI clobber to these patterns to show it.

gcc/

PR target/120908
* config/i386/i386.cc (legitimize_tls_address): Pass RDI to
gen_tls_local_dynamic_64.
* config/i386/i386.md (*tls_global_dynamic_64_largepic): Add
RDI clobber and use it to generate LEA.
(*tls_local_dynamic_64_<mode>): Likewise.
(*tls_local_dynamic_base_64_largepic): Likewise.
(@tls_local_dynamic_64_<mode>): Add a clobber.

gcc/testsuite/

PR target/120908
* gcc.target/i386/pr120908.c: New test.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
(cherry picked from commit d8d5e2a8031e74f08f61ccdd727476f97940c5a6)

3 weeks agox86-64: Add RDI clobber to tls_global_dynamic_64 patterns
H.J. Lu [Tue, 1 Jul 2025 09:17:06 +0000 (17:17 +0800)] 
x86-64: Add RDI clobber to tls_global_dynamic_64 patterns

*tls_global_dynamic_64_<mode> uses RDI as the __tls_get_addr argument.
Add RDI clobber to tls_global_dynamic_64 patterns to show it.

PR target/120908
* config/i386/i386.cc (legitimize_tls_address): Pass RDI to
gen_tls_global_dynamic_64.
* config/i386/i386.md (*tls_global_dynamic_64_<mode>): Add RDI
clobber and use it to generate LEA.
(@tls_global_dynamic_64_<mode>): Add a clobber.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
(cherry picked from commit 7710d513a552f1fa1b7485ec6b318bafaa6d4cd7)

3 weeks agoi386: Remove KEYLOCKER related feature since Panther Lake and Clearwater Forest
Haochen Jiang [Fri, 11 Jul 2025 08:16:52 +0000 (16:16 +0800)] 
i386: Remove KEYLOCKER related feature since Panther Lake and Clearwater Forest

According to July 2025 SDM, Key locker will no longer be supported on
hardware 2025 onwards. This means for Panther Lake and Clearwater Forest,
the feature will not be enabled. Remove them from those two platforms.

gcc/ChangeLog:

* config/i386/i386.h (PTA_PANTHERLAKE): Revmoe KL and WIDEKL.
(PTA_CLEARWATERFOREST): Ditto.
* doc/invoke.texi: Revise documentation.

3 weeks agoDaily bump.
GCC Administrator [Mon, 14 Jul 2025 00:22:40 +0000 (00:22 +0000)] 
Daily bump.

3 weeks ago[PATCH] [RISC-V] Fix shift type for RVV interleaved stepped patterns [PR120356]
Alexey Merzlyakov [Wed, 2 Jul 2025 17:29:00 +0000 (11:29 -0600)] 
[PATCH] [RISC-V] Fix shift type for RVV interleaved stepped patterns [PR120356]

It corrects the shift type of interleaved stepped patterns for const vector
expanding in LRA. The shift instruction was initially LSHIFTRT, and it seems
still should be the same type for both LRA and other cases.

PR target/120356

gcc/ChangeLog:

* config/riscv/riscv-v.cc
(expand_const_vector_interleaved_stepped_npatterns):
Fix ASHIFT to LSHIFTRT insn.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr120356.c: New test.

(cherry picked from commit 9c1ed63e4c6b0f80dd47ce421dd7d80d52c38fd3)

3 weeks ago[PATCH] riscv: allow zero in zacas subword atomic cas
Andreas Schwab [Tue, 8 Jul 2025 13:32:17 +0000 (07:32 -0600)] 
[PATCH] riscv: allow zero in zacas subword atomic cas

gcc:
PR target/120995
* config/riscv/sync.md (zacas_atomic_cas_value_strong<mode>):
Allow op3 to be zero.

gcc/testsuite:
PR target/120995
* gcc.target/riscv/amo/zabha-zacas-atomic-cas.c: New test.

(cherry picked from commit 3fd638a9e5497dfdf00f1783d6e704af03fb44b0)

3 weeks agoDaily bump.
GCC Administrator [Sun, 13 Jul 2025 00:30:14 +0000 (00:30 +0000)] 
Daily bump.

3 weeks agoDaily bump.
GCC Administrator [Sat, 12 Jul 2025 00:25:29 +0000 (00:25 +0000)] 
Daily bump.

3 weeks agoPR modula2/120253: Error message column numbers should start at 1 not 0
Gaius Mulley [Fri, 11 Jul 2025 19:36:54 +0000 (20:36 +0100)] 
PR modula2/120253: Error message column numbers should start at 1 not 0

This patch ensures that column numbers start at 1 rather than 0.

gcc/m2/ChangeLog:

PR modula2/120253
* m2.flex (FIRST_COLUMN): New define.
(updatepos): Remove commented code.
(consumeLine): Assign column to FIRST_COLUMN.
(initLine): Ditto.
(m2flex_GetColumnNo): Return FIRST_COLUMN if currentLine is NULL.
(m2flex_GetLineNo): Rewrite for positive logic.
(m2flex_GetLocation): Ditto.

(cherry picked from commit 9a485b83e177cb742be17faf20ac5cc7db14fee3)

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
3 weeks agotestsuite: Add testcase for already fixed PR [PR120954]
Jakub Jelinek [Fri, 11 Jul 2025 11:43:58 +0000 (13:43 +0200)] 
testsuite: Add testcase for already fixed PR [PR120954]

This was a regression introduced by r16-1893 (and its backports) for C++,
though for C it had false positive warning for years.  Fixed by r16-2000
(and its backports).

2025-07-11  Jakub Jelinek  <jakub@redhat.com>

PR c++/120954
* c-c++-common/Warray-bounds-11.c: New test.

(cherry picked from commit 9eea49825ebb607f4b67de48c9cba1f85e005932)

3 weeks agoipa: Disallow signature changes in fun->has_musttail functions [PR121023]
Jakub Jelinek [Fri, 11 Jul 2025 10:09:44 +0000 (12:09 +0200)] 
ipa: Disallow signature changes in fun->has_musttail functions [PR121023]

As the following testcase shows e.g. on ia32, letting IPA opts change
signature of functions which have [[{gnu,clang}::musttail]] calls
can turn programs that would be compiled normally into something
that is rejected because the caller has fewer argument stack slots
than the function being tail called.

The following patch prevents signature changes for such functions.
It is perhaps too big hammer in some cases, but it might be hard
to try to figure out what signature changes are still acceptable and which
are not at IPA time.

2025-07-11  Jakub Jelinek  <jakub@redhat.com>
    Martin Jambor  <mjambor@suse.cz>

PR ipa/121023
* ipa-fnsummary.cc (compute_fn_summary): Disallow signature changes
on cfun->has_musttail functions.

* c-c++-common/musttail32.c: New test.

(cherry picked from commit 89b9372d61ccd45cb6c71518d62215917e3aaebc)

3 weeks agoc++: Fix up final handling in C++98 [PR120628]
Jakub Jelinek [Thu, 10 Jul 2025 21:47:42 +0000 (23:47 +0200)] 
c++: Fix up final handling in C++98 [PR120628]

The following patch is on top of the
https://gcc.gnu.org/pipermail/gcc-patches/2025-June/686210.html
patch which stopped treating override as conditional keyword in
class properties.
This PR mentions another problem; we emit a bogus warning on code like
struct C {}; struct C final = {};
in C++98.  In this case we parse final as conditional keyword in C++
(including pedwarn) but the caller then immediately aborts the tentative
parse because it isn't followed by { nor (in some cases) : .
I think we certainly shouldn't pedwarn on it, but I think we even shouldn't
warn for it say for -Wc++11-compat, because we don't actually treat the
identifier as conditional keyword even in C++11 and later.
The patch only does this if final is the only class property conditional
keyword, if one uses
struct S __final final __final = {};
one gets the warning and duplicate diagnostics and later parsing errors.

2025-07-10  Jakub Jelinek  <jakub@redhat.com>

PR c++/120628
* parser.cc (cp_parser_elaborated_type_specifier): Use
cp_parser_nth_token_starts_class_definition_p with extra argument 1
instead of cp_parser_next_token_starts_class_definition_p.
(cp_parser_class_property_specifier_seq_opt): For final conditional
keyword in C++98 check if the token after it isn't
cp_parser_nth_token_starts_class_definition_p nor CPP_NAME and in
that case break without consuming it nor warning.
(cp_parser_class_head): Use
cp_parser_nth_token_starts_class_definition_p with extra argument 1
instead of cp_parser_next_token_starts_class_definition_p.
(cp_parser_next_token_starts_class_definition_p): Renamed to ...
(cp_parser_nth_token_starts_class_definition_p): ... this.  Add N
argument.  Use cp_lexer_peek_nth_token instead of cp_lexer_peek_token.

* g++.dg/cpp0x/final1.C: New test.
* g++.dg/cpp0x/final2.C: New test.
* g++.dg/cpp0x/override6.C: New test.

(cherry picked from commit 8f063b40e5b8f23cb89fee21afaa71deedbdf2aa)

3 weeks agoc++: Don't incorrectly reject override after class head name [PR120569]
Jakub Jelinek [Thu, 10 Jul 2025 21:41:56 +0000 (23:41 +0200)] 
c++: Don't incorrectly reject override after class head name [PR120569]

While the
https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2025/p2786r13.html#c03-compatibility-changes-for-annex-c-diff.cpp03.dcl.dcl
hunk dropped because
struct C {}; struct C final {};
is actually not valid C++98 (which didn't have list initialization), we
actually also reject
struct D {}; struct D override {};
and that IMHO is valid all the way from C++11 onwards.
Especially in the light of P2786R13 adding new contextual keywords, I think
it is better to use a separate routine for parsing the
class-virt-specifier-seq (in C++11, there was export next to final),
class-virt-specifier (in C++14 to C++23) and
class-property-specifier-seq (in C++26) instead of using the same function
for virt-specifier-seq and class-property-specifier-seq.

2025-07-10  Jakub Jelinek  <jakub@redhat.com>

PR c++/120569
* parser.cc (cp_parser_class_property_specifier_seq_opt): New
function.
(cp_parser_class_head): Use it instead of
cp_parser_property_specifier_seq_opt.  Don't diagnose
VIRT_SPEC_OVERRIDE here.  Formatting fix.

* g++.dg/cpp0x/override2.C: Expect different diagnostics with
override.
* g++.dg/cpp0x/override5.C: New test.

(cherry picked from commit bcb51fe0e26bed7e2c44c4822ca6dec135ba61f3)

3 weeks agoc-family: Tweak ptr +- (expr +- cst) FE optimization [PR120837]
Jakub Jelinek [Fri, 4 Jul 2025 05:50:12 +0000 (07:50 +0200)] 
c-family: Tweak ptr +- (expr +- cst) FE optimization [PR120837]

The following testcase is miscompiled with -fsanitize=undefined but we
introduce UB into the IL even without that flag.

The optimization ptr +- (expr +- cst) when expr/cst have undefined
overflow into (ptr +- cst) +- expr is sometimes simply not valid,
without careful analysis on what ptr points to we don't know if it
is valid to do (ptr +- cst) pointer arithmetics.
E.g. on the testcase, ptr points to start of an array (actually
conditionally one or another) and cst is -1, so ptr - 1 is invalid
pointer arithmetics, while ptr + (expr - 1) can be valid if expr
is at runtime always > 1 and smaller than size of the array ptr points
to + 1.

Unfortunately, removing this 1992-ish optimization altogether causes
FAIL: c-c++-common/restrict-2.c  -Wc++-compat   scan-tree-dump-times lim2 "Moving statement" 11
FAIL: gcc.dg/tree-ssa/copy-headers-5.c scan-tree-dump ch2 "is now do-while loop"
FAIL: gcc.dg/tree-ssa/copy-headers-5.c scan-tree-dump-times ch2 "  if " 3
FAIL: gcc.dg/vect/pr57558-2.c scan-tree-dump vect "vectorized 1 loops"
FAIL: gcc.dg/vect/pr57558-2.c -flto -ffat-lto-objects  scan-tree-dump vect "vectorized 1 loops"
regressions (restrict-2.c also for C++ in all std modes).  I've been thinking
about some match.pd optimization for signed integer addition/subtraction of
constant followed by widening integral conversion followed by multiplication
or left shift, but that wouldn't help 32-bit arches.

So, instead at least for now, the following patch keeps doing the
optimization, just doesn't perform it in pointer arithmetics.
pointer_int_sum itself actually adds the multiplication by size_exp,
so ptr + expr is turned into ptr p+ expr * size_exp,
so this patch will try to optimize
ptr + (expr +- cst)
into
ptr p+ ((sizetype)expr * size_exp +- (sizetype)cst * size_exp)
and
ptr - (expr +- cst)
into
ptr p+ -((sizetype)expr * size_exp +- (sizetype)cst * size_exp)

2025-07-04  Jakub Jelinek  <jakub@redhat.com>

PR c/120837
* c-common.cc (pointer_int_sum): Rewrite the intop PLUS_EXPR or
MINUS_EXPR optimization into extension of both intop operands,
their separate multiplication and then addition/subtraction followed
by rest of pointer_int_sum handling after the multiplication.

* gcc.dg/ubsan/pr120837.c: New test.

(cherry picked from commit e16820d4f7ab1d8a40f70beef722e6f8a4c2392c)

3 weeks agolibstdc++: Fix __uninitialized_default for constexpr case [PR119754]
Jonathan Wakely [Tue, 8 Jul 2025 09:48:21 +0000 (10:48 +0100)] 
libstdc++: Fix __uninitialized_default for constexpr case [PR119754]

We should not use the std::fill optimization for trivial types during
constant evaluation, because we need to begin the lifetime of all
objects, even trivially default constructible ones.

This fixes a bug that Clang diagnosed:

include/c++/16.0.0/bits/stl_algobase.h:925:11: note: assignment to object outside its lifetime is not allowed in a constant expression
  925 |         *__first = __val;
      |         ~~~~~~~~~^~~~~~~

I initially just added the #ifdef __cpp_lib_is_constant_evaluated check,
but that gave warnings with GCC because the function isn't constexpr
until C++26. So then I tried checking __glibcxx_raw_memory_algorithms
for the value indicating constexpr uninitialized_value_construct, but
that macro depends on __cpp_constexpr >= 202406 and Clang 19 doesn't
support constexpr placement new, so doesn't define it.

So I decided to just change __uninitialized_default to use
_GLIBCXX20_CONSTEXPR which is consistent with __uninitialized_default_n
(which needs to be constexpr because it's used by std::vector). We don't
currently need to use __uninitialized_default in constexpr contexts for
C++20 code, but we might find uses for it, so now it would be possible.

libstdc++-v3/ChangeLog:

PR libstdc++/119754
* include/bits/stl_uninitialized.h (__uninitialized_default):
Do not use optimized implementation for constexpr case. Use
_GLIBCXX20_CONSTEXPR instead of _GLIBCXX26_CONSTEXPR.

(cherry picked from commit 82d2d12da93b5afbc3479e64d0aa0dcec5b42d8d)

3 weeks agolibstdc++: Do not use list-initialization in std::span members [PR120997]
Jonathan Wakely [Tue, 8 Jul 2025 13:56:39 +0000 (14:56 +0100)] 
libstdc++: Do not use list-initialization in std::span members [PR120997]

As the bug report shows, for span<const bool> the return statements of
the form `return {data(), count};` will use the new C++26 constructor,
span(initializer_list<element_type>).

Although the conversions from data() to bool and count to bool are
narrowing and should be ill-formed, in system headers the narrowing
diagnostics are suppressed. In any case, even if the compiler diagnosed
them as ill-formed, we still don't want the initializer_list constructor
to be used. We want to use the span(element_type*, size_t) constructor
instead.

Replace the braced-init-list uses with S(data(), count) where S is the
correct return type. We need to make similar changes in the C++26
working draft, which will be taken care of via an LWG issue.

libstdc++-v3/ChangeLog:

PR libstdc++/120997
* include/std/span (span::first, span::last, span::subspan): Do
not use braced-init-list for return statements.
* testsuite/23_containers/span/120997.cc: New test.

(cherry picked from commit a72d0e1a8bf0770ddf1d8d0ebe589f92a4fab4ef)

3 weeks agolibstdc++: Ensure pool resources meet alignment requirements [PR118681]
Jonathan Wakely [Fri, 4 Jul 2025 15:44:13 +0000 (16:44 +0100)] 
libstdc++: Ensure pool resources meet alignment requirements [PR118681]

For allocations with size > alignment and size % alignment != 0 we were
sometimes returning pointers that did not meet the requested aligment.
For example, allocate(24, 16) would select the pool for 24-byte objects
and the second allocation from that pool (at offset 24 bytes into the
pool) is only 8-byte aligned not 16-byte aligned.

The pool resources need to round up the requested allocation size to a
multiple of the alignment, so that the selected pool will always return
allocations that meet the alignment requirement.

This backport includes the fixes for the bootstrap error and the tests.

libstdc++-v3/ChangeLog:

PR libstdc++/118681
* src/c++17/memory_resource.cc (choose_block_size): New
function.
(synchronized_pool_resource::do_allocate): Use choose_block_size
to determine appropriate block size.
(synchronized_pool_resource::do_deallocate): Likewise
(unsynchronized_pool_resource::do_allocate): Likewise.
(unsynchronized_pool_resource::do_deallocate): Likewise
* testsuite/20_util/synchronized_pool_resource/118681.cc: New
test.
* testsuite/20_util/unsynchronized_pool_resource/118681.cc: New
test.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit ac2fb60a67d6d1de6446c25c5623b8a1389f4770)

3 weeks agoDaily bump.
GCC Administrator [Fri, 11 Jul 2025 00:24:56 +0000 (00:24 +0000)] 
Daily bump.

3 weeks agoFix 'main' function in 'gcc.dg/builtin-dynamic-object-size-pr120780.c'
Thomas Schwinge [Wed, 9 Jul 2025 08:06:39 +0000 (10:06 +0200)] 
Fix 'main' function in 'gcc.dg/builtin-dynamic-object-size-pr120780.c'

Fix-up for commit 72e85d46472716e670cbe6e967109473b8d12d38
"tree-optimization/120780: Support object size for containing objects".
'size_t sz' is unused here, and GCC/nvptx doesn't accept this:

    spawn -ignore SIGHUP [...]/nvptx-none-run ./builtin-dynamic-object-size-pr120780.exe
    error   : Prototype doesn't match for 'main' in 'input file 1 at offset 1924', first defined in 'input file 1 at offset 1924'
    nvptx-run: cuLinkAddData failed: unknown error (CUDA_ERROR_UNKNOWN, 999)
    FAIL: gcc.dg/builtin-dynamic-object-size-pr120780.c execution test

gcc/testsuite/
* gcc.dg/builtin-dynamic-object-size-pr120780.c: Fix 'main' function.

(cherry picked from commit c6ca6e57004653b787d2d6243fe5ee00cda8aad0)

3 weeks agotree-optimization/120780: Support object size for containing objects
Siddhesh Poyarekar [Thu, 26 Jun 2025 21:46:00 +0000 (17:46 -0400)] 
tree-optimization/120780: Support object size for containing objects

MEM_REF cast of a subobject to its containing object has negative
offsets, which objsz sees as an invalid access.  Support this use case
by peeking into the structure to validate that the containing object
indeed contains a type of the subobject at that offset and if present,
adjust the wholesize for the object to allow the negative offset.

gcc/ChangeLog:

PR tree-optimization/120780
* tree-object-size.cc (inner_at_offset,
get_wholesize_for_memref): New functions.
(addr_object_size): Call get_wholesize_for_memref.

gcc/testsuite/ChangeLog:

PR tree-optimization/120780
* gcc.dg/builtin-dynamic-object-size-pr120780.c: New test case.

Signed-off-by: Siddhesh Poyarekar <siddhesh@gotplt.org>
(cherry picked from commit 72e85d46472716e670cbe6e967109473b8d12d38)

3 weeks agoaarch64: Add support for NVIDIA GB10
Kyrylo Tkachov [Mon, 2 Jun 2025 14:08:12 +0000 (07:08 -0700)] 
aarch64: Add support for NVIDIA GB10

This adds support for -mcpu=gb10.  This is a big.LITTLE configuration
involving Cortex-X925 and Cortex-A725 cores.  The appropriate MIDR numbers
are added to detect them in -mcpu=native.  We did not add an
-mcpu=cortex-x925.cortex-a725 option because GB10 does include the crypto
instructions which we want on by default, and the current convention is to not
enable such extensions for Arm Cortex cores in -mcpu where they are optional
in the IP.

Bootstrapped and tested on aarch64-none-linux-gnu.

Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
gcc/

* config/aarch64/aarch64-cores.def (gb10): New entry.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi (AArch64 Options): Document the above.

(cherry picked from commit 9ff6ade24cae5a51d1ee9d9ad4b4a5c682e4a5ed)

3 weeks agoDaily bump.
GCC Administrator [Thu, 10 Jul 2025 00:27:31 +0000 (00:27 +0000)] 
Daily bump.

3 weeks agoFortran: Remove corank conformability checks [PR120843]
Andre Vehreschild [Wed, 2 Jul 2025 09:06:17 +0000 (11:06 +0200)] 
Fortran: Remove corank conformability checks [PR120843]

Remove the checks on coranks conformability in expressions,
because there is nothing in the standard about it.  When a coarray
has no coindexes it it treated like a non-coarray, when it has
a full-corank coindex its result is a regular array.  So nothing
to check for corank conformability.

PR fortran/120843

gcc/fortran/ChangeLog:

* resolve.cc (resolve_operator): Remove conformability check,
because it is not in the standard.

gcc/testsuite/ChangeLog:

* gfortran.dg/coarray/coindexed_6.f90: Enhance test to have
coarray components covered.

(cherry picked from commit 15413e05eb9cde976b8890cd9b597d0a41a8eb27)

3 weeks agotree-optimization/120358 - bogus PTA with structure access
Richard Biener [Mon, 7 Jul 2025 13:13:38 +0000 (15:13 +0200)] 
tree-optimization/120358 - bogus PTA with structure access

When we compute the constraint for something like
MEM[(const struct QStringView &)&tok2 + 32] we go and compute
what (const struct QStringView &)&tok2 + 32 points to and then
add subvariables to its dereference that possibly fall in the
range of the access according to the original refs size.  In
doing that we disregarded that the subvariable the starting
address points to might not be aligned to it and thus the
access might start at any point within that variable.  The following
conservatively adjusts the pruning of adjacent sub-variables to
honor this.

PR tree-optimization/120358
* tree-ssa-structalias.cc (get_constraint_for_1): Adjust
pruning of sub-variables according to the imprecise
known start offset.

(cherry picked from commit aa5ae523e84a97bf3a582ea0fa73d959afa9b9c7)

3 weeks agotree-optimization/118669 - fixup wrongly aligned loads/stores
Richard Biener [Wed, 2 Jul 2025 07:30:05 +0000 (09:30 +0200)] 
tree-optimization/118669 - fixup wrongly aligned loads/stores

The vectorizer tracks alignment of datarefs with dr_aligned
and dr_unaligned_supported but that's aligned with respect to
the target alignment which can be less aligned than the mode
used for the access.  The following fixes this discrepancy
for vectorizing loads and stores.  The issue is visible for
aarch64 SVE and risc-v where VLA vector modes have larger than
element alignment but the target handles element alignment
just fine.

PR tree-optimization/118669
* tree-vect-stmts.cc (vectorizable_load): Emit loads
with proper (element) alignment.
(vectorizable_store): Likewise.

(cherry picked from commit 37bf13adcda564dfdb28c3aa736f2cac71c73d09)

3 weeks agotestsuite: add sve hw check to testcase [PR120817]
Tamar Christina [Mon, 7 Jul 2025 16:05:01 +0000 (17:05 +0100)] 
testsuite: add sve hw check to testcase [PR120817]

Drop down from SVE2 to SVE1 as that's the minimum
required for the test, and since it's a mid-end test
add the aarch64_sve_hw check.

gcc/testsuite/ChangeLog:

PR tree-optimization/120817
* gcc.dg/vect/pr120817.c: Add SVE HW check.

(cherry picked from commit 4b9f760c511a4ef3a390dd6cfab80bada57c2535)

3 weeks agotree-optimization/120817 - bogus DSE of .MASK_STORE
Richard Biener [Mon, 7 Jul 2025 07:56:50 +0000 (09:56 +0200)] 
tree-optimization/120817 - bogus DSE of .MASK_STORE

DSE used ao_ref_init_from_ptr_and_size for .MASK_STORE but
alias-analysis will use the specified size to disambiguate
against smaller objects.  For .MASK_STORE we instead have to
make the access size unspecified but we can still constrain
the access extent based on the maximum size possible.

PR tree-optimization/120817
* tree-ssa-dse.cc (initialize_ao_ref_for_dse): Use
ao_ref_init_from_ptr_and_range with unknown size for
.MASK_STORE and .MASK_LEN_STORE.

* gcc.dg/vect/pr120817.c: New testcase.

(cherry picked from commit 439b14e222571da76da2bfec04b9035fb9f1862d)

3 weeks agotree-optimization/120927 - 510.parest_r segfault with masked epilog
Richard Biener [Thu, 3 Jul 2025 12:39:22 +0000 (14:39 +0200)] 
tree-optimization/120927 - 510.parest_r segfault with masked epilog

The following fixes bad alignment computaton for epilog vectorization
when as in this case for 510.parest_r and masked epilog vectorization
with AVX512 we end up choosing AVX to vectorize the main loop and
masked AVX512 (sic!) to vectorize the epilog.  In that case alignment
analysis for the epilog tries to force alignment of the base to 64,
but that cannot possibly help the epilog when the main loop had used
a vector mode with smaller alignment requirement.

There's another issue, that the check whether the step preserves
alignment needs to consider possibly previously involved VFs
(here, the main loops smaller VF) as well.

These might not be the only case with problems for such a mode mix
but at least there it seems wise to never use DR alignment forcing
when analyzing an epilog.

We get to chose this mode setup because the iteration over epilog
modes doesn't prevent this, the maybe_ge (cached_vf_per_mode[0],
first_vinfo_vf) skip is conditional on !supports_partial_vectors
and it is also conditional on having a cached VF.  Further nothing
in vect_analyze_loop_1 rejects this setup - it might be conceivable
that a target can do masking only for larger modes.  There is a
second reason we end up with this mode setup, which is that
vect_need_peeling_or_partial_vectors_p says we do not need
peeling or partial vectors when analyzing the main loop with
AVX512 (if it would say so we'd have chosen a masked AVX512
epilog-only vectorization).  It does that because it looks at
LOOP_VINFO_COST_MODEL_THRESHOLD (which is not yet computed, so
always zero at this point), and compares max_niter (5) against
the VF (8), but not with equality as the comment says but with
greater.  This also needs looking at, PR120939.

PR tree-optimization/120927
* tree-vect-data-refs.cc (vect_compute_data_ref_alignment):
Do not force a DRs base alignment when analyzing an
epilog loop.  Check whether the step preserves alignment
for all VFs possibly involved sofar.

* gcc.dg/vect/vect-pr120927.c: New testcase.
* gcc.dg/vect/vect-pr120927-2.c: Likewise.

(cherry picked from commit 918f4517564c2cf7e5bb907428d5413742bee56f)

3 weeks agotree-optimization/120944 - bogus VN with volatile copies
Richard Biener [Fri, 4 Jul 2025 07:08:19 +0000 (09:08 +0200)] 
tree-optimization/120944 - bogus VN with volatile copies

The following avoids translating expressions through volatile
copies.

PR tree-optimization/120944
* tree-ssa-sccvn.cc (vn_reference_lookup_3): Gate optimizations
invalid when volatile is involved.

* gcc.dg/torture/pr120944.c: New testcase.

(cherry picked from commit 6ed1e2ae1a742d859c2dd74c9e7cebdd3618e8b1)

3 weeks agoDaily bump.
GCC Administrator [Wed, 9 Jul 2025 00:26:52 +0000 (00:26 +0000)] 
Daily bump.

3 weeks agolibstdc++: Fix typo in __size_to_integer(__GLIBCXX_TYPE_INT_N_3)
Jonathan Wakely [Fri, 4 Jul 2025 20:33:05 +0000 (21:33 +0100)] 
libstdc++: Fix typo in __size_to_integer(__GLIBCXX_TYPE_INT_N_3)

The overload taking a signed type was returning unsigned and the
overload taking an unsigned type was returning signed.

libstdc++-v3/ChangeLog:

* include/bits/stl_algobase.h (__size_to_integer): Move
misplaced unsigned keyword on __size_to_integer overloads for
__GLIBCXX_TYPE_INT_N_3 integer type.

(cherry picked from commit 106591f79a3beaed226400fbdc568e95229dc936)

3 weeks agonr2.0: late: Correctly initialize funny_error member
Arthur Cohen [Mon, 28 Apr 2025 19:45:13 +0000 (21:45 +0200)] 
nr2.0: late: Correctly initialize funny_error member

gcc/rust/ChangeLog:

* resolve/rust-late-name-resolver-2.0.cc (Late::Late): False initialize the
funny_error field.

3 weeks agoFortran: Ensure arguments in coarray call get unique components in add_data [PR120847]
Andre Vehreschild [Fri, 27 Jun 2025 13:31:21 +0000 (15:31 +0200)] 
Fortran: Ensure arguments in coarray call get unique components in add_data [PR120847]

PR fortran/120847

gcc/fortran/ChangeLog:

* coarray.cc (check_add_new_comp_handle_array): Make the count
of components static to be able to create more than one.  Create
an array component only for array expressions.

gcc/testsuite/ChangeLog:

* gfortran.dg/coarray/coindexed_7.f90: New test.

(cherry picked from commit ee31ab9b1950b7f47f030bda231ace34d187ae26)

3 weeks agoFortran: Fix non-conformable corank on this_image ref [PR120843]
Andre Vehreschild [Fri, 27 Jun 2025 12:39:13 +0000 (14:39 +0200)] 
Fortran: Fix non-conformable corank on this_image ref [PR120843]

PR fortran/120843

gcc/fortran/ChangeLog:

* resolve.cc (resolve_operator): Report inconsistent coranks
only when not referencing this_image.
(gfc_op_rank_conformable): Treat coranks as inconformable only
when a coindex other then implicit this_image is used.

gcc/testsuite/ChangeLog:

* gfortran.dg/coarray/coindexed_6.f90: New test.

(cherry picked from commit 1b0930e9046e0b6201fa03c2843f3b06e522acd1)

4 weeks agoDaily bump.
GCC Administrator [Tue, 8 Jul 2025 00:26:03 +0000 (00:26 +0000)] 
Daily bump.

4 weeks agoDaily bump.
GCC Administrator [Mon, 7 Jul 2025 00:24:53 +0000 (00:24 +0000)] 
Daily bump.

4 weeks agoAVR: Fix a typo in avr-mcus.def.
Georg-Johann Lay [Sun, 6 Jul 2025 16:17:15 +0000 (18:17 +0200)] 
AVR: Fix a typo in avr-mcus.def.

gcc/
* config/avr/avr-mcus.def: -mmcu= takes lower case MCU names.
* doc/avr-mmcu.texi: Rebuild.

(cherry picked from commit bac45dda59cbd8419bd4513b1a76365825ac8307)

4 weeks agoAVR: Add support for AVR32DAxxS, AVR64DAxxS, AVR128DAxxS devices.
Georg-Johann Lay [Sun, 6 Jul 2025 15:29:43 +0000 (17:29 +0200)] 
AVR: Add support for AVR32DAxxS, AVR64DAxxS, AVR128DAxxS devices.

gcc/
* config/avr/avr-mcus.def (avr32da28S, avr32da32S, avr32da48S)
(avr64da28S, avr64da32S, avr64da48S avr64da64S)
(avr128da28S, avr128da32S, avr128da48S, avr128da64S): Add devices.
* doc/avr-mmcu.texi: Rebuild.

(cherry picked from commit 76d6f401462485b26c4910d844e704789b147739)

4 weeks agoDaily bump.
GCC Administrator [Sun, 6 Jul 2025 00:25:53 +0000 (00:25 +0000)] 
Daily bump.

4 weeks agoDaily bump.
GCC Administrator [Sat, 5 Jul 2025 00:25:42 +0000 (00:25 +0000)] 
Daily bump.

4 weeks agoc++: -Wtemplate-body and tentative parsing [PR120575]
Jason Merrill [Fri, 4 Jul 2025 09:15:00 +0000 (05:15 -0400)] 
c++: -Wtemplate-body and tentative parsing [PR120575]

Here we were asserting non-zero errorcount, which is not the case if the
parse error was reduced to a warning (or silenced) in a template body.  So
check seen_error instead.

PR c++/120575
PR c++/116064

gcc/cp/ChangeLog:

* parser.cc (cp_parser_abort_tentative_parse): Check seen_error
instead of errorcount.

gcc/testsuite/ChangeLog:

* g++.dg/template/permissive-error3.C: New test.

(cherry picked from commit 35d6f55f7d6655a8683b45286283d44674fa997e)

4 weeks agoada: Fix alignment violation for chain of aligned and misaligned composite types
Eric Botcazou [Tue, 24 Jun 2025 18:32:46 +0000 (20:32 +0200)] 
ada: Fix alignment violation for chain of aligned and misaligned composite types

This happens when aggressive optimizations are enabled (i.e. -O2 and above)
because the ivopts pass fails to properly mark the new memory accesses it is
creating as misaligned by means of the build_aligned_type function.

gcc/ada/ChangeLog:

* gcc-interface/utils.cc (make_packable_type): Clear the TYPE_PACKED
flag in the case where the alignment is bumped.

4 weeks agoada: Fix selection of Finalize subprogram in untagged case
Ronan Desplanques [Fri, 20 Jun 2025 07:59:36 +0000 (09:59 +0200)] 
ada: Fix selection of Finalize subprogram in untagged case

The newly introduced Finalizable aspect makes it possible to derive from
a type that is not tagged but has a Finalize primitive. This patch fixes
problems where overridings of the Finalize primitive were ignored.

gcc/ada/ChangeLog:

* exp_ch7.adb (Make_Final_Call): Tweak search of Finalize primitive.
* exp_util.adb (Finalize_Address): Likewise.

4 weeks agoada: Fix inefficient Unchecked_Conversion to large array type
Eric Botcazou [Thu, 19 Jun 2025 20:17:09 +0000 (22:17 +0200)] 
ada: Fix inefficient Unchecked_Conversion to large array type

We fail to use the implementation permission given by RM 13.9(12) because
the array type does not have the Size_Known_At_Compile_Time flag set.

gcc/ada/ChangeLog:

* freeze.adb (Check_Compile_Time_Size): Try harder to see whether
the bounds of array types are known at compile time.

4 weeks agoada: Improved error message when size of descendant type exceeds Size'Class limit
Steve Baird [Fri, 30 May 2025 18:11:02 +0000 (11:11 -0700)] 
ada: Improved error message when size of descendant type exceeds Size'Class limit

Improve the error message that is generated when the size of tagged type
exceeds a Size'Class limit specified for an ancestor type.

gcc/ada/ChangeLog:

* mutably_tagged.adb (Make_CW_Size_Compile_Check): Include the
value of the Size'Class limit in the message generated via a
Compile_Time_Error pragma.

4 weeks agoada: Fix error on Designated_Storage_Model with extensions disabled
Ronan Desplanques [Tue, 17 Jun 2025 08:13:20 +0000 (10:13 +0200)] 
ada: Fix error on Designated_Storage_Model with extensions disabled

The format string used for the error in that case requires setting the
Error_Msg_Name_1 global variable. This was not done so this patch adds
the missing assignment.

gcc/ada/ChangeLog:

* sem_ch13.adb (Analyze_Aspect_Specifications): Fix error emission.

4 weeks agoDaily bump.
GCC Administrator [Fri, 4 Jul 2025 00:25:21 +0000 (00:25 +0000)] 
Daily bump.

4 weeks agoc++: Fix a pasto in the PR120471 fix [PR120940]
Jakub Jelinek [Thu, 3 Jul 2025 20:39:39 +0000 (22:39 +0200)] 
c++: Fix a pasto in the PR120471 fix [PR120940]

No idea how this slipped in, I'm terribly sorry.
Strangely nothing in the testsuite has caught this, so I've added
a new test for that.

2025-07-03  Jakub Jelinek  <jakub@redhat.com>

PR c++/120940
* typeck.cc (cp_build_array_ref): Fix a pasto.

* g++.dg/parse/pr120940.C: New test.
* g++.dg/warn/Wduplicated-branches9.C: New test.

(cherry picked from commit dc90649466a54ab61926d88500a05f59a55cb055)

4 weeks agoAda: Remove left-overs of front-end exception mechanism
Eric Botcazou [Thu, 3 Jul 2025 18:02:43 +0000 (20:02 +0200)] 
Ada: Remove left-overs of front-end exception mechanism

It was removed from the compiler a few releases ago.

gcc/ada/
* gcc-interface/Makefile.in (gnatlib-sjlj): Delete.
(gnatlib-zcx): Do not modify Frontend_Exceptions constant.
* libgnat/system-linux-loongarch.ads (Frontend_Exceptions): Delete.

4 weeks agomiddle-end: Fix complex lowering of cabs with no LHS [PR120369]
Andrew Pinski [Tue, 20 May 2025 20:21:28 +0000 (13:21 -0700)] 
middle-end: Fix complex lowering of cabs with no LHS [PR120369]

This was introduced by r15-1797-gd8fe4f05ef448e . I had missed that
the LHS of the cabs call could be NULL. This seems to only happen at -O0,
I tried to produce one that happens at -O1 but needed many different
options to prevent the removal of the call.
Anyways the fix is just keep around the call if the LHS is null.

Bootstrapped and tested on x86_64-linux-gnu.

PR middle-end/120369

gcc/ChangeLog:

* tree-complex.cc (gimple_expand_builtin_cabs): Return early
if the LHS of cabs is null.

gcc/testsuite/ChangeLog:

* gcc.dg/torture/pr120369-1.c: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
(cherry picked from commit 95c74f354ae3186e84fbada22d2e7f3845dbb659)

4 weeks agolibstdc++: Update LWG 4166 changes to concat_view::end() [PR120934]
Patrick Palka [Thu, 3 Jul 2025 14:55:17 +0000 (10:55 -0400)] 
libstdc++: Update LWG 4166 changes to concat_view::end() [PR120934]

In r15-4555-gf191c830154565 we proactively implemented the initial
proposed resolution for LWG 4166 which later turned out to be
insufficient, since we must also require equality_comparable of the
underlying iterators before concat_view could be a common range.

This patch implements the updated P/R, requiring all underlying
iterators to be forward (which implies equality_comparable) before
making concat_view common, which fixes the testcase from this PR.

PR libstdc++/120934

libstdc++-v3/ChangeLog:

* include/std/ranges (concat_view::end): Refine condition
for returning an iterator instead of default_sentinel as
per the updated P/R for LWG 4166.
* testsuite/std/ranges/concat/1.cc (test05): New test.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
(cherry picked from commit c5a17e92ebf0c6f3887fb5698a1114a3fdf50576)

4 weeks agoc++: uninitialized TARGET_EXPR and constexpr [PR120684]
Jason Merrill [Wed, 2 Jul 2025 22:03:57 +0000 (18:03 -0400)] 
c++: uninitialized TARGET_EXPR and constexpr [PR120684]

In r15-7532 for PR118856 I introduced a TARGET_EXPR with a
TARGET_EXPR_INITIAL of void_node to express that no initialization is done.
And indeed evaluating that doesn't store a value for the TARGET_EXPR_SLOT
variable.

But then at the end of the full-expression, destroy_value stores void_node
to express that its lifetime has ended.  If we evaluate the same
full-expression again, global_ctx->values still holds the void_node, causing
confusion when we try to destroy it again.  So clear out any value before
evaluating a TARGET_EXPR_INITIAL of void_type.

PR c++/120684
PR c++/118856

gcc/cp/ChangeLog:

* constexpr.cc (cxx_eval_constant_expression) [TARGET_EXPR]: Clear
the value first if is_complex.

gcc/testsuite/ChangeLog:

* g++.dg/cpp23/range-for10.C: New test.

4 weeks agolibstdc++: Fix regression in std::uninitialized_fill for C++98 [PR120931]
Jonathan Wakely [Wed, 2 Jul 2025 20:54:06 +0000 (21:54 +0100)] 
libstdc++: Fix regression in std::uninitialized_fill for C++98 [PR120931]

A typo in r15-4473-g3abe751ea86e34 made it ill-formed to use
std::uninitialized_fill with iterators that aren't pointers (or pointers
wrapped in our __normal_iterator) if the value type is a narrow
character type.

libstdc++-v3/ChangeLog:

PR libstdc++/120931
* include/bits/stl_uninitialized.h (__uninitialized_fill<true>):
Fix typo resulting in call to __do_uninit_copy instead of
__do_uninit_fill.
* testsuite/20_util/specialized_algorithms/uninitialized_fill/120931.cc:
New test.

(cherry picked from commit bc3ec8684f7111a06fde433bbe57caa385b178af)

4 weeks agoFortran: Fix out of bounds access in structure constructor's clean up [PR120711]
Andre Vehreschild [Wed, 25 Jun 2025 07:12:35 +0000 (09:12 +0200)] 
Fortran: Fix out of bounds access in structure constructor's clean up [PR120711]

A structure constructor's generated clean up code was using an offset
variable, which was manipulated before the clean up was run leading to
an out of bounds access.

PR fortran/120711

gcc/fortran/ChangeLog:

* trans-array.cc (gfc_trans_array_ctor_element): Store the value
of the offset for reuse.

gcc/testsuite/ChangeLog:

* gfortran.dg/asan/array_constructor_1.f90: New test.

(cherry picked from commit dff66a690f6d47963e5cb96677d0e194b85948fa)

4 weeks agoada: Fix alignment violation for mix of aligned and misaligned composite types
Eric Botcazou [Mon, 26 May 2025 07:25:57 +0000 (09:25 +0200)] 
ada: Fix alignment violation for mix of aligned and misaligned composite types

This happens when the chain of initialization procedures is called on the
subcomponents and causes the creation of temporaries along the way out of
alignment considerations.  Now these temporaries are not necessary in the
context and were not created until recently, so this gets rid of them.

gcc/ada/ChangeLog:

* gcc-interface/trans.cc (addressable_p): Add COMPG third parameter.
<COMPONENT_REF>: Do not return true out of alignment considerations
for non-strict-alignment targets if COMPG is set.
(Call_to_gnu): Pass true as COMPG in the call to the addressable_p
predicate if the called subprogram is an initialization procedure.

4 weeks agoada: Fix wrong finalization of constrained subtype of unconstrained array type
Eric Botcazou [Tue, 6 May 2025 17:14:40 +0000 (19:14 +0200)] 
ada: Fix wrong finalization of constrained subtype of unconstrained array type

This implements the Is_Constr_Array_Subt_With_Bounds flag for allocators.

gcc/ada/ChangeLog:

* gcc-interface/trans.cc (gnat_to_gnu) <N_Allocator>: Allocate the
bounds alongside the data if the Is_Constr_Array_Subt_With_Bounds
flag is set on the designated type.
<N_Free_Statement>: Take into account the allocated bounds if the
Is_Constr_Array_Subt_With_Bounds flag is set on the designated type.

4 weeks agoada: Fix missing error on too large Component_Size not multiple of storage unit
Eric Botcazou [Thu, 1 May 2025 23:30:56 +0000 (01:30 +0200)] 
ada: Fix missing error on too large Component_Size not multiple of storage unit

This is a small regression introduced a few years ago.

gcc/ada/ChangeLog:

* gcc-interface/decl.cc (gnat_to_gnu_component_type): Validate the
Component_Size like the size of a type only if the component type
is actually packed.

4 weeks agoada: Refine sanity check in Insert_Actions
Ronan Desplanques [Tue, 10 Jun 2025 10:51:26 +0000 (12:51 +0200)] 
ada: Refine sanity check in Insert_Actions

Insert_Actions performs a sanity check when it goes through an
expression with actions while going up the three. That check was not
perfectly right before this patch and spuriously failed when inserting
range checks in some situation. This patch makes the check more robust.

gcc/ada/ChangeLog:

* exp_util.adb (Insert_Actions): Fix check.

4 weeks agoada: Fix missing finalization with conditional expression in extended return
Eric Botcazou [Thu, 12 Jun 2025 19:58:49 +0000 (21:58 +0200)] 
ada: Fix missing finalization with conditional expression in extended return

Declarations of return objects are not (yet) distributed into the dependent
expressions of conditional expressions.

gcc/ada/ChangeLog:

* exp_ch6.adb (Expand_Ctrl_Function_Call): Do not bail out for the
declarations of return objects.

4 weeks agoada: Fix crash with Finalizable in corner case
Ronan Desplanques [Thu, 5 Jun 2025 10:03:46 +0000 (12:03 +0200)] 
ada: Fix crash with Finalizable in corner case

The Finalizable aspect introduced controlled types for which not all the
finalization primitives exist. This patch makes Make_Deep_Record_Body
handle this case correctly.

gcc/ada/ChangeLog:

* exp_ch7.adb (Make_Deep_Record_Body): Fix case of absent Initialize
primitive.

4 weeks agoada: Fix crash with Finalizable in corner case
Ronan Desplanques [Thu, 5 Jun 2025 07:48:22 +0000 (09:48 +0200)] 
ada: Fix crash with Finalizable in corner case

Since the introduction of the Finalizable aspect, there can be types
for which Is_Controlled returns True but that don't have all three
finalization primitives. The Generate_Finalization_Actions raised an
exception in that case before this patch, which fixes the problem.

gcc/ada/ChangeLog:

* exp_aggr.adb (Generate_Finalization_Actions): Stop assuming that
initialize primitive exists.

4 weeks agoada: Fix assertion failure on finalizable aggregate
Ronan Desplanques [Mon, 2 Jun 2025 10:09:59 +0000 (12:09 +0200)] 
ada: Fix assertion failure on finalizable aggregate

The Finalizable aspect makes it possible that
Insert_Actions_In_Scope_Around is entered with an empty list of after
actions. This patch fixes a condition that was not quite right in this
case.

gcc/ada/ChangeLog:

* exp_ch7.adb (Insert_Actions_In_Scope_Around): Fix condition.

4 weeks agoada: Fix wrong conversion of controlled array with representation change
Eric Botcazou [Tue, 27 May 2025 11:32:18 +0000 (13:32 +0200)] 
ada: Fix wrong conversion of controlled array with representation change

The problem is that a temporary is created for the conversion because of the
representation change, and it is finalized without having been initialized.

gcc/ada/ChangeLog:

* exp_ch4.adb (Handle_Changed_Representation): Alphabetize local
variables.  Set the No_Finalize_Actions flag on the assignment.