Note that this macro behaves slightly differently for some types
from the gcc __alignof__ and from the equivalent (new) standardised
alignof.
vg_alignof macro is needed for the "perm_malloc" callers (next commit)
to determine the alignment of small blocks, but might be useful
for other purposes => placed in libvex_basictypes.h, close to offsetof.
Julian Seward [Wed, 16 Jan 2013 22:11:13 +0000 (22:11 +0000)]
mips32 equivalent to r2636: fix up the mips32 back end to be in sync
with infrastructural changes w.r.t. conditional dirty helpers that
return values. Does not actually handle such cases since the mips32
front end does not generate them.
Julian Seward [Wed, 16 Jan 2013 21:10:01 +0000 (21:10 +0000)]
Fix up the s390 back end to be in sync with infrastructural changes
w.r.t. conditional dirty helpers that return values. Does not
actually handle such cases since the s390 front end does not generate
them. Further ahead, it would be more general to redo this by
incorporating a RetLoc as part of the helper_call struct. This change
is OK for now, though.
Julian Seward [Wed, 16 Jan 2013 14:56:06 +0000 (14:56 +0000)]
ppc32/64 equivalents to r2636: fix up the ppc back end to be in sync
with infrastructural changes w.r.t. conditional dirty helpers that
return values. Does not actually handle such cases since the ppc
front end does not generate them.
Julian Seward [Wed, 16 Jan 2013 09:29:37 +0000 (09:29 +0000)]
x86 equivalent to r2636: fix up the x86 back end to be in sync with
infrastructural changes w.r.t. conditional dirty helpers that return
values. Does not actually handle such cases since the x86 front end
does not generate them.
Julian Seward [Tue, 15 Jan 2013 22:30:39 +0000 (22:30 +0000)]
Fix up the amd64 back end to be in sync with infrastructural changes
w.r.t. conditional dirty helpers that return values. Does not
actually handle such cases since the amd64 front end does not generat
them.
Florian Krohm [Sun, 13 Jan 2013 02:29:05 +0000 (02:29 +0000)]
s390: Support insns to convert between DFP values and signed/unsigned
integers. Patch by Maran Pakkirisamy (maranp@linux.vnet.ibm.com).
Part of fixing BZ 307113.
Florian Krohm [Sat, 12 Jan 2013 22:02:07 +0000 (22:02 +0000)]
Add 12 IROps for converting betwen DFP values and signed/unsigned integers.
Patch by Maran Pakkirisamy (maranp@linux.vnet.ibm.com).
Part of fixing BZ 307113.
Julian Seward [Tue, 8 Jan 2013 14:09:04 +0000 (14:09 +0000)]
Get rid of selectable default (return) values in conditional dirty
calls, as introduced in r2594. It is overkill -- unnecessary
complexity. Instead have a pre-assumed default bit pattern of 0101010
(0x55..) to be returned in such cases.
Carl Love [Thu, 3 Jan 2013 23:34:18 +0000 (23:34 +0000)]
The call to set the rounding mode for DFP iops: Iop_AddD128, Iop_SubD128,
Iop_MulD128, Iop_DivD128, and Iop_D128toI64 is wrong. The call being used is
set_FPU_rounding_mode(). This call is used to set the two rounding mode bits
for the Floating point instructions. The call set_FPU_DFP_rounding_mode()
should have been used to set the three rounding mode bits for the DFP
instructions.
This patch changes the call to the correct function to set the DFP
rounding mode bits.
Florian Krohm [Sun, 30 Dec 2012 18:17:18 +0000 (18:17 +0000)]
Improve handling of dirty helper calls when building trees in ado_treebuild_BB.
This function took an overly conservative approach and always assumed
that calling a dirty helper would modify both guest state and memory. This
patch introduces two new functions dirty_helper_stores and dirty_helper_puts,
to determine the actual side effets of a helper call. Using these functions
increases precision and allows the tree builder to move a GET past a dirty
helper call.
Florian Krohm [Thu, 27 Dec 2012 20:14:03 +0000 (20:14 +0000)]
s390: Support the "test data class/group" and "extract significance"
insns. Patch by Maran Pakkirisamy (maranp@linux.vnet.ibm.com).
This is part of fixing BZ 307113.
Florian Krohm [Thu, 27 Dec 2012 00:59:43 +0000 (00:59 +0000)]
s390: Do not waste a register when assigning a constant to a memory
location. If available, use MVHI and friends. If those are not available,
load the constant value into register r0 and store that. r0 is not visible
to register allocation and therefore using it does not increase register
pressure.
Remove S390_INSN_MZERO and replace it with S390_INSN_MIMM. Assigning zero
is just a special case..
Saves between 0.9% and 2.4% of insns as measured with the perf regression
bucket.
Florian Krohm [Wed, 26 Dec 2012 17:47:19 +0000 (17:47 +0000)]
s390x: Support "compare biased exponent" insns CEDTR, CEXTR.
To do that properly, two new IROps are needed: Iop_CmpExpD64 and
Iop_CmpExpD128. It might seem that extracting the exponents using
Iop_ExtractExpD64/D128 and comparing the values could be used here.
But that only works for finite DFP values. Hence, the new IROps.
Patch by Maran Pakkirisamy (maranp@linux.vnet.ibm.com).
This is part of fixing BZ 307113.
Florian Krohm [Mon, 24 Dec 2012 00:14:31 +0000 (00:14 +0000)]
s390: New file s390_defs.h to contain definitions that are
neither guest nor host specific, but just s390 specific. These
definitions formerly resided in host_s390_defs.h
Florian Krohm [Sun, 23 Dec 2012 01:09:16 +0000 (01:09 +0000)]
s390: Simplify the optimisation for PUTs to tracked registers.
There is no need to treat the guest IA register specially. The first
assignment in a SB to any tracked register will always assign the full value
and not do an incremental update. Therefore, maintaining
env->first_IA_assignment is redundant. Interestingly, the old code
forgot to mark the tracking state as valid when first_IA_assignment was
true, resulting in an inefficiency (in the order of 0.8% of insns).
Also, when a tracked register already contains the value that it is
being assigned, there is not need to
(a) check whether that register requires precise memory exceptions and
(b) if so, assign the new value.
By definition, the register is up-to-date and reassigning the new value
which is also the old value is meaningless. No idea, what I was thinking
at the time.
Florian Krohm [Sat, 22 Dec 2012 15:01:04 +0000 (15:01 +0000)]
s390: Reduce the size of an s390_insn from 48 bytes to 32 bytes by
- adding one level of indirection for CDAS and DFP binops
- rearranging and tweaking the variant for helper calls
- using seperate insns kinds for signed and unsigned multiplication
and division.
Add an assert to make sure the size stays at 32 bytes.
Florian Krohm [Sat, 22 Dec 2012 02:28:25 +0000 (02:28 +0000)]
s390: Generalise S390_INSN_GADD which only worked on the guest
state to S390_INSN_MADD which works for any memory location
addressable with base reg + 20-bit displacement.
Florian Krohm [Fri, 21 Dec 2012 21:05:17 +0000 (21:05 +0000)]
s390: Distinguish between conversion to/from IRCmpFxxResult and
IRCmpDxxResult, even though the encodings are currently the same.
Rename convert_s390_fpcc_to_vex to convert_s390_to_vex_bfpcc.
Add convert_s390_to_vex_dfpcc and convert_vex_dfpcc_to_s390.
Florian Krohm [Fri, 21 Dec 2012 17:32:12 +0000 (17:32 +0000)]
Add support for these DFP insns:
AXTRA, CDTR, CXTR, DXTRA, LDETR, LXDTR, LDXTR, LEDTR, LTXTR, MXTRA, SXTRA
This is part of fixing BZ #307113.
Patch by Maran Pakkirisamy (maranp@linux.vnet.ibm.com) with some minor
mods.
Florian Krohm [Thu, 20 Dec 2012 16:58:52 +0000 (16:58 +0000)]
s390: Fix IR generation for DDTR and MDTR. These insns do not modify
the condition code.
Spotted and fixed by Maran Pakkirisamy (maranp@linux.vnet.ibm.com).
Julian Seward [Mon, 17 Dec 2012 21:54:10 +0000 (21:54 +0000)]
IR: add the ability to specify the call-didn't-happen ("default")
return value for conditional dirty helper calls returning values. The
default value can be either all-zeroes or all-ones.
Florian Krohm [Sun, 16 Dec 2012 22:49:05 +0000 (22:49 +0000)]
Fix an assert in s390 disassembly. Eliminate a few magic array
width constants and use S390_MAX_MNEMONIC_LEN instead.
New function "mnemonic" to construct a mnemonic string padded with
blanks for alignment.
Florian Krohm [Tue, 11 Dec 2012 04:09:43 +0000 (04:09 +0000)]
Generalise S390_INSN_GZERO which only worked on the guest
state to S390_INSN_MZERO which works for any memory location
addressable with base reg + 12-bit displacement.
Florian Krohm [Tue, 4 Dec 2012 04:45:32 +0000 (04:45 +0000)]
In the past, the implementation of STFLE returned the facilities of the host
machine. This was not consistent in the following sense: Suppose the host
has a facility F installed and this facility implies the availability of an
insn X. Suppose further, that insn X is not supported in valgrind.
An application progrm that tests the availability of insn X by checking
for its associated facility F will fail under valgrind when using X because
valgrind will SIGILL. Not so good.
This patch changes the STFLE behaviour to adjust the facilities of the
virtual machine according to what the set of insns that is actually
supported. It's an approximation, because for some facilities we only
support a subset of the insns enabled by that facility.
Julian Seward [Sun, 25 Nov 2012 15:26:48 +0000 (15:26 +0000)]
Initial front changes for ARM, to generate direct IR for at least some
conditional loads and stores. Very incomplete -- most load-store
cases still use the old scheme.
Petar Jovanovic [Fri, 23 Nov 2012 00:44:37 +0000 (00:44 +0000)]
Correctly model LL/SC on MIPS.
As the issue with RMW on MIPS does not block execution anymore (see Valgrind
patch r13136), we can switch back to model it through LoadL and StoreC instead
of using incorrect Load and Store.
This will give back correct output to memcheck/tests/atomic_incs on MIPS.
Carl Love [Tue, 20 Nov 2012 17:32:48 +0000 (17:32 +0000)]
VEX, ppc fix use of modified value in the Iop_32HLto64 implementation
The issue with the Iop_32HLto64, as explained by Julian:
One of the "rules of the game" of instruction selection is that the register
returned by any of the isel* functions may not be modified -- if it needs to
be modified, first copy the value off to a different register. The rule exists
because, in this case, e->Iex.Binop.arg2 might be an IRExpr_RdTmp, in which
case iselWordExpr_R simply returns the register which holds the value of the
relevant IR temporary. And so if r_Lo is modified then any subsequent uses of
that IR temporary will get the wrong value. In this case, r_Lo is
modified without first copying it.
This patch fixes the issue by assigning the result of the AND operation to
a temporary and then using the temporary result in the OR operation thus
avoiding using a modified value.
Julian Seward [Tue, 20 Nov 2012 15:24:24 +0000 (15:24 +0000)]
Add a special-case implementation of PCMPISTRI $0x3A, which generates
in-line IR instead of calling helpers. This is so that Memcheck can
do exact definedness propagation through it. This is important for
dealing with inlined PCMPISTRI-based strlen calls.
#309921, comment 6. (Patrick J. LoPresti , lopresti@gmail.com)
Julian Seward [Thu, 8 Nov 2012 10:57:08 +0000 (10:57 +0000)]
Improve accuracy of definedness tracking through the x86 PMOVMSKB and
BSF instructions, as the lack of it causes false positives (VEX side).
Fixes #308627. Combined efforts of Patrick J. LoPresti
<lopresti@gmail.com> and me.
Carl Love [Mon, 29 Oct 2012 20:23:41 +0000 (20:23 +0000)]
Valgrind, ppc: Fix missing checks for 64-bit instructions operating in 32-bit mode, Bugzilla 308573
A number of the POWER instructions are only intended to run on 64-bit
hardware. These instructions will give a SIGILL instruction on 32-bit
hardware. The check for 32-bit mode on some of these instructions is
missing. Although, the 64-bit hardware will execute these instructions
on 64-bit hardware without generating a SIGILL the use of these
instructions in 32-bit mode on 64-bit hardware is typically indicative of
a programming error. There are cases where these instructions are used
to determine if the code is running on 32-bit hardware or not. In these
cases, the instruction needs to generate a SIGILL for the error handler
to properly determine the hardware is running in 32-bit mode.
This patch adds the 32-bit mode check for those 64-bit instructions that
do not have the check. If the check fails, the instruction is flagged
as an unsupported instruction and a SIGILL message is generated.
This patch fixes the bug reported in:
Bug 308573 - Internal Valgrind error on 64-bit instruction executed in
32-bit mode
Note, there is an accompaning fix to memcheck/tests/ppc32/power_ISA2_05.c
to only execute the 64-bit instruction prtyd test in 64-bit mode.
Florian Krohm [Sun, 7 Oct 2012 19:44:40 +0000 (19:44 +0000)]
Add data structures for cache representation to libvex.h:
VexCacheInfo, VexCache, and VexCacheKind.
VexArchInfo gets a VexCacheInfo member which LibVEX_default_VexArchInfo
initialises.
Florian Krohm [Sun, 7 Oct 2012 15:42:37 +0000 (15:42 +0000)]
s390: This is a pre-patch for DFP support. It renames certain
identifiers to explicitly refer to BFP, as there will be counterparts
in the future for DFP.
Patch by Maran <maranp@linux.vnet.ibm.com>.
Part of fixing #307113.
Make header files compilable by itself to get two benefits:
- never have to worry about order of inclusion
- never have to figure out hidden dependencies in order to be
able to include a file
Change the return value of LibVEX_{Chain,UnChain,PatchProfInc}.
These functions now always return the address range that was
patched. Therefore, these functions no longer need knowledge
about I-cache coherency of the host system.
projects / thirdparty / valgrind.git / log
