* config/mips/mips.c (mips_asan_shadow_offset): New function.
(TARGET_ASAN_SHADOW_OFFSET): Define.
* config/mips/mips.h (FRAME_GROWS_DOWNWARD): Augment to also be
true for -fsanitize=address.
Co-Authored-By: Jean Lee <xiaoyur347@gmail.com>
From-SVN: r259666
If someone has access to a 64-bit mips-linux system to test this (with the obvious edit), that'd be really nice.
If someone has access to a 64-bit mips-linux system to test
this (with the obvious edit), that'd be really nice. Until
then, best to not introduce possible build failures.
As mentioned in <http://gcc.gnu.org/ml/gcc/2018-03/msg00133.html> the bogus adjustment to 160 from 144 (which is reverted here)...
As mentioned in <http://gcc.gnu.org/ml/gcc/2018-03/msg00133.html>
the bogus adjustment to 160 from 144 (which is reverted here),
is a single-token commit in upstream r301307, an attempt to
correct a failed build due to an upstream change to compile the
runtime with D_FILE_OFFSET_BITS=64. The correct fix is here:
just use the right include. Yes, user-struct-stat64-as-stat is
actually 160 for MIPS o32 and I hear user-struct-stat is also
160 for n32. There are additional fields appended for
user-struct-stat! I guess for MIPS it's as bad as it gets for
mixing up kernel and user struct stat. The context of the patch
doesn't show that in the #else there's the correct include, the
one for <asm/stat.h> to get the kernel-struct-stat. If you
can't compile it, IMHO the kernel headers are just too old; 3.2
is fine for example.
* sanitizer_common/sanitizer_platform_limits_linux.cc: Do not
take the shortcut to #include <sys/stat.h> for MIPS instead of
the kernel <asm/stat.h>. Explain why sys/stat.h is misleading
or wrong to get the kernel struct stat.
* sanitizer_common/sanitizer_platform_limits_posix.h [__mips__]:
Correct the value for 32-bit non-android struct_kernel_stat_sz.
This appears to be present in compiler-rt upstream, but as part of more intrusive changes.
This appears to be present in compiler-rt upstream, but as part
of more intrusive changes. For gcc, the lack of this results in
a fatal warning (-Werror) at build-time.
Mark Wielaard [Wed, 25 Apr 2018 17:34:00 +0000 (17:34 +0000)]
DWARF sort longer dirs before shorter ones in directory table.
When gcc dwarf2out generates the .debug_line table itself (for example
when generating one for a split DWARF .dwo) it uses natural sorting for
the directory table. Shorter directory paths come before longer directory
paths with the same prefix. This causes the files in the line table to
pick the shorter dir. Creating slightly ineffecient line tables because
the longer directory paths will never be used.
Fix this by changing file_info_cmp () to pick longer directory prefixes
before shorter ones. We still sort files (the compilation unit) without
any directory path before all entries with a directory path, so they
will still use dir entry 0 (the working directory).
A hello.c program would get the following dir and line table before:
Jakub Jelinek [Wed, 25 Apr 2018 13:11:03 +0000 (15:11 +0200)]
i386.md (*x86_mov<mode>cc_0_m1): Use type "alu1" rather than "alu"...
* config/i386/i386.md (*x86_mov<mode>cc_0_m1): Use type "alu1" rather
than "alu", remove explicit "memory" and "imm_disp" attributes.
(*x86_mov<mode>cc_0_m1_se, *x86_mov<mode>cc_0_m1_neg): Likewise.
Jakub Jelinek [Wed, 25 Apr 2018 13:10:01 +0000 (15:10 +0200)]
re PR middle-end/85414 (ICE: in ix86_expand_prologue, at config/i386/i386.c:13810 with -Og -fgcse)
PR middle-end/85414
* simplify-rtx.c (simplify_unary_operation_1) <case SIGN_EXTEND,
case ZERO_EXTEND>: Pass SUBREG_REG (op) rather than op to
gen_lowpart_no_emit.
[NDS32] Fix bug in bit-instruction checking functions.
gcc/
* config/nds32/nds32-predicates.c (nds32_can_use_bclr_p): Mask with
GET_MODE_MASK before any checking.
(nds32_can_use_bset_p): Likewise.
(nds32_can_use_btgl_p): Likewise.
Jakub Jelinek [Wed, 25 Apr 2018 10:02:24 +0000 (12:02 +0200)]
re PR sanitizer/84307 (asan blocks dead-store elimination)
PR sanitizer/84307
* c-decl.c (build_compound_literal): Call pushdecl (decl) even when
it is not TREE_STATIC.
* c-typeck.c (c_mark_addressable) <case COMPOUND_LITERAL_EXPR>: Mark
not just the COMPOUND_LITERAL_EXPR node itself addressable, but also
its COMPOUND_LITERAL_EXPR_DECL.
Jakub Jelinek [Wed, 25 Apr 2018 07:10:16 +0000 (09:10 +0200)]
re PR c++/85437 (member pointer static upcast rejected in a constexpr context)
PR c++/85437
PR c++/49171
* cp-tree.h (REINTERPRET_CAST_P): New.
* constexpr.c (cxx_eval_constant_expression) <case NOP_EXPR>:
Reject REINTERPET_CAST_P conversions. Use cplus_expand_constant
for non-trivial PTRMEM_CST cases.
* typeck.c (build_nop_reinterpret): New.
(build_reinterpret_cast_1): Use it. Set REINTERPRET_CAST_P on
NOP_EXPRs returned by cp_convert.
[AArch64] PR target/85512: Tighten SIMD right shift immediate constraints
In this testcase it is possible to generate an invalid SISD shift of zero:
Error: immediate value out of range 1 to 64 at operand 3 -- `sshr v9.2s,v0.2s,0'
The SSHR and USHR instructions require a shift from 1 up to the element size.
However our constraints on the scalar shifts that generate these patterns
allow a shift amount of zero as well. The pure GP-reg ASR and LSR instructions allow a shift amount of zero.
It is unlikely that a shift of zero will survive till the end of compilation, but it's not impossible, as this PR shows.
The patch tightens up the constraints in the offending patterns by adding two new constraints
that allow shift amounts [1,32] and [1,64] and using them in *aarch64_ashr_sisd_or_int_<mode>3
and *aarch64_lshr_sisd_or_int_<mode>3.
The left-shift SISD instructions SHL and USHL allow a shift amount of zero so don't need adjustment
The vector shift patterns that map down to SSHR and USHR already enforce the correct immediate range.
PR target/85512
* config/aarch64/constraints.md (Usg, Usj): New constraints.
* config/aarch64/iterators.md (cmode_simd): New mode attribute.
* config/aarch64/aarch64.md (*aarch64_ashr_sisd_or_int_<mode>3):
Use the above on operand 2. Reindent.
(*aarch64_lshr_sisd_or_int_<mode>3): Likewise.
Define __CET__ for -fcf-protection and remove -mibt
-mcet becomes an alias for -mshstk. Since all usages of -mcet and
-mno-cet have either been removed or replaced, we can remove the -mcet
command-lint option.
Jakub Jelinek [Tue, 24 Apr 2018 16:05:19 +0000 (18:05 +0200)]
re PR target/85503 (ICE in replace_swapped_load_constant, at config/rs6000/rs6000-p8swap.c:1853 on powerpc64le-linux-gnu)
PR target/85503
* config/rs6000/rs6000-p8swap.c (const_load_sequence_p): Punt if
const_vector is not CONST_VECTOR or SYMBOL_REF for a constant pool
containing a CONST_VECTOR.
Eric Botcazou [Mon, 23 Apr 2018 20:19:39 +0000 (20:19 +0000)]
re PR middle-end/85496 (internal compiler error: in emit_move_insn, at expr.c:3722)
PR middle-end/85496
* expr.c (store_field): In the bitfield case, if the value comes from
a function call and is returned in registers by means of a PARALLEL,
do not change the mode of the temporary unless BLKmode and VOIDmode.
Kito Cheng [Fri, 20 Apr 2018 19:03:19 +0000 (19:03 +0000)]
RISC-V: Make sure stack is always aligned during adjusting stack.
gcc/
2018-04-20 Kito Cheng <kito.cheng@gmail.com>
* config/riscv/riscv.c (riscv_first_stack_step): Round up min
step to make sure stack always aligned.
PR testsuite/85483: Move aarch64/sve/vcond_1.c test to g++.dg/other/
I totally botched up this sve test file in 259437.
It needs C++, so move it to g++.dg/other and make it a .C file.
Also adds the target guards to prevent it from running on non-aarch64 targets.
Tested that it passes on aarch64-none-elf and doesn't get run on arm-none-eabi.
Jakub Jelinek [Thu, 19 Apr 2018 19:16:18 +0000 (21:16 +0200)]
re PR tree-optimization/85467 (ICE: verify_gimple failed: non-trivial conversion at assignment with -O2 -fno-tree-ccp --param=sccvn-max-scc-size=10)
PR tree-optimization/85467
* fold-const.c (fold_ternary_loc) <case BIT_FIELD_REF>: Use
VECTOR_TYPE_P macro. If type is vector type, VIEW_CONVERT_EXPR the
VECTOR_CST element to type.
H.J. Lu [Thu, 19 Apr 2018 17:05:39 +0000 (17:05 +0000)]
libgcc/CET: Skip signal frames when unwinding shadow stack
When -fcf-protection -mcet is used, I got
FAIL: g++.dg/eh/sighandle.C
(gdb) bt
#0 _Unwind_RaiseException (exc=exc@entry=0x416ed0)
at /export/gnu/import/git/sources/gcc/libgcc/unwind.inc:140
#1 0x00007ffff7d9936b in __cxxabiv1::__cxa_throw (obj=<optimized out>,
tinfo=0x403dd0 <typeinfo for int@@CXXABI_1.3>, dest=0x0)
at /export/gnu/import/git/sources/gcc/libstdc++-v3/libsupc++/eh_throw.cc:90
#2 0x0000000000401255 in sighandler (signo=11, si=0x7fffffffd6f8,
uc=0x7fffffffd5c0)
at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:9
#3 <signal handler called> <<<< Signal frame which isn't on shadow stack
#4 dosegv ()
at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:14
#5 0x00000000004012e3 in main ()
at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:30
(gdb) p frames
$6 = 5
(gdb)
frame count should be 4, not 5. This patch skips signal frames when
unwinding shadow stack.
gcc/testsuite/
PR libgcc/85334
* g++.dg/torture/pr85334.C: New test.
H.J. Lu [Thu, 19 Apr 2018 16:36:34 +0000 (16:36 +0000)]
i386: Add save_stack_nonlocal and restore_stack_nonlocal
Define STACK_SAVEAREA_MODE to hold both shadow stack and stack pointers.
Replace builtin_setjmp_setup and builtin_longjmp with save_stack_nonlocal
and restore_stack_nonlocal to support both builtin setjmp/longjmp as well
as non-local goto in nested functions.
H.J. Lu [Thu, 19 Apr 2018 15:22:27 +0000 (15:22 +0000)]
libgcc/CET: Add _CET_ENDBR to __stack_split_initialize
Program received signal SIGSEGV, Segmentation fault.
__stack_split_initialize ()
at /export/gnu/import/git/sources/gcc/libgcc/config/i386/morestack.S:751
751 leaq -16000(%rsp),%rax # We should have at least 16K.
Missing separate debuginfos, use: dnf debuginfo-install libgcc-8.0.1-0.21.0.fc28.x86_64
(gdb) disass
Dump of assembler code for function __stack_split_initialize:
=> 0x0000000000402858 <+0>: lea -0x3e80(%rsp),%rax
0x0000000000402860 <+8>: mov %rax,%fs:0x70
0x0000000000402869 <+17>: sub $0x8,%rsp
0x000000000040286d <+21>: mov %rsp,%rdi
0x0000000000402870 <+24>: mov $0x3e80,%esi
0x0000000000402875 <+29>: callq 0x401810 <__generic_morestack_set_initial_sp>
0x000000000040287a <+34>: add $0x8,%rsp
0x000000000040287e <+38>: retq
End of assembler dump.
(gdb)
This patch adds the missing ENDBR to __stack_split_initialize.
H.J. Lu [Thu, 19 Apr 2018 15:15:04 +0000 (15:15 +0000)]
x86: Enable -fcf-protection with multi-byte NOPs
-fcf-protection -mcet can't be used with IFUNC features, like symbol
multiversioning or target clone, since IBT/SHSTK are applied to the whole
program and they may be disabled in some functions. But -fcf-protection
is implemented with multi-byte NOPs on all 64-bit processors as well as
32-bit processors starting with Pentium Pro. If -fcf-protection requires
-mcet, IFUNC features can't be used on Linux when -fcf-protection is
enabled by default.
This patch changes -fcf-protection to implement indirect branch and
return address tracking with multi-byte NOPs. -mibt and -mshstk are
changed to only enable CET built-in functions. CET tests are updated
to allow -fcf-protection without -mibt, -mshstk and -mcet on x86.
-fcf-protection=none are also added to tests which fail with
-fcf-protection so that -fcf-protection can be added to RUNTESTFLAGS
to verify -fcf-protection implementation.
gcc/
PR target/85417
* config/i386/cet.c (file_end_indicate_exec_stack_and_cet):
Check flag_cf_protection instead of TARGET_IBT and TARGET_SHSTK.
* config/i386/i386-c.c (ix86_target_macros_internal): Also
define __IBT__ and __SHSTK__ for -fcf-protection.
* config/i386/i386.c (pass_insert_endbranch::gate): Don't check
TARGET_IBT.
(ix86_trampoline_init): Likewise.
(x86_output_mi_thunk): Likewise.
(ix86_notrack_prefixed_insn_p): Likewise.
(ix86_option_override_internal): Don't disallow -fcf-protection.
* config/i386/i386.md (rdssp<mode>): Also enable for
-fcf-protection.
(incssp<mode>): Likewise.
(nop_endbr): Likewise.
* config/i386/i386.opt (mcet): Change help message to built-in
functions only.
(mibt): Likewise.
(mshstk): Likewise.
* doc/invoke.texi: Remove -mcet, -mibt and -mshstk condition
on -fcf-protection. Change -mcet, -mibt and -mshstk to only
enable CET built-in functions.
Richard Biener [Thu, 19 Apr 2018 12:41:42 +0000 (12:41 +0000)]
re PR tree-optimization/84737 (20% degradation in CPU2000 172.mgrid starting with r256888)
2018-04-19 Richard Biener <rguenther@suse.de>
PR tree-optimization/84737
* tree-vect-data-refs.c (vect_copy_ref_info): New function
copying restrict info.
(vect_setup_realignment): Use it.
* tree-vectorizer.h (vect_copy_ref_info): Declare.
* tree-vect-stmts.c (vectorizable_store): Copy ref info from
the first DR to all generated stores.
(vectorizable_load): Likewise for loads.
Jakub Jelinek [Thu, 19 Apr 2018 07:46:54 +0000 (09:46 +0200)]
re PR tree-optimization/85446 (wrong-code on riscv64)
PR tree-optimization/85446
* match.pd ((intptr_t) x eq/ne CST to x eq/ne (typeof x) cst): Require
the integral and pointer types to have the same precision.