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4 years agoarm: Add vst1_bf16 + vst1q_bf16 intrinsics
Andrea Corallo [Thu, 29 Oct 2020 14:11:37 +0000 (15:11 +0100)] 
arm: Add vst1_bf16 + vst1q_bf16 intrinsics

gcc/ChangeLog

2020-10-29  Andrea Corallo  <andrea.corallo@arm.com>

* config/arm/arm_neon.h (vst1_bf16, vst1q_bf16): Add intrinsics.
* config/arm/arm_neon_builtins.def : Touch for:
__builtin_neon_vst1v4bf, __builtin_neon_vst1v8bf.

gcc/testsuite/ChangeLog

2020-10-29  Andrea Corallo  <andrea.corallo@arm.com>

* gcc.target/arm/simd/vst1_bf16_1.c: New test.

4 years agoarm: Add vld1_bf16 + vld1q_bf16 intrinsics
Andrea Corallo [Thu, 29 Oct 2020 12:56:17 +0000 (13:56 +0100)] 
arm: Add vld1_bf16 + vld1q_bf16 intrinsics

gcc/ChangeLog

2020-10-29  Andrea Corallo  <andrea.corallo@arm.com>

* config/arm/arm-builtins.c (VAR14): Define macro.
* config/arm/arm_neon_builtins.def: Touch for:
__builtin_neon_vld1v4bf, __builtin_neon_vld1v8bf.
* config/arm/arm_neon.h (vld1_bf16, vld1q_bf16): Add intrinsics.

gcc/testsuite/ChangeLog

2020-10-29  Andrea Corallo  <andrea.corallo@arm.com>

* gcc.target/arm/simd/vld1_bf16_1.c: New test.

4 years agoarm: Add vst1_lane_bf16 + vstq_lane_bf16 intrinsics
Andrea Corallo [Fri, 23 Oct 2020 12:21:56 +0000 (14:21 +0200)] 
arm: Add vst1_lane_bf16 + vstq_lane_bf16 intrinsics

gcc/ChangeLog

2020-10-23  Andrea Corallo  <andrea.corallo@arm.com>

* config/arm/arm_neon.h (vst1_lane_bf16, vst1q_lane_bf16): Add
intrinsics.
* config/arm/arm_neon_builtins.def (STORE1LANE): Add v4bf, v8bf.

gcc/testsuite/ChangeLog

2020-10-23  Andrea Corallo  <andrea.corallo@arm.com>

* gcc.target/arm/simd/vst1_lane_bf16_1.c: New testcase.
* gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c: Likewise.
* gcc.target/arm/simd/vst1_lane_bf16_indices_1.c: Likewise.

4 years agoarm: Add vld1_lane_bf16 + vldq_lane_bf16 intrinsics
Andrea Corallo [Wed, 21 Oct 2020 09:16:01 +0000 (11:16 +0200)] 
arm: Add vld1_lane_bf16 + vldq_lane_bf16 intrinsics

gcc/ChangeLog

2020-10-21  Andrea Corallo  <andrea.corallo@arm.com>

* config/arm/arm_neon_builtins.def: Add to LOAD1LANE v4bf, v8bf.
* config/arm/arm_neon.h (vld1_lane_bf16, vld1q_lane_bf16): Add
intrinsics.

gcc/testsuite/ChangeLog

2020-10-21  Andrea Corallo  <andrea.corallo@arm.com>

* gcc.target/arm/simd/vld1_lane_bf16_1.c: New testcase.
* gcc.target/arm/simd/vld1_lane_bf16_indices_1.c: Likewise.
* gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c: Likewise.

4 years agoFix PR ada/98230
Ed Schonberg [Thu, 10 Dec 2020 21:26:57 +0000 (22:26 +0100)] 
Fix PR ada/98230

It's a rather curious malfunction of the 'Mod attribute applied to the
variable of a loop whose upper bound is dynamic.

gcc/ada/ChangeLog:
PR ada/98230
* exp_attr.adb (Expand_N_Attribute_Reference, case Mod): Use base
type of argument to obtain static bound and required size.

gcc/testsuite/ChangeLog:
* gnat.dg/modular6.adb: New test.

4 years agoc++: overload sets and placeholder return type [PR64194]
Patrick Palka [Thu, 30 Jul 2020 02:06:44 +0000 (22:06 -0400)] 
c++: overload sets and placeholder return type [PR64194]

In the testcase below, template argument deduction for the call
g(id<int>) goes wrong because the functions in the overload set id<int>
each have a yet-undeduced auto return type, and this undeduced return
type makes try_one_overload fail to match up any of the overloads with
g's parameter type, leading to g's template argument going undeduced and
to the overload set going unresolved.

This patch fixes this issue by performing return type deduction via
instantiation before doing try_one_overload, in a manner similar to what
resolve_address_of_overloaded_function does.

gcc/cp/ChangeLog:

PR c++/64194
* pt.c (resolve_overloaded_unification): If the function
template specialization has a placeholder return type,
then instantiate it before attempting unification.

gcc/testsuite/ChangeLog:

PR c++/64194
* g++.dg/cpp1y/auto-fn60.C: New test.

(cherry picked from commit 2c58f5cadfac338a67723fd6e41c9097760c4a33)

4 years agoDaily bump.
GCC Administrator [Thu, 10 Dec 2020 00:17:24 +0000 (00:17 +0000)] 
Daily bump.

4 years agooptions: Make --help= see overridden values
Kewen Lin [Wed, 19 Aug 2020 02:37:39 +0000 (21:37 -0500)] 
options: Make --help= see overridden values

Options "-Q --help=params" don't show the final values after
target option overriding, instead it emits the default values
in params.opt (without any explicit param settings).

This patch makes it see overridden values.

gcc/ChangeLog:

* opts-global.c (decode_options): Call target_option_override_hook
before it prints for --help=*.

(cherry picked from commit a7bbb5b1b1eb09db8175130474e8da952f30404b)

4 years agoc++: Fix deduction from auto template parameter [PR93083]
Jason Merrill [Wed, 25 Nov 2020 22:05:24 +0000 (17:05 -0500)] 
c++: Fix deduction from auto template parameter [PR93083]

The check in do_class_deduction to handle passing one class placeholder
template parm as an argument for itself needed to be extended to also handle
equivalent parms from other templates.

gcc/cp/ChangeLog:

PR c++/93083
* pt.c (convert_template_argument): Handle equivalent placeholders.
(do_class_deduction): Look through EXPR_PACK_EXPANSION, too.

gcc/testsuite/ChangeLog:

PR c++/93083
* g++.dg/cpp2a/nontype-class40.C: New test.

4 years agoDaily bump.
GCC Administrator [Wed, 9 Dec 2020 00:17:28 +0000 (00:17 +0000)] 
Daily bump.

4 years agoarm: Fix unwanted fall-throughs in arm.c
Andrea Corallo [Wed, 27 May 2020 16:43:48 +0000 (17:43 +0100)] 
arm: Fix unwanted fall-throughs in arm.c

gcc/ChangeLog

2020-05-28  Andrea Corallo  <andrea.corallo@arm.com>

* config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
fall-throughs.

4 years agoFix PR target/96470
Eric Botcazou [Tue, 8 Dec 2020 08:19:36 +0000 (09:19 +0100)] 
Fix PR target/96470

This forces the scalarization of the testcase on PowerPC.

gcc/testsuite/ChangeLog:
PR target/96470
* gnat.dg/opt39.adb: Add dg-additional-options for PowerPC.

4 years agoFix internal error on library-level type extended locally
Eric Botcazou [Mon, 7 Dec 2020 09:48:06 +0000 (10:48 +0100)] 
Fix internal error on library-level type extended locally

The compiler aborts on the local extension of a tagged type declared
at library level, with a progenitor given by an interface type having
a primitive that is a homograph of a primitive of the tagged type.

gcc/ada/ChangeLog:
* gcc-interface/trans.c (maybe_make_gnu_thunk): Return false if the
target is local and thunk and target do not have the same context.

4 years agoDaily bump.
GCC Administrator [Tue, 8 Dec 2020 00:17:23 +0000 (00:17 +0000)] 
Daily bump.

4 years agoFix assembler name collision
Eric Botcazou [Mon, 7 Dec 2020 09:40:23 +0000 (10:40 +0100)] 
Fix assembler name collision

Gigi uses a dummy global variable to register global types for debug
info purposes and its name can now collide with user variables.

gcc/ada/ChangeLog:
* gcc-interface/utils.c (gnat_write_global_declarations): Use the
maximum index for the dummy object to avoid a name collision.

4 years agoDaily bump.
GCC Administrator [Mon, 7 Dec 2020 00:16:59 +0000 (00:16 +0000)] 
Daily bump.

4 years agoPR fortran/98017 - Suspected regression using PACK
Harald Anlauf [Sun, 29 Nov 2020 22:23:16 +0000 (23:23 +0100)] 
PR fortran/98017 - Suspected regression using PACK

When substituting a parameter variable of type character, the character
length was reset to 1.  Fix this by copying the length.

gcc/fortran/ChangeLog:

* expr.c (simplify_parameter_variable): Fix up character length
after copying an array-valued expression.

gcc/testsuite/ChangeLog:

* gfortran.dg/pr98017.f90: New test.

(cherry picked from commit bb67ad5cff58a707aaae645d4f45a913d8511c86)

4 years agoDaily bump.
GCC Administrator [Sun, 6 Dec 2020 00:17:22 +0000 (00:17 +0000)] 
Daily bump.

4 years agoDaily bump.
GCC Administrator [Sat, 5 Dec 2020 00:17:17 +0000 (00:17 +0000)] 
Daily bump.

4 years agoPR fortran/95342 - ICE in gfc_match_subroutine, at fortran/decl.c:7913
Harald Anlauf [Thu, 3 Dec 2020 19:33:22 +0000 (20:33 +0100)] 
PR fortran/95342 - ICE in gfc_match_subroutine, at fortran/decl.c:7913

Add checks for NULL pointers before dereferencing them.

gcc/fortran/ChangeLog:

PR fortran/95342
* decl.c (gfc_match_function_decl): Avoid NULL pointer dereference.
(gfc_match_subroutine): Likewise.

gcc/testsuite/ChangeLog:

PR fortran/95342
* gfortran.dg/pr95342.f90: New test.

(cherry picked from commit 30b606bb9b9314010a446ea4bed3481632008f75)

4 years agodoc/implement-c.texi: About same-as-scalar-type volatile aggregate accesses, PR94600
Hans-Peter Nilsson [Fri, 4 Dec 2020 19:27:23 +0000 (20:27 +0100)] 
doc/implement-c.texi: About same-as-scalar-type volatile aggregate accesses, PR94600

We say very little about reads and writes to aggregate /
compound objects, just scalar objects (i.e. assignments don't
cause reads).  Let's lets say something safe about aggregate
objects, but only for those that are the same size as a scalar
type.

There's an equal-sounding section (Volatiles) in extend.texi,
but this seems a more appropriate place, as specifying the
behavior of a standard qualifier.

gcc:

2020-12-04  Hans-Peter Nilsson  <hp@axis.com>
    Martin Sebor  <msebor@redhat.com>

PR middle-end/94600
* doc/implement-c.texi (Qualifiers implementation): Add blurb
about access to the whole of a volatile aggregate object, only for
same-size as a scalar object.

(cherry picked from commit eb79f4db49c5f5a807555e9d374524664eb537bf)

4 years agotree-optimization/96075 - adjust testcase
Richard Biener [Fri, 4 Dec 2020 10:39:44 +0000 (11:39 +0100)] 
tree-optimization/96075 - adjust testcase

This adds an XFAIL when load-lanes can be used.

2020-12-04  Richard Biener  <rguenther@suse.de>

PR tree-optimization/96075
* gcc.dg/vect/slp-46.c: Add XFAIL for load-lanes.

4 years agoFix checking failure in IPA-SRA
Eric Botcazou [Fri, 4 Dec 2020 09:04:56 +0000 (10:04 +0100)] 
Fix checking failure in IPA-SRA

This is a regression present on the mainline and 10 branch: on the one
hand, IPA-SRA does *not* disqualify accesses with zero size but, on the
other hand, it checks that accesses present in the tree have a (strictly)
positive size, thus trivially yielding an ICE in some cases.

gcc/ChangeLog:
* ipa-sra.c (verify_access_tree_1): Relax assertion on the size.

gcc/testsuite/ChangeLog:
* gnat.dg/opt91.ads, gnat.dg/opt91.adb: New test.
* gnat.dg/opt91_pkg.ads, gnat.dg/opt91_pkg.adb: New helper.

4 years agoDaily bump.
GCC Administrator [Fri, 4 Dec 2020 00:17:14 +0000 (00:17 +0000)] 
Daily bump.

4 years agolibstdc++: Update powerpc-linux baselines for GCC 10.1
Jonathan Wakely [Thu, 3 Dec 2020 17:18:28 +0000 (17:18 +0000)] 
libstdc++: Update powerpc-linux baselines for GCC 10.1

This should have been done before the GCC 10.1 release.

libstdc++-v3/ChangeLog:

* config/abi/post/powerpc-linux-gnu/baseline_symbols.txt:
Update.
* config/abi/post/powerpc64-linux-gnu/32/baseline_symbols.txt:
Update.

(cherry picked from commit 3843fa2d75a76ca64d3366950f0ac3d7d4729c4c)

4 years agoi386: Fix up ix86_md_asm_adjust for TImode [PR98086]
Uros Bizjak [Thu, 3 Dec 2020 16:49:42 +0000 (17:49 +0100)] 
i386: Fix up ix86_md_asm_adjust for TImode [PR98086]

ix86_md_asm_adjust assumes that dest_mode can be only [QHSD]Imode
and nothing else.  The patch rewrites zero-extension part to use
convert_to_mode to handle TImode and hypothetically even wider modes.

2020-12-03  Uroš Bizjak  <ubizjak@gmail.com>
    Jakub Jelinek  <jakub@redhat.com>

gcc/
PR target/98086
* config/i386/i386.c (ix86_md_asm_adjustmd): Rewrite
zero-extension part to use convert_to_mode.

gcc/testsuite/
PR target/98086
* gcc.target/i386/pr98086.c: New test.

(cherry picked from commit 756f55e62f73eb32787497eb9e564d4b21a6e637)

4 years agoRTEMS: Add Cortex-R52 multilib
Sebastian Huber [Thu, 3 Dec 2020 08:30:56 +0000 (09:30 +0100)] 
RTEMS: Add Cortex-R52 multilib

gcc/
* config/arm/t-rtems: Add "-mthumb -mcpu=cortex-r52
-mfloat-abi=hard" multilib.

(cherry picked from commit 2fb287056e6a709b8028cdf368c313ebe89877db)

4 years agoexpr: Fix REDUCE_BIT_FIELD for constants [PR95694, PR96151]
Richard Sandiford [Thu, 3 Dec 2020 10:23:25 +0000 (10:23 +0000)] 
expr: Fix REDUCE_BIT_FIELD for constants [PR95694, PR96151]

This is yet another PR caused by constant integer rtxes not storing
a mode.  We were calling REDUCE_BIT_FIELD on a constant integer that
didn't fit in poly_int64, and then tripped the as_a<scalar_int_mode>
assert on VOIDmode.

AFAICT REDUCE_BIT_FIELD is always passed rtxes that have TYPE_MODE
(rather than some other mode) and it just fills in the redundant
sign bits of that TYPE_MODE value.  So it should be safe to get
the mode from the type instead of the rtx.  The patch does that
and asserts that the modes agree, where information is available.

That on its own is enough to fix the bug, but we might as well
extend the folding case to all constant integers, not just those
that fit poly_int64.

gcc/
PR middle-end/95694
* expr.c (expand_expr_real_2): Get the mode from the type rather
than the rtx, and assert that it is consistent with the mode of
the rtx (where known).  Optimize all constant integers, not just
those that can be represented in poly_int64.

gcc/testsuite/
PR middle-end/95694
* gcc.dg/pr95694.c: New test.

(cherry picked from commit 760df6d296b8fc59796f42dca5eb14012fbfa28b)

4 years agoDaily bump.
GCC Administrator [Thu, 3 Dec 2020 00:17:26 +0000 (00:17 +0000)] 
Daily bump.

4 years agovalue-range: Give up on POLY_INT_CST ranges [PR97457]
Richard Sandiford [Wed, 2 Dec 2020 18:39:24 +0000 (18:39 +0000)] 
value-range: Give up on POLY_INT_CST ranges [PR97457]

This PR shows another problem with calculating value ranges for
POLY_INT_CSTs.  We have:

  ivtmp_76 = ASSERT_EXPR <ivtmp_60, ivtmp_60 > POLY_INT_CST [9, 4294967294]>

where the VQ coefficient is unsigned but is effectively acting
as a negative number.  We wrongly give the POLY_INT_CST the range:

  [9, INT_MAX]

and things go downhill from there: later iterations of the unrolled
epilogue are wrongly removed as dead.

I guess this is the final nail in the coffin for doing VRP on
POLY_INT_CSTs.  For other similarly exotic testcases we could have
overflow for any coefficient, not just those that could be treated
as contextually negative.

Testing TYPE_OVERFLOW_UNDEFINED doesn't seem like an option because we
couldn't handle warn_strict_overflow properly.  At this stage we're
just recording a range that might or might not lead to strict-overflow
assumptions later.

It still feels like we should be able to do something here, but for
now removing the code seems safest.  It's also telling that there
are no testsuite failures on SVE from doing this.

gcc/
PR tree-optimization/97457
* value-range.cc (irange::set): Don't decay POLY_INT_CST ranges
to integer ranges.

gcc/testsuite/
PR tree-optimization/97457
* gcc.dg/vect/pr97457.c: New test.

(cherry picked from commit 54ef7701a9dec8c923a12d1983f8a051ba88a7b9)

4 years agoaarch64: Remove aarch64_sve_pred_dominates_p
Richard Sandiford [Wed, 2 Dec 2020 16:20:36 +0000 (16:20 +0000)] 
aarch64: Remove aarch64_sve_pred_dominates_p

In r11-2922, Przemek fixed a post-RA instruction match failure
caused by the SVE FP subtraction patterns..  This patch applies
the same fix to the other patterns.

To recap, the issue is around the handling of predication.
We want to do two things:

- Optimise cases in which a predicate is known to be all-true.

- Differentiate cases in which the predicate on an _x ACLE function has
  to be kept as-is from cases in which we can make more lanes active.
  The former is true by default, the latter is true for certain
  combinations of flags in the -ffast-math group.

This is handled by a boolean flag in the unspecs to say whether the
predicate is “strict” or “relaxed”.  When combining multiple strict
operations, the predicates used in the operations generally need to
match.  When combining multiple relaxed operations, we can ignore the
predicates on nested operations and just use the predicate on the
“outermost” operation.

Originally I'd tried to reduce combinatorial explosion by using
aarch64_sve_pred_dominates_p.  This required matching predicates
for strict operations but allowed more combinations for relaxed
operations.

The problem (as I should have remembered) is that C conditions on
insn patterns can't reliably enforce matching operands.  If the
same register is used in two different input operands, the RA is
allowed to use different hard registers for those input operands
(and sometimes it has to).  So operands that match before RA
might not match afterwards.  The only sure way to force a match
is via match_dup.

This patch splits the cases into two.  I cry bitter tears at having
to do this, but I think it's the only backportable fix.  There might
be some way of using define_subst to generate the cond_* patterns from
the pred_* patterns, with some alternatives strategically disabled in
each case, but that's future work and might not be an improvement.

Since so many patterns now do this, I moved the comments from the
subtraction pattern to a new banner comment at the head of the file.

gcc/
* config/aarch64/aarch64-protos.h (aarch64_sve_pred_dominates_p):
Delete.
* config/aarch64/aarch64.c (aarch64_sve_pred_dominates_p): Likewise.
* config/aarch64/aarch64-sve.md: Add banner comment describing
how merging predicated FP operations are represented.
(*cond_<SVE_COND_FP_UNARY:optab><mode>_2): Split into...
(*cond_<SVE_COND_FP_UNARY:optab><mode>_2_relaxed): ...this and...
(*cond_<SVE_COND_FP_UNARY:optab><mode>_2_strict): ...this.
(*cond_<SVE_COND_FP_UNARY:optab><mode>_any): Split into...
(*cond_<SVE_COND_FP_UNARY:optab><mode>_any_relaxed): ...this and...
(*cond_<SVE_COND_FP_UNARY:optab><mode>_any_strict): ...this.
(*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2): Split into...
(*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2_relaxed): ...this and...
(*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2_strict): ...this.
(*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_any): Split into...
(*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_any_relaxed): ...this
and...
(*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_any_strict): ...this.
(*cond_<SVE_COND_FP_BINARY:optab><mode>_2): Split into...
(*cond_<SVE_COND_FP_BINARY:optab><mode>_2_relaxed): ...this and...
(*cond_<SVE_COND_FP_BINARY:optab><mode>_2_strict): ...this.
(*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_2_const): Split into...
(*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_2_const_relaxed): ...this
and...
(*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_2_const_strict): ...this.
(*cond_<SVE_COND_FP_BINARY:optab><mode>_3): Split into...
(*cond_<SVE_COND_FP_BINARY:optab><mode>_3_relaxed): ...this and...
(*cond_<SVE_COND_FP_BINARY:optab><mode>_3_strict): ...this.
(*cond_<SVE_COND_FP_BINARY:optab><mode>_any): Split into...
(*cond_<SVE_COND_FP_BINARY:optab><mode>_any_relaxed): ...this and...
(*cond_<SVE_COND_FP_BINARY:optab><mode>_any_strict): ...this.
(*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_any_const): Split into...
(*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_any_const_relaxed): ...this
and...
(*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_any_const_strict): ...this.
(*cond_add<mode>_2_const): Split into...
(*cond_add<mode>_2_const_relaxed): ...this and...
(*cond_add<mode>_2_const_strict): ...this.
(*cond_add<mode>_any_const): Split into...
(*cond_add<mode>_any_const_relaxed): ...this and...
(*cond_add<mode>_any_const_strict): ...this.
(*cond_<SVE_COND_FCADD:optab><mode>_2): Split into...
(*cond_<SVE_COND_FCADD:optab><mode>_2_relaxed): ...this and...
(*cond_<SVE_COND_FCADD:optab><mode>_2_strict): ...this.
(*cond_<SVE_COND_FCADD:optab><mode>_any): Split into...
(*cond_<SVE_COND_FCADD:optab><mode>_any_relaxed): ...this and...
(*cond_<SVE_COND_FCADD:optab><mode>_any_strict): ...this.
(*cond_sub<mode>_3_const): Split into...
(*cond_sub<mode>_3_const_relaxed): ...this and...
(*cond_sub<mode>_3_const_strict): ...this.
(*aarch64_pred_abd<mode>): Split into...
(*aarch64_pred_abd<mode>_relaxed): ...this and...
(*aarch64_pred_abd<mode>_strict): ...this.
(*aarch64_cond_abd<mode>_2): Split into...
(*aarch64_cond_abd<mode>_2_relaxed): ...this and...
(*aarch64_cond_abd<mode>_2_strict): ...this.
(*aarch64_cond_abd<mode>_3): Split into...
(*aarch64_cond_abd<mode>_3_relaxed): ...this and...
(*aarch64_cond_abd<mode>_3_strict): ...this.
(*aarch64_cond_abd<mode>_any): Split into...
(*aarch64_cond_abd<mode>_any_relaxed): ...this and...
(*aarch64_cond_abd<mode>_any_strict): ...this.
(*cond_<SVE_COND_FP_TERNARY:optab><mode>_2): Split into...
(*cond_<SVE_COND_FP_TERNARY:optab><mode>_2_relaxed): ...this and...
(*cond_<SVE_COND_FP_TERNARY:optab><mode>_2_strict): ...this.
(*cond_<SVE_COND_FP_TERNARY:optab><mode>_4): Split into...
(*cond_<SVE_COND_FP_TERNARY:optab><mode>_4_relaxed): ...this and...
(*cond_<SVE_COND_FP_TERNARY:optab><mode>_4_strict): ...this.
(*cond_<SVE_COND_FP_TERNARY:optab><mode>_any): Split into...
(*cond_<SVE_COND_FP_TERNARY:optab><mode>_any_relaxed): ...this and...
(*cond_<SVE_COND_FP_TERNARY:optab><mode>_any_strict): ...this.
(*cond_<SVE_COND_FCMLA:optab><mode>_4): Split into...
(*cond_<SVE_COND_FCMLA:optab><mode>_4_relaxed): ...this and...
(*cond_<SVE_COND_FCMLA:optab><mode>_4_strict): ...this.
(*cond_<SVE_COND_FCMLA:optab><mode>_any): Split into...
(*cond_<SVE_COND_FCMLA:optab><mode>_any_relaxed): ...this and...
(*cond_<SVE_COND_FCMLA:optab><mode>_any_strict): ...this.
(*aarch64_pred_fac<cmp_op><mode>): Split into...
(*aarch64_pred_fac<cmp_op><mode>_relaxed): ...this and...
(*aarch64_pred_fac<cmp_op><mode>_strict): ...this.
(*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>): Split
into...
(*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed):
...this and...
(*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict):
...this.
(*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>): Split
into...
(*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed):
...this and...
(*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict):
...this.
* config/aarch64/aarch64-sve2.md
(*cond_<SVE2_COND_FP_UNARY_LONG:optab><mode>): Split into...
(*cond_<SVE2_COND_FP_UNARY_LONG:optab><mode>_relaxed): ...this and...
(*cond_<SVE2_COND_FP_UNARY_LONG:optab><mode>_strict): ...this.
(*cond_<SVE2_COND_FP_UNARY_NARROWB:optab><mode>_any): Split into...
(*cond_<SVE2_COND_FP_UNARY_NARROWB:optab><mode>_any_relaxed): ...this
and...
(*cond_<SVE2_COND_FP_UNARY_NARROWB:optab><mode>_any_strict): ...this.
(*cond_<SVE2_COND_INT_UNARY_FP:optab><mode>): Split into...
(*cond_<SVE2_COND_INT_UNARY_FP:optab><mode>_relaxed): ...this and...
(*cond_<SVE2_COND_INT_UNARY_FP:optab><mode>_strict): ...this.

(cherry picked from commit 0eb5e901f6e25a7b8a9790a7a8c209147fb649ec)

4 years agoc++: Add missing verify_type_context call [PR97904]
Richard Sandiford [Wed, 2 Dec 2020 16:20:36 +0000 (16:20 +0000)] 
c++: Add missing verify_type_context call [PR97904]

When adding the verify_type_context target hook, I'd missed
a site that needs to check an array element type.

gcc/cp/
PR c++/97904
* pt.c (tsubst): Use verify_type_context to check the type
of an array element.

gcc/testsuite/
PR c++/97904
* g++.dg/ext/sve-sizeless-1.C: Add more template tests.
* g++.dg/ext/sve-sizeless-2.C: Likewise.

(cherry picked from commit d3585f5d0df47ffa453f5fe436fdf588301e5314)

4 years agoaarch64: Avoid false dependencies for SVE unary operations
Richard Sandiford [Wed, 2 Dec 2020 16:20:35 +0000 (16:20 +0000)] 
aarch64: Avoid false dependencies for SVE unary operations

For calls like:

        z0 = svabs_s8_x (p0, z1)

we previously generated:

        abs     z0.b, p0/m, z1.b

However, this creates a false dependency on z0 (the merge input).
This can lead to strange results in some cases, e.g. serialising
the operation behind arbitrary earlier operations, or preventing
two iterations of a loop from being executed in parallel.

This patch therefore ties the input to the output, using a MOVPRFX
if necessary and possible.  (The SVE2 unary long instructions do
not support MOVPRFX.)

When testing the patch, I hit a bug in the big-endian SVE move
optimisation in aarch64_maybe_expand_sve_subreg_move.  I don't
have an indepenedent testcase for it, so I didn't split it out
into a separate patch.

gcc/
* config/aarch64/aarch64.c (aarch64_maybe_expand_sve_subreg_move):
Do not optimize LRA subregs.
* config/aarch64/aarch64-sve.md
(@aarch64_pred_<SVE_INT_UNARY:optab><mode>): Tie the input to the
output.
(@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>): Likewise.
(*<ANY_EXTEND:optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2): Likewise.
(@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>): Likewise.
(*cnot<mode>): Likewise.
(@aarch64_pred_<SVE_COND_FP_UNARY:optab><mode>): Likewise.
(@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>):
Likewise.
(@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>):
Likewise.
(@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>):
Likewise.
(@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>):
Likewise.
(@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>):
Likewise.
(@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>):
Likewise.
(@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>):
Likewise.
* config/aarch64/aarch64-sve2.md
(@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
(@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
(@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
(@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.

gcc/testsuite/
* gcc.target/aarch64/sve/cond_cnot_1.c: XFAIL movprfx test.
* gcc.target/aarch64/sve/cond_unary_1.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/abs_f16.c (abs_f16_x_untied): Expect
a MOVPRFX instruction.
* gcc.target/aarch64/sve/acle/asm/abs_f32.c (abs_f32_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/abs_f64.c (abs_f64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/abs_s16.c (abs_s16_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/abs_s32.c (abs_s32_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/abs_s64.c (abs_s64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/abs_s8.c (abs_s8_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cls_s16.c (cls_s16_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cls_s32.c (cls_s32_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cls_s64.c (cls_s64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cls_s8.c (cls_s8_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/clz_s16.c (clz_s16_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/clz_s32.c (clz_s32_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/clz_s64.c (clz_s64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/clz_s8.c (clz_s8_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/clz_u16.c (clz_u16_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/clz_u32.c (clz_u32_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/clz_u64.c (clz_u64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/clz_u8.c (clz_u8_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cnot_s16.c (cnot_s16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/cnot_s32.c (cnot_s32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/cnot_s64.c (cnot_s64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/cnot_s8.c (cnot_s8_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cnot_u16.c (cnot_u16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/cnot_u32.c (cnot_u32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/cnot_u64.c (cnot_u64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/cnot_u8.c (cnot_u8_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cnt_bf16.c (cnt_bf16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/cnt_f16.c (cnt_f16_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cnt_f32.c (cnt_f32_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cnt_f64.c (cnt_f64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cnt_s16.c (cnt_s16_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cnt_s32.c (cnt_s32_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cnt_s64.c (cnt_s64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cnt_s8.c (cnt_s8_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cnt_u16.c (cnt_u16_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cnt_u32.c (cnt_u32_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cnt_u64.c (cnt_u64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cnt_u8.c (cnt_u8_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cvt_bf16.c (cvt_bf16_f32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/cvt_f16.c (cvt_f16_f32_x_untied)
(cvt_f16_f64_x_untied, cvt_f16_s16_x_untied, cvt_f16_s32_x_untied)
(cvt_f16_s64_x_untied, cvt_f16_u16_x_untied, cvt_f16_u32_x_untied)
(cvt_f16_u64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cvt_f32.c (cvt_f32_f16_x_untied)
(cvt_f32_f64_x_untied, cvt_f32_s16_x_untied, cvt_f32_s32_x_untied)
(cvt_f32_s64_x_untied, cvt_f32_u16_x_untied, cvt_f32_u32_x_untied)
(cvt_f32_u64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cvt_f64.c (cvt_f64_f16_x_untied)
(cvt_f64_f32_x_untied, cvt_f64_s16_x_untied, cvt_f64_s32_x_untied)
(cvt_f64_s64_x_untied, cvt_f64_u16_x_untied, cvt_f64_u32_x_untied)
(cvt_f64_u64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cvt_s16.c (cvt_s16_f16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/cvt_s32.c (cvt_s32_f16_x_untied)
(cvt_s32_f32_x_untied, cvt_s32_s64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cvt_s64.c (cvt_s64_f16_x_untied)
(cvt_s64_f32_x_untied, cvt_s64_s64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cvt_u16.c (cvt_u16_f16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/cvt_u32.c (cvt_u32_f16_x_untied)
(cvt_u32_f32_x_untied, cvt_u32_u64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/cvt_u64.c (cvt_u64_f16_x_untied)
(cvt_u64_f32_x_untied, cvt_u64_u64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/extb_s16.c (extb_s16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/extb_s32.c (extb_s32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/extb_s64.c (extb_s64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/exth_s32.c (exth_s32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/exth_s64.c (exth_s64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/extw_s64.c (extw_s64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/neg_f16.c (neg_f16_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/neg_f32.c (neg_f32_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/neg_f64.c (neg_f64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/neg_s16.c (neg_s16_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/neg_s32.c (neg_s32_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/neg_s64.c (neg_s64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/neg_s8.c (neg_s8_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/not_s16.c (not_s16_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/not_s32.c (not_s32_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/not_s64.c (not_s64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/not_s8.c (not_s8_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/not_u16.c (not_u16_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/not_u32.c (not_u32_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/not_u64.c (not_u64_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/not_u8.c (not_u8_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/rbit_s16.c (rbit_s16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rbit_s32.c (rbit_s32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rbit_s64.c (rbit_s64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rbit_s8.c (rbit_s8_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/rbit_u16.c (rbit_u16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rbit_u32.c (rbit_u32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rbit_u64.c (rbit_u64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rbit_u8.c (rbit_u8_x_untied): Ditto.
* gcc.target/aarch64/sve/acle/asm/recpx_f16.c (recpx_f16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/recpx_f32.c (recpx_f32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/recpx_f64.c (recpx_f64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/revb_s16.c (revb_s16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/revb_s32.c (revb_s32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/revb_s64.c (revb_s64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/revb_u16.c (revb_u16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/revb_u32.c (revb_u32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/revb_u64.c (revb_u64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/revh_s32.c (revh_s32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/revh_s64.c (revh_s64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/revh_u32.c (revh_u32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/revh_u64.c (revh_u64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/revw_s64.c (revw_s64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/revw_u64.c (revw_u64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rinta_f16.c (rinta_f16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rinta_f32.c (rinta_f32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rinta_f64.c (rinta_f64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rinti_f16.c (rinti_f16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rinti_f32.c (rinti_f32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rinti_f64.c (rinti_f64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintm_f16.c (rintm_f16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintm_f32.c (rintm_f32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintm_f64.c (rintm_f64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintn_f16.c (rintn_f16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintn_f32.c (rintn_f32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintn_f64.c (rintn_f64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintp_f16.c (rintp_f16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintp_f32.c (rintp_f32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintp_f64.c (rintp_f64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintx_f16.c (rintx_f16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintx_f32.c (rintx_f32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintx_f64.c (rintx_f64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintz_f16.c (rintz_f16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintz_f32.c (rintz_f32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/rintz_f64.c (rintz_f64_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/sqrt_f16.c (sqrt_f16_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/sqrt_f32.c (sqrt_f32_x_untied):
Ditto.
* gcc.target/aarch64/sve/acle/asm/sqrt_f64.c (sqrt_f64_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/cvtx_f32.c (cvtx_f32_f64_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/logb_f16.c (logb_f16_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/logb_f32.c (logb_f32_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/logb_f64.c (logb_f64_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/qabs_s16.c (qabs_s16_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/qabs_s32.c (qabs_s32_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/qabs_s64.c (qabs_s64_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/qabs_s8.c (qabs_s8_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/qneg_s16.c (qneg_s16_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/qneg_s32.c (qneg_s32_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/qneg_s64.c (qneg_s64_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/qneg_s8.c (qneg_s8_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/recpe_u32.c (recpe_u32_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/rsqrte_u32.c (rsqrte_u32_x_untied):
Ditto.
* gcc.target/aarch64/sve2/acle/asm/cvtlt_f32.c
(cvtlt_f32_f16_x_untied): Expect a MOV instruction.
* gcc.target/aarch64/sve2/acle/asm/cvtlt_f64.c
(cvtlt_f64_f32_x_untied): Likewise.

(cherry picked from commit a4d9837ee4becaec43b77afa84ea2b91ee1b9e5c)

4 years agodse: Cope with bigger-than-integer modes [PR98037]
Richard Sandiford [Wed, 2 Dec 2020 16:20:34 +0000 (16:20 +0000)] 
dse: Cope with bigger-than-integer modes [PR98037]

dse.c:find_shift_sequence tries to represent a store and load
back as a shift right followed by a truncation.  It therefore
needs to find an integer mode in which to do the shift right.
The loop it uses has the form:

  FOR_EACH_MODE_FROM (new_mode_iter,
      smallest_int_mode_for_size (GET_MODE_BITSIZE (read_mode)))

which implicitly assumes that read_mode has an equivalent integer mode.
As shown in the testcase, not all modes have such an integer mode.

This patch just makes the code start from the smallest integer mode and
skip modes that are too small.  The loop already breaks at the first
mode wider than word_mode.

gcc/
PR rtl-optimization/98037
* dse.c (find_shift_sequence): Iterate over all integers and
skip modes that are too small.

gcc/testsuite/
PR rtl-optimization/98037
* gcc.target/aarch64/sve/acle/general/pr98037.c: New test.

(cherry picked from commit f835e9f6562dda9c8a1384be2c9d4e45c112ed8e)

4 years agotree-optimization/96920 - another ICE when vectorizing nested cycles
Richard Biener [Fri, 4 Sep 2020 12:35:39 +0000 (14:35 +0200)] 
tree-optimization/96920 - another ICE when vectorizing nested cycles

This refines the previous fix for PR96698 by re-doing how and where
we arrange for setting vectorized cycle PHI backedge values.

2020-09-04  Richard Biener  <rguenther@suse.de>

PR tree-optimization/96698
PR tree-optimization/96920
* tree-vectorizer.h (loop_vec_info::reduc_latch_defs): Remove.
(loop_vec_info::reduc_latch_slp_defs): Likewise.
* tree-vect-stmts.c (vect_transform_stmt): Remove vectorized
cycle PHI latch code.
* tree-vect-loop.c (maybe_set_vectorized_backedge_value): New
helper to set vectorized cycle PHI latch values.
(vect_transform_loop): Walk over all PHIs again after
vectorizing them, calling maybe_set_vectorized_backedge_value.
Call maybe_set_vectorized_backedge_value for each vectorized
stmt.  Remove delayed update code.
* tree-vect-slp.c (vect_analyze_slp_instance): Initialize
SLP instance reduc_phis member.
(vect_schedule_slp): Set vectorized cycle PHI latch values.

* gfortran.dg/vect/pr96920.f90: New testcase.
* gcc.dg/vect/pr96920.c: Likewise.

(cherry picked from commit 46a58c779af3055a4b10b285a1f4be28abe4351c)

4 years agotree-optimization/96698 - fix ICE when vectorizing nested cycles
Richard Biener [Wed, 26 Aug 2020 13:12:17 +0000 (15:12 +0200)] 
tree-optimization/96698 - fix ICE when vectorizing nested cycles

This fixes vectorized PHI latch edge updating and delay it until
all of the loop is code generated to deal with the case that the
latch def is a PHI in the same block.

2020-08-26  Richard Biener  <rguenther@suse.de>

PR tree-optimization/96698
* tree-vectorizer.h (loop_vec_info::reduc_latch_defs): New.
(loop_vec_info::reduc_latch_slp_defs): Likewise.
* tree-vect-stmts.c (vect_transform_stmt): Only record
stmts to update PHI latches from, perform the update ...
* tree-vect-loop.c (vect_transform_loop): ... here after
vectorizing those PHIs.
(info_for_reduction): Properly handle non-reduction PHIs.

* gcc.dg/vect/pr96698.c: New testcase.

(cherry picked from commit 2130efe6ac7beba72d289e3dd145daa10aeaed54)

4 years agoDaily bump.
GCC Administrator [Wed, 2 Dec 2020 00:17:18 +0000 (00:17 +0000)] 
Daily bump.

4 years agolibstdc++: Apply proposed resolution for LWG 3449 [PR95322]
Patrick Palka [Mon, 12 Oct 2020 17:46:21 +0000 (13:46 -0400)] 
libstdc++: Apply proposed resolution for LWG 3449 [PR95322]

Now that the frontend bug PR96805 is fixed, we can cleanly apply the
proposed resolution for this issue.

This slightly deviates from the proposed resolution by declaring _CI a
member of take_view instead of take_view::_Sentinel, since it doesn't
depend on anything within _Sentinel anymore.

libstdc++-v3/ChangeLog:

PR libstdc++/95322
* include/std/ranges (take_view::_CI): Define this alias
template as per LWG 3449 and remove ...
(take_view::_Sentinel::_CI): ... this type alias.
(take_view::_Sentinel::operator==): Adjust use of _CI
accordingly.  Define a second overload that accepts an iterator
of the opposite constness as per LWG 3449.
(take_while_view::_Sentinel::operator==): Likewise.
* testsuite/std/ranges/adaptors/95322.cc: Add tests for LWG 3449.

(cherry picked from commit e066821b6f6b7332c7a67981f7b33c9ba0ccaee7)

4 years agotree-optimization/97812 - fix range query in VRP assert discovery
Richard Biener [Fri, 13 Nov 2020 10:31:22 +0000 (11:31 +0100)] 
tree-optimization/97812 - fix range query in VRP assert discovery

This makes sure to properly extend the input range before seeing
whether it fits the target.

2020-11-13  Richard Biener  <rguenther@suse.de>

PR tree-optimization/97812
* tree-vrp.c (register_edge_assert_for_2): Extend the range
according to its sign before seeing whether it fits.

* gcc.dg/torture/pr97812.c: New testcase.

(cherry picked from commit dcfd302a79a5e2ea3bb16fc4fc45a5ee31cc0eab)

4 years agotree-optimization/97760 - reduction paths with unhandled live stmt
Richard Biener [Mon, 9 Nov 2020 14:19:56 +0000 (15:19 +0100)] 
tree-optimization/97760 - reduction paths with unhandled live stmt

This makes sure we reject reduction paths with a live stmt that
is not the last one altering the value.  This is because we do not
handle this in the epilogue unless there's a scalar epilogue loop.

2020-11-09  Richard Biener  <rguenther@suse.de>

PR tree-optimization/97760
* tree-vect-loop.c (check_reduction_path): Reject
reduction paths we do not handle in epilogue generation.

* gcc.dg/vect/pr97760.c: New testcase.

(cherry picked from commit 2686de5617bfb572343933be2883e8274c9735b5)

4 years agotree-optimization/97539 - reset out-of-loop debug uses before peeling
Richard Biener [Mon, 26 Oct 2020 09:08:38 +0000 (10:08 +0100)] 
tree-optimization/97539 - reset out-of-loop debug uses before peeling

This makes sure to reset out-of-loop debug uses before vectorizer
loop peeling as we cannot make sure to retain the use-def dominance
relationship when there are no LC SSA nodes.

2020-10-26  Richard Biener  <rguenther@suse.de>

PR tree-optimization/97539
* tree-vect-loop-manip.c (vect_do_peeling): Reset out-of-loop
debug uses before peeling.

* gcc.dg/pr97539.c: New testcase.

(cherry picked from commit 27c14056f4805c9d8cfc655ef2c846be128b02c9)

4 years agomiddle-end/95171 - inlining of trapping compare into non-call EH fn
Richard Biener [Mon, 18 May 2020 06:51:23 +0000 (08:51 +0200)] 
middle-end/95171 - inlining of trapping compare into non-call EH fn

This fixes always-inlining across -fnon-call-exception boundaries
for conditions which we do not allow to throw.

2020-05-18  Richard Biener  <rguenther@suse.de>

PR middle-end/95171
* tree-inline.c (remap_gimple_stmt): Split out trapping compares
when inlining into a non-call EH function.

* gcc.dg/pr95171.c: New testcase.

(cherry picked from commit fe168751c5c1c517c7c89c9a1e4e561d66b24663)

4 years agotestsuite/98002 - fix gcc.dg/strncmp-2.c
Richard Biener [Thu, 26 Nov 2020 09:07:06 +0000 (10:07 +0100)] 
testsuite/98002 - fix gcc.dg/strncmp-2.c

This makes sure not to free() memory we have mprotected to PROT_NONE
by calling mprotect again with PROT_READ|PROT_WRITE.  This avoids
crashing the allocator when in debug mode.

2020-11-16  Richard Biener  <rguenther@suse.de>

PR testsuite/98002
* gcc.dg/strncmp-2.c: Call mprotect again before free.

(cherry picked from commit 5b3a8fad18324cd38c221bdb0ae2b690fc82ede0)

4 years agomiddle-end/97554 - avoid overflow in alloc size compute
Richard Biener [Mon, 26 Oct 2020 09:10:46 +0000 (10:10 +0100)] 
middle-end/97554 - avoid overflow in alloc size compute

This avoids overflow in the allocation size computations in
sbitmap_vector_alloc when the result exceeds 2GB.

2020-10-26  Richard Biener  <rguenther@suse.de>

PR middle-end/97554
* sbitmap.c (sbitmap_vector_alloc): Use size_t for byte
quantities to avoid overflow.

(cherry picked from commit 50f9e1f4d458e36d306b2449c689e45492847f68)

4 years agoDaily bump.
GCC Administrator [Tue, 1 Dec 2020 00:17:13 +0000 (00:17 +0000)] 
Daily bump.

4 years ago[Obvious] arm: Fix test from failing on some targets [PR91816]
Stam Markianos-Wright [Mon, 30 Nov 2020 10:42:18 +0000 (10:42 +0000)] 
[Obvious] arm: Fix test from failing on some targets [PR91816]

This recently submitted test was found to fail on some Cortex-M
targets. This was because codegen on these CPUs would emit a ldr
instead of a movw/movt pair, resulting in an overall smaller test
(i.e. the branch wasn't as far) and the behaviour being tested
for not being triggered.

This commit doubles the size of the test to account for this.

gcc/testsuite/ChangeLog:

* gcc.target/arm/pr91816.c: Update test.

4 years agoDaily bump.
GCC Administrator [Mon, 30 Nov 2020 00:17:04 +0000 (00:17 +0000)] 
Daily bump.

4 years agotestsuite/i386: Fix XOP and FMA4 checking functions [PR98036].
Uros Bizjak [Sun, 29 Nov 2020 21:22:02 +0000 (22:22 +0100)] 
testsuite/i386: Fix XOP and FMA4 checking functions [PR98036].

Add missing returns and remove unnecessary postfix increments.

2020-11-27  Uroš Bizjak  <ubizjak@gmail.com>

PR testsuite/98036

gcc/testsuite/
* gcc.target/i386/fma4-256-maccXX.c (check_maccps):
Remove unnecessary postfix increment on a returned variable.
(check_maccpd): Ditto.
* gcc.target/i386/fma4-256-msubXX.c (check_msubps): Ditto.
(check_msubpd): Ditto.
* gcc.target/i386/fma4-256-nmaccXX.c (check_nmaccps): Ditto.
(check_nmaccpd): Ditto.
* gcc.target/i386/fma4-256-nmsubXX.c (check_nmsubps): Ditto.
(check_nmsubpd): Ditto.
* gcc.target/i386/fma4-maccXX.c (check_maccps): Ditto.
(check_maccpd): Ditto.
(check_maccss): Ditto.
(check_maccsd): Ditto.
* gcc.target/i386/fma4-msubXX.c (check_msubps): Ditto.
(check_msubpd): Ditto.
(check_msubss): Ditto.
(check_msubsd): Ditto.
* gcc.target/i386/fma4-nmaccXX.c (check_nmaccps): Ditto.
(check_nmaccpd): Ditto.
(check_nmaccss): Ditto.
(check_nmaccsd): Ditto.
* gcc.target/i386/fma4-nmsubXX.c (check_nmsubps): Ditto.
(check_nmsubpd): Ditto.
(check_nmsubss): Ditto.
(check_nmsubsd): Ditto.
* gcc.target/i386/xop-haddX.c (check_sbyte2word): Add missing return.
(check_sbyte2dword):
Remove unnecessary postfix increment on a returned value.
(check_sbyte2qword): Ditto.
(check_sword2dword): Add missing return.
(check_sword2qword):
Remove unnecessary postfix increment on a returned value.
(check_dword2qword): Add missing return.
* gcc.target/i386/xop-hadduX.c (check_byte2word): Add missing return.
(check_byte2dword):
Remove unnecessary postfix increment on a returned value.
(check_byte2qword): Ditto.
(check_word2dword): Add missing return.
(check_word2qword):
Remove unnecessary postfix increment on a returned value.
(check_word2qword): Add missing return.
* gcc.target/i386/xop-hsubX.c (check_sbyte2word): Add missing return.
(check_sword2dword): Ditto.
(check_sword2qword): Ditto.

4 years agoDaily bump.
GCC Administrator [Sun, 29 Nov 2020 00:16:59 +0000 (00:16 +0000)] 
Daily bump.

4 years agoFix PR target/97939
Eric Botcazou [Sat, 28 Nov 2020 11:54:48 +0000 (12:54 +0100)] 
Fix PR target/97939

The little dance around 4096 that add/sub instructions do on the SPARC
needs to be taken into account for the overflow arithmetic operations.
It cannot be done for unsigned overflow, but it can be done for signed
overflow.

gcc/ChangeLog:
PR target/97939
* config/sparc/predicates.md (arith_double_add_operand): Comment.
* config/sparc/sparc.md (uaddvdi4): Use arith_double_operand.
(addvdi4): Use arith_double_add_operand.
(addsi3): Remove useless attributes.
(addvsi4): Use arith_add_operand.
(*cmp_ccv_plus): Likewise and add second alternative accordingly.
(*cmp_ccxv_plus): Likewise.
(*cmp_ccv_plus_set): Likewise.
(*cmp_ccxv_plus_set): Likewise.
(*cmp_ccv_plus_sltu_set): Likewise.
(usubvdi4): Use arith_double_operand.
(subvdi4): Use arith_double_add_operand.
(subsi3): Remove useless attributes.
(subvsi4): Use arith_add_operand.
(*cmp_ccv_minus): Likewise and add second alternative accordingly.
(*cmp_ccxv_minus): Likewise.
(*cmp_ccv_minus_set): Likewise.
(*cmp_ccxv_minus_set): Likewise.
(*cmp_ccv_minus_sltu_set): Likewise.
(negsi2): Use register_operand.
(unegvsi3): Likewise.
(negvsi3) Likewise.
(*cmp_ccnz_neg): Likewise.
(*cmp_ccxnz_neg): Likewise.
(*cmp_ccnz_neg_set): Likewise.
(*cmp_ccxnz_neg_set): Likewise.
(*cmp_ccc_neg_set): Likewise.
(*cmp_ccxc_neg_set): Likewise.
(*cmp_ccc_neg_sltu_set): Likewise.
(*cmp_ccv_neg): Likewise.
(*cmp_ccxv_neg): Likewise.
(*cmp_ccv_neg_set): Likewise.
(*cmp_ccxv_neg_set): Likewise.
(*cmp_ccv_neg_sltu_set): Likewise.

gcc/testsuite/ChangeLog:
* gcc.target/sparc/overflow-6.c: New test.

4 years agoFix PR target/96607
Eric Botcazou [Thu, 26 Nov 2020 15:38:35 +0000 (16:38 +0100)] 
Fix PR target/96607

After 15 years trying to find out what can go into the delay slot of
the call to __tls_get_addr with the Solaris linker, it's now time to
concede defeat and consider it as not to be filled.

gcc/ChangeLog:
PR target/96607
* config/sparc/sparc-protos.h (eligible_for_call_delay): Delete.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
* config/sparc/sparc.md (in_call_delay): Likewise.
(tls_delay_slot): New attribute.
(define_delay [call]): Use in_branch_delay.
(tgd_call<P:mode>): Set type to call_no_delay_slot when
tls_delay_slot is false.
(tldm_call<P:mode>): Likewise.

4 years agoDaily bump.
GCC Administrator [Sat, 28 Nov 2020 00:17:15 +0000 (00:17 +0000)] 
Daily bump.

4 years agoaarch64: Introduce --param=aarch64-autovec-preference to select autovec preference...
Kyrylo Tkachov [Fri, 27 Nov 2020 09:19:33 +0000 (09:19 +0000)] 
aarch64: Introduce --param=aarch64-autovec-preference to select autovec preference in backend

This is a patch that introduces the aarch64-autovec-preference that can
take values from 0 - 4, 0 being the default.
It can be used to override the autovectorisation preferences in the
backend:
0 - use default scheme
1 - only use Advanced SIMD
2 - only use SVE
3 - use Advanced SIMD and SVE, prefer Advanced SIMD in the event of a
tie (as determined by costs)
4 - use Advanced SIMD and SVE, prefer SVE in the event of a tie (as
determined by costs)

It can valuable for experimentation when comparing SVE and Advanced SIMD
autovectorisation strategies.

It achieves this adjusting the order of the interleaved SVE and Advanced
SIMD modes in aarch64_autovectorize_vector_modes.
It also adjusts aarch64_preferred_simd_mode to use the new comparison
function to pick Advanced SIMD or SVE to start with.

Bootstrapped and tested on aarch64-none-linux-gnu.

gcc/
* config/aarch64/aarch64.opt
(-param=aarch64-autovec-preference): Define.
* config/aarch64/aarch64.c (aarch64_override_options_internal):
Set aarch64_sve_compare_costs to 0 when preferring only Advanced
SIMD.
(aarch64_cmp_autovec_modes): Define.
(aarch64_preferred_simd_mode): Adjust to use the above.
(aarch64_autovectorize_vector_modes): Likewise.
* doc/invoke.texi: Document aarch64-autovec-preference param.

(cherry picked from commit 5f29f3d5dd94c3f8eef10492a657a0719d4b3318)

4 years agoDaily bump.
GCC Administrator [Fri, 27 Nov 2020 00:17:07 +0000 (00:17 +0000)] 
Daily bump.

4 years agolibstdc++: Fix undefined FILE* operations in test
Jonathan Wakely [Thu, 26 Nov 2020 11:25:55 +0000 (11:25 +0000)] 
libstdc++: Fix undefined FILE* operations in test

We only need to check that the constructor doesn't clear errno, so
there's no need to use an invalid FILE* for that.

libstdc++-v3/ChangeLog:

PR libstdc++/98001
* testsuite/ext/stdio_filebuf/char/79820.cc: Do not pass invalid
FILE* to constructor.

(cherry picked from commit 2762cb1df686fc1ebcee23c7c4f0f6e8bf5a6abc)

4 years agoDon't create location wrapper nodes within OpenACC clauses
Thomas Schwinge [Wed, 25 Nov 2020 19:36:55 +0000 (20:36 +0100)] 
Don't create location wrapper nodes within OpenACC clauses

This fixes a GCC 11, 10, 9 regression introduced by commit
dfd7fdca2ac17d8b823a16700525824ca312ade0 (Subversion r267272) "C++: more
location wrapper nodes (PR c++/43064, PR c++/43486)".  But: this isn't
intending to blame David, because back then, the problem hasn't been visible in
the testsuite (or else I'm sure would've been addressed right away) because of
our all dear friend: missing testsuite coverage.  Thus, for GCC 8, I'm likewise
enhancing the testsuite, without the C++ front end code changes.

I actually had presumed that there may be an issue for OpenACC:
<http://mid.mail-archive.com/874lb9qr2u.fsf@euler.schwinge.homeip.net>, so here
we are, two years (and many "wasted" hours...) later...

gcc/cp/
* parser.c (cp_parser_omp_var_list_no_open): Assert that array
section's 'low_bound', 'length' are not location wrapper nodes.
(cp_parser_oacc_all_clauses, cp_parser_oacc_cache): Instantiate
'auto_suppress_location_wrappers'.
gcc/testsuite/
* c-c++-common/goacc/cache-3-1.c: New.
* c-c++-common/goacc/cache-3-2.c: Likewise.
* c-c++-common/goacc/data-clause-1.c: Likewise.
* c-c++-common/goacc/data-clause-2.c: Likewise.
* c-c++-common/gomp/map-1.c: Adjust.
* c-c++-common/gomp/map-2.c: Likewise.
* g++.dg/goacc/cache-3-1.C: New.
* g++.dg/goacc/cache-3-2.C: Likewise.
* g++.dg/goacc/data-clause-1.C: Likewise.
* g++.dg/goacc/data-clause-2.C: Likewise.
* g++.dg/gomp/map-1.C: Adjust.
* g++.dg/gomp/map-2.C: Likewise.

Reported-by: Sandra Loosemore <sandra@codesourcery.com>
(cherry picked from commit c0c7270cc4efd896fe99f8ad5409dbef089a407f)

4 years agoDaily bump.
GCC Administrator [Thu, 26 Nov 2020 00:17:20 +0000 (00:17 +0000)] 
Daily bump.

4 years agoPR fortran/85796 - Floating point exception with implied do
Harald Anlauf [Wed, 25 Nov 2020 19:20:44 +0000 (20:20 +0100)] 
PR fortran/85796 - Floating point exception with implied do

Catch invalid step=0 in implied do loop within data statements.

gcc/fortran/ChangeLog:

PR fortran/85796
* resolve.c (traverse_data_list): Fix copy&paste errors; catch
step=0 in implied do loop.

gcc/testsuite/ChangeLog:

PR fortran/85796
* gfortran.dg/pr85796.f90: New test.

(cherry picked from commit 94172dc7091a2c6b2d2f99857de77c607fac3935)

4 years agoAdd 'g++.dg/gomp/map-{1,2}.C'
Thomas Schwinge [Wed, 25 Nov 2020 10:41:45 +0000 (11:41 +0100)] 
Add 'g++.dg/gomp/map-{1,2}.C'

gcc/testsuite/
* g++.dg/gomp/map-1.C: New.
* g++.dg/gomp/map-2.C: Likewise.
* c-c++-common/gomp/map-1.c: Adjust.
* c-c++-common/gomp/map-2.c: Likewise.

(cherry picked from commit 1049e5408fa343b5bf0a6380212a8ec8dfe2b6fc)

4 years agoFix templatized C++ OpenACC 'cache' directive ICEs
Thomas Schwinge [Wed, 25 Nov 2020 12:03:52 +0000 (13:03 +0100)] 
Fix templatized C++ OpenACC 'cache' directive ICEs

This has been broken forever, whoops...

gcc/cp/
* pt.c (tsubst_omp_clauses): Handle 'OMP_CLAUSE__CACHE_'.
(tsubst_expr): Handle 'OACC_CACHE'.
gcc/testsuite/
* c-c++-common/goacc/cache-1.c: Update.
* c-c++-common/goacc/cache-2.c: Likewise.
* g++.dg/goacc/cache-1.C: New.
* g++.dg/goacc/cache-2.C: Likewise.
libgomp/
* testsuite/libgomp.oacc-c++/cache-1.C: New.
* testsuite/libgomp.oacc-c-c++-common/cache-1.c: Update.

(cherry picked from commit 0cab70604cfda30bc64351b39493ef884ff7ba10)

4 years agolibstdc++: Fix missing subsumption in std::iterator_traits [PR 97935]
Jonathan Wakely [Wed, 25 Nov 2020 17:18:44 +0000 (17:18 +0000)] 
libstdc++: Fix missing subsumption in std::iterator_traits [PR 97935]

libstdc++-v3/ChangeLog:

PR libstdc++/97935
* include/bits/iterator_concepts.h (__detail::__iter_without_category):
New helper concept.
(__iterator_traits::__cat): Use __detail::__iter_without_category.
* testsuite/24_iterators/associated_types/iterator.traits.cc: New test.

(cherry picked from commit 9d908b7fc475b351622fa5630d4874068c789d70)

4 years agolibstdc++: Remove workarounds for constrained nested class templates
Jonathan Wakely [Thu, 4 Jun 2020 22:20:49 +0000 (23:20 +0100)] 
libstdc++: Remove workarounds for constrained nested class templates

With PR c++/92078 and PR c++/92103 both fixed, nested class templates
can now be constrained. That means a number of namespace-scope helpers
can be moved to the class scope, so they're only visible where they're
needed.

* include/bits/iterator_concepts.h (__detail::__ptr, __detail::__ref)
(__detail::__cat, __detail::__diff): Move to class scope in the
relevant __iterator_traits specializations.
(__iterator_traits<>): Use nested class templates instead of ones from
namespace __detail.
* include/bits/stl_iterator.h (__detail::__common_iter_ptr): Move to
class scope in iterator_traits<common_iterator<I, S>>.
(iterator_traits<common_iterator<I, S>>): Use nested class template
instead of __detail::__common_iter_ptr.

(cherry picked from commit f2242ec0d3f1bb13c78ef3c21e0354d84fe57222)

4 years ago arm: Add test that was missing from old commit [PR91816]
Stam Markianos-Wright [Wed, 25 Nov 2020 13:11:09 +0000 (13:11 +0000)] 
arm: Add test that was missing from old commit [PR91816]

    A while back I submitted GCC10 commit:

     44f77a6dea2f312ee1743f3dde465c1b8453ee13

    for PR91816.

    Turns out I was an idiot and forgot to include the test in the actual git commit.

    Tested that the test still passes on a cross arm-none-eabi and also in a
    Cortex A-15 bootstrap with no regressions.

gcc/testsuite/ChangeLog:

2020-11-25  Stam Markianos-Wright  <stam.markianos-wright@arm.com>

PR target/91816
* gcc.target/arm/pr91816.c: New test.

4 years agoopenmp: Fix C ICE on OpenMP atomics
Jakub Jelinek [Tue, 24 Nov 2020 08:04:28 +0000 (09:04 +0100)] 
openmp: Fix C ICE on OpenMP atomics

c_parser_binary_expression was using build2 to create a temporary holder
for binary expression that c_parser_atomic and c_finish_omp_atomic can then
handle.  The latter performs then all the needed checking.

Unfortunately, build2 performs some checking too, e.g. PLUS_EXPR vs.
POINTER_PLUS_EXPR or matching types of the arguments, nothing we can guarantee
at the parsing time.  So we need something like C++ build_min_nt*.  This
patch implements that inline.

2020-11-24  Jakub Jelinek  <jakub@redhat.com>

PR c/97958
* c-parser.c (c_parser_binary_expression): For omp atomic binary
expressions, use make_node instead of build2 to avoid checking build2
performs.

* c-c++-common/gomp/pr97958.c: New test.

(cherry picked from commit 2aaf44a90283156ec0e70ad4d9030f3ba5054c6f)

4 years agoarm: Fix up neon_vector_mem_operand [PR97528]
Jakub Jelinek [Fri, 20 Nov 2020 11:26:58 +0000 (12:26 +0100)] 
arm: Fix up neon_vector_mem_operand [PR97528]

The documentation for POST_MODIFY says:
   Currently, the compiler can only handle second operands of the
   form (plus (reg) (reg)) and (plus (reg) (const_int)), where
   the first operand of the PLUS has to be the same register as
   the first operand of the *_MODIFY.
The following testcase ICEs, because combine just attempts to simplify
things and ends up with
(post_modify (reg1) (plus (mult (reg2) (const_int 4)) (reg1))
but the target predicates accept it, because they only verify
that POST_MODIFY's second operand is PLUS and the second operand
of the PLUS is a REG.

The following patch fixes this by performing further verification that
the POST_MODIFY is in the form it should be.

2020-11-20  Jakub Jelinek  <jakub@redhat.com>

PR target/97528
* config/arm/arm.c (neon_vector_mem_operand): For POST_MODIFY, require
first POST_MODIFY operand is a REG and is equal to the first operand
of PLUS.

* gcc.target/arm/pr97528.c: New test.

(cherry picked from commit 410b8f6f41920dad200cd709f9f3de8b840a995c)

4 years agodwarf2: Emit DW_TAG_unspecified_parameters even in late DWARF [PR97599]
Jakub Jelinek [Sat, 14 Nov 2020 08:14:19 +0000 (09:14 +0100)] 
dwarf2: Emit DW_TAG_unspecified_parameters even in late DWARF [PR97599]

Aldy's PR71855 fix avoided emitting multiple redundant
DW_TAG_unspecified_parameters sub-DIEs of a single DIE by restricting
it to early dwarf only.  That unfortunately means if we need to emit
another DIE for the function (whether it is for LTO, or e.g. because of
IPA cloning), we don't emit DW_TAG_unspecified_parameters, it remains
solely in the DW_AT_abstract_origin's referenced DIE.
But DWARF consumers don't really use DW_TAG_unspecified_parameters
from there, like we duplicate DW_TAG_formal_parameter sub-DIEs even in the
clones because either they have some more specific location, or e.g.
a function clone could have fewer or different argument types etc.,
they need to assume that originally stdarg function isn't later stdarg etc.
Unfortunately, while for DW_TAG_formal_parameter sub-DIEs, we can use the
hash tabs to look the PARM_DECLs if we already have the DIEs, for
DW_TAG_unspecified_parameters we don't have an easy way to look it up.

The following patch handles it by trying to figure out if we are creating a
fresh new DIE (in that case we add DW_TAG_unspecified_parameters if it is
stdarg), or if gen_subprogram_die is called again on an pre-existing DIE
to fill in some further details (then it will not touch it).

Except for lto, subr_die != old_die would be good enough, but unfortunately
for LTO the new DIE that will refer to early dwarf created DIE is created
on the fly during lookup_decl_die.  So the patch tracks if the DIE has
no children before any children are added to it.

2020-11-14  Jakub Jelinek  <jakub@redhat.com>

PR debug/97599
* dwarf2out.c (gen_subprogram_die): Call
gen_unspecified_parameters_die even if not early dwarf, but only
if subr_die is a newly created DIE.

(cherry picked from commit 2873c8af66e1248734bb638a49e6bc53f5e45382)

4 years agoDaily bump.
GCC Administrator [Wed, 25 Nov 2020 09:34:38 +0000 (09:34 +0000)] 
Daily bump.

4 years agoAdd .clang-tidy to git ignored.
Martin Liska [Fri, 12 Jun 2020 14:02:18 +0000 (16:02 +0200)] 
Add .clang-tidy to git ignored.

Installed as obvious.

ChangeLog:

* .gitignore: Add .clang-tidy.

4 years agochangelog: fix parsing of a revert commit
Martin Liska [Wed, 25 Nov 2020 06:56:57 +0000 (07:56 +0100)] 
changelog: fix parsing of a revert commit

contrib/ChangeLog:

* gcc-changelog/git_commit.py: Use revert_regex instead
of string prefix.  Convert sets to literals.

4 years agolibstdc++: Change test to work without 64-bit atomics
Jonathan Wakely [Fri, 2 Oct 2020 21:14:06 +0000 (22:14 +0100)] 
libstdc++: Change test to work without 64-bit atomics

This fixes a linker error for older ARM cores without 64-bit atomics.

libstdc++-v3/ChangeLog:

* testsuite/29_atomics/atomic_float/value_init.cc: Use float
instead of double so that __atomic_load_8 isn't needed.

(cherry picked from commit 324118378e4e26d9c0f86734af26538491c5c5fc)

4 years agodwarf2: ICE with local class in unused function [PR97918]
Jason Merrill [Fri, 20 Nov 2020 20:20:45 +0000 (15:20 -0500)] 
dwarf2: ICE with local class in unused function [PR97918]

Here, since we only mention bar<B>, we never emit debug information for it.
But we do emit debug information for H<J>::h, so we need to refer to the
debug info for bar<B>::J even though there is no bar<B>.  We deal with this
sort of thing in dwarf2out with the limbo_die_list; parentless dies like J
get attached to the CU at EOF.  But here, we were flushing the limbo list,
then generating the template argument DIE for H<J> that refers to J, which
adds J to the limbo list, too late to be flushed.  So let's flush a little
later.

gcc/ChangeLog:

PR c++/97918
* dwarf2out.c (dwarf2out_early_finish): flush_limbo_die_list
after gen_scheduled_generic_parms_dies.

gcc/testsuite/ChangeLog:

PR c++/97918
* g++.dg/debug/localclass2.C: New test.

4 years agodwarf2: Set DW_AT_declaration for undefined fns [PR97060]
Jason Merrill [Tue, 10 Nov 2020 23:02:04 +0000 (18:02 -0500)] 
dwarf2: Set DW_AT_declaration for undefined fns [PR97060]

If DECL_INITIAL isn't set, we can't emit anything about the body of the
function, so add the declaration attribute.

gcc/ChangeLog:

PR debug/97060
* dwarf2out.c (gen_subprogram_die): It's a declaration
if DECL_INITIAL isn't set.

gcc/testsuite/ChangeLog:

PR debug/97060
* gcc.dg/debug/dwarf2/pr97060.c: New test.

4 years agoc++: Fix member alias template in C++17 and up. [PR96805]
Jason Merrill [Thu, 8 Oct 2020 19:43:26 +0000 (15:43 -0400)] 
c++: Fix member alias template in C++17 and up. [PR96805]

Here we're trying to push into a<T>::c<N> in order to instantiate t<N>, but
were building a TYPENAME_TYPE for it because a<T> isn't open yet.  Don't
do that when we know we're trying to enter the scope.

gcc/cp/ChangeLog:

PR c++/96805
PR c++/96199
* pt.c (tsubst_aggr_type): Don't build a TYPENAME_TYPE when
entering_scope.
(tsubst_template_decl): Use tsubst_aggr_type.

gcc/testsuite/ChangeLog:

PR c++/96805
* g++.dg/cpp0x/alias-decl-pr96805.C: New test.

4 years agoarm: correctly handle negating INT_MIN in arm_split_atomic_op [PR97534]
Richard Earnshaw [Tue, 24 Nov 2020 16:21:17 +0000 (16:21 +0000)] 
arm: correctly handle negating INT_MIN in arm_split_atomic_op [PR97534]

arm_split_atomic_op handles subtracting a constant by converting it
into addition of the negated constant.  But if the type of the operand
is int and the constant is -1 we currently end up generating invalid
RTL which can lead to an abort later on.

The problem is that in a HOST_WIDE_INT, INT_MIN is represented as
0xffffffff80000000 and the negation of this is 0x0000000080000000, but
that's not a valid constant for use in SImode operations.

The fix is straight-forward which is to use gen_int_mode rather than
simply GEN_INT.  This knows how to correctly sign-extend the negated
constant when this is needed.

gcc/
PR target/97534
* config/arm/arm.c (arm_split_atomic_op): Use gen_int_mode when
negating a const_int.
gcc/testsuite
* gcc.dg/pr97534.c: New test.

4 years agoMore explicit checking of which OMP constructs we're expecting, part II
Thomas Schwinge [Fri, 20 Nov 2020 09:41:46 +0000 (10:41 +0100)] 
More explicit checking of which OMP constructs we're expecting, part II

In particular, more precisely highlight what applies generally vs. the special
handling for the current 'parloops'-based OpenACC 'kernels' implementation.

gcc/
* omp-expand.c (expand_oacc_for): More explicit checking of which
OMP constructs we're expecting.

(cherry picked from commit 8c3aa359ce33732273bbd61c5f9a2c607779b32e)

4 years ago[testsuite] Emit 'warning' instead of 'error' diagnostics for 'dg-optimized', 'dg...
Thomas Schwinge [Fri, 6 Nov 2020 08:51:16 +0000 (09:51 +0100)] 
[testsuite] Emit 'warning' instead of 'error' diagnostics for 'dg-optimized', 'dg-missed'

The diagnostics produced by 'dg-optimized', 'dg-missed' aren't error
diagnostics (fatal, meaning: causes compilation to fail) but rather warning
diagnostics (non-fatal, doesn't cause compilation to fail).  Thus, same as
'dg-message', these should use 'saved-dg-warning' instead of 'saved-dg-error',
which then prints: "(test for *warnings*, line [...]) instead of currently:
"(test for *errors*, line [...])".

This is a small bug-fix for commit ed2d9d3720adef3a260b8a55e17e744352a901fc
"dumpfile.c: use prefixes other than 'note: ' for
MSG_{OPTIMIZED_LOCATIONS|MISSED_OPTIMIZATION}", which added 'dg-optimized',
'dg-missed'.

gcc/testsuite/
* lib/gcc-dg.exp (dg-optimized, dg-missed): Use 'saved-dg-warning'
instead of 'saved-dg-error'.

(cherry picked from commit 54f72078fc05b865601645edafbc6b21701ea546)

4 years ago[testsuite] Enable column location checking for 'dg-optimized', 'dg-missed'
Thomas Schwinge [Fri, 6 Nov 2020 08:18:06 +0000 (09:18 +0100)] 
[testsuite] Enable column location checking for 'dg-optimized', 'dg-missed'

'process-message' would like the 'msgprefix' argument without trailing space.

This is a small bug-fix for commit ed2d9d3720adef3a260b8a55e17e744352a901fc
"dumpfile.c: use prefixes other than 'note: ' for
MSG_{OPTIMIZED_LOCATIONS|MISSED_OPTIMIZATION}", which added 'dg-optimized',
'dg-missed'.

gcc/testsuite/
* lib/gcc-dg.exp (dg-optimized, dg-missed): Fix 'process-message'
call.
* gcc.dg/vect/nodump-vect-opt-info-1.c: Demonstrate.
* gcc.dg/vect/nodump-vect-opt-info-2.c: Likewise.

(cherry picked from commit 24b553d0f73ffea2551a77c67859ad6fe44110a6)

4 years agoDaily bump.
GCC Administrator [Tue, 24 Nov 2020 00:17:20 +0000 (00:17 +0000)] 
Daily bump.

4 years agoDocument bootstrap-asan configure option
Matthew Malcomson [Fri, 20 Nov 2020 18:03:59 +0000 (18:03 +0000)] 
Document bootstrap-asan configure option

Document how to configure using asan (bootstrap-asan option to the
--with-build-config configure argument).

gcc/ChangeLog:

* doc/install.texi: Document bootstrap-asan option.

4 years agoDaily bump.
GCC Administrator [Mon, 23 Nov 2020 00:16:58 +0000 (00:16 +0000)] 
Daily bump.

4 years agod: Fix OutOfMemoryError thrown when appending to an array with a side effect
Iain Buclaw [Sun, 22 Nov 2020 13:29:54 +0000 (14:29 +0100)] 
d: Fix OutOfMemoryError thrown when appending to an array with a side effect

When appending a character to an array, the result of that concat
assignment was not the new value of the array, similarly, when appending
an array to another array, side effects were evaluated in reverse to the
expected order of evaluation.

As of this change, the address of the left-hand side expression is
saved and re-used as the result.  Its evaluation is now also forced to
occur before the concat operation itself is called.

gcc/d/ChangeLog:

PR d/97889
* expr.cc (ExprVisitor::visit (CatAssignExp *)): Enforce LTR order of
evaluation on left and right hand side expressions.

gcc/testsuite/ChangeLog:

PR d/97889
* gdc.dg/pr97889.d: New test.

(cherry picked from commit 23045f8b062e20672f5170fc66532de7a5d9a1d6)

4 years agoDaily bump.
GCC Administrator [Sun, 22 Nov 2020 00:17:00 +0000 (00:17 +0000)] 
Daily bump.

4 years agoDaily bump.
GCC Administrator [Sat, 21 Nov 2020 00:17:06 +0000 (00:17 +0000)] 
Daily bump.

4 years agoPR target/97727 aarch64: [testcase] fix bf16_vstN_lane_2.c for big endian targets
Andrea Corallo [Mon, 9 Nov 2020 15:59:14 +0000 (16:59 +0100)] 
PR target/97727 aarch64: [testcase] fix bf16_vstN_lane_2.c for big endian targets

gcc/testsuite/ChangeLog

2020-11-09  Andrea Corallo  <andrea.corallo@arm.com>

PR target/97727
* gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_2.c: Relax
regexps.

4 years agolibstdc++: Remove <memory_resource> dependency from <regex> [PR 92546]
Jonathan Wakely [Fri, 20 Nov 2020 11:30:33 +0000 (11:30 +0000)] 
libstdc++: Remove <memory_resource> dependency from <regex> [PR 92546]

Unlike the other headers that declare alias templates in namespace pmr,
<regex> includes <memory_resource>. That was done because the
pmr::string::const_iterator typedef requires pmr::string to be complete,
which requires pmr::polymorphic_allocator<char> to be complete.

By using __normal_iterator<const char*, pmr::string> instead of the
const_iterator typedef we can avoid the completeness requirement.

This makes <regex> smaller, by not requiring <memory_resource> and its
<shared_mutex> dependency, which depends on <chrono>.  Backporting this
will also help with PR 97876, where <stop_token> ends up being needed by
<regex> via <memory_resource>.

libstdc++-v3/ChangeLog:

PR libstdc++/92546
* include/std/regex (pmr::smatch, pmr::wsmatch): Declare using
underlying __normal_iterator type, not nested typedef
basic_string::const_iterator.

(cherry picked from commit 640ebeb336050887cb57417b7568279c588088f0)

4 years agolibstdc++: Fix compilation error with clang-8 [PR 97876]
Jonathan Wakely [Thu, 19 Nov 2020 22:32:54 +0000 (22:32 +0000)] 
libstdc++: Fix compilation error with clang-8 [PR 97876]

This fixes a compilation error with clang-8 and earlier. This change is
only on the gcc-10 branch, not master, because the <stop_token> header
is included indirectly in more places on the branch than on master.

PR libstdc++/97876
* include/std/stop_token (_Stop_state_t): Define default
constructor as user-provided not defaulted.

4 years agolibstdc++: Avoid calling undefined __gthread_self weak symbol [PR 95989]
Jonathan Wakely [Thu, 19 Nov 2020 21:07:06 +0000 (21:07 +0000)] 
libstdc++: Avoid calling undefined __gthread_self weak symbol [PR 95989]

Since glibc 2.27 the pthread_self symbol has been defined in libc rather
than libpthread. Because we only call pthread_self through a weak alias
it's possible for statically linked executables to end up without a
definition of pthread_self. This crashes when trying to call an
undefined weak symbol.

We can use the __GLIBC_PREREQ version check to detect the version of
glibc where pthread_self is no longer in libpthread, and call it
directly rather than through the weak reference.

It would be better to check for pthread_self in libc during configure
instead of hardcoding the __GLIBC_PREREQ check. That would be
complicated by the fact that prior to glibc 2.27 libc.a didn't have the
pthread_self symbol, but libc.so.6 did.  The configure checks would need
to try to link both statically and dynamically, and the result would
depend on whether the static libc.a happens to be installed during
configure (which could vary between different systems using the same
version of glibc). Doing it properly is left for a future date, as that
will be needed anyway after glibc moves all pthread symbols from
libpthread to libc. When that happens we should revisit the whole
approach of using weak symbols for pthread symbols.

For the purposes of std::this_thread::get_id() we call
pthread_self() directly when using glibc 2.27 or later. Otherwise, if
__gthread_active_p() is true then we know the libpthread symbol is
available so we call that. Otherwise, we are single-threaded and just
use ((__gthread_t)1) as the thread ID.

An undesirable consequence of this change is that code compiled prior to
the change might inline the old definition of this_thread::get_id()
which always returns (__gthread_t)1 in a program that isn't linked to
libpthread. Code compiled after the change will use pthread_self() and
so get a real TID. That could result in the main thread having different
thread::id values in different translation units. This seems acceptable,
as there are not expected to be many uses of thread::id in programs
that aren't linked to libpthread.

An earlier version of this patch also changed __gthread_self() to use
__GLIBC_PREREQ(2, 27) and only use the weak symbol for older glibc. Tha
might still make sense to do, but isn't needed by libstdc++ now.

libstdc++-v3/ChangeLog:

PR libstdc++/95989
* config/os/gnu-linux/os_defines.h (_GLIBCXX_NATIVE_THREAD_ID):
Define new macro to get reliable thread ID.
* include/std/stop_token (_Stop_state_t::_M_request_stop):
Use new macro if it's defined.
(_Stop_state_t::_M_remove_callback): Likewise.
* include/std/thread (this_thread::get_id): Likewise.
* testsuite/30_threads/jthread/95989.cc: New test.
* testsuite/30_threads/this_thread/95989.cc: New test.

(cherry picked from commit 08b4d325711d5c6f68ac29443aba3fd7aa173ac8)

4 years agoDaily bump.
GCC Administrator [Fri, 20 Nov 2020 00:17:13 +0000 (00:17 +0000)] 
Daily bump.

4 years agoaarch64: Fix SVE2 BCAX pattern [PR97730]
Alex Coplan [Thu, 12 Nov 2020 10:03:21 +0000 (10:03 +0000)] 
aarch64: Fix SVE2 BCAX pattern [PR97730]

This patch adds a missing not to the SVE2 BCAX (Bitwise clear and
exclusive or) pattern, fixing the PR. Since SVE doesn't have an
unpredicated not instruction, we need to use a (vacuously) predicated
not here.

To ensure that the predicate is instantiated correctly (to all 1s) for
the intrinsics, we pull out a separate expander from the define_insn.

From the ISA reference [1]:
> Bitwise AND elements of the second source vector with the
> corresponding inverted elements of the third source vector, then
> exclusive OR the results with corresponding elements of the first
> source vector.

[1] : https://developer.arm.com/docs/ddi0602/g/a64-sve-instructions-alphabetic-order/bcax-bitwise-clear-and-exclusive-or

gcc/ChangeLog:

PR target/97730
* config/aarch64/aarch64-sve2.md (@aarch64_sve2_bcax<mode>):
Change to define_expand, add missing (trivially-predicated) not
rtx to fix wrong code bug.
(*aarch64_sve2_bcax<mode>): New.

gcc/testsuite/ChangeLog:

PR target/97730
* gcc.target/aarch64/sve2/bcax_1.c (OP): Add missing bitwise not
to match correct bcax semantics.
* gcc.dg/vect/pr97730.c: New test.

(cherry picked from commit 7f445b5d6116000f1a6527f2164836cbc7c01dee)

4 years agoi386: Disable *<absneg:code><mode>2_i387_1 for TARGET_SSE_MATH modes
Uros Bizjak [Thu, 19 Nov 2020 08:26:01 +0000 (09:26 +0100)] 
i386: Disable *<absneg:code><mode>2_i387_1 for TARGET_SSE_MATH modes

This pattern interferes with *<absneg:code><mode>2_1 when TARGET_SSE_MATH
modes are active. Combine pass is able to remove (use) RTXes and transforms
*<absneg:code><mode>2_1 to *<absneg:code><mode>2_i387_1 where SSE
alternatives are not available.

2020-11-19  Uroš Bizjak  <ubizjak@gmail.com>

gcc/
PR target/97887
* config/i386/i386.md (*<absneg:code><mode>2_i387_1):
Disable for TARGET_SSE_MATH modes.

gcc/testsuite/
PR target/97887
* gcc.target/i386/pr97887.c: New test.

4 years agoDaily bump.
GCC Administrator [Thu, 19 Nov 2020 00:17:09 +0000 (00:17 +0000)] 
Daily bump.

4 years agoUpdate gcc zh_TW.po.
Joseph Myers [Wed, 18 Nov 2020 19:15:54 +0000 (19:15 +0000)] 
Update gcc zh_TW.po.

* zh_TW.po: Update.

4 years agolibstdc++: Fix ranges::join_view::_Iterator::operator-> [LWG 3500]
Patrick Palka [Wed, 18 Nov 2020 15:23:57 +0000 (10:23 -0500)] 
libstdc++: Fix ranges::join_view::_Iterator::operator-> [LWG 3500]

This applies the proposed resolution of LWG 3500, which corrects the
return type and constraints of this member function to use the right
iterator type.  Additionally, a nearby local variable is uglified.

libstdc++-v3/ChangeLog:

* include/std/ranges (join_view::_Iterator::_M_satisfy): Uglify
local variable inner.
(join_view::_Iterator::operator->): Use _Inner_iter instead of
_Outer_iter in the function signature as per LWG 3500.
* testsuite/std/ranges/adaptors/join.cc (test08): Test it.

(cherry picked from commit d4a788c7174496aca5fbe3e2b617a5a62e32c209)

4 years agolibstdc++: Avoid CTAD for std::ranges::join_view [LWG 3474]
Jonathan Wakely [Tue, 6 Oct 2020 08:41:16 +0000 (09:41 +0100)] 
libstdc++: Avoid CTAD for std::ranges::join_view [LWG 3474]

In commit ef275d1f2083f8a1fa1b59a3cd07fd3e8431023e I implemented the
wrong resolution of LWG 3474. This removes the deduction guide and
alters the views::join factory to create the right type explicitly.

libstdc++-v3/ChangeLog:

* include/std/ranges (join_view): Remove deduction guide.
(views::join): Add explicit template argument list to prevent
deducing the wrong type.
* testsuite/std/ranges/adaptors/join.cc: Move test for LWG 3474
here, from ...
* testsuite/std/ranges/adaptors/join_lwg3474.cc: Removed.

(cherry picked from commit 9065c4adab0b1280f5707d53833d195d0d350fd2)

4 years agolibstdc++: Add deduction guide for std::ranges::join_view [LWG 3474]
Jonathan Wakely [Mon, 24 Aug 2020 15:18:32 +0000 (16:18 +0100)] 
libstdc++: Add deduction guide for std::ranges::join_view [LWG 3474]

This implements the proposed resolution for LWG 3474.

libstdc++-v3/ChangeLog:

* include/std/ranges (join_view): Add deduction guide (LWG 3474).
* testsuite/std/ranges/adaptors/join_lwg3474.cc: New test.

(cherry picked from commit ef275d1f2083f8a1fa1b59a3cd07fd3e8431023e)

4 years agolibstdc++: Fix macro redefinition warnings
Jonathan Wakely [Thu, 10 Sep 2020 17:51:24 +0000 (18:51 +0100)] 
libstdc++: Fix macro redefinition warnings

Including <version> after <iterator> gives a warning about redefining
the __cpp_lib_array_constexpr macro. What happens is that <iterator>
sets the C++20 value, then <version> redefines it to the C++17 value,
then undefines it and defines it again to the C++20 value.

This change avoids defining it to the C++17 value when compiling C++20
or later (which also means we no longer need the #undef).

A similar warning happens for __cpp_lib_constexpr_char_traits when
including <version> after any header that includes <bits/char_traits.h>.

libstdc++-v3/ChangeLog:

* include/std/version (__cpp_lib_array_constexpr)
(__cpp_lib_constexpr_char_traits): Only define C++17 value when
compiling C++17.

(cherry picked from commit f903c13ce8674c623f176eaf4516505205fefcf6)

4 years agolibstdc++: Update value of __cpp_lib_constexpr_char_traits for C++20
Jonathan Wakely [Mon, 15 Jun 2020 13:31:26 +0000 (14:31 +0100)] 
libstdc++: Update value of __cpp_lib_constexpr_char_traits for C++20

Although not required by SD-6 or the C++20 draft, we define the macro
__cpp_lib_constexpr_char_traits to indicate support for P0432R1. This
updates the value in C++20 mode for the P1032R1 changes to char_traits.

* include/bits/char_traits.h (__cpp_lib_constexpr_char_traits):
Update value for C++20.
* include/std/version (__cpp_lib_constexpr_char_traits): Likewise.
* testsuite/21_strings/char_traits/requirements/constexpr_functions_c++17.cc:
Update expected value.

(cherry picked from commit b6ab9ecd550227684643b41e9e33a4d3466724d8)

4 years agolibstdc++: Fix unconditional definition of __cpp_lib_span in <version> [PR 97869}
Jonathan Wakely [Tue, 17 Nov 2020 15:26:29 +0000 (15:26 +0000)] 
libstdc++: Fix unconditional definition of __cpp_lib_span in <version> [PR 97869}

The <span> header is empty unless Concepts are supported, but <version>
defines the __cpp_lib_span feature test macro unconditionally. It should
be guarded by the same conditions as in <span>.

libstdc++-v3/ChangeLog:

PR libstdc++/97869
* include/precompiled/stdc++.h: Include <coroutine>.
* include/std/version (__cpp_lib_span): Check __cpp_lib_concepts
before defining.

(cherry picked from commit ecf65330c11544ebf35e198087b4a42be089c620)

4 years agod: Fix LHS of array concatentation evaluated before the RHS.
Iain Buclaw [Tue, 17 Nov 2020 12:11:33 +0000 (13:11 +0100)] 
d: Fix LHS of array concatentation evaluated before the RHS.

In an array append expression:

    array ~= fun(array);

The array in the left hand side of the expression was extended before
evaluating the result of the right hand side, which resulted in the
newly uninitialized array index being used before set.

This fixes that so that the result of the right hand side is always
saved in a reusable temporary before assigning to the destination.

gcc/d/ChangeLog:

PR d/97843
* d-codegen.cc (build_assign): Evaluate TARGET_EXPR before use in
the right hand side of an assignment.
* expr.cc (ExprVisitor::visit (CatAssignExp *)): Force a TARGET_EXPR
on the element to append if it is a CALL_EXPR.

gcc/testsuite/ChangeLog:

PR d/97843
* gdc.dg/pr97843.d: New test.

(cherry picked from commit 798bdfa0ebcf2bd012ffce75a594f783a8cb2dd0)

4 years agod: Fix a couple of ICEs found in the dmd front-end (PR97842)
Iain Buclaw [Tue, 17 Nov 2020 09:48:41 +0000 (10:48 +0100)] 
d: Fix a couple of ICEs found in the dmd front-end (PR97842)

- Segmentation fault on incomplete static if.
- Segmentation fault resolving typeof() expression when gagging is on.

gcc/d/ChangeLog:

PR d/97842
* dmd/cond.c (StaticIfCondition::include): Return error if condition
expression is unset.
* dmd/mtype.c (TypeTypeof::resolve): Return error if scope is unset.

gcc/testsuite/ChangeLog:

PR d/97842
* gdc.test/fail_compilation/fail18970.d: New test.
* gdc.test/fail_compilation/imports/test21164a.d: New test.
* gdc.test/fail_compilation/imports/test21164b.d: New test.
* gdc.test/fail_compilation/imports/test21164c.d: New test.
* gdc.test/fail_compilation/imports/test21164d.d: New test.
* gdc.test/fail_compilation/test21164.d: New test.

(cherry picked from commit 27d8c3516b67c0f5a8fe8970d0558ee3b97e8281)