Jeff Law [Tue, 12 Nov 2024 13:15:50 +0000 (06:15 -0700)]
[committed] Fix minor c6x backend bug exposed by CRC patches
This is a minor bug in the c6x port I saw when testing Mariam's CRC work.
Specifically some of the CRC tests were failing with a segfault testing if an
operand was an "a_register" from within the dest_regfile attribute. We were
extracting what we thought should have been a register operand then looking at
the REGNO. The underlying data was totally bogus, hence the fault in the
accessor macros.
The core issue is we were trying to extract operands from a nop insn which has
no operands. As far as I can tell "unknown" is a reasonable answer for the
dest_regfile attribute on a nop insn, so this patch adds an explicit setting of
dest_regfile rather than letting the default processing kick in.
I'm applying the attached patch to the trunk.
There's still a backend bug affecting ~15 CRC tests. Essentially the assembler
complains about a label (related to debugging info) not at the start of an
execution packet. I'm not chasing this down.
squirek [Wed, 30 Oct 2024 16:33:29 +0000 (16:33 +0000)]
ada: Compile time crash on limited object in extended return
This patch fixes an error in the compiler whereby using an extended return on
an object of limited tagged type which extends a tagged protected type may lead
to a compile-time crash.
gcc/ada/ChangeLog:
* exp_ch3.adb (Build_Assignment): Add condition to fetch corresponding
record types for concurrent tagged types.
Eric Botcazou [Wed, 30 Oct 2024 10:22:12 +0000 (11:22 +0100)]
ada: Fix spurious error on iterated component association with large index type
This is only for the Ada 2022 form of the iterated component association.
gcc/ada/ChangeLog:
* exp_aggr.adb (Two_Pass_Aggregate_Expansion): Use a type sized
from the index type to compute the length. Simplify and remove
useless calls to New_Copy_Tree for this computation.
Pat Bernardi [Mon, 18 Jul 2022 05:56:28 +0000 (01:56 -0400)]
ada: Include design documentation within runtime sources
The existing design documentation, required when generating the Software
Architecture Design Specification and Software Component Design
Specification documents for the light and light-tasking runtimes, has been
included directly within runtime sources.
Eric Botcazou [Tue, 29 Oct 2024 12:14:16 +0000 (13:14 +0100)]
ada: Make sure not to access past the end of bit-packed arrays
The code generated for the routines of the run-time library that implement
support for bit-packed arrays with non-power-of-2 component sizes turns out
to be problematic for the Address Sanitizer and the CHERI architecture, as
it may access past the end of bit-packed arrays in specific cases.
Eric Botcazou [Fri, 25 Oct 2024 19:16:14 +0000 (21:16 +0200)]
ada: Get rid of N_Unchecked_Expression node
This node is used in a single place in the front-end: it wraps the newly
built N_Indexed_Component nodes on the left-hand side of assignments
generated to elaborate array aggregates, and its effect is to disable
range checks for the expressions of these nodes.
Most of the code in the front-end does not expect to encounter it at all,
which leads to weird effects when this actually happens after changes are
made to the processing of array aggregates.
This change replaces the node by the Kill_Range_Check flag already present
on N_Unchecked_Type_Conversion, but with a slightly adjusted semantics.
gcc/ada/ChangeLog:
* exp_aggr.adb (Build_Array_Aggr_Code.Gen_Assign): Do not call
Checks_Off on the newly built N_Indexed_Component node but instead
set Kill_Range_Check on it.
* exp_ch4.ads (Expand_N_Unchecked_Expression): Delete.
* exp_ch4.adb (Expand_N_Indexed_Component): Remove handling of
N_Unchecked_Expression.
(Expand_N_Unchecked_Expression): Delete.
(Expand_N_Unchecked_Type_Conversion): Propagate the Assignment_OK
flag and rewrite the node manually.
* exp_util.adb (Insert_Actions): Remove handling of
N_Unchecked_Expression.
(Side_Effect_Free): Likewise.
* expander.adb (Expand): Likewise.
* gen_il-gen-gen_nodes.adb (N_Indexed_Component): Add flag
Kill_Range_Check for the purpose of semantics.
(N_Unchecked_Expression): Delete.
* gen_il-internals.ads (Type_Frequency): Remove entry for
N_Unchecked_Expression.
* gen_il-types.ads (Opt_Type_Enum): Remove N_Unchecked_Expression.
* pprint.adb (Expression_Image): Remove handling of
N_Unchecked_Expression.
* sem.adb (Analyze): Likewise.
* sem_ch4.ads (Analyze_Unchecked_Expression): Delete.
* sem_ch4.adb (Analyze_Unchecked_Expression): Likewise.
* sem_res.adb (Resolve_Unchecked_Expression): Likewise.
(Resolve): Remove handling of N_Unchecked_Expression.
(Resolve_Indexed_Component): Do not call Apply_Scalar_Range_Check
on the expressions if Kill_Range_Check is set on the node.
* sem_util.adb (Is_Non_Preelaborable_Construct): Remove handling of
N_Unchecked_Expression.
* sinfo.ads (Kill_Range_Check): Document it for N_Indexed_Component.
(Unchecked Expression): Delete specification.
* sprint.adb (Sprint_Node_Actual): Remove handling of
N_Unchecked_Expression.
* tbuild.ads (Checks_Off): Delete.
* tbuild.adb (Checks_Off): Likewise.
Eric Botcazou [Mon, 28 Oct 2024 10:28:53 +0000 (11:28 +0100)]
ada: Fix unexpected Program_Error raised in the parser on mismatched []
This happens for example with:
A : constant array (Natural range <>) of String := [ "xor" [;
The problem is that the left bracket token is incorrectly classified as
a name extension, but there is no handler in the Scan_Name_Extension_OK
part of P_Name in Par.Ch4.
gcc/ada/ChangeLog:
PR ada/112821
* scans.ads (Token_Type): Remove Tok_Left_Bracket from Namext.
Eric Botcazou [Mon, 28 Oct 2024 08:13:33 +0000 (09:13 +0100)]
ada: Fix internal error on instantiation of package with a nested ghost package
The instantiation triggers an internal error in Gigi because of a dangling
ghost entity created by the finalization machinery.
gcc/ada/ChangeLog:
PR ada/114300
* exp_ch7.adb (Attach_Object_To_Master_Node): Propagate the
Is_Ignored_Ghost_Entity flag from the finalization procedure.
(Build_Finalizer.Process_Declarations): Move up the test on
Is_Ignored_Ghost_Entity.
* exp_util.adb (Requires_Cleanup_Actions): Likewise.
Eric Botcazou [Mon, 28 Oct 2024 07:33:49 +0000 (08:33 +0100)]
ada: Fix premature finalization of anonymous access result from library function
In GNAT's implementation, the finalization of controlled objects created
through anonymous access types occurs when the enclosing library unit goes
out of scope if this is safe, and never occurs otherwise.
The case of a function that is a library unit with an anonymous access
result type falls in the second category for the anonymous access result
type itself and, therefore, finalization cannot take place for it.
gcc/ada/ChangeLog:
PR ada/55725
* exp_ch6.adb (Add_Collection_Actual_To_Build_In_Place_Call): Be
prepared for no collection if the access type is anonymous.
* exp_ch7.adb (Build_Anonymous_Collection): Return early for the
anonymous access result type of a library function.
Piotr Trojanek [Mon, 28 Oct 2024 12:17:03 +0000 (13:17 +0100)]
ada: Accept SPARK.Big_Integers.Big_Integer where Big_Integer is accepted
For certification of a light SPARK runtime libraries we now accept
expressions of type SPARK.Big_Integers.Big_Integer in subprogram and
loop variants.
gcc/ada/ChangeLog:
* exp_util.adb (Make_Variant_Comparison): Accept new types in
expansion.
* rtsfind.adb (Get_Unit_Name): Support SPARK.Big_Integers.
* rtsfind.ads (RTU_Id, RE_Id, RE_Unit_Table): Support new type
and its enclosing unit.
* sem_prag.adb (Analyze_Pragma): Support new type in pragma
Loop_Variant.
(Analyze_Subprogram_Variant_In_Decl_Part): Support new type in
aspect Subprogram_Variant.
ada: Make Interrupt and Attach Handlers Obsolescent in VXWorks
In order to trigger an obsolescent feature warning in
VXWorks if either the pragma or aspect of Interrupt_Handler
or Attach_Handler is used, the spec of the Register_Interrupt_Handler
method needs to be marked as obsolescent in a VXWorks specific
version of the file.
gcc/ada/ChangeLog:
* libgnarl/s-interr__vxworks.ads (new): A VXWorks specific
version of the file where Register_Interrupt_Handler is marked
with the Obsolescent pragma.
* libgnarl/s-interr__vxworks.adb: Remove pragma Obsoloescent
that had no effect.
* Makefile.rtl: Add entries for using the
libgnarl/s-interr__vxworks.ads file.
Eric Botcazou [Mon, 28 Oct 2024 06:42:54 +0000 (07:42 +0100)]
ada: Remove couple of irregular calls to Resolve_Aggr_Expr
The function is supposed to be passed an expression, but it is passed the
enclosing N_Component_Association node in a couple of cases, only to give
an error that can as well be given in the caller, at the cost of bypasses
to disable most of its processing.
gcc/ada/ChangeLog:
* sem_aggr.adb (Resolve_Array_Aggregate): In the case of an others
choice with a box, do not call Resolve_Aggr_Exp and give the error
for a multidimensional array directly.
(Resolve_Aggr_Expr): Remove bypasses for above case.
Before this patch, it was never allowed to use pragma Source_File_Name
for the spec of System, allegedly because Targparm.Get_Target_Parameters
is called before configuration pragmas are processed. Using a mapping
file was allowed but did not work correctly.
This patch makes mapping files loading happen before the call to
Get_Target_Parameters so mapping file can set the file name of System.
Also, pragma Source_File_Name is allowed if it confirms a mapping that
was previously given in a mapping file, to accommodate GPRbuild that
uses both pragmas and mapping files.
gcc/ada/ChangeLog:
* frontend.adb (Frontend): Move call to Fmap.Initialize ...
* gnat1drv.adb (Gnat1drv): ... here. Look up Fmap when loading System.
* par-prag.adb (Prag): Allow pragma Source_File_Name for System when
it confirms an existing mapping.
Eric Botcazou [Thu, 24 Oct 2024 17:20:30 +0000 (19:20 +0200)]
ada: Get rid of Kill_Range_Checks flag on entities
This flag is set in a single context, namely semantic analysis of record
type definitions, to avoid generating spurious range checks from it, and
a large testing campaign showed that, in practice, it makes a difference
in a single case, namely an access-to-constrained-array component with a
default expression, for example:
type Acc_String is access all String (1 .. 100);
type Rec (D : Positive) is record
A : Acc_String := new String (1 .. D);
end record;
Now there is another mechanism implemented in Process_Range_Expr_In_Decl to
avoid generating spurious range checks, which does not work in this specific
case but can be made to work with a small tweak to Denotes_Discriminant.
gcc/ada/ChangeLog:
* checks.adb (Range_Checks_Suppressed): Remove test on the
Kill_Range_Checks flag.
* einfo.ads (Kill_Range_Checks): Delete.
* gen_il-fields.ads (Opt_Field_Enum): Remove Kill_Range_Checks.
* gen_il-gen-gen_entities.adb (Entity_Kind): Likewise.
* sem_ch3.adb (Record_Type_Declaration): Do not set the
Kill_Range_Checks flag.
* sem_util.adb (Denotes_Discriminant): In a default expression,
also return True for a discriminal.
Steve Baird [Tue, 22 Oct 2024 23:20:27 +0000 (16:20 -0700)]
ada: Improve message for misused implicitly-defined preprocessor symbol.
If the -u option is specified, then otherwise-undefined preprocessor
symbols are implicitly defined to be False. If such an implicitly-defined
symbol is then incorrectly used in a context that requires an integer value,
the resulting error message should not incorrectly state that the symbol is
undefined.
gcc/ada/ChangeLog:
* prep.adb (Expression): Improve error message text when an
implicitly-defined Boolean-valued symbol is used in a context that
requires an integer value.
The predicate is passed an aggregate node and goes up its parent chain,
but that's unnecessary because Convert_To_Assignments has already done
so in the case of a record aggregate and Expand_Array_Aggregate does not
fully support intermediate conditional expressions yet.
gcc/ada/ChangeLog:
* exp_aggr.adb (Is_Build_In_Place_Aggregate_Return): Directly test
the node and remove dead code for extended return statements.
ada: Set correct minimum stack size for aarch64-linux
The minimum stack size defined by PTHREAD_STACK_MIN defined on
AArch64 Linux is 131072 bytes. Add a separate version for this
target to reflect that value. Previously the x86-64 value of 16384
bytes was used.
gcc/ada/ChangeLog:
* Makefile.rtl: Use libgnat/s-parame__aarch64-linux.adb for
s-parame.adb on aarch64-linux.
* libgnat/s-parame__aarch64-linux.adb: Add file.
Piotr Trojanek [Thu, 24 Oct 2024 08:47:09 +0000 (10:47 +0200)]
ada: Detect sharing of external file in inconsistent read-write modes
When opening files with "shared=yes", as described in GNAT RM 11.10,
Sharing Files, we now prevent sharing a single file in inconsistent
read-write modes.
gcc/ada/ChangeLog:
* doc/gnat_rm/the_implementation_of_standard_i_o.rst
(Shared Files): Add trailing period.
* libgnat/s-ficobl.ads (AFCB): Reflect new behavior in comment.
* libgnat/s-fileio.adb (Open): Detect inconsistent sharing,
just like we do in System.File_IO.Reset.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.
squirek [Tue, 13 Aug 2024 12:06:52 +0000 (12:06 +0000)]
ada: Spurious error on abstract primitive with access formals
This patch fixes an issue in the compiler whereby using anonymous access
types as abstract overridden subprogram formals for a derived abtract type
may lead to compile-time errors.
gcc/ada/ChangeLog:
* accessibility.adb (Type_Access_Level): Add handling for
subprogram aliases.
squirek [Tue, 13 Aug 2024 11:35:06 +0000 (11:35 +0000)]
ada: Missing runtime tag check on mutably tagged objects
This patch fixes an issue in the compiler whereby assigning to a non-existant
mutably tagged object component failed to result in the expected run-time
exception.
gcc/ada/ChangeLog:
* exp_ch4.adb (Expand_N_Type_Conversion): Add special runtime check
generation for mutably tagged objects.
Douglas B Rupp [Wed, 9 Oct 2024 19:44:16 +0000 (12:44 -0700)]
ada: GNAT Calendar Support for 64-bit Unix Time
The Epochalypse of 2038 will require the use of 64-bit time_t and
tv_sec (aka time in seconds from the Unix Epoch). The subprograms
in Ada calendar are self contained but nevertheless will malfunction
if a 64-bit integer type and calculations aren't used. Add 64-bit
versions and mark the old ones with pragma Obsolescent.
gcc/ada/ChangeLog:
* libgnat/a-calcon.adb (To_Ada_Time) (To_Duration)
(To_Struct_Timespec) (To_Unix_Time): Mark as obsolescent.
(To_Ada_Time_64) (To_Duration_64) (To_Struct_Timespec_64)
(To_Unix_Time_64): New.
* libgnat/a-calcon.ads (To_Ada_Time) (To_Duration)
(To_Struct_Timespec) (To_Unix_Time): Mark as obsolescent.
(To_Ada_Time_64) (To_Duration_64) (To_Struct_Timespec_64)
(To_Unix_Time_64): New.
* libgnat/a-calend.adb (To_Ada_Time) (To_Duration)
(To_Struct_Timespec) (To_Unix_Time): Mark as obsolescent.
(To_Ada_Time_64) (To_Duration_64) (To_Struct_Timespec_64)
(To_Unix_Time_64): New.
* libgnat/a-calend.ads (To_Ada_Time) (To_Duration)
(To_Struct_Timespec) (To_Unix_Time): Mark as obsolescent.
(To_Ada_Time_64) (To_Duration_64) (To_Struct_Timespec_64)
(To_Unix_Time_64): New.
Eric Botcazou [Wed, 23 Oct 2024 07:42:25 +0000 (09:42 +0200)]
ada: Fix internal error on nested iterated component associations
The problem is that Insert_Actions gets confused as to where it should
insert actions coming from within an N_Iterated_Component_Association,
because some actions may be generated during semantic analysis and some
others during expansion.
Instead of another ad-hoc fix, this change extends the processing done
for N_Component_Association, that is to say waiting for the Loop_Actions
field to be set during expansion before inserting actions in there.
This in turn requires semantic analysis to stop generating actions for
N_Iterated_Component_Association nodes. The current processing is a
little unstable:
- for container aggregates, Resolve_Iterated_Association preanalyzes
a copy of the expression,
- for delta aggregates, Resolve_Delta_Array_Aggregate fully analyzes
a copy of the expression,
- for array aggregate, Resolve_Aggr_Expr entirely skips the analysis.
The change implements a preanalysis of a copy of the expression using
Copy_Separate_Tree, which should be sufficient since the expression is
supposed to be unanalyzed at this point, recursively in the context of
N_Iterated_Component_Association nodes.
gcc/ada/ChangeLog:
PR ada/117018
* exp_aggr.adb (Build_Array_Aggr_Code): Do not expect the
Loop_Actions field to be already present on association nodes.
* exp_util.adb (Insert_Actions): For association nodes, insert
into the Loop_Actions field only if it is already present.
* sem_aggr.adb (Resolve_Array_Aggregate): Add Iterated parameter.
(Resolve_Aggregate): Adjust calls to Resolve_Array_Aggregate.
(Resolve_Aggr_Expr): Add Iterated_Elmt defaulted parameter and
a default for Single_Elmt. Adjust call to Resolve_Array_Aggregate.
Preanalyze a copy of the expression in an iteration context.
(Resolve_Iterated_Component_Association): Pass Iterated_Elmt as
True to Resolve_Aggr_Expr and remove processing of Loop_Actions.
Do not check incorrect use of dynamically tagged expression in
an iteration context.
(Resolve_Iterated_Association): Use Copy_Separate_Tree instead of
New_Copy_Tree and set the Parent field of the result.
(Resolve_Delta_Array_Aggregate): Likewise. Only preanalyze the
copy instead of analyzing it.
Richard Kenner [Mon, 14 Oct 2024 20:55:27 +0000 (16:55 -0400)]
ada: Add documentation about GNAT LLVM to GNAT User's Guide
Also be consistent on spelling of "back end".
gcc/ada/ChangeLog:
* doc/gnat_ugn/about_this_guide.rst: Add information about GNAT LLVM.
Be consistent about spelling of "back end".
* doc/gnat_ugn/building_executable_programs_with_gnat.rst: Likewise.
* doc/gnat_ugn/gnat_and_program_execution.rst: Be consistent about
spelling of "back end".
* doc/gnat_ugn/the_gnat_compilation_model.rst: Likewise.
* gnat_ugn.texi: Regenerate.
The code has been simplified to use a single way to create a DLL.
The relocation support is based on whether the base address for the
DLL is passed to the final linker step or not.
gcc/ada/ChangeLog:
* mdll.adb: Use the same procedure to create relocatable or non
relocatable DLL. The only difference is wether the base address is
passed to the final linker. If no base-address is given the DLL is
relocatable.
squirek [Mon, 21 Oct 2024 18:21:13 +0000 (18:21 +0000)]
ada: The Library_Unit field was used for all sorts of different purposes, which led to confusing code.
This patch further refines the previous work to fix several cases.
gcc/ada/ChangeLog:
* inline.adb (In_Main_Unit_Or_Subunit): Use Other_Comp_Unit instead of
Spec_Or_Body_Lib_Unit.
(Must_Inline): Use Other_Comp_Unit instead of Spec_Or_Body_Lib_Unit.
Eric Botcazou [Mon, 21 Oct 2024 08:55:28 +0000 (10:55 +0200)]
ada: Elide the copy in aggregate returns for nonlimited types
This implements elision of the copy operation for aggregate returns, i.e.
simple return statements whose expression is an aggregate, in the case of
nonlimited by-reference types (the copy operation is already elided for
limited types), which comprise controlled and tagged types. This is the
copy operation in the called function, that is to say the copy from the
anonymous object built for the aggregate to the anonymous return object.
The implementation simply extends that of limited types, which rewrites
the simple return statement as an extended return statement internally
and then leverages the built-in-place implementation of return objects
for these statements.
gcc/ada/ChangeLog:
* exp_aggr.adb (Is_Build_In_Place_Aggregate_Return): Also return
True for functions returning on the secondary stack or returning
a by-reference type if the back end exposes its return slot.
(Expand_Array_Aggregate): Call Is_Build_In_Place_Aggregate_Return
to spot aggregates to be built in place.
* exp_ch3.adb (Make_Allocator_For_Return): Add missing condition
in assertion pragma deduced from Expand_Subtype_From_Expr.
* exp_ch6.adb (Expand_Simple_Function_Return): Rewrite the statement
as an extended return statement if the expression is an aggregate
whose expansion is delayed. Properly relocate the expression in
this case.
* sem_ch6.adb: Add clauses for Exp_Aggr.
(Analyze_Function_Return): Do not apply the predicate check to an
aggregate whose expansion is delayed. Extended the processing of
case expressions to all conditional expressions.
Eric Botcazou [Fri, 18 Oct 2024 10:06:23 +0000 (12:06 +0200)]
ada: Implement built-in-place expansion of container aggregates
It is implemented for container aggregates that are used to initialize an
object, as specified by RM 7.6(17.2/3-17.3/3) for immutably limited types
and types that need finalization, but for all types like other aggregates.
gcc/ada/ChangeLog:
* exp_aggr.adb (Expand_Delta_Array_Aggregate): Move declaration.
(Expand_Delta_Record_Aggregate): Likewise.
(Expand_Container_Aggregate): Likewise. Move implementation to
Build_Container_Aggr_Code. Implement built-in-place expansion
for object declarations and allocators.
(Build_Container_Aggr_Code): New function containing most of the
code of the original Expand_Container_Aggregate. Do not build a
temporary for the size calculation. Minor formatting tweaks.
(Expand_N_Aggregate): Add comment.
* exp_ch4.adb (Expand_Allocator_Expression): Detect the case of
a container aggregate as qualified expression. Do not apply the
predicate check on entry in this case and rewrite the allocator.
* exp_ch7.adb (Build_Finalizer.Process_Object_Declaration): Deal
with Last_Aggregate_Assignment first to compute the attachment
point (as already done in Attach_Object_To_Master_Node).
Eric Botcazou [Fri, 18 Oct 2024 07:28:17 +0000 (09:28 +0200)]
ada: Fix weird error in Ada.Numerics.Discrete_Random with Component_Alignment
The problem arises when an instance of Ada.Numerics.Discrete_Random is
covered by a pragma Component_Alignment with a non-default alignment.
gcc/ada/ChangeLog:
* exp_ch5.adb (Expand_Assign_Array): Make Act_Rhs a constant and
do not recompute it, as well as R_Type, when there is a change of
representation. Move comment about the RHS from here to...
(Expand_N_Assignment_Statement): ...here.
Richard Biener [Tue, 12 Nov 2024 10:15:15 +0000 (11:15 +0100)]
tree-optimization/117417 - ICE with complex load optimization
When we decompose a complex load only used as real and imaginary
parts we fail to honor IL constraints which are that a BIT_FIELD_REF
of register type should be outermost in a ref. The following
simply avoids the transform when the complex load has such a
BIT_FIELD_REF.
rtl: Validate subreg info when optimizing vec_select.
When optimizing for NOPs in case of overlapping regs in VEC_SELECT expressions,
validate subreg data before using simplify_subreg_regno. There is no real
SUBREG rtx here, but a pseudo subreg call to check if subregs are possible.
gcc/ChangeLog:
* rtlanal.cc (set_noop_p): Validate subreg constraints before checking
for overlapping regs using simplify_subreg_regno.
Richard Biener [Fri, 8 Nov 2024 10:17:22 +0000 (11:17 +0100)]
Add X86_TUNE_AVX512_TWO_EPILOGUES, enable for Zen4 and Zen5
The following adds X86_TUNE_AVX512_TWO_EPILOGUES tuning and directs the
vectorizer to produce both a vector AVX2 and SSE epilogue for AVX512
vectorized loops when set. The tuning is enabled by default for Zen4
and Zen5 where I benchmarked it to be overall positive on SPEC CPU 2017 both
in performance and overall code size. In particular it speeds up
525.x264_r which with only an AVX2 epilogue ends up in unvectorized code
at the moment.
* config/i386/i386.cc (ix86_vector_costs::finish_cost): Set
m_suggested_epilogue_mode according to X86_TUNE_AVX512_TWO_EPILOGUES.
* config/i386/x86-tune.def (X86_TUNE_AVX512_TWO_EPILOGUES): Add.
Enable for znver4 and znver5.
Richard Biener [Fri, 8 Nov 2024 10:12:06 +0000 (11:12 +0100)]
Add suggested_epilogue_mode to vector costs
The following enables targets to suggest the vector mode to be used
preferably for the epilogue of a vectorized loop. The patch also
enables more than one vectorized epilogue in case the target suggests
a vector mode for the epilogue of a vector epilogue.
* tree-vectorizer.h (vector_costs::suggested_epilogue_mode): New.
(vector_costs::m_suggested_epilogue_mode): Likewise.
(vector_costs::vector_costs): Initialize m_suggested_epilogue_mode.
* tree-vect-loop.cc (vect_analyze_loop): Honor the target
suggested prefered epilogue mode and support vector epilogues
of vector epilogues if requested.
Richard Biener [Fri, 8 Nov 2024 08:43:26 +0000 (09:43 +0100)]
tree-optimization/117484 - issue with SLP discovery of permuted .MASK_LOAD
When we do SLP discovery of a .MASK_LOAD for a dataref group with gaps
the discovery for the mask will have gaps as well and this was
unexpected in a few places. The following re-organizes things
slightly to accomodate for this.
PR tree-optimization/117484
* tree-vect-slp.cc (vect_build_slp_tree_2): Handle gaps in
mask discovery. Fix condition to release the load permutation.
(vect_lower_load_permutations): Assert we get no load
permutation for the unpermuted node.
* tree-vect-slp-patterns.cc (linear_loads_p): Properly identify
loads (without permutation).
(compatible_complex_nodes_p): Likewise.
* gcc.dg/vect/pr117484-1.c: New testcase.
* gcc.dg/vect/pr117484-2.c: Likewise.
where we now vectorize the loop with VNx4QI, I'll leave it to ARM folks
to investigate whether that's OK and to adjust the testcase or to see
where to adjust things to make the testcase not vectorized again. The
original fix for which the testcase was introduced is still efffective.
PR tree-optimization/117502
* tree-vect-stmts.cc (get_group_load_store_type): Also consider
VMAT_STRIDED_SLP when checking to use gather/scatter for
single-element interleaving access.
* tree-vect-loop.cc (update_epilogue_loop_vinfo): STMT_VINFO_STRIDED_P
can be classified as VMAT_GATHER_SCATTER, so update DR_REF for
those as well.
Jason Merrill [Mon, 14 Oct 2024 20:22:34 +0000 (16:22 -0400)]
c++: rename -fmodules-ts to -fmodules
The C++ modules support is not targeting the Modules TS, so it doesn't make
much sense to refer to the TS in the option name. But keep the old spelling
as an undocumented alias for now.
gcc/ChangeLog:
* doc/invoke.texi: Rename -fmodules-ts to -fmodules.
gcc/c-family/ChangeLog:
* c.opt: Add -fmodules with same effect as -fmodules-ts.
gcc/cp/ChangeLog:
* lang-specs.h: Check fmodules* instead of fmodules-ts.
Jason Merrill [Mon, 11 Nov 2024 02:42:48 +0000 (21:42 -0500)]
opts: fix narrowing warning
The init-list initialization of cl_deferred_option p had a couple of
narrowing warnings: first of opt_index from int to size_t and then of value
from HOST_WIDE_INT to int. Fixed by making the types more consistent.
gcc/ChangeLog:
* opts.h (cl_deferred_option::value): Change to HOST_WIDE_INT.
(set_option): Change opt_index parm to size_t.
* opts-common.cc (set_option): Likewise.
Simon Martin [Mon, 11 Nov 2024 19:22:32 +0000 (20:22 +0100)]
c++: Fix another crash with invalid new operators [PR117463]
Even though this PR is very close to PR117101, it's not addressed by the
fix I made through r15-4958-g5821f5c8c89a05 because cxx_placement_new_fn
has the very same issue as std_placement_new_fn_p used to have.
As suggested by Jason, this patch changes both functions so that
cxx_placement_new_fn leverages std_placement_new_fn_p which reduces code
duplication and fixes the PR.
PR c++/117463
gcc/cp/ChangeLog:
* constexpr.cc (cxx_placement_new_fn): Implement in terms of
std_placement_new_fn_p.
* cp-tree.h (std_placement_new_fn_p): Declare.
* init.cc (std_placement_new_fn_p): Add missing checks to ensure
that fndecl is a non-replaceable ::operator new.
Jakub Jelinek [Mon, 11 Nov 2024 18:54:32 +0000 (19:54 +0100)]
c++: Add __builtin_operator_{new,delete} support
clang++ adds __builtin_operator_{new,delete} builtins which as documented
work similarly to ::operator {new,delete}, except that it is an error
if the called ::operator {new,delete} is not a replaceable global operator
and allow optimizations which C++ normally allows just when those are used
from new/delete expressions https://eel.is/c++draft/expr.new#14
When using these builtins, the same optimizations can be done even when
using those builtins.
For GCC we note that in the CALL_FROM_NEW_OR_DELETE_P flag on CALL_EXPRs.
The following patch implements it as a C++ FE keyword (because passing
references through ... changes the argument and so BUILT_IN_FRONTEND
builtin can't be used), just attempts to call the ::operator {new,delete}
and if it isn't replaceable, diagnoses it.
libstdc++ already uses the builtin in some cases.
2024-11-11 Jakub Jelinek <jakub@redhat.com>
gcc/c-family/
* c-common.h (enum rid): Add RID_BUILTIN_OPERATOR_NEW
and RID_BUILTIN_OPERATOR_DELETE.
(names_builtin_p): Change return type from bool to int.
* c-common.cc (c_common_reswords): Add __builtin_operator_new
and __builtin_operator_delete.
gcc/c/
* c-decl.cc (names_builtin_p): Change return type from
bool to int, adjust return statments.
gcc/cp/
* parser.cc (cp_parser_postfix_expression): Handle
RID_BUILTIN_OPERATOR_NEW and RID_BUILTIN_OPERATOR_DELETE.
* cp-objcp-common.cc (names_builtin_p): Change return type from
bool to int, adjust return statments. Handle
RID_BUILTIN_OPERATOR_NEW and RID_BUILTIN_OPERATOR_DELETE.
* pt.cc (tsubst_expr) <case CALL_EXPR>: Handle
CALL_FROM_NEW_OR_DELETE_P.
gcc/
* doc/extend.texi (New/Delete Builtins): Document
__builtin_operator_new and __builtin_operator_delete.
gcc/testsuite/
* g++.dg/ext/builtin-operator-new-1.C: New test.
* g++.dg/ext/builtin-operator-new-2.C: New test.
* g++.dg/ext/builtin-operator-new-3.C: New test.
Jonathan Wakely [Mon, 11 Nov 2024 11:54:00 +0000 (11:54 +0000)]
libstdc++: Fix typos in iterator increment for std::text_encoding [PR117520]
The intended behaviour for std::text_encoding::aliases_view's iterator
is that it incrementing or decrementing too far sets it to a
value-initialized state, or fails an assertion when those are enabled.
There were typos that used == instead of = which meant that instead of
becoming singular or aborting, an out-of-range increment just did
nothing. This meant erroneous operations were well-defined and didn't
produce any undefined behaviour, but were not diagnosed with assertions
enabled, as had been intended.
This change fixes the bugs and adds more tests to verify the intended
behaviour.
libstdc++-v3/ChangeLog:
PR libstdc++/117520
* include/std/text_encoding (aliases_view:_Iterator::operator+=):
Fix typos that caused == to be used instead of =.
(aliases_view::_Iterator): Fix friend declaration.
* testsuite/std/text_encoding/members.cc: Adjust expected
behaviour of invalid subscript. Add tests for other erroneous
operations on iterators.
Dimitar Dimitrov [Sun, 27 Oct 2024 07:49:49 +0000 (09:49 +0200)]
testsuite: Require atomic operations for c2y-if-decls-*
Since some of the c2y-if-decls tests use _Atomic, add a
requirement for target to support atomic operations on
int and long types.
This fixes spurious test link failures on pru-unknown-elf,
which lacks atomic ops. The tests still pass on x86_64-linux-gnu.
gcc/testsuite/ChangeLog:
* gcc.dg/c2y-if-decls-1.c: Require target that supports atomic
operations on int and long types.
* gcc.dg/c2y-if-decls-11.c: Ditto.
* gcc.dg/c2y-if-decls-4.c: Ditto.
* gcc.dg/c2y-if-decls-8.c: Ditto.
According to the aapcs64: If the argument is an 8-bit (...) precision
Floating-point or short vector type and the NSRN is less than 8, then the
argument is allocated to the least significant bits of register v[NSRN].
gcc/
* config/aarch64/aarch64.cc
(aarch64_vfp_is_call_or_return_candidate): use fp registers to
return svmfloat8_t parameters.
Jason Merrill [Tue, 5 Nov 2024 15:27:39 +0000 (10:27 -0500)]
c++: reduce unnecessary tree_common
Lewis' r15-5067 fixing the marking of TRAIT_EXPR led me to compare some
other front-end type definitions to their marking in cp_common_init_ts; it
seems we can change tree_common to something smaller in several cases, to
match how they are marked.
gcc/cp/ChangeLog:
* cp-tree.h (struct ptrmem_cst): Change tree_common to tree_typed.
(struct tree_trait_expr): Likewise.
(struct tree_static_assert): Change tree_common to tree_base.
(struct tree_argument_pack_select): Likewise.
Tobias Burnus [Mon, 11 Nov 2024 16:22:20 +0000 (17:22 +0100)]
libgomp.c-c++-common/pr109062.c: Fix expected spin count for hybrid x86
On my system with E and P cores (hybrid) x86, the spincount is by default 1
and not 300000, cf. PR109812 and r14-4571-ge1e127de18dbee.
Hence, this commit updates the expected value of the testcase to also
accept omp_display_env showing "GOMP_SPINCOUNT = '1'" - but only for
x86-64, which might be hybrid.
libgomp/ChangeLog:
* testsuite/libgomp.c-c++-common/pr109062.c: Update dg-output
to also accept GOMP_SPINCOUNT = 1 for x86-64.
Richard Biener [Fri, 8 Nov 2024 12:59:05 +0000 (13:59 +0100)]
Add missing SLP discovery for CFN[_MASK][_LEN]_SCATTER_STORE
This was responsible for a bunch of SVE FAILs with --param vect-force-slp=1
* tree-vect-slp.cc (arg1_arg3_map): New.
(arg1_arg3_arg4_map): Likewise.
(vect_get_operand_map): Handle IFN_SCATTER_STORE,
IFN_MASK_SCATTER_STORE and IFN_MASK_LEN_SCATTER_STORE.
(vect_build_slp_tree_1): Likewise.
* tree-vect-stmts.cc (vectorizable_store): For SLP masked
gather/scatter record the mask with proper number of copies.
* tree-vect-loop.cc (vectorizable_recurr): Avoid costing
the initial value construction in the prologue twice with SLP.
This patch adds the instructions that are new to FEAT_SVE2p1.
It mostly contains simple additions, so it didn't seem worth
splitting up further.
It's likely that we'll find more autovec uses for some of these
instructions, but for now this patch just deals with one obvious case:
using the new hybrid-VLA permutations to handle "stepped" versions of
some Advanced SIMD permutations. See aarch64_evpc_hvla for details.
The patch also continues the existing practice of lowering ACLE
permutation intrinsics to VEC_PERM_EXPR. That's admittedly a bit
inconsistent with the approach I've been advocating for when it comes
to arithmetic, but I think the difference is that (a) these are pure
data movement, and so there's limited scope for things like gimple
canonicalisations to mess with the instruction selection or operation
mix; and (b) there are no added UB rules to worry about.
Another new thing in the patch is the concept of "memory-only"
SVE vector modes. These are used to represent the memory operands
of the new LD1[DW] (to .Q), LD[234]Q, ST1[DW] (from .Q), and ST[234]Q
instructions. We continue to use .B, .H, .S, and .D modes for the
registers, since there's no predicated contiguous LD1Q instruction,
and since there's no arithmetic that can be done on TI. (The new
instructions are instead intended for hybrid VLA, i.e. for vectors
of vectors.)
For now, all of the new instructions are non-streaming-only.
Some of them are streaming-compatible with SME2p1, but that's
a later patch.
gcc/
* config/aarch64/aarch64-modes.def (VNx1SI, VNx1DI): New modes.
* config/aarch64/aarch64-sve-builtins-base.cc
(svdup_lane_impl::expand): Update generation of TBL instruction.
(svtbl_impl): Delete.
(svtbl): Use unspec_based_uncond_function instead.
* config/aarch64/aarch64-sve-builtins-functions.h
(permute::fold_permute): Handle trailing immediate arguments.
* config/aarch64/aarch64-sve-builtins-shapes.h (extq): Declare.
(load_gather64_sv_index, load_gather64_sv_offset): Likewise.
(load_gather64_vs_index, load_gather64_vs_offset): Likewise.
(pmov_from_vector, pmov_from_vector_lane, pmov_to_vector_lane)
(reduction_neonq, store_scatter64_index, store_scatter64_offset)
(unary_lane): Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc
(load_gather64_sv_base, store_scatter64_base): New classes.
(extq_def, ext): New shape.
(load_gather64_sv_index_def, load_gather64_sv_index): Likewise.
(load_gather64_sv_offset_def, load_gather64_sv_offset): Likewise.
(load_gather64_vs_index_def, load_gather64_vs_index): Likewise.
(load_gather64_vs_offset_def, load_gather64_vs_offset): Likewise.
(pmov_from_vector_def, pmov_from_vector): Likewise.
(pmov_from_vector_lane_def, pmov_from_vector_lane): Likewise.
(pmov_to_vector_lane_def, pmov_to_vector_lane): Likewise.
(reduction_neonq_def, reduction_neonq): Likewise.
(store_scatter64_index_def, store_scatter64_index): Likewise.
(store_scatter64_offset_def, store_scatter64_offset): Likewise.
(unary_lane_def, unary_lane): Likewise.
* config/aarch64/aarch64-sve-builtins-sve2.h (svaddqv, svandqv)
(svdup_laneq, sveorqv, svextq, svld1q_gather, svld1udq, svld1uwq)
(svld2q, svld3q, svld4q, svmaxnmqv, svmaxqv, svminnmqv, svminqv)
(svorqv, svpmov, svpmov_lane, svst1qd, svst1q_scatter, svst1wq)
(svst2q, svst3q, svst4q, svtblq, svtbx, svtbxq, svuzpq1, svuzpq2)
(svzipq1, svzipq2): Declare.
* config/aarch64/aarch64-sve-builtins-sve2.cc (ld1uxq_st1xq_base)
(ld234q_st234q_base, svdup_laneq_impl, svextq_impl): New classes.
(svld1q_gather_impl, svld1uxq_impl, svld234q_impl): Likewise.
(svpmov_impl, svpmov_lane_impl, svst1q_scatter_impl): Likewise.
(svst1xq_impl, svst234q_impl, svuzpq_impl, svzipq_impl): Likewise.
(svaddqv, svandqv, svdup_laneq, sveorqv, svextq, svld1q_gather)
(svld1udq, svld1uwq, svld2q, svld3q, svld4q, svmaxnmqv, svmaxqv)
(svminnmqv, svminqv, svorqv, svpmov, svpmov_lane, svst1qd)
(svst1q_scatter, svst1wq, svst2q, svst3q, svst4q, svtblq, svtbx)
(svtbxq, svuzpq1, svuzpq2, svzipq1, svzipq2): New function entries.
* config/aarch64/aarch64-sve-builtins-sve2.def (svaddqv, svandqv)
(svdup_laneq, sveorqv, svextq, svld2q, svld3q, svld4q, svmaxnmqv)
(svmaxqv, svminnmqv, svminqv, svorqv, svpmov, svpmov_lanes, vst2q)
(svst3q, svst4q, svtblq, svtbxq, svuzpq1, svuzpq2, svzipq1, svzipq2)
(svld1q_gather, svld1udq, svld1uwq, svst1dq, svst1q_scatter)
(svst1wq): New function definitions.
* config/aarch64/aarch64-sve-builtins.cc (TYPES_hsd_data)
(hsd_data, s_data): New type lists.
(function_resolver::infer_pointer_type): Give a specific error about
passing a pointer to 8-bit elements to an _index function.
(function_resolver::resolve_sv_displacement): Check whether the
function allows 32-bit bases.
* config/aarch64/iterators.md (UNSPEC_TBLQ, UNSPEC_TBXQ): New unspecs.
(UNSPEC_ADDQV, UNSPEC_ANDQV, UNSPEC_DUPQ, UNSPEC_EORQV, UNSPEC_EXTQ)
(UNSPEC_FADDQV, UNSPEC_FMAXQV, UNSPEC_FMAXNMQV, UNSPEC_FMINQV)
(UNSPEC_FMINNMQV, UNSPEC_LD1_EXTENDQ, UNSPEC_LD1Q_GATHER): Likewise.
(UNSPEC_LDNQ, UNSPEC_ORQV, UNSPEC_PMOV_PACK, UNSPEC_PMOV_PACK_LANE)
(UNSPEC_PMOV_UNPACK, UNSPEC_PMOV_UNPACK_LANE, UNSPEC_SMAXQV): Likewise.
(UNSPEC_SMINQV, UNSPEC_ST1_TRUNCQ, UNSPEC_ST1Q_SCATTER, UNSPEC_STNQ)
(UNSPEC_UMAXQV, UNSPEC_UMINQV, UNSPEC_UZPQ1, UNSPEC_UZPQ2): Likewise.
(UNSPEC_ZIPQ1, UNSPEC_ZIPQ2): Likewise.
(Vtype): Handle single-vector SVE modes.
(Vendreg): Handle SVE structure modes.
(VNxTI, LD1_EXTENDQ_MEM): New mode attributes.
(SVE_PERMUTE, SVE_TBL, SVE_TBX): New int iterators.
(SVE_INT_REDUCTION_128, SVE_FP_REDUCTION_128): Likewise.
(optab): Handle the new SVE2.1 reductions.
(perm_insn): Handle the new SVE2.1 permutations.
* config/aarch64/aarch64-sve.md
(@aarch64_sve_tbl<mode>): Generalize to...
(@aarch64_sve_<SVE_TBL:perm_insn><mode>): ...this.
(@aarch64_sve_<PERMUTE:perm_insn><mode>): Generalize to...
(@aarch64_sve_<SVE_PERMUTE:perm_insn><mode>): ...this.
* config/aarch64/aarch64-sve2.md (@aarch64_pmov_to_<mode>)
(@aarch64_pmov_lane_to_<mode>, @aarch64_pmov_from_<mode>)
(@aarch64_pmov_lane_from_<mode>, @aarch64_sve_ld1_extendq<mode>)
(@aarch64_sve_ldnq<mode>, aarch64_gather_ld1q): New patterns.
(@aarch64_sve_st1_truncq<mode>, @aarch64_sve_stnq<mode>): Likewise.
(aarch64_scatter_st1q, @aarch64_pred_reduc_<optab>_<mode>): Likewise.
(@aarch64_sve_dupq<mode>, @aarch64_sve_extq<mode>): Likewise.
(@aarch64_sve2_tbx<mode>): Generalize to...
(@aarch64_sve_<SVE_TBX:perm_insn><mode>): ...this.
* config/aarch64/aarch64.cc
(aarch64_classify_vector_memory_mode): New function.
(aarch64_regmode_natural_size): Use it.
(aarch64_classify_index): Likewise.
(aarch64_classify_address): Likewise.
(aarch64_print_address_internal): Likewise.
(aarch64_evpc_hvla): New function.
(aarch64_expand_vec_perm_const_1): Use it.
This patch handles the SVE2p1 instructions that are shared
with SME2. This includes the consecutive-register forms of
the 2-register and 4-register loads and stores, but not the
strided-register forms.
gcc/
* config/aarch64/aarch64.h (TARGET_SVE2p1_OR_SME2): New macro.
* config/aarch64/aarch64-early-ra.cc
(is_stride_candidate): Require TARGET_STREAMING_SME2
(early_ra::maybe_convert_to_strided_access): Likewise.
* config/aarch64/aarch64-sve-builtins-sve2.def: Mark instructions
that are common to both SVE2p1 and SME2.
* config/aarch64/aarch64-sve.md
(@aarch64_<sur>dot_prod_lane<SVE_FULL_SDI:mode><SVE_FULL_BHI:mode>):
Test TARGET_SVE2p1_OR_SME2 instead of TARGET_STREAMING_SME2.
(@aarch64_sve_<sve_fp_op>vnx4sf): Move TARGET_SVE_BF16 condition
into SVE_BFLOAT_TERNARY_LONG.
(@aarch64_sve_<sve_fp_op>_lanevnx4sf): Likewise
SVE_BFLOAT_TERNARY_LONG_LANE.
* config/aarch64/aarch64-sve2.md
(@aarch64_<LD1_COUNT:optab><mode>): Require TARGET_SVE2p1_OR_SME2
instead of TARGET_STREAMING_SME2.
(@aarch64_<ST1_COUNT:optab><mode>): Likewise.
(@aarch64_sve_ptrue_c<BHSD_BITS>): Likewise.
(@aarch64_sve_pext<BHSD_BITS>): Likewise.
(@aarch64_sve_pext<BHSD_BITS>x2): Likewise.
(@aarch64_sve_cntp_c<BHSD_BITS>): Likewise.
(@aarch64_sve_fclamp<mode>): Likewise.
(*aarch64_sve_fclamp<mode>_x): Likewise.
(<sur>dot_prodvnx4sivnx8hi): Likewise.
(aarch64_sve_fdotvnx4sfvnx8hf): Likewise.
(aarch64_fdot_prod_lanevnx4sfvnx8hf): Likewise.
(@aarch64_sve_while<while_optab_cmp>_b<BHSD_BITS>_x2): Likewise.
(@aarch64_sve_while<while_optab_cmp>_c<BHSD_BITS>): Likewise.
(@aarch64_sve_<optab><VNx8HI_ONLY:mode><VNx8SI_ONLY:mode>): Move
TARGET_STREAMING_SME2 condition into SVE_QCVTxN.
(@aarch64_sve_<sve_int_op><mode>): Likewise
SVE2_INT_SHIFT_IMM_NARROWxN, but also require TARGET_STREAMING_SME2
for the 4-register forms.
* config/aarch64/iterators.md (SVE_BFLOAT_TERNARY_LONG): Require
TARGET_SVE2p1_OR_SME2 rather than TARGET_STREAMING_SME2 for
UNSPEC_BFMLSLB and UNSPEC_BFMLSLT. Require TARGET_SVE_BF16
for the others.
(SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
(SVE2_INT_SHIFT_IMM_NARROWxN): Require TARGET_SVE2p1_OR_SME2 for
the interleaving forms and TARGET_STREAMING_SME2 for the rest.
(SVE_QCVTxN): Likewise.
Some instructions that were previously restricted to streaming mode
can also be used in non-streaming mode with SVE2.1. This patch adds
support for those, as well as the usual new-extension boilerplate.
A later patch will add the feature macro.
gcc/
* config/aarch64/aarch64-option-extensions.def (sve2p1): New extension.
* doc/invoke.texi (sve2p1): Document it.
* config/aarch64/aarch64-sve-builtins-sve2.def: Mark instructions
that are common to both SVE2p1 and SME.
* config/aarch64/aarch64.h (TARGET_SVE2p1): New macro.
(TARGET_SVE2p1_OR_SME): Likewise.
* config/aarch64/aarch64-sve2.md
(@aarch64_sve_psel<BHSD_BITS>): Require TARGET_SVE2p1_OR_SME
instead of TARGET_STREAMING.
(*aarch64_sve_psel<BHSD_BITS>_plus): Likewise.
(@aarch64_sve_<su>clamp<mode>): Likewise.
(*aarch64_sve_<su>clamp<mode>_x): Likewise.
(@aarch64_pred_<optab><mode>): Likewise.
(@cond_<optab><mode>): Likewise.
This patch moves the scalar and single-vector Advanced SIMD types
from arm_neon.h into a private header, so that they can be defined
by arm_sve.h as well. This is needed for the upcoming SVE2.1
hybrid-VLA reductions, which return 128-bit Advanced SIMD vectors.
The approach follows Claudio's patch for FP8.
gcc/
* config.gcc (extra_headers): Add arm_private_neon_types.h.
* config/aarch64/arm_private_neon_types.h: New file, split out
from...
* config/aarch64/arm_neon.h: ...here.
* config/aarch64/arm_sve.h: Include arm_private_neon_types.h
This patch adds an svboolx4_t type, to go alongside the existing
svboolx2_t type. It doesn't require any special ISA support beyond
SVE itself and it currently has no associated instructions.
All extending gather load intrinsics encode the source type in
their name (e.g. svld1sb for an extending load from signed bytes).
The type of the extension result has to be specified using an
explicit type suffix; it isn't something that can be inferred
from the arguments, since there are multiple valid choices for
the same arguments.
This meant that type inference for gather loads was only needed for
non-extending loads, in which case the pointer target had to be a
32-bit or 64-bit element type. The gather_scatter_p argument to
function_resolver::infer_pointer_type therefore controlled two things:
how we should react to vector base addresses, and whether we should
require a minimum element size of 32.
The element size restriction doesn't apply to the upcomding SVE2.1
svld1q intrinsic, so this patch adds a separate argument for the minimum
element size requirement.
gcc/
* config/aarch64/aarch64-sve-builtins.h
(function_resolver::target_type_restrictions): New enum.
(function_resolver::infer_pointer_type): Add an extra argument
that specifies what the target type can be.
* config/aarch64/aarch64-sve-builtins.cc
(function_resolver::infer_pointer_type): Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc
(load_gather_sv_base::get_target_type_restrictions): New virtual
member function.
(load_gather_sv_base::resolve): Use it. Update call to
infer_pointer_type.
aarch64: Add an abstraction for scatter store type inference
Until now, all data arguments to a scatter store needed to have
32-bit or 64-bit elements. This isn't true for the upcoming SVE2.1
svst1q scatter intrinsic, so this patch adds an abstraction around the
restriction.
gcc/
* config/aarch64/aarch64-sve-builtins-shapes.cc
(store_scatter_base::infer_vector_type): New virtual member function.
(store_scatter_base::resolve): Use it.
aarch64: Add an abstraction for vector base addresses
In the upcoming SVE2.1 svld1q and svst1q intrinsics, the relationship
between the base vector and the data vector differs from existing
gather/scatter intrinsics. This patch adds a new abstraction to
handle the difference.
gcc/
* config/aarch64/aarch64-sve-builtins.h
(function_shape::vector_base_type): New member function.
* config/aarch64/aarch64-sve-builtins.cc
(function_shape::vector_base_type): Likewise.
(function_resolver::resolve_sv_displacement): Use it.
(function_resolver::resolve_gather_address): Likewise.
GCC previously used the older assembly syntax for SVE TBL, with no
braces around the second operand. This patch switches to the newer,
official syntax, with braces around the operand.
The initial SVE binutils submission supported both syntaxes, so there
should be no issues with backwards compatibility.
gcc/
* config/aarch64/aarch64-sve.md (@aarch64_sve_tbl<mode>): Wrap
the second operand in braces.
Past extensions to SVE have required new subsets of all_data; the
SVE2.1 patches will add another. This patch tries to make this more
scalable by defining the multi-size *_data macros to be unions of
single-size *_data macros.
gcc/
* config/aarch64/aarch64-sve-builtins.cc (TYPES_all_data): Redefine
in terms of single-size *_data definitions.
(TYPES_bhs_data, TYPES_hs_data, TYPES_sd_data): Likewise.
(TYPES_b_data, TYPES_h_data, TYPES_s_data): New macros.
aarch64: Test TARGET_STREAMING instead of TARGET_STREAMING_SME
g:ede97598e2c recorded separate ISA requirements for streaming
and non-streaming mode. The premise there was that AARCH64_FL_SME
should not be included in the streaming mode requirements, since:
(a) an __arm_streaming_compatible function wouldn't be in streaming
mode if SME wasn't available.
(b) __arm_streaming_compatible functions only allow things that are
possible in non-streaming mode, so the non-streaming architecture
is enough to assemble the code, even if +sme isn't enabled.
(c) we reject __arm_streaming if +sme isn't enabled, so don't need
to test it for individual intrinsics as well.
Later patches lean into this further.
This patch applies the same reasoning to the .md constructs for
base streaming-only SME instructions, guarding them with
TARGET_STREAMING rather than TARGET_STREAMING_SME.
gcc/
* config/aarch64/aarch64.h (TARGET_SME): Expand comment.
(TARGET_STREAMING_SME): Delete.
* config/aarch64/aarch64-sme.md: Use TARGET_STREAMING instead of
TARGET_STREAMING_SME.
* config/aarch64/aarch64-sve2.md: Likewise.
Some code was checking TARGET_STREAMING and TARGET_SME2 separately,
but we now have a macro to test both at once.
gcc/
* config/aarch64/aarch64-sme.md: Use TARGET_STREAMING_SME2
instead of separate TARGET_STREAMING and TARGET_SME2 tests.
* config/aarch64/aarch64-sve2.md: Likewise.
* config/aarch64/iterators.md: Likewise.
For the aarch64 simd clones patches, it would be useful to be able to
push a function declaration onto the cfun stack, even though it has no
function body associated with it. That is, we want cfun to be null,
current_function_decl to be the decl itself, and the target and
optimisation flags to reflect the declaration.
This patch adds a push/pop_function_decl pair to do that.
I think the more direct way of doing what I want to do under the
existing interface would have been:
where invoke_set_current_function_hook would need to become public.
But it seemed safer to use the higher-level routines, since it makes
sure that the target/optimisation changes are synchronised with the
function changes. In particular, if cfun was null before the
sequence above, the pop_cfun would leave the flags unchanged,
rather than restore them to the state before the push_cfun.
gcc/
* function.h (push_function_decl, pop_function_decl): Declare.
* function.cc (set_function_decl): New function, extracted from...
(set_cfun): ...here.
(push_function_decl): New function, extracted from...
(push_cfun): ...here.
(pop_cfun_1): New function, extracted from...
(pop_cfun): ...here.
(pop_function_decl): New function.
Paul Thomas [Mon, 11 Nov 2024 12:21:57 +0000 (12:21 +0000)]
Fortran: Fix elemental array refs in SELECT TYPE [PR109345]
2024-11-10 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/109345
* trans-array.cc (gfc_get_array_span): Unlimited polymorphic
expressions are now treated separately since the span need not
be the same as the element size.
For the loop in the testcase we currently fail to hoist the guard
check of the inner loop (m > 0) out of the outer loop because
find_loop_guard checks all blocks of the outer loop for side-effects,
including those that are skipped by the guard. This usually
is harmless as the guard does not skip any blocks in the outer loop
but in this case store-motion was applied to the inner loop and thus
there's now a skipped store in the outer loop.
The following properly skips blocks that are dominated by the
entry to the skipped region.
PR tree-optimization/117510
* tree-ssa-loop-unswitch.cc (find_loop_guard): Only check
not skipped blocks for side-effects.
* gcc.dg/vect/vect-outer-pr117510.c: New testcase.
Gaius Mulley [Mon, 11 Nov 2024 11:43:06 +0000 (11:43 +0000)]
modula2: Reimplement parameter declaration and checking.
This patch improves the parameter declaration by saving all parameter
kinds: proper procedure, definition module procedure and forward
procedures. This allows error messages to reference any parameter
in the three kinds of procedures. Variables and their declaration
are also stored. The expression, assignment and parameter checking
has been improved to highlight any variable or parameter and
its declaration causing a conflict.
gcc/m2/ChangeLog:
* gm2-compiler/M2Base.def (MixTypes): Rename parameters.
(MixTypesDecl): New procedure function.
* gm2-compiler/M2Base.mod (BuildOrdFunctions): Add
DefProcedure parameter to PutFunction.
(BuildTruncFunctions): Ditto.
(BuildFloatFunctions): Ditto.
(BuildIntFunctions): Ditto.
(InitBaseFunctions): Ditto.
(MixTypesDecl): New procedure function.
(MixTypes): Reimplement.
* gm2-compiler/M2Check.mod (checkProcType): Replace
NoOfParam with NoOfParamAny.
Replace IsVarParam with IsVarParamAny.
(checkProcedureProcType): Ditto.
* gm2-compiler/M2Error.def: Remove unnecessary export qualified list.
* gm2-compiler/M2GCCDeclare.mod: Replace NoOfParam with NoOfParamAny.
Replace IsVarParam with IsVarParamAny.
(DeclareProcedureToGccWholeProgram): Rename son to
Variable.
(DeclareProcedureToGccSeparateProgram): Ditto.
(PrintKind): New procedure.
(PrintProcedureParameters): Ditto.
(PrintProcedureReturnType): Ditto.
(PrintProcedure): Reimplement.
(PrintProcTypeParameters): New procedure.
(PrintProcType): Ditto.
(DeclareProcType): Rename Son to Parameter.
* gm2-compiler/M2GenGCC.mod: Replace NoOfParam with NoOfParamAny.
Replace IsVarParam with IsVarParamAny.
(ErrorMessageDecl): New procedure.
(checkIncorrectMeta): Replace call to MetaErrorT2 with
ErrorMessageDecl.
(ComparisonMixTypes): Add varleft and varright parameters.
Adjust all callers of ComparisonMixTypes.
* gm2-compiler/M2MetaError.def (MetaErrorDecl): New procedure.
* gm2-compiler/M2MetaError.mod (MetaErrorDecl): New procedure.
* gm2-compiler/M2Options.def (SetXCode): Add -fd flag description
to comment.
* gm2-compiler/M2Options.mod (SetXCode): Add -fd flag description
to comment.
* gm2-compiler/M2Quads.mod (CheckBreak): New procedure.
Replace NoOfParam with NoOfParamAny.
Replace IsVarParam with IsVarParamAny.
(FailParameter): Reimplement using GetVarDeclFullTok.
Generate message for formal parameter, actual parameter and
declaration of actual parameter.
(WarnParameter): Ditto.
(CheckBuildFunction): Reimplement error message using MetaErrorT1.
* gm2-compiler/M2Range.mod: Replace NoOfParam with NoOfParamAny.
Replace IsVarParam with IsVarParamAny.
* gm2-compiler/M2Scaffold.mod (DeclareScaffoldFunctions): Call
PutProcedureDefined after every procedure declaration.
(DeclareArgEnvParams): Add ProperProcedure parameter to PutParam.
* gm2-compiler/M2Size.mod (MakeSize): Add DefProcedure parameter
to PutFunction.
* gm2-compiler/M2Swig.mod: Replace NoOfParam with NoOfParamAny.
Replace IsVarParam with IsVarParamAny.
* gm2-compiler/M2SymInit.mod: Ditto.
* gm2-compiler/M2System.mod (InitSystem): Add DefProcedure
parameter to PutFunction.
* gm2-compiler/P1SymBuild.mod (StartBuildProcedure): Reimplement.
(EndBuildProcedure): Ditto.
(EndBuildForward): Ditto.
* gm2-compiler/P2Build.bnf (BuildProcedureDefinedByForward):
Remove.
(BuildProcedureDefinedByProper): Ditto.
(ForwardDeclaration): Remove BuildProcedureDefinedByForward.
(BuildNoReturnAttribute): Remove parameter.
* gm2-compiler/P2SymBuild.def (BuildNoReturnAttribute): Remove
parameter.
(BuildProcedureDefinedByForward): Remove.
(BuildProcedureDefinedByProper): Ditto.
* gm2-compiler/P2SymBuild.mod (Import): Remove
AreParametersDefinedInDefinition,
AreParametersDefinedInImplementation,
AreProcedureParametersDefined,
ParametersDefinedInDefinition,
ParametersDefinedInImplementation,
GetProcedureDeclaredDefinition,
GetProcedureDeclaredForward,
GetProcedureDeclaredProper,
GetParametersDefinedByForward,
GetParametersDefinedByProper and
PutProcedureNoReturn.
Add PutProcedureParametersDefined,
GetProcedureParametersDefined,
GetProcedureKindDesc,
GetProcedureDeclaredTok,
GetProcedureKind,
GetReturnTypeTok,
SetReturnOptional,
IsReturnOptional,
PutProcedureNoReturn and
PutProcedureDefined.
(Debug): New procedure.
(P2StartBuildDefModule): Space formatting.
(BuildVariable): Reimplement to record full declaration.
(StartBuildProcedure): Reimplement using token to determine
the kind of procedure.
(BuildProcedureHeading): Ditto.
(BuildFPSection): Ditto.
(BuildVarArgs): Ditto.
(BuildOptArg): Ditto.
(BuildProcedureDefinedByForward): Remove.
(BuildProcedureDefinedByProper): Ditto.
(BuildFormalParameterSection): Reimplement so that the
quad stack is unchanged.
(CheckFormalParameterSection): Ditto.
(RemoveFPParameters): New procedure.
(ParameterError): Reimplement.
(StartBuildFormalParameters): Add annotation.
(ParameterMismatch): Reimplement.
(EndBuildFormalParameters): Reimplement to check against
all procedure kinds.
(GetSourceDesc): Remove.
(GetCurSrcDesc): Ditto.
(GetDeclared): Ditto.
(ReturnTypeMismatch): Reimplement.
(BuildFunction): Ditto.
(BuildOptFunction): Ditto.
(CheckOptFunction): New procedure.
(BuildNoReturnAttribute): Remove parameter and obtain
procedure symbol from quad stack.
(CheckProcedureReturn): New procedure.
* gm2-compiler/P3SymBuild.mod (BuildOptArgInitializer):
Preserve ProcSym tok on the quad stack.
Add Assert.
* gm2-compiler/PCSymBuild.mod (fixupProcedureType): Replace
NoOfParam with NoOfParamAny.
* gm2-compiler/SymbolTable.def (GetNthParam): Add ProcedureKind
parameter.
(PutFunction): Ditto.
(PutOptFunction): Ditto.
(IsReturnOptional): Ditto.
(PutParam): Ditto.
(PutVarParam): Ditto.
(PutParamName): Ditto.
(PutProcedureNoReturn): Ditto.
(IsProcedureNoReturn): Ditto.
(IsVarParam): Ditto.
(IsUnboundedParam): Ditto.
(NoOfParam): Ditto.
(ForeachLocalSymDo): Ditto.
(GetProcedureKind): Ditto.
(GetProcedureDeclaredTok): Ditto.
(PutProcedureDeclaredTok): Ditto.
(GetReturnTypeTok): Ditto.
(PutReturnTypeTok): Ditto.
(PutParametersDefinedByForward): New procedure.
(PutProcedureParametersDefined): Ditto.
(PutProcedureDefined): Ditto.
(GetParametersDefinedByProper): Ditto.
(GetProcedureDeclaredForward): Ditto.
(GetProcedureDeclaredProper): Ditto.
(PutProcedureDeclaredProper): Ditto.
(GetProcedureDeclaredDefinition): Ditto.
(PutProcedureDeclaredDefinition): Ditto.
(GetProcedureDefined): Ditto.
(PutUseOptArg): Ditto.
(UsesOptArg): Ditto.
(PutOptArgInit): Ditto.
(SetReturnOptional): Ditto.
(UsesOptArgAny): Ditto.
(GetProcedureKindDesc): Ditto.
(IsReturnOptionalAny): New procedure function.
(GetNthParamAny): Ditto.
(NoOfParamAny): Ditto.
(IsProcedureAnyNoReturn): Ditto.
(AreParametersDefinedInImplementation): Remove.
(ParametersDefinedInImplementation): Ditto.
(AreParametersDefinedInDefinition): Ditto.
(AreProcedureParametersDefined): Ditto.
(ParametersDefinedInDefinition): Ditto.
(ProcedureParametersDefined): Ditto.
(PutParametersDefinedByProper): Ditto.
(PutProcedureDeclaredForward): Ditto.
(GetParametersDefinedByForward): Ditto.
(GetProcedureParametersDefined): Ditto.
(PushOffset): Ditto.
(PopSize): Ditto.
(PushParamSize): Ditto.
(PushSumOfLocalVarSize): Ditto.
(PushSumOfParamSize): Ditto.
(PopOffset): Ditto.
(PopSumOfParamSize): Ditto.
* gm2-compiler/SymbolTable.mod (MakeProcedure): Reimplement.
(PutProcedureNoReturn): Add ProcedureKind parameter.
(GetNthParam): Ditto.
(PutFunction): Ditto.
(PutOptFunction): Ditto.
(IsReturnOptional): Ditto.
(MakeVariableForParam): Ditto.
(PutParam): Ditto.
(PutVarParam): Ditto.
(PutParamName): Ditto.
(AddParameter): Ditto.
(IsVarParam): Ditto.
(IsVarParamAny): Ditto.
(NoOfParam): Ditto.
(HasVarParameters): Ditto.
(IsUnboundedParam): Ditto.
(PutUseVarArgs): Ditto.
(UsesVarArgs): Ditto.
(PutUseOptArg): Ditto.
(UsesOptArg): Ditto.
(UsesOptArgAny): Ditto.
(PutOptArgInit): Ditto.
(IsProcedure): Ditto.
(IsPointer): Ditto.
(IsRecord): Ditto.
(IsArray): Ditto.
(IsEnumeration): Ditto.
(IsUnbounded): Ditto.
(IsSet): Ditto.
(IsSetPacked): Ditto.
(CheckUnbounded): Ditto.
(IsOAFamily): Ditto.
(IsModuleWithinProcedure): Ditto.
(GetDeclaredDef): Ditto.
(GetDeclaredMod): Ditto.
(GetDeclaredFor): Ditto.
(GetProcedureDeclaredForward): Ditto.
(GetProcedureKind): Ditto.
(PutProcedureDeclaredForward): Ditto.
(GetProcedureDeclaredTok): Ditto.
(GetProcedureDeclaredProper): Ditto.
(PutProcedureDeclaredTok): Ditto.
(PutProcedureDeclaredProper): Ditto.
(GetReturnTypeTok): Ditto.
(GetProcedureDeclaredDefinition): Ditto.
(PutReturnTypeTok): Ditto.
(PutProcedureDeclaredDefinition): Ditto.
(GetProcedureKindDesc): Ditto.
(IsProcedureVariable): Ditto.
(IsAModula2Type): Ditto.
(GetParam): Ditto.
(ProcedureParametersDefined): Ditto.
(AreParametersDefinedInImplementation): Remove.
(AreParametersDefinedInDefinition): Ditto.
(AreProcedureParametersDefined): Ditto.
(IsSizeSolved): Ditto.
(IsOffsetSolved): Ditto.
(IsValueSolved): Ditto.
(IsSumOfParamSizeSolved): Ditto.
(PushSize): Ditto.
(PushOffset): Ditto.
(PopSize): Ditto.
(PushValue): Ditto.
(PushParamSize): Ditto.
(PushSumOfLocalVarSize): Ditto.
(PushSumOfParamSize): Ditto.
(PushVarSize): Ditto.
(PopValue): Ditto.
(PopSize): Ditto.
(PopOffset): Ditto.
(PopSumOfParamSize): Ditto.
(PutParametersDefinedByForward): New procedure.
(PutProcedureParametersDefined): Ditto.
(PutProcedureDefined): Ditto.
(GetParametersDefinedByProper): Ditto.
(GetProcedureDeclaredForward): Ditto.
(GetProcedureDeclaredProper): Ditto.
(PutProcedureDeclaredProper): Ditto.
(GetProcedureDeclaredDefinition): Ditto.
(PutProcedureDeclaredDefinition): Ditto.
(GetProcedureDefined): Ditto.
(PutUseOptArg): Ditto.
(UsesOptArg): Ditto.
(PutOptArgInit): Ditto.
(SetReturnOptional): Ditto.
(UsesOptArgAny): Ditto.
(GetProcedureKindDesc): Ditto.
(PutParametersDefinedByProper): Ditto.
(GetParametersDefinedByProper): Ditto.
(IsReturnOptionalAny): New procedure function.
(IsProcedureAnyDefaultBoolean): Ditto.
(IsProcedureAnyBoolean): Ditto.
(IsProcedureAnyNoReturn): Ditto.
(GetNthParamAny): Ditto.
(NoOfParamAny): Ditto.
(IsProcedureAnyNoReturn): Ditto.
(GetProcedureKind): Ditto.
(IsVarParamAny): Ditto.
(IsUnboundedParamAny): Ditto.
(ForeachParamSymDo): New comment.
* gm2-libs-coroutines/SYSTEM.mod: Reformat.
gcc/testsuite/ChangeLog:
* gm2/iso/fail/badexpression3.mod: New test.
* gm2/iso/fail/badparam4.def: New test.
* gm2/iso/fail/badparam4.mod: New test.
Pan Li [Mon, 11 Nov 2024 07:39:40 +0000 (15:39 +0800)]
RISC-V: Fix one nit indent issue of ustrunc pattern [NFC]
Just notice the indent is not that right for ustrunc pattern from
the md files. Thus, make it correct. It is somehow very obvious
and will commit it after next 48H if no more comments.
gcc/ChangeLog:
* config/riscv/autovec.md: Fix indent format issue.
Thomas Koenig [Sat, 9 Nov 2024 18:24:43 +0000 (19:24 +0100)]
Reject UNSIGNED for Complex, some documentation fixes.
gcc/fortran/ChangeLog:
* check.cc (gfc_check_complex): Reject UNSIGNED.
* gfortran.texi: Update example program. Note that
CMPLX, INT and REAL also take unsigned arguments.
* intrinsic.texi (CMPLX): Document UNSIGNED.
(INT): Likewise.
(REAL): Likewise.
The second source register of insn "*extzvsi-1bit_addsubx" cannot be the
same as the destination register, because that register will be overwritten
with an intermediate value after insn splitting.
/* example #1 */
int test1(int b, int a) {
return ((a & 1024) ? 4 : 0) + b;
}
;; result #1 (incorrect)
test1:
extui a2, a3, 10, 1 ;; overwrites A2 before used
addx4 a2, a2, a2
ret.n
This patch fixes that.
;; result #1 (correct)
test1:
extui a3, a3, 10, 1 ;; uses A3 and then overwrites
addx4 a2, a3, a2
ret.n
However, it should be noted that the first source register can be the same
as the destination without any problems.
/* example #2 */
int test2(int a, int b) {
return ((a & 1024) ? 4 : 0) + b;
}
;; result (correct)
test2:
extui a2, a2, 10, 1 ;; uses A2 and then overwrites
addx4 a2, a2, a3
ret.n
gcc/ChangeLog:
* config/xtensa/xtensa.md (*extzvsi-1bit_addsubx):
Add '&' to the destination register constraint to indicate that
it is 'earlyclobber', append '0' to the first source register
constraint to indicate that it can be the same as the destination
register, and change the split condition from 1 to reload_completed
so that the insn will be split only after RA in order to obtain
allocated registers that satisfy the above constraints.
liuhongt [Thu, 7 Nov 2024 02:15:42 +0000 (18:15 -0800)]
Guard truncate from vector float to vector __bf16 with !flag_rounding_math && HONOR_NANS (BFmode).
hw instruction doesn't raise exceptions, turns sNAN into qNAN quietly,
and always round to nearest (even). Output denormals are always
flushed to zero and input denormals are always treated as zero. MXCSR
is not consulted nor updated.
W/o native instructions, flag_unsafe_math_optimizations is needed for
the permutation instructions.
Similar guard extend from vector __bf16 to vector float with
!HONOR_NANS (BFmode).
gcc/ChangeLog:
* config/i386/i386.md (truncsf2bf2): Add !flag_rounding_math
to the condition, require flag_unsafe_math_optimizations when
native instruction is not available.
* config/i386/mmx.md: (truncv2sfv2bf2): Ditto.
(extendv2bfv2sf2): Add !HONOR_NANS (BFmode) to the condition.
* config/i386/sse.md: (truncv4sfv4sf2): Add
!flag_rounding_math to the condition, require
flag_unsafe_math_optimizations when native instruction is not
available.
(truncv8sfv8bf2): Ditto.
(truncv16sfv16bf2): Ditto.
(extendv4bfv4sf2): Add !HONOR_NANS (BFmode) to the condition.
(extendv8bfv8sf2): Ditto.
(extendv16bfv16sf2): Ditto.
Richard Biener [Fri, 8 Nov 2024 12:25:13 +0000 (13:25 +0100)]
Do not cost the permute node that are part of SLP load-lanes
There are some SVE testsuite fails when forcing SLP because costing
prevents VLA vectors from being used as we add permute cost for
the VEC_PERM nodes that are part of a SLP load-lanes node. The
permutes only exist for representational reasons and pessimize SLP
vs non-SLP so the following makes sure to cost them as zero.
* tree-vect-slp.cc (vectorizable_slp_permutation_1): Return
zero for the permute nodes part of load-lanes.
Avoid these FAILs via 'only_for_offload_target [...]'. Also, for consistency
with other libgomp test cases, use effective-target specifiers of the libgomp
test suite. Fix-up for recent commit d334f729e53867b838e867375b3f475ba793d96e
"openmp: Add testcases for omp_max_vf".
Lewis Hyatt [Sun, 3 Nov 2024 01:59:24 +0000 (21:59 -0400)]
c++: Fix tree_contains_struct for TRAIT_EXPR
CODE_CONTAINS_STRUCT () currently reports that a TRAIT_EXPR contains a
TS_EXP struct, but it does not actually start with a TS_EXP as an initial
sequence. In modules.cc, when we stream out a tree, we explicitly check for the
TS_EXP case and call note_location(t->exp.locus) if so. Currently, this
actually queries the tree_common::chain field of a tree_trait_expr, which
seems not to be used, returning 0, which is interpreted as UNKNOWN_LOCATION
and does no harm.
If location_t will change to be 64 bytes, as is under discussion, then on
32-bit platforms (well those, such as sparc, on which uint64_t has higher
alignment requirement than a pointer), reading t->exp.locus will end up
reading a different field (tree_trait_expr::type1) due to padding
offsets. That field is not generally 0, and the resulting bogus location_t
is sufficiently problematic to cause an ICE in the line_map code. Pretty
much any modules testcase displays the issue, such as partial-2_a.C.
Resolve by initializing tree_contains_struct with the correct value for
TRAIT_EXPR, namely TS_TYPED.
gcc/cp/ChangeLog:
* cp-objcp-common.cc (cp_common_init_ts): Change TRAIT_EXPR from
TS_EXP to TS_TYPED.
projects / thirdparty / gcc.git / log
