In an inner valgrind, register the interim stack earlier
The "late" registration of the interim stack is causing false
positive non addressable memcheck errors in x86.
Registering the interim stack earlier avoids these false positive.
Note however that this is just a bypass for the problem.
I believe there is a more fundamental problem in m_stacks.c stack handling:
In case a thread is switching of stack while the new stack is not yet
registered, the stack switching code will keep the old stack as current stack,
as the stack corresponding to the new sp cannot be found.
In such a case, the zone between the old and new SP in this unknown stack
can be marked either as addressable (if unknown stack is growing)
or unaddressable (if unknown stack is shrinking).
Then at some point in time, the new stack is registered.
If just after that, the sp is changed so as to grow the stack
by nr of bytes not determinable at translation time, VG_(unknown_SP_update)
will be called, will detect the stack switch and will do nothing.
This leaves a certain zone of the stack (the grown zone) in a not
addressable state, as the stack switch code has in fact wrongly
guessed a stack switch, while in fact what should have been detected
is just a sp change in a stack previously unknown.
Proper fixes might be:
1. in "IF_STACK_SWITCH_SET_current_stack_AND_RETURN", do not return
if old and new sp are in the stack stack.
rather continue so as to execute correctly the sp change in
the newly discovered stack.
and/or
2. in the stack registration code (client request), if the current SP
is inside the stack being registered, also set the current stack
to the just registered stack pointer
None of these fixes are being looked at currently, as such changes looks
too adventurous close to 3.9.0
Julian Seward [Mon, 21 Oct 2013 10:07:43 +0000 (10:07 +0000)]
Enable sys_rt_sigsuspend on ppc64-linux. Not sure why this is
necessary, but I found it lying around in a ppc64 tree, so there
was probably some use case at some point.
Julian Seward [Mon, 21 Oct 2013 10:05:33 +0000 (10:05 +0000)]
In 64 bit mode, allow 64 bit return values from clean helper calls.
This makes SMC checking calls work (even though they are irrelevant
on PPC targets). Fixes #309430.
Mark Wielaard [Fri, 18 Oct 2013 13:11:05 +0000 (13:11 +0000)]
Don't report BMI support when AVX support is missing.
Bug #326113. This is a bit conservative, but it is what the linux kernel
also seems to be doing. If AVX support is missing (because the OS doesn't
save the wide registers), then also don't report supporting BMI.
Julian Seward [Fri, 18 Oct 2013 11:18:45 +0000 (11:18 +0000)]
Followup to r13652 (make the translation cache size be command-line
controllable): reduce MAX_N_SECTORS to 24, speed up Sector
initialisation, wording tweaks.
Carl Love [Fri, 18 Oct 2013 01:20:11 +0000 (01:20 +0000)]
This commit adds testing support for the following instructions:
vaddcuq, vadduqm, vaddecuq, vaddeuqm,
vsubcuq, vsubuqm, vsubecuq, vsubeuqm,
vbpermq and vgbbd.
Carl Love [Fri, 18 Oct 2013 01:19:06 +0000 (01:19 +0000)]
This commit adds support for the following instructions:
vaddcuq, vadduqm, vaddecuq, vaddeuqm,
vsubcuq, vsubuqm, vsubecuq, vsubeuqm,
vbpermq and vgbbd.
The vgbbd instruction required a new Iop -- Iop_PwBitMtxXpose64x2.
All other instructions were emulated using existing Iops.
Allow the user to dimension the translation cache
A previous commit had decreased to 6 (on android) and increased to 16
(other platforms) the nr of sectors in the translation cache.
This patch adds a command line option to let the user specify
the nr of sectors as e.g. 16 sectors might be a lot and cause
an out of memory for some workloads or might be too small for
huge executable or executables using a lot of shared libs.
Allow tools to provide some statistics in suppression list produced at the end
Option -v outputs a list of used suppressions. This only gives
the nr of times a suppression was used.
For a leak search, this only gives the nr of loss records that
have been suppressed, but it does not give additional needed details
to understand more precisely what has been suppressed
(i.e. nr of blocks and nr of bytes).
=> Add in the tool interface update_extra_suppression_use and
print_extra_suppression_info functions to allow the tool to record
additioonal use statistics for a suppression. These statistics
can be done depending on the error (and its data) which is suppressed.
Use this in memcheck for the leak suppressions, to maintain and output
the nr of blocks and bytes suppressed by a suppression during
the last leak search.
Julian Seward [Wed, 16 Oct 2013 08:53:07 +0000 (08:53 +0000)]
Connect up the xacq_xrel test to the build system. Also, make the
TSX configure test check for that the assembler can deal with
xacquire and xrelease prefixes.
SIGSEGV/SIGBUS specific handling on s390, to cope with kernel peculiarity
On s390, the linux kernel does not deliver the exact address that
caused a SEGV but rather this address rounded down to a page boundary.
Also, old kernels do not deliver the address that caused a SIGBUS,
but deliver 0.
So, on s390, handle SIGSEGV and SIGBUG by always skipping one page
starting from the current value of the ptr scanning position.
As we need a correct value of ptr on this platform in the longjmp-ed
code, ptr is marked as volatile.
The following Iops were added to support the above instructions:
Iop_BCDAdd, Iop_BCDSub,
Iop_PolynomialMulAdd8x16, Iop_PolynomialMulAdd16x8,
Iop_PolynomialMulAdd32x4, Iop_PolynomialMulAdd64x2,
Iop_CipherV128, Iop_CipherLV128, Iop_CipherSV128,
Iop_NCipherV128, Iop_NCipherLV128,
Iop_SHA512, Iop_SHA256, Iop_Clz64x2
Julian Seward [Mon, 14 Oct 2013 14:09:35 +0000 (14:09 +0000)]
Update expected output following r13642, which fixes #323432
(When calling pthread_cond_destroy or pthread_mutex_destroy
with initializers as argument Helgrind (incorrectly)
reports errors.)
This introduces a new race report (but no new race) in
some conditions. I think this is OK because the race only
occurs in the case where the program is buggy (racey) anyway.
Julian Seward [Mon, 14 Oct 2013 13:51:25 +0000 (13:51 +0000)]
Fix #323432: When calling pthread_cond_destroy or pthread_mutex_destroy
with initializers as argument Helgrind (incorrectly) reports errors.
(Peter Boström, valgrind@pbos.me)
Julian Seward [Mon, 14 Oct 2013 12:13:52 +0000 (12:13 +0000)]
For pthread_cond_destroy, don't report a false it's-still-waited-on
error if in fact the last wait finished with ETIMEDOUT.
Fixes #324149. (Peter Boström, valgrind@pbos.me)
Fix use of uninit heuristic set for monitor command
* initialise leak_check heuristic parameter in the leak_check monitor command
* show the default value (none heuristic) in the monitor help command
(none value chosen as default as this gives a backward compatible
behaviour).
* document the heuristic leak check parameter in memcheck manual
monitor command section
Carl Love [Wed, 9 Oct 2013 17:56:34 +0000 (17:56 +0000)]
Power PC, add the two privileged Transactional Memory instructions.
The initial Transactional Memory instruction patch did not include the two
privileged (OS) instructions treclaim and trechkpt. VEX commit 2784 added
the support for these two instructions.
This patch adds a touch test to make sure all of the POWER Transactional
memory instrutions are recognized by Valgrind. All of the the Transactional
Memory instructions, with the exception of tbegin, are treated as NOPs in the
first implementation. The tbegin instruction causes the transaction to fail
thus no additional Transactional Memory instructions on the successful
transaction path would be executed in a real program. This test just makes
sure each instruction is actually recognized by Valgrind.
Carl Love [Wed, 9 Oct 2013 17:52:01 +0000 (17:52 +0000)]
Power PC, add the two privileged Transactional Memory instructions.
The initial Transactional Memory instruction patch did not include the two
privileged (OS) instructions. This patch adds support for the two
instructions, treclaim and trechkpt.
Fix leak scan SEGV catcher when ptr starts in unreadable page (readable for aspacemgr)
The fault catcher installed during leak scan to catter e.g. for
possible desynchronisation between real protection and aspacemgr
was not activated when the scanned ptr was directly pointing in
a desynchronised page.
This was (initially only) visible on ppc32 (gcc110) as the page size of
gcc110 is big (64 K).
=> modified the leak-segv-jmp test so as to produce the problem also
on systems with smaller pages.
The fix consists in calling the setjmp before the scan loop,
and skip the bad address which has been recorded by the fault
catcher.
Also, deemed better to just skip one single Addr rather than a full page
(e.g. to skip less data in case some addresses are unreadable e.g.
on strange hardware).
Performance of the leak scan has been measured, seems slightly
faster on x86,amd64 and ppc32. Slightly slower on ppc64.
Also if verbose argument is given, outputs the nr of bytes skipped
due to fault.
* Remove dead code in m_oset.c VG_(OSetGen_ResetIterAt)
The code at the end of VG_(OSetGen_ResetIterAt) was unreachable
(detected by BEAM checker).
Looking at SVN, the initial commit of VG_(OSetGen_ResetIterAt)
already contained this deadcode.
* pub_tool_oset.h was wrongly indicating that signed words could
be used for fast cmp oset.
* modified memcheck/tests/unit_oset.c to test VG_(OSetGen_ResetIterAt)
* modified memcheck/tests/unit_oset.c to not use signed words
(it was previously using signed words, but only with positive values)
Florian Krohm [Fri, 4 Oct 2013 21:13:16 +0000 (21:13 +0000)]
Disable drd/tests/std_thread.cpp for clang.
clang 3.3 produces an error message for /usr/include/c++/4.6/chrono
which happens to get included somewhere inside <thread>.
This happens with C++ headers from:
gcc (Ubuntu/Linaro 4.6.3-1ubuntu5) 4.6.3.
Florian Krohm [Fri, 4 Oct 2013 21:12:17 +0000 (21:12 +0000)]
Adjust CFLAGS and CXXFLAGS for compilation with clang. The current
setting suppresses almost all warnings originating in source code
constructs. It does ot yet suppress warnings from unrecognised command
line flags as they may be the reason for regression test failures
which have not yet been investigated.
Florian Krohm [Fri, 4 Oct 2013 11:35:50 +0000 (11:35 +0000)]
Add a few feature tests to configure.ac because clang does not
understand the following:
- nested functions
- -gstabs option
- loopnel instruction
- addr32 in asm statements
- 'p' constraint in asm statements
Florian Krohm [Fri, 4 Oct 2013 11:29:26 +0000 (11:29 +0000)]
Remove 4 tests of the pextrw instruction.
Those tests were rejected by clang and according to the
analysis below by Tom Hughes do not add anything new.
Analysis:
I'm not 100% sure that clang is right though - the Intel manual
clearly describes that argument as "reg" rather than "r32" which
is why I will have included the 64 bit version in the test. It also says:
"The upper bits of r32 or r64 is zeroed."
and:
"If the destination operand is a general-purpose register, the
default operand size is 64-bits in 64-bit mode."
which basically means that REX.W is implied for this op and there is
no way to encode a 32 bit version when running in 64 bit mode.
So in principle you could encode it as:
44 0f c5 ce 00 pextrw $0x0,%mm6,%r9d
or:
4c 0f c5 ce 00 pextrw $0x0,%mm6,%r9
but in fact gcc assembles both versions to the first form.
Equally you could argue that as REX.W is implied both versions
should disassemble as %r9.
So I think clang is being overly picky, and if it was only going to
accept one version I would argue it should be %r9 not %r9d!
In practical terms dropping the second set of tests doesn't lose us anything though.
Fix compilation problem of memcheck/tests/leak-segv-jmp on ppc32
With the change, the test compiles on ppc32.
However, the test fails miserably with
Segmentation fault
while the whole purpose of the test was to see the leak search
would *not* segfault.
More investigations needed, but still committing as is to let
the tests compile and run.
Carl Love [Thu, 3 Oct 2013 21:43:10 +0000 (21:43 +0000)]
Phase 4 support for IBM Power ISA 2.07
This patch adds testcases for the following instructions added
in phase 4. The instructions are for doing various arithmetic,
logic, and load/store VSX operations:
Florian Krohm [Thu, 3 Oct 2013 20:54:52 +0000 (20:54 +0000)]
Change some inline assembler so it is no longer rejected by clang
as suggested by John Reiser and Greg Parker.
It seems that GCC has a more relaxed attitude about what it accepts
as valid input.
Carl Love [Wed, 2 Oct 2013 17:48:48 +0000 (17:48 +0000)]
The test case for the Transaction Memory instructions failes with older
compilers as the -mhtm flag is not known. The patch fixes the makefile
issue and addes #defines to the testcase code.
The testcase was added in valgrind commit 13607.
The bugzilla for adding the TM instruction support is 323803
Carl Love [Wed, 2 Oct 2013 16:28:57 +0000 (16:28 +0000)]
IBM POWER PC, Add the Transactional Memory test case
The test case for the transaction memory instructions executes the
failure path when run under valgrind. This is since the initial
Transaction Memory implemnetation is to simply fail the TBEGIN instruction
forcing the execution flow to take the failure path. When the
test case is executed on the real hardware, the success path will
be taken. Only the TBEGIN instruction actually does anything. All other
transactional memory instructions are NOPs since only failure path is executed
and it assumed to not have any transactional memory instructions on it.
Signed-off-by: Carl Love <cel@us.ibm.com>
VEX commit revision 2780
Bugzilla 323803
projects / thirdparty / valgrind.git / log
