Joy Zou [Thu, 23 Jul 2026 13:21:57 +0000 (15:21 +0200)]
power: regulator: ADD PMIC PF9453 support
Add regulator support for NXP PMIC pf9453 for imx91 qsb.
Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Joy Zou <joy.zou@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Rebased [1] on main and LDO SNVS access / checkpatch fixed. See also [2]
[1] https://patchwork.ozlabs.org/project/uboot/patch/20240930035531.27079-4-peng.fan@oss.nxp.com/
[2] https://lists.u-boot-project.org/pipermail/u-boot/2026-July/625613.html Signed-off-by: Krzysztof Drobiński <krzysztof@kd-solutions.pl>
Joy Zou [Thu, 23 Jul 2026 13:21:56 +0000 (15:21 +0200)]
power: pmic: ADD PMIC PF9453 support
Support NXP PMIC pf9453.
Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Joy Zou <joy.zou@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Rebased [1] on main and checkpatch fixed. See also [2]
[1] https://patchwork.ozlabs.org/project/uboot/patch/20240930035531.27079-3-peng.fan@oss.nxp.com/
[2] https://lists.u-boot-project.org/pipermail/u-boot/2026-July/625613.html Signed-off-by: Krzysztof Drobiński <krzysztof@kd-solutions.pl>
Eric Chung [Wed, 22 Jul 2026 15:21:16 +0000 (23:21 +0800)]
mmc: enable CMD23 for multi-block transfers
Enable the support for the CMD23 (SET_BLOCK_COUNT) command to
manage multi-block read/write operations. This allows the MMC
core to use CMD23 in preference to the legacy CMD18/CMD25 plus
CMD12 sequence, reducing command overhead and improving I/O
performance on multi-block transfers.
Signed-off-by: Eric Chung <eric.chung@riscstar.com> Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
[ Drop MMC_CAP_CMD32 from mvebu_mmc.h ] Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 13 Jul 2026 13:32:56 +0000 (21:32 +0800)]
mmc: fix mmc_deinit regression when card is at 1.8V signaling
Commit 906ee6785b1c ("mmc: sd: Handle UHS-I voltage signaling without
power cycle") added detection of cards already operating at 1.8V
signaling via mmc_sd_card_using_v18(). This correctly handles the
warm-reboot scenario in mmc_startup().
However, mmc_deinit() strips ALL UHS capabilities from the card caps
and calls sd_select_mode_and_width() to downgrade the card before
kernel handoff. For a card that has switched to 1.8V, uhs_en is
already true (via OCR_S18R in mmc->ocr), so sd_select_mode_and_width()
attempts UHS mode selection -- but no UHS modes remain in the filtered
caps. The non-UHS fallbacks (SD_HS, MMC_LEGACY) are 3.3V speed modes
which, when selected while signaling at 1.8V, leave the card in an
inconsistent state it cannot recover from without a power cycle.
Per SD Physical Layer Specification: "Once the card enters 1.8V
signaling mode, the card cannot be switched to 3.3V signaling without
power cycle. If the card receives CMD0, card returns to Idle state but
still works with SDR12 timing."
Fix by using a UHS capability mask that preserves UHS_SDR12 when the
card is operating at 1.8V. SDR12 is the minimum valid UHS-I mode and
is always available at 1.8V signaling per the SD specification, so the
card is left in a consistent (1.8V) state at a low, safe speed.
Fixes: 906ee6785b1c ("mmc: sd: Handle UHS-I voltage signaling without power cycle") Reviewed-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
mmc_bwrite() uses mmc->cfg->b_max directly to limit per-transfer block
count. The read path (mmc_bread()) correctly calls mmc_get_b_max()
which dispatches to the host driver get_b_max() callback. This callback
allows host drivers to enforce DMA boundary constraints based on the
buffer address.
Fix mmc_bwrite() to use mmc_get_b_max() to match the read path. This
requires removing the static qualifier from the non-DM mmc_get_b_max()
and adding its declaration to mmc_private.h.
Reviewed-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 13 Jul 2026 13:32:54 +0000 (21:32 +0800)]
mmc: sdhci: fix align_buffer memory leak on re-initialization
sdhci_init() allocates a 512KB aligned bounce buffer for controllers
with SDHCI_QUIRK_32BIT_DMA_ADDR. In the non-DM code path, sdhci_init()
is registered as ops->init and called on every mmc_init(). Each call
allocates a new buffer without checking or freeing the previous one,
leaking 512KB per re-initialization.
Fix by guarding the allocation with !host->align_buffer so it only
allocates on the first call.
Peng Fan [Mon, 13 Jul 2026 13:32:53 +0000 (21:32 +0800)]
mmc: rpmb: fix tautological condition in RPMB_REQ_READ_DATA validation
In rpmb_route_frames(), the RPMB_REQ_READ_DATA case checks
"req_cnt != 1 || !req_cnt" which is tautological -- !req_cnt (req_cnt
== 0) is always a subset of req_cnt != 1. The second operand is dead
code.
Based on the pattern of all other cases in the switch (RPMB_REQ_KEY,
RPMB_REQ_WRITE_DATA, RPMB_REQ_WCOUNTER) which validate rsp_cnt, this
was meant to be "req_cnt != 1 || !rsp_cnt". Without this fix, a caller
could pass rsp_cnt=0 for a read request without validation.
Peng Fan [Mon, 13 Jul 2026 13:32:52 +0000 (21:32 +0800)]
mmc: fix mmc_poll_for_busy() false timeout when card is ready
mmc_poll_for_busy() returns a false -ETIMEDOUT if the card becomes
ready on the exact iteration where timeout_ms reaches 0. The card-ready
check breaks out of the loop, but then the post-loop check
"if (timeout_ms <= 0)" fires and returns -ETIMEDOUT despite the card
being ready.
Fix by returning 0 directly when the card is ready instead of breaking
out of the loop. The only exit from the loop is now the timeout path,
so the post-loop code unconditionally returns -ETIMEDOUT.
Reviewed-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Bin Liu [Thu, 16 Jul 2026 14:54:37 +0000 (09:54 -0500)]
ram: k3-ddrss: fix ecc range checking bug
The original checking is wrong, it basically compares memory address
end = r->start + r->range;
with memory size:
if (end > (ddr_ram_size - ecc_res))
so the if() condition would be always true. This causes the ECC config
never take input from the devicetree.
Fixes: f43f71012254 ("ram: k3-ddrss: Add support for a partial inline ECC region") Signed-off-by: Bin Liu <b-liu@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Bin Liu [Thu, 16 Jul 2026 14:37:51 +0000 (09:37 -0500)]
Kconfig: ram: select FDT_64BIT for K3_INLINE_ECC
Commit f43f71012254 ("ram: k3-ddrss: Add support for a partial inline
ECC region") uses ofnode_get_addr_size() to read memory address and
size from devicetree using type fdt_addr_t and fdt_size_t. However
these data types are 32bit if CONFIG_FDT_64BIT is not defined on ARMv7
build.
So enable CONFIG_FDT_64BIT to retrieve correct 64bit memory address and
size from devicetree.
Signed-off-by: Bin Liu <b-liu@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
board: phytec: phycore_am68x: Turn off pmic watchdog
Starting with pmic firmware version 5 the watchdog is enabled with a
timeout window of 13 minutes by default.
The TI EVMs use a dip switch to control a gpio on the pmic which gets
configured as DISABLE_WDOG by the firmware.
On the phycore_am68x there is no such dip switch so pull resistors would be
necessary. Using mcu_i2c0 to turn off the pmic watchdog works with all
hardware and pmic firmware combinations.
When DEBUG_UART and SKIP_EARLY_DM are enabled, the serial console
is still probed before relocation even though DEBUG_UART already
configures the UART and provides early console output. The debug
UART configuration is sufficient until relocation, making full
serial driver initialization at this stage unnecessary.
Furthermore, the initialization is slow since it runs with dcache
disabled and is repeated again after relocation.
Skip pre-relocation serial probing in this configuration and
defer full UART initialization until after relocation. Update the
GENI UART probe logic accordingly.
This removes redundant UART initialization and improves boot
performance.
The eMMC and SD card on the sc598 share pins, so they cannot be
used at the same time. Previously, this was managed with a patch applied
by the relevant build system, but patches are brittle and have to be
maintained. Instead, they have been replaced with two separate device trees
, one for eMMC and one for SD card, which inherit a shared base dtsi.
The build system can then select between the default device tree which
enabled eMMC or the other device tree which enables SD card support.
James Hilliard [Thu, 9 Jul 2026 02:29:00 +0000 (20:29 -0600)]
tools: binman: pass KEYDIR to FIT entries
U-Boot's Makefile passes KEYDIR to direct mkimage invocations, but
internal binman FIT builds only receive the generic BINMAN_INDIRS search
path. Adding KEYDIR to BINMAN_INDIRS treats it as one more input-file
search path: FIT entries still auto-detect a key directory from all
include directories, so an explicit KEYDIR may not be the directory that
gets passed to mkimage. It also makes a key-only directory part of the
generic blob lookup path.
Forward KEYDIR as a binman entry argument named keydir, matching the
existing entry-argument mechanism used for BL31, TEE, of-list and other
U-Boot build inputs. FIT entries use that directory directly for
mkimage -k when fit,sign or fit,encrypt is enabled, falling back to the
include-directory autodetection when keydir is not provided.
Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
pinctrl: single: parse gpio-range as a raw array (O(N^2) -> O(N))
single_add_gpio_func() calls ofnode_parse_phandle_with_args() once per
gpio-range entry. With a flat device tree, every call re-iterates the
property from index 0 and, because cellname is set, performs an
fdt_node_offset_by_phandle() (a full-FDT scan) at every step. The total
cost is therefore quadratic in the number of entries and proportional to
the size of the device tree.
The impact depends on when the pinctrl is probed. On the J722S EVM
defconfig, pinctrl@f4000 (main_pmx0, the SoC's stock 7-entry gpio-range)
is probed after relocation (caches on): single_add_gpio_func() takes
~18 ms there and ~1 ms with this change. When the node is probed before
relocation (caches off) the same parse takes hundreds of ms; on a board
that probes it pre-relocation and runs LPDDR4 clocked down it reached
723 ms, cut to 22 ms here. Any pinctrl-single user with a populated
gpio-range property pays this cost.
The phandle target is never dereferenced by this function (only the
argument cells are stored), so resolve it only for the first entry to
learn the per-entry cell count, then read the argument cells directly
with ofnode_read_u32_index() and allocate the ranges in one block. A
zero phandle still terminates the list, as in the original loop. This
follows the existing pinctrl-single,gpio-range usage observed in current
DTs, where entries use the same provider and therefore a uniform
per-entry cell count.
configs: am62ax_evm_r5_ethboot: Enable config options required for Ethernet boot
The R5 SPL SRAM size is limited and cannot accommodate both MMC boot and
Ethernet boot config options simultaneously. Add a dedicated defconfig
that enables the Ethernet boot on SK-AM62A-LP for R5 SPL stage.
* sandbox: fix enum host_platform_flags description
* switch from setenv to env set and from printenv to env print
* document Renesas R-Car Gen5 RSIP Cortex-R52 start
* thead: lpi4a: detail how to enable fastboot
UEFI:
* unify and correct GUID selection for security database variables
* test: check default GUID selection of security database variables
* set correct frame buffer address
* check efi_deserialize_load_option() in get_dp_device()
Android:
* avb: Update libavb to AOSP 1.3.0
* avb: Fix memory leak on mmc_part
* bootmeth_android: Fix memory leaks for AvbOps and verify-data
* bootmeth_android: Fix out-of-bounds access in bootconfig parsing
USB Gadget:
* cmd: ums: Set serial# on iSerial device descriptor
* dwc2: Set maxpacket_limit and endpoint capabilities to prepare for
udc core migration
* ci_udc: Fix ep type in ep_enable()
* ci_udc: Set usb request status to handle complete callback
* ci_udc: Ensure dtds are inactive before completing request
- Support authenticating signed Mcore container image on i.MX9.
- Support booting CM70, CM71 and CM33 sync cores on i.MX9.
- Add i.MX SNVS RTC driver.
- Detect RAM sizes on Toradex smarc and aquila i.MX95 boards.
- Add support for the Librem5 devkit.
- Subtract half a cycle instead of three quarters of a cycle after DQS
gating calibration on i.MX6.
- Several tqma6 improvements.
- Add product ID support for new Toradex boards.
Tom Rini [Mon, 27 Jul 2026 19:56:03 +0000 (13:56 -0600)]
Merge branch 'main' of https://git.u-boot-project.org/u-boot/custodians/u-boot-sunxi
Beside a fix for a long standing bug in the A80 eMMC code, this adds
SPI booting support for the Allwinner A523/A527/T527 class of boards.
The second major feature is support for the secondary Ethernet controller
on that same SoC. This might not be as important as for the kernel (I
doubt that U-Boot acts as a router), but for once some boards only connect
the secondary EMAC, and on others people might have the boot server only
reachable via this port.
There are some smaller fixes and improvements still queued up, but they
need some more testing and are minor, so can land a bit later.
The world build timed out, but the rest passed, and I booted that briefly
on an A523 board with two Ethernet ports.
Tom Rini [Mon, 27 Jul 2026 17:05:58 +0000 (11:05 -0600)]
Merge tag 'u-boot-rockchip-2026.10-20260724' of https://git.u-boot-project.org/u-boot/custodians/u-boot-rockchip
- Switched to use upstream pinctrl header include,
- Dropped SDHCI DT properties in U-Boot-specific DT for NanoPi R5 as
most are present upstream and those which aren't are breaking devices,
- Fixed ECC strength mismatch between reading and writing on non-0
NAND chips configured as boot medium (nand-is-boot-medium),
- Moved Simon to reviewer for ARM ROCKCHIP,
- Fixed build issue related to GPT capsule support accessing a struct
member only present when CONFIG_PARTITION_TYPE_GUID is set,
- Added support for new devices:
- Anbernic RG-DS
- ROC-RK3588S-PC
Tom Rini [Mon, 27 Jul 2026 15:07:51 +0000 (09:07 -0600)]
Merge patch series "fs: regression-safe load <iface> for null_dev_desc_ok fstypes"
Vincent Jardin <vjardin@free.fr> says:
3 commits providing documentation of impacts and testing the dispatch
for null_dev_desc_ok fstypes (semihosting, ubifs, sandbox) in the
generic `load <iface> ...` command.
The test does not cover ubifs, I could not make it work with
qemu. Since the code logic is there and testing with semihost
is done, it should cover the needed cases.
Hem Parekh [Mon, 27 Jul 2026 11:03:36 +0000 (13:03 +0200)]
efi_loader: check efi_deserialize_load_option() in get_dp_device()
get_dp_device() reads a Boot#### variable and passes its contents to
efi_deserialize_load_option() but ignores the return value. On failure
efi_deserialize_load_option() may return without having initialised the
caller's struct efi_load_option, and even on a malformed device path it
sets lo.file_path before validating it with efi_dp_check_length().
As a result get_dp_device() can proceed to walk lo.file_path with
efi_dp_split_file_path() (via efi_dp_dup()/efi_dp_size()) on a device
path that was never validated, or on an uninitialised pointer when the
variable is too short to be parsed. A device-path node with a length of
zero makes the walk loop forever, and a length below the 4-byte node
header leads to an out-of-bounds read. The Boot#### variable is
attacker-controlled in threat models where writing EFI variables does
not imply the ability to execute firmware code, so this is reachable
during capsule-on-disk processing at boot.
Check the return value and bail out, as every other caller of
efi_deserialize_load_option() already does.
Suggested-by: Hem Parekh <hemparekh1596@gmail.com> Cc: Hem Parekh <hemparekh1596@gmail.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
test: check default GUID selection of signature database variables
The name to GUID mapping that "env set -e" applies when no -guid
option is given was not covered by any test, which is how the wrong
default GUID for "dbr" went unnoticed until the previous commit.
Add a test case that enrolls each of db, dbx, dbt and dbr in setup
mode without an explicit -guid option and checks that every variable
is created under the image security database GUID and not under the
global variable GUID. Then enroll PK and KEK, also without -guid, and
check that both are created under the global variable GUID and not
under the image security database GUID. This is also the first
coverage of dbt and dbr anywhere under test/.
The signature database enrollment happens in setup mode because once
secure boot is enabled, efi_variable_authenticate() only accepts
writes to PK, KEK, db and dbx; PK and KEK are enrolled last because
installing PK leaves setup mode.
cmd: nvedit_efi: use efi_auth_var_get_guid() for the default GUID
do_env_set_efi() hand rolls the mapping from well known variable names
to their default vendor GUID and has already drifted from the canonical
name_type[] table in efi_var_common.c: it does not know "dbr", so
"env set -e dbr" operates on the variable under EFI_GLOBAL_VARIABLE_GUID
instead of the image security database GUID, silently creating a
variable that nothing will ever consume.
Convert the variable name to UTF-16 before selecting the GUID and let
efi_auth_var_get_guid() do the lookup. That function knows all
authenticated variables including "dbr" and falls back to
EFI_GLOBAL_VARIABLE_GUID for any other name, so behaviour is unchanged
for "db", "dbx", "dbt" and non-authenticated variables. Future
additions to the table now apply to the shell command automatically.
Since the conversion now happens before the value parsing loop, free
the UTF-16 name at the common exit label so the error path there does
not leak it.
Also drop the unmap_sysmem() call right after efi_set_variable_int():
the common exit path already unmaps the value for the -i case and frees
it otherwise, so the value was unmapped twice. On sandbox the second
call triggers a spurious "Address not mapped" warning for addresses
that get a tagged mapping.
Signed-off-by: Aristo Chen <aristo.chen@canonical.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Marek Vasut [Sat, 18 Jul 2026 23:45:49 +0000 (01:45 +0200)]
doc: Switch from printenv to env print
The "env" command is the recommended environment management command,
its "print" subcommand is the equivalent replacement for legacy "printenv"
command. Update the documentation to use the contemporary "env print"
command instead of legacy "printenv" command.
Note that the "printenv" command is unlikely to be removed from U-Boot
in the near future due to it being integral part of the command line
ABI.
Marek Vasut [Sat, 18 Jul 2026 23:45:48 +0000 (01:45 +0200)]
doc: Switch from setenv to env set
The "env" command is the recommended environment management command,
its "set" subcommand is the equivalent replacement for legacy "setenv"
command. Update the documentation to use the contemporary "env set"
command instead of legacy "setenv" command.
Note that the "setenv" command is unlikely to be removed from U-Boot
in the near future due to it being integral part of the command line
ABI.
If we use video copy, bit image transfers need to write to the in memory
copy of the physical frame buffer. Damage control will sync the changes
to the physical frame buffer.
Cyclic video copy will catch all changes done by EFI applications directly
accessing the frame buffer copy.
gopobj->mode.fb_base must be a valid pointer to memory and not a virtual
sandbox address.
With this change the block image transfer test works again on the sandbox.
setenv efi_selftest block image transfer
bootefi selftest
Fixes: a75cf70d23ac ("efi: Correct handling of frame buffer") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
fsa_user_info.gpios[] is a fixed 20-element array, but the number of
descriptors iterated and indexed comes from the FSA add-on board EEPROM:
board_info.sockgpios and board_info.ioexpgpios are u8 fields (up to 255
each) read via dm_i2c_read() with no upper bound.
fsa_config_gpios(), invoked automatically at boot from fsa_init(), loops
over info->gpios[i] for i < sockgpios + ioexpgpios, reading past the
20-element array (an out-of-bounds stack read whose contents are then
used to configure GPIOs and build names). do_fsa_gpio() validates the
console-supplied index only against the same EEPROM counts, so
"fsa gpio <i> ..." can memcpy() a descriptor to user_info.gpios[i] for i
up to 254 -- an out-of-bounds stack write that is then written back to
the EEPROM.
A malicious or swapped FSA add-on board EEPROM (only a valid checksum is
required, which the attacker can compute) thus yields OOB accesses on the
boot path and via the console command.
Clamp the descriptor count to ARRAY_SIZE(info->gpios) before iterating,
and reject any console index outside the array.
Paul Gerber [Mon, 13 Jul 2026 13:01:06 +0000 (15:01 +0200)]
board: tqma6: add kernel device tree handling for environment
Set the environment variable 'fdtfile' depending on ENET workaround
detection.
The function tqma6_get_fdt_configuration is implemented to be reusable
for configuration detection in multi-DTB FIT image and therefore returns
the devicetree name without the '.dtb' ending.
Set fdtfile only if CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is enabled and it
is currently unset.
The model string is loaded from the device tree variant. Therefore, the
overriding of the model string is being removed.
Signed-off-by: Paul Gerber <Paul.Gerber@tq-group.com> Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
TQMa6 SOM beginning with hardware rev. 0200 comes in two flavours:
With and without a hardware workaround for ENET errata err006687.
Therefore we need two flavours of device tree. To be able to detect
the presence of the workaround we need to check GPIO1_6 is connected
to I2C bus or not. If the I2C bus is detected, the workaround is not
used and separate I2C buses are used for the SoM and the baseboard.
Later on this detection will be used to select the correct devicetree
at runtime.
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
Max Merchel [Mon, 13 Jul 2026 13:01:02 +0000 (15:01 +0200)]
ARM: dts: tqma6: add boot phase properties
Add boot phase properties from U-Boot device tree.
This commit can be reverted if changes are integrated in upstreem
device trees and synced with U-Boot.
Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
Markus Niebel [Mon, 13 Jul 2026 13:01:01 +0000 (15:01 +0200)]
board: tqma6: change U-Boot device tree fragments
We will need GPIO to distinguish between SOM variants with / without
workaround for ENET errata. This is necessary to implement the
appropriate solution and remove code intended for the non-DM use case.
To support reuse, split them in SOM and baseboard specific parts.
Prepare fragments for use with SPL.
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
Marek Vasut [Fri, 10 Jul 2026 22:39:50 +0000 (00:39 +0200)]
arm64: imx: Handle both MMC2 and SD2 boot devices on Data Modul i.MX8M Mini eDM SBC
Handle both MMC2 and SD2 boot devices as SDMMC device 1 on
Data Modul i.MX8M Mini eDM SBC. In case the system boots from
a microSD card, the BootROM reports boot device as SD2_BOOT
instead of MMC2_BOOT. Continue booting from that SDMMC device
instead of falling back to SDP. Note that SDMMC device 1 is
the microSD slot on this device, SDMMC device 2 is the eMMC,
but BootROM reports the numbers the other way around, hence
the potential confusion in this commit message.
Fixes: 0b97a394f6b7 ("ARM: imx: Replace YModem with SDP on Data Modul i.MX8M Mini eDM SBC SPL") Signed-off-by: Marek Vasut <marex@nabladev.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Use alias-based RAM probing to detect different memory configurations
on Toradex Aquila iMX95. The address wrap-around is not linear: address
bits above the module capacity alias back with some low address bits
XORed (bit 32 -> XOR 0xc000), as measured on 4GB and 8GB modules.
During probing, skip the first 256MB, since that region is reserved.
Use alias-based RAM probing to detect different memory configurations
on Toradex SMARC iMX95. The address wrap-around is not linear: address
bits above the module capacity alias back with some low address bits
XORed (bit 32 -> XOR 0xc000), as measured on 4GB and 8GB modules.
During probing, skip the first 256MB, since that region is reserved.
Vincent Jardin [Wed, 15 Jul 2026 16:57:17 +0000 (18:57 +0200)]
test: py: load: check null_dev_desc_ok dispatch
Some pytest modules exercising the dispatch added by
fs: dispatch null_dev_desc_ok filesystems before lookup
test_load_semihosting.py:
"load semihosting - <addr> <file>" and the optional
[bytes] [pos] variant. Runs on qemu_arm64 with
CONFIG_SEMIHOSTING=y; reuses test_hostfs.py's host-staged
fixture.
test_load_sandbox.py:
"load sandbox - <addr> <file>" and the optional [bytes] [pos]
variant. Runs on sandbox (boardspec('sandbox')); the sandbox
fstype is registered with name="sandbox" and
null_dev_desc_ok=true,
so the same fs_lookup_null_dev_info() helper that
routes semihosting also routes the "sandbox".
A "load ubifs - <addr> <file>" test is intentionally not provided.
UBIFS is built on UBI on MTD, which requires some additional works
that are not available with qemu/sandbox-ing.
Signed-off-by: Vincent Jardin <vjardin@free.fr> Reviewed-by: Simon Glass <sjg@chromium.org>
Vincent Jardin [Wed, 15 Jul 2026 16:57:16 +0000 (18:57 +0200)]
doc: usage: cmd: load: null-block-device
Document the dispatch path added by the former commit
fs: dispatch null_dev_desc_ok filesystems before lookup
Add a null-block-device interfaces section that:
* lists the three fstypes that can benefit of it (semihosting, ubifs,
sandbox) and the CONFIG option that builds each
* explains the '-' convention for the unused <dev[:part]> field
Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Jardin <vjardin@free.fr> Reviewed-by: Simon Glass <sjg@chromium.org>
Vincent Jardin [Wed, 15 Jul 2026 16:57:15 +0000 (18:57 +0200)]
fs: dispatch null_dev_desc_ok filesystems before lookup
Filesystems that are null_dev_desc_ok (semihosting, ubifs) have
no UCLASS_BLK device under their ifname, so on real hardware
fs_set_blk_dev() always fails at the partition lookup.
The workaround was to add a per-filesystem
command (example cmd/ubifs.c), which duplicates the plumbing of
fstype_info.
Probe such entries with block_desc=NULL up front, so
load semihosting - <addr> <file>
works without a new command.
Sandbox boards that exercise the existing fallback through "host
bind" stay unchanged.
Signed-off-by: Vincent Jardin <vjardin@free.fr> Reviewed-by: Simon Glass <sjg@chromium.org>
Add missing firmware/optee node, so is can be both used and copied into
Linux device tree by optee_copy_firmware_node(). This is consistent with
other i.MX93 boards.
Marek Vasut [Sun, 5 Jul 2026 21:19:05 +0000 (23:19 +0200)]
binman: imx8mimage: Generate FSPI header in binman instead of mkimage
Stop depending on the current mkimage method of generating the FSPI
header, instead generate the FSPI header within binman itself. This
is more flexible, as the FSPI header properties can be configured
from within the board-specific DT instead of being hard-coded in
mkimage at build time.
Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Marek Vasut <marex@nabladev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
ge: common: vpd_reader: fix errloc array size in verify_bch()
errloc stores bit positions of errors returned by decode_bch().
The maximum number of correctable errors is ecc_bits, so errloc
must have ecc_bits entries. The array was allocated with data_length
entries instead, which is the number of EEPROM data bytes -- orders
of magnitude larger than needed and incorrect.
Fixes: b418dfe16e62 ("board: ge: make VPD code common") Signed-off-by: Md Shofiqul Islam <shofiqtest@gmail.com>
Marek Vasut [Tue, 30 Jun 2026 16:08:56 +0000 (18:08 +0200)]
arm64: dts: imx8m: Reinstate TEE ifdeffery
Since b57ed147939c ("dts: imx8m{m,n,p,q}: Make optee packaging optional")
the TEE node is always present in U-Boot proper fitImage, even if the
CONFIG_OPTEE is disabled because the u-boot.itb should not contain any
tee.bin. This is wasteful, and produces the following warning which is
also confusing to users:
"
Image 'image' is missing optional external blobs but is still functional: tee-os
/binman/section/fit/images/tee/tee-os (tee.bin):
See the documentation for your board. You may need to build Open Portable
Trusted Execution Environment (OP-TEE) and build with TEE=/path/to/tee.bin
"
Reinstate the CONFIG_OPTEE ifdeffery to mitigate the problem, but retain the
binman "optional" keyword at tee.bin .
Marek Vasut [Thu, 25 Jun 2026 14:17:29 +0000 (16:17 +0200)]
mx6: ddr: Subtract half a cycle instead of three quarters of a cycle after DQS gating calibration
The current DRAM calibration sequence is implemented based on NXP
AN4467 Rev.2 03/2015, which in chapter "12.3.2 Calibration Sequence
Setup with Predefined Data Content" states:
"
9. For each of the DQSx:
- Read the HW_DG_UPx value from the MMDC0/1_MPDGHWSTx, subtract the
value of 0xc0 (3/4 cycle).
"
However, the i.MX 6Solo/6DualLite Applications Processor Reference
Manual, Rev. 5, 05/2020, chapter "45.11.3.1.2 Hardware DQS Calibration
with pre-defined value" states:
"
35. Set (MPDGHWSTn[HW_DG_UPn][10:7] - 1) to MPDGCTRLn[DG_HC_DELn].
(We set the DQS gating value to be the upper limit value minus
1 half cycle)
"
The i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 6,
05/2020, chapter 44.11.3.1.2 Hardware DQS Calibration with pre-defined
value lists the same information. So do the following manuals:
- i.MX 6DualPlus/6QuadPlus Applications Processor Reference Manual, Rev. 3, 05/2020
chapter 46.11.3.1.2 Hardware DQS Calibration with pre-defined value
- i.MX 6SoloX Applications Processor Reference Manual, Rev. 4, 05/2020
chapter 40.11.3.1.2 Hardware DQS Calibration with pre-defined value
- i.MX 6UltraLite Applications Processor Reference Manual, Rev. 2, 03/2017
chapter 33.11.3.1.2 Hardware DQS Calibration with pre-defined value
- i.MX 6ULL Applications Processor Reference Manual, Rev. 1, 11/2017
chapter 35.11.3.1.2 Hardware DQS Calibration with pre-defined value
- i.MX 6ULZ Applications Processor Reference Manual, Rev. 0, 10/2018
chapter 29.11.3.1.2 Hardware DQS Calibration with pre-defined value
The NXP MMDC DDR Stress Test (3.0.0) tool seems to be have the same
way as the later document rather than the AN4467 application note,
and produces values similar to the values with subtracted 1/2 cycle.
Adjust the behavior to match the more recent Reference Manual and
the MMDC calibration tool.
Winbond W634GU6RB does show sporadic signs of instability without
this correction.
Signed-off-by: Marek Vasut <marex@nabladev.com> Tested-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Ye Li [Thu, 18 Jun 2026 01:19:36 +0000 (09:19 +0800)]
arm: dts: imx943-evk: Add label for gpio expander devices
Because the i2c address of some gpio expander devices are same, so
in dts they have same node name which lead to same gpio device name.
Users can't get the GPIO through GPIO API or GPIO command.
Add the label to each gpio expander node, hence give unique name.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 17 Jun 2026 14:14:46 +0000 (22:14 +0800)]
imx9: scmi: reset GPIO2 according its node status
Check the GPIO2 dts node status to determine reset it or not.
On iMX952 single SPL/U-Boot image is shared for both mx952evk
and mx952evkrpmsg SM configs. GPIO2 is assigned to M7 domain
in mx952evkrpmsg, and there is no active user of GPIO2 for
mx952evk and mx952evkrpmsg in SPL/U-Boot, so it is disabled in
DTS. Otherwise, reset GPIO2 will meet hang when working with
mx952evkrpmsg SM.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Mon, 27 Jul 2026 14:21:12 +0000 (11:21 -0300)]
imx9{4, 5, 52}_evk: power on mcore according to SM config
When working with SM config mx9{4,5,52}evkrpmsg, mcores are not booted
by ROM. Hence, power on the mcore and initialize TCM ECC in u-boot for
subsequent mcore booting.
Signed-off-by: Ye Li <ye.li@nxp.com>
[fabio: Adapted to mainline context] Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Ye Li [Mon, 27 Jul 2026 14:18:06 +0000 (11:18 -0300)]
imx9: bootaux: Support authenticate signed Mcore container image
Add new command bootaux_cntr to replace bootaux in secure boot
(CONFIG_AHAB_BOOT=y) to authenticate signed M33 core image.
The M33 image must be packed in container format and signed.
bootaux_cntr supports Mcore image loaded to TCM or run as
FlexSPI NOR XIP.
Signed-off-by: Ye Li <ye.li@nxp.com>
[fabio: Adapted to use gd->dram[i]] Signed-off-by: Fabio Estevam <festevam@gmail.com>
Although it has similar naming the Librem 5 Devkit is a completely
different design from the Librem 5 phone. It uses an imx8mq SOM from
Emcraft, a separate HDMI port instead of DisplayPort, different USB-C
chip, panel, etc.
This is based on a Emcraft's SOM documentation, Purism's downstream fork
and the available schematics of the devkit.
Link: https://developer.puri.sm/Librem5/Development_Environment/Boards/imx8.html Link: https://source.puri.sm/Librem5/dvk-mx8m-bsb Co-authored-by: Angus Ainslie <angus@akkea.ca> Co-authored-by: Manuel Traut <manut@mecka.net> Signed-off-by: Manuel Traut <manut@mecka.net> Tested-by: Manuel Traut <manut@mecka.net> Signed-off-by: Guido Günther <agx@sigxcpu.org>
[fabio: Removed the arch/arm/dts/Makefile entry that does not apply and
it is not needed as the board uses OF_UPSTREAM] Signed-off-by: Fabio Estevam <festevam@gmail.com>
Igor Opaniuk [Mon, 27 Jul 2026 10:08:54 +0000 (12:08 +0200)]
doc: android: refresh AVB provenance and pin libavb reference
Note that verification is performed by the libavb copy vendored under
lib/libavb/ (AVB version 1.3.0) and which parts are U-Boot-specific, and
pin the README reference to the exact upstream commit the vendored copy
corresponds to instead of a moving master branch.
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Igor Opaniuk [Mon, 27 Jul 2026 10:08:53 +0000 (12:08 +0200)]
libavb: update to AOSP 1.3.0
Re-sync the vendored libavb from AOSP external/avb, moving from the ~2019
snapshot (v1.1.0) to v1.3.0. v1.1.0 rejected any vbmeta whose required
libavb minor version was greater than 1 with UNSUPPORTED_VERSION; this
lifts that ceiling and picks up the accumulated upstream fixes.
Synced from commit a1fe228b8654 ("libavb: support chain partition no ab"),
which is where AVB version 1.3.0 was introduced; the vendored files match
this commit verbatim except for the -Wstrict-prototypes fixup noted below.
For more details check [1].
Functionality now parsed by the library:
- AvbVBMetaImageHeader.rollback_index_location (v1.2)
- AvbChainPartitionDescriptor flags / DO_NOT_USE_AB (v1.3)
- AvbHashtreeDescriptor FLAGS_CHECK_AT_MOST_ONCE
- AVB_HASHTREE_ERROR_MODE_PANIC
The AvbOps callback set is unchanged, so the integration layer in
common/avb_verify.c needs no changes.
U-Boot-specific adaptations are preserved rather than pulling upstream's
BoringSSL-oriented crypto restructure (sha/, boringssl/): the U-Boot port
in avb_sysdeps.h / avb_sysdeps_posix.c and the flat avb_sha.h /
avb_sha256.c / avb_sha512.c are kept as-is. The SHA API signatures are
unchanged, so the retained implementation is compatible with the updated
code.
Imported files keep U-Boot's SPDX-License-Identifier header style
and their upstream per-file licenses (avb_rsa.c stays MIT OR
BSD-3-Clause). The unused, Apache-2.0-licensed avb_crc32.c is not
imported.
The import keeps U-Boot's existing local fix from commit fbfcb614e05
("libavb: Fix a warning with clang-15"): avb_new_cmdline_subst_list() is
kept with a (void) parameter list instead of reverting to upstream's
empty () form, which clang rejects under -Werror,-Wstrict-prototypes.
serial: sifive: remove busy-loops from getc and putc ops
The DM serial framework in __serial_getc() and __serial_putc() already
retries when driver ops return -EAGAIN, calling schedule() between
attempts to service the watchdog.
sifive_serial_getc() and sifive_serial_putc() spin internally on
-EAGAIN, which prevents the framework from calling schedule(). This can
lead to watchdog timeouts when waiting for RX data or TX FIFO space.
Remove the busy-loops and return -EAGAIN directly from the underlying
helpers, letting the framework handle retries with proper watchdog
servicing. This is consistent with how other DM serial drivers (pl01x,
meson, cortina, etc.) implement their ops.
Signed-off-by: Naveen Kumar Chaudhary <naveen.osdev@gmail.com> Reviewed-by: Leo Yu-Chi Liang <leo.liang@sifive.com>
Charles Perry [Mon, 22 Jun 2026 19:43:07 +0000 (12:43 -0700)]
riscv: remove log_debug() in enable_caches()
log_debug() cannot be used before log_init() has been called. Remove the
log_debug() statement in enable_caches() since it is called before
log_init() in initcall_run_r().
This fixes a bug where a RISC-V system which does not have the "zicbom"
extension (such as PIC64-HPSC/HX) would get lost in an infinite loop in
log_dispatch().
Fixes: 9e859849e2ca ("riscv: cache: Add CBO instructions") Signed-off-by: Charles Perry <charles.perry@microchip.com> Reviewed-by: Leo Yu-Chi Liang <leo.liang@sifive.com>
Michal Simek [Fri, 15 May 2026 12:47:53 +0000 (14:47 +0200)]
riscv: Exclude ACLINT for TARGET_XILINX_MBV
The Xilinx MicroBlaze V platform does not have an ACLINT (Advanced
Core Local Interruptor) hardware block. The timer functionality is
provided through a different mechanism.
Exclude both RISCV_ACLINT and SPL_RISCV_ACLINT from being implied
for TARGET_XILINX_MBV while keeping the default behavior for other
generic RISC-V targets that do have ACLINT hardware.
spl/u-boot-spl: all -1382 data -360 rodata -200 text -822
Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Leo Yu-Chi Liang <leo.liang@sifive.com>
Michal Simek [Mon, 11 May 2026 08:31:52 +0000 (10:31 +0200)]
riscv: Skip riscv_cpu_setup() when CPU driver is disabled
Building on commit c64fc632a86a ("riscv: cpu: Use CONFIG_IS_ENABLED(CPU)
instead of plain ifdef"), add an early return in riscv_cpu_setup() when
CONFIG_CPU is not enabled. This allows platforms to save code space in
SPL by disabling CONFIG_SPL_CPU.
Without this patch, building U-Boot with CONFIG_CPU=n and CONFIG_EVENT=y
is broken: riscv_cpu_setup() is registered as an EVT_DM_POST_INIT_F event
spy, and when the CPU uclass is unavailable uclass_find_first_device()
returns no device, so the function returns -ENODEV. That in turn makes
event_notify_null() in dm_init_and_scan() fail and triggers a boot hang
("initcall initf_dm() failed"). Returning 0 early avoids that failure.
The compiler's dead-code elimination combined with --gc-sections
removes the unreachable code and all associated static data,
achieving significant size reduction without preprocessor guards:
Junhui Liu [Tue, 19 May 2026 12:58:32 +0000 (20:58 +0800)]
configs: radxa-cubie-a5e: enable the gmac1 controller
The Allwinner A527 SoC features two Ethernet controllers utilizing
different IP blocks. While gmac0 uses the older sun8i-emac IP, gmac1 is
based on the Synopsys DesignWare Ethernet QOS IP.
This enables the DWC_ETH_QOS_SUNXI driver and the required PHY interface
configurations in the defconfig for the Radxa Cubie A5E board,
activating the gmac1 port.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
[Andre: drop unneeded options] Reviewed-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Andre Przywara <andre.przywara@arm.com>
Junhui Liu [Tue, 19 May 2026 12:58:28 +0000 (20:58 +0800)]
net: dwc_eth_qos: add support for sun55i platform
The Allwinner sun55i (A523/A527/T527) platform features the Synopsys
DesignWare Ethernet QOS IP. To enable this GMAC controller in U-Boot,
this introduces the glue layer responsible for configuring the
corresponding clocks, resets, and syscon registers.
This implementation is directly ported from upstream Linux kernel commit f603808a98af ("net: stmmac: Add support for Allwinner A523 GMAC200").
Junhui Liu [Tue, 19 May 2026 12:58:29 +0000 (20:58 +0800)]
arm: mach-sunxi: add syscon driver for system-control nodes
The upstream Linux kernel relies on the sunxi_sram driver to bind the
system-control nodes as syscon devices. Since U-Boot lacks this SRAM
driver, peripheral drivers may fail to resolve the syscon node unless an
explicit "syscon" compatible is added into the device tree.
To address this, add a bare UCLASS_SYSCON driver that matches all
Allwinner system-control and SRAM controller compatibles listed in the
Linux kernel to provide the necessary regmap access to the system
controller.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Junhui Liu [Tue, 19 May 2026 12:58:31 +0000 (20:58 +0800)]
clk: sunxi: a523: add MBUS_EMAC1 clock gate
The Allwinner sun55i (A523/A527/T527) platform requires the MBUS clock
gate enabled for the gmac1 controller to function. Add the clock gate
definition for CLK_MBUS_EMAC1.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Junhui Liu [Tue, 19 May 2026 12:58:30 +0000 (20:58 +0800)]
pinctrl: sunxi: a523: add gmac1 support
The Allwinner sun55i (A523/A527/T527) platform provide a Synopsys
DesignWare Ethernet QOS IP block as the gmac1 controller, which uses
pins PJ0 to PJ16. Add the gmac1 function to the pinctrl driver to
support it.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
projects / thirdparty / u-boot.git / log
