This is an automatically generated commit which aids following Kernel patch
history, as git will see the move and copy as a rename thus defeating the
purpose.
For the original discussion see:
https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html
Shiji Yang [Tue, 29 Apr 2025 12:09:09 +0000 (20:09 +0800)]
x86: refresh kernel symbol configs
All kernel config symbols are refreshed by `make kernel_oldconfig`.
Some symbols are moved to the generic/config-6.12 because the
refresh tool will automatically trim them.
Change deprecated function strlcpy to strscpy
for compatibility with kernel 6.12.
strlcpy() reads the entire source buffer first.
This read may exceed the destination size limit.
This is both inefficient and can lead to linear read
overflows if a source string is not NUL-terminated [1].
In an effort to remove strlcpy() completely [2], replace
strlcpy() here with strscpy().
Direct replacement is safe here since DEV_ASSIGN is only used by
TRACE macros and the return values are ignored.
realtek: activate MIPS power cluster controller for RTL931x
The SMP environment is prepared well for the RTL93X. Now describe the
power cluster controller in the DTS. Tested on RTL9311 based Linksys
LGS352C.
Without patch:
root@OpenWrt:~# dmesg | grep CPU
[ 0.140425] CPU1 revision is: 0001a120 (MIPS interAptiv (multi))
[ 0.191952] Synchronize counters for CPU 1: done.
[ 1.232191] CPU2: failed to start
[ 1.237863] No online CPU in core 1 to start CPU3
[ 2.273784] CPU3: failed to start
[ 2.277589] smp: Brought up 1 node, 2 CPUs
root@OpenWrt:~# cat /proc/cpuinfo | grep -E "model|proc"
processor : 0
cpu model : MIPS interAptiv (multi) V2.0
processor : 1
cpu model : MIPS interAptiv (multi) V2.0
With patch:
root@OpenWrt:~# dmesg | grep CPU
[ 0.000000] CPU0 revision is: 0001a120 (MIPS interAptiv (multi))
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] Failed to get CPU clock: -2
[ 0.000000] CPU frequency from device tree: 1000MHz
[ 0.133360] smp: Bringing up secondary CPUs ...
[ 0.140418] CPU1 revision is: 0001a120 (MIPS interAptiv (multi))
[ 0.191950] Synchronize counters for CPU 1: done.
[ 0.230103] CPU2 revision is: 0001a120 (MIPS interAptiv (multi))
[ 0.289220] Synchronize counters for CPU 2: done.
[ 0.326189] CPU3 revision is: 0001a120 (MIPS interAptiv (multi))
[ 0.378861] Synchronize counters for CPU 3: done.
[ 0.413829] smp: Brought up 1 node, 4 CPUs
processor : 0
cpu model : MIPS interAptiv (multi) V2.0
processor : 1
cpu model : MIPS interAptiv (multi) V2.0
processor : 2
cpu model : MIPS interAptiv (multi) V2.0
processor : 3
cpu model : MIPS interAptiv (multi) V2.0
Introduced with Linux 6.7, in commit: 5c2f7727d437 ("mtd: mtdpart: check for subpartitions parsing result"),
when a parser returns an error, this will be passed up, and
consequently, all parent mtd partitions get torn down.
Adjust the mtdsplit_uimage driver to only return an error if there is a
critical problem in reading from the mtd device or allocating memory.
Otherwise return 0 to indicate that no partitions were found.
Also add logging to indicate what went wrong.
E.g. on Realtek devices that are booted for the first time through
initramfs with OpenWrt never installed before boot log will show
[ 0.975518] Creating 7 MTD partitions on "spi0.0":
[ 0.981062] 0x000000000000-0x0000000e0000 : "u-boot"
[ 1.041320] 0x0000000e0000-0x0000000f0000 : "u-boot-env"
[ 1.060683] 0x0000000f0000-0x000000100000 : "u-boot-env2"
[ 1.080992] 0x000000100000-0x000000200000 : "jffs2-cfg"
[ 1.100988] 0x000000200000-0x000000300000 : "jffs2-log"
[ 1.120599] 0x000000300000-0x000000fe0000 : "firmware"
[ 1.157426] mtdsplit_uimage: no rootfs after uImage in "firmware"
[ 1.176456] mtdsplit_uimage: no rootfs after uImage in "firmware"
[ 1.200262] 0x000000fe0000-0x000001000000 : "log"
Similar issues were fixed before with commit ade045084bd3f8696
("kernel: mtdsplit_minor: return 0 if not fatal") and c78765213ecbe830204 ("kernel: mtdsplit_uimage: return 0 if not fatal")
Valeriy Manzhos [Sun, 15 Jun 2025 10:08:29 +0000 (13:08 +0300)]
ath79: enable USB by default on hAP ac
Due to a bug, USB is not powered on after boot on hAP ac.
This prevents extroot configurations from working as overlayfs is mounted
before USB device can be powered on. This commit fixes this by enabling USB
in devicetree.
Related discussion links:
- https://forum.openwrt.org/t/usb-power-is-off-on-boot/229007
---
Extroot configuration requires the USB to be powered on before
preinit_main/80_mount_root. Probably the simplest approach is to enable
it in the devicetree. Another approach would be to add a script into
/lib/preinit that will power on USB via /sys/class/gpio/usb-power/value
E.g.
cat /lib/preinit/79_power_on_usb
do_power_on_usb(){
echo '1' > /sys/class/gpio/usb-power/value
}
boot_hook_add preinit_main do_power_on_usb
Yijie Jin [Sat, 28 Dec 2024 07:00:28 +0000 (15:00 +0800)]
ramips: mt7621: add support for JDCloud RE-SP-01B
JDCloud RE-SP-01B is a dual-band WiFi 5 router based on the MT7621AT.
Specifications:
- SoC: MediaTek MT7621AT
- RAM: 512MB DDR3
- Flash: 32MB SPI NOR
- WiFi: MediaTek MT7603EN (2.4GHz), MediaTek MT7615N (5GHz)
- Ethernet: 1x WAN, 2x LAN (Gigabit Ethernet)
- LEDs: red, blue, green (GPIO controlled)
- Button: Reset (GPIO controlled)
- eMMC: Single onboard (32GB/64GB/128GB)
- USB: 1x USB 2.0 port
MAC Address Structure:
The MAC addresses share the structure DC:D8:7C:XX:XX:XX, where:
- WAN, LAN, and 2.4GHz WiFi: same as the label MAC address.
- 5GHz WiFi: label MAC address + 0x800000.
The manufacturer writes the label MAC address at different
offsets depending on the storage version of the device:
Flash Instruction:
A 3rd party bootloader is required to boot the image. You can
use a SOP16 test clip to burn the image/bootloader to the flash.
The official bootloader does provide a web recovery interface
which only accepts an official image. To access it, you will
need to hold the reset button and power on the device, set your
IP address to 192.168.68.2 and visit http://192.168.68.1.
Co-authored-by: Chukun Pan <amadeus@jmu.edu.cn> Signed-off-by: Yijie Jin <jinyijie@outlook.com> Link: https://github.com/openwrt/openwrt/pull/17409 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
realtek: fix/add switchcore syscon nodes for RTL838x/RTL839x/RTL931x
The switchcore node is the central location that describes the Realtek switch
register addresses starting at 0x1b000000. It will be used by current and
future regmap enabled device drivers. The upstream MDIO driver already makes
use of it by calling syscon_node_to_regmap(dev->parent->of_node);
In the current DTS base we have 3 issues that should be fixed:
- rtl838x.dtsi has a length of 0x20000 instead of 0x10000
- rtl839x.dtsi has a length of 0x20000 instead of 0x10000
- rtl931x.dtsi has no switchcore node at all
Align these mismatches with the "good" RTL930x template.
Jonas Jelonek [Mon, 16 Jun 2025 19:57:27 +0000 (19:57 +0000)]
realtek: rtl931x: fix I2C sda pin
The drivers for I2C bus and mux for RTL931x have an incorrectly defined
SDA0 pin number, causing an error with correct pin numbers specified in
the device tree.
Using the `show tech-support board` on the vendor firmware of a Netgear
MS510TXM shows the correct pin numbers but they don't work with the
drivers. So fix this.
Jonas Jelonek [Wed, 18 Jun 2025 09:52:02 +0000 (09:52 +0000)]
realtek: rtl931x: add missing function reference for l2_hash_seed
Add missing function reference for the l2_hash_seed call in rtl931x_reg
in the rtl83xx DSA driver part.
While at it, rename the referenced function to proper naming convention
and simplify its content.
The missing reference causes a hard crash after a short time (on
MS510TXM) because the driver assumes the reference always exists.
Shiji Yang [Mon, 17 Mar 2025 16:42:19 +0000 (00:42 +0800)]
ramips: PCIe driver improvements for mt7620 and mt7628
This patchset fixes some PCIe bridge register access issues and
reworks the initialization procedure. It may bring some stability
improvements. To match the driver changes, the memory remap range
was extended and a PCIe reset pinctrl was added to mt7628an.dtsi.
Jonas Gorski [Wed, 18 Jun 2025 08:46:35 +0000 (10:46 +0200)]
iproute2: point KERNEL_INCLUDE to toolchain headers
Glibc since 2.41 tries to include linux/sched/types.h from sched.h, and
pointing KERNEL_INCLUDE to the kernel headers makes it use
linux/sched/types.h from the kernel headers instead of the installed
one.
This then breaks the configure (test) compile for setns() and the test:
mips-openwrt-linux-gnu-gcc -I/fork.openwrt/build_dir/target-mips_24kc_glibc/linux-ath79_generic/linux-6.6.93/include/uapi -o config.HaAJYe/setnstest config.HaAJYe/setnstest.c
In file included from /fork.openwrt/build_dir/target-mips_24kc_glibc/linux-ath79_generic/linux-6.6.93/include/uapi/linux/sched/types.h:5,
from /fork.openwrt/staging_dir/toolchain-mips_24kc_gcc-14.3.0_glibc/include/bits/sched.h:63,
from /fork.openwrt/staging_dir/toolchain-mips_24kc_gcc-14.3.0_glibc/include/sched.h:43,
from config.HaAJYe/setnstest.c:2:
/fork.openwrt/build_dir/target-mips_24kc_glibc/linux-ath79_generic/linux-6.6.93/include/uapi/linux/types.h:10:2: warning: #warning "Attempt to use kernel headers from user space, see https://kernelnewbies.org/KernelHeaders" [-Wcpp]
10 | #warning "Attempt to use kernel headers from user space, see https://kernelnewbies.org/KernelHeaders"
| ^~~~~~~
In file included from /fork.openwrt/build_dir/target-mips_24kc_glibc/linux-ath79_generic/linux-6.6.93/include/uapi/linux/posix_types.h:5,
from /fork.openwrt/build_dir/target-mips_24kc_glibc/linux-ath79_generic/linux-6.6.93/include/uapi/linux/types.h:14:
/fork.openwrt/build_dir/target-mips_24kc_glibc/linux-ath79_generic/linux-6.6.93/include/uapi/linux/stddef.h:5:10: fatal error: linux/compiler_types.h: No such file or directory
5 | #include <linux/compiler_types.h>
| ^~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
Fix this by pointing KERNEL_INCLUDE to the toolchain headers, which
include the installed kernel headers.
Tested with musl, glibc, and SDK.
Fixes: 60738feded ("iproute2: Fix KERNEL_INCLUDE in SDK") Reported-by: Signed-off-by: Konstantin Demin <rockdrilla@gmail.com> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
realtek: add new i2c-gpio-shared driver for shared SCL lines
Some Realtek switches have been designed with I2C busses that share a
single SCL line. The clock line is used for 2 or more busses. This cannot
be used with the standard i2c-gpio driver that relies on distinct SDA
and SCL pairs.
Provide a derived i2c-gpio-shared driver that can be used instead. This
driver can handle up to 4 busses with only a single clock line.
Josef Schlehofer [Fri, 13 Jun 2025 14:32:45 +0000 (16:32 +0200)]
perf: disable slang support
libs/slang2 is getting picked up from the packages feed, if the slang2
is compiled first and then if you try to compile perf, it fails
due to unmet dependency.
Fixes:
Package perf is missing dependencies for the following libraries:
libslang.so.2
Marius Durbaca [Tue, 22 Oct 2024 13:15:57 +0000 (16:15 +0300)]
mediatek: add support for Zbtlink ZBT-Z8102AX v2
Specifications:
SoC: MediaTek MT7981B
RAM: 1024MiB
Flash: SPI-NAND 128 MiB
Switch: 1 WAN, 4 LAN (Gigabit)
USB: two M.2 slots for 5G modems via USB 3.0 hub, external USB 3.0 port
Buttons: Reset, Mesh
Power: DC 12V 1A
WiFi: MT7976CN
UART: 115200n8
UART Layout:
VCC-RX-TX-GND
Installation:
1. Power down the router and hold in the Reset button.
2. While holding in the button power up the router again.
3. Hold the button in for 10 seconds and then release.
4. Use your browser to go to 192.168.1.1
5. If you see a GUI that is for flashing firmware then you have the V2 model.
If there is no GUI and the router continues to boot up normally
you have the V1 model.
6. Now use the V2 sysugrade file.
Note: Recovery GUI it can be used to recover from an incorrect firmware flash.
Based on patches adding support for this device by Yannick Chabanois (openmptcprouter)
and Dairyman (ofmodemsandmen)
Shiji Yang [Sat, 24 May 2025 08:32:26 +0000 (16:32 +0800)]
ramips: dts: increase maximum MMC clock frequency
The High-Speed SD mode stability issue should have been fixed.
Increase the MMC max-frequency to improve the IO speed. We can
still use the sysfs to limit the clock frequency, e.g.
Shiji Yang [Sat, 24 May 2025 08:31:07 +0000 (16:31 +0800)]
ramips: mtk-mmc: fix data timeout value
The MT7628 programing guide shows that the correct DTOC unit is 1048576 clocks instead of 65536 clocks. This value is also used
by linux upstream mtk-sd driver. Correct the DTOC register and
also round up its value.
Disassembly:
At the bottom, under the LEDs, there are 2 screws hidden by rubber feet. After removing the screws, pry the gray plastic part around (it is secured with latches) and remove it.
Serial Interface:
The serial interface can be connected to the 5 pin dots located on the right between the operating mode switch and the antenna.
Pins (from antenna to operating mode switch):
VCC
TX
RX
NC
GND
Settings: 115200, 8N1
Flashing via OEM recovery software:
1. Download the OEM recovery software from the manufacturer's website
2. Download the firmware image (for OpenWRT it is *-squashfs-factory.bin), rename it to KN-1112_recovery.bin
3. Replace the file in the fw folder OEM recovery software with the file from step 2.
4. Run the OEM recovery software and follow the instructions.
Flashing via TFTP:
1. Connect your PC and router to port 1-3, configure PC interface using IP 192.168.1.2, mask 255.255.255.252
2. Serve the firmware image (for OpenWRT it is *-squashfs-factory.bin) renamed to KN-1112_recovery.bin via TFTP
3. Power up the router while pressing Reset button on the back
4. Release Restart button when Power LED starts blinking
To revert back to OEM firmware:
The return to the OEM firmware is carried out by using the methods described above with the help of the appropriate firmware image.
When using OEM bootloader, the firmware image size cannot exceed the size of one OEM «Firmware_x» partition or Kernel + rootFS size.
Nicolas BERTRAND [Tue, 10 Jun 2025 09:09:06 +0000 (11:09 +0200)]
realtek: Add support for Zyxel XGS1210-12 Switch
The Zyxel XGS1210-12 Switch is a 10 + 2 port multi-GBit switch with
8 x 1000BaseT, 2 x 10/100/1000/2500BaseT Ethernet ports and
2 SFP+ module slot.
Hardware:
- RTL9302B SoC
- Macronix MX25L12833F (16MB flash)
- Nanja NT5CC64M16GP-1 (128MB DDR3 SDRAM)
- RTL8231 GPIO extender to control the port LEDs
- RTL8218D 8x Gigabit PHY
- RTL8226 2x 10m/100m/1/2.5 Gigabit PHY
- SFP+ 2x 10GBit slot
Power is supplied via a 12V 1.5A standard barrel connector. At the
right side behind the grid is UART serial connector. A Serial
header can be connected to from the outside of the switch trough
the airvents with a standard 2.54mm header.
Pins are from top to bottom Vcc(3.3V), TX, RX and GND. Serial
connection is via 115200 baud, 8N1.
A reset button is accessble through a hole in the front panel
At the time of this commit, all ethernet ports work under OpenWrt,
including the various NBaseT modes, SFP+ slots are supported with i2c bus.
Installation
--------------
* Connect serial as per the layout above. Connection parameters: 115200 8N1.
* Navigate to 'Management' in the OEM web interface and click on 'Firmware upgrade'
to the left.
* Upload the OpenWrt initramfs image, and wait till the switch reboots.
* Connect to the device through serial and change the U-boot boot command.
> fw_setenv bootcmd 'rtk network on; boota'
* Reboot, scp the sysupgrade image to /tmp, verify the checksum and flash it:
> sysupgrade openwrt-realtek-rtl930x-Zyxel_xgs1210-12-squashfs-sysupgrade.bin
* Upon reboot, you have a functional OpenWrt installation. Leave the bootcmd
value as is - without 'rtk network on' the switch will fail to initialise
the network.
Debug
------------
* Connect serial as per the layout above. Connection parameters: 115200 8N1.
* A tftp server is requiered, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enable network:
> rtk network on
* Change ip address (default is 192.168.1.1):
> setenv ipaddr 192.168.1.6
* Download initramfs:
> tftpboot 0x84f00000 192.168.1.111:openwrt-realtek-rtl930x-Zyxel_xgs1210-12-initramfs-kernel.bin
* Boot loaded file:
> bootm 0x84f00000
This prodecudre also apply to the sock firmware with the file XGS1210-12_V2.00(ABTY.1)C0.bix.
More information can be found on the page of XGS1250-12 as they share the same base.
Signed-off-by: Nicolas BERTRAND <nicolasbertrand89@gmail.com>
[fixed white space error] Signed-off-by: Paul Spooren <mail@aparcar.org>
Jonas Jelonek [Fri, 2 May 2025 21:39:14 +0000 (21:39 +0000)]
realtek: add support for TP-Link TL-ST1008F v2.0
The TP-Link TL-ST1008F is an 8-port multi-gig switch with 8x SFP+ ports
which support 1G/2.5G/10G speeds. Out of the box it is an unmanaged
switch but with RTL9303 and sufficient RAM + Flash it easily can run as
a managed Linux switch.
Hardware:
- Realtek RTL9303 Switch SoC
- Winbond 25Q256JVFQ (32MB flash)
- Samsung K4B4G1646E-BYMA (512MB DDR3 SDRAM)
- TCA9534 GPIO extender to control the port LEDs
- 8x SFP+ 1/2.5/10G slot
- Serial: 3V3 logic, 115200 8N1
- 5-pin JTAG
- physical tri-state switch (used by stock firmware for port speed
config)
- 24-LED port speed matrix
- robust full-metal case
Power is supplied via a 12V 2A standard barrel connector.
There are THT holes on the PCB for serial console next to the flash chip
and JTAG pads. Serial uses 3V3 logic and standard 115200-8N1 config.
Pinout is labeled on the PCB.
All ports/connectors and LEDs are on the back, only Power LED is on the
front.
Hints before flashing
----------------------
* It is recommended to backup the stock flash contents before proceeding.
Backup can be done from U-Boot (with memory display), from OpenWrt
initramfs or probably with SPI flash programmer.
There is no stock recovery functionality.
* Use a small image for RAM boot or first flash. Since you need to use
ymodem, this is really slow and takes time.
* This does not keep the dual-partition layout for firmware to have more
space available for a single OpenWrt installation.
Initial flashing
----------------------
The stock U-boot has broken networking thus no TFTP available. Serial
transfer only.
1. Open device and connect serial as per layout and settings
(recommended to use picocom, ymodem not working with minicom)
2. Connect power to device and press Esc when prompted to enter
the U-Boot console.
3. Boot initramfs
* in the U-Boot console:
loady 0x82000000 (load OpenWrt image via ymodem)
CTRL-A CTRL-S <initramfs.bin> (specify initramfs image for
picocom to upload)
bootm 0x82000000 (boot initramfs from RAM)
(Just to be on the safe side, backup your flash now while RAM-booted)
4. Connect network to your device
5. Upload the sysupgrade image (e.g. with scp)
6. Do sysupgrade
There's no need to adjust the bootcmd in U-Boot. Networking is running
fine once the realtek driver initialized everything in OpenWrt. No
functional difference with running 'rtk network on' within U-Boot
before. Running this even fails and returns with an error.
Return to stock
------------------
This only works if you did a backup of the flash before flashing
OpenWrt. Stock dump then can be flashed from within U-Boot or OpenWrt.
There is no vendor firmware image because this is an unmanaged switch!
CAUTION: Make sure to not overwrite the U-Boot partition(s). If you do
not have a flash programmer, you may not be able to debrick
your device then.
Co-authored-by: Balázs Triszka <balika011@gmail.com> Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Tianling Shen [Sun, 18 May 2025 07:09:25 +0000 (15:09 +0800)]
rockchip: Restore kernel files for v6.6
This is an automatically generated commit which aids following Kernel patch
history, as git will see the move and copy as a rename thus defeating the
purpose.
For the original discussion see:
https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html
Chukun Pan [Fri, 6 Jun 2025 15:26:39 +0000 (23:26 +0800)]
starfive: remove useless aic8800 driver
AIC8800 is a WiFi/BT module based on Ceva's IP.
This driver is old and not enabled in the starfive target,
so remove it. We can add out of tree drivers if necessary.
Fixes: 8f0f02d2 ("starfive: 6.12: refresh patches and drop upstreamed ones") Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
qualcommax: ipq50xx: Add support for Xiaomi AX6000
Add support for Xiaomi AX6000.
Speficiations:
* SoC: Qualcomm IPQ5018 (64-bit dual-core ARM Cortex-A53 @ 1.0Ghz)
* Memory: Etrontech EM6HE16EWAKG 512 MiB DDR3L-933
* Serial Port: 1v8 TTL 115200n8
* Wi-Fi: IPQ5018 (2x2 2.4 Ghz 802.11b/g/n/ax - up to 574 Mbps)
QCN9024 (4x4 5 Ghz 802.11an/ac/ax - up to 4804 Mbps)
QCA9887 (1x1 5 Ghz 802.11ac/n - up to 433 Mbps)
* Ethernet: IPQ5018 integrated virtual switch connected to:
- external QCA8337 switch (3 LAN Ports 10/100/1000)
- QCA8081 Phy WAN port (10/100/1000/2500)
* Flash: Either of:
- Gigadevice GD5F1GQ4RE9IGD (128 MiB)
- ESMT F50D1G41LB (128 MiB)
* LEDs: 1x WLAN Link (GPIO 23 Active High)
1x System Blue (GPIO 24 Active High)
1x System Yellow (GPIO 25 Active High)
1x WAN Link Blue (GPIO 26 Active High)
1x WAN Link Yellow (GPIO 27 Active High)
1x Green - Unused(GPIO 28 Active High)
3x LAN Phy Green
1x WAN Phy Green
* Buttons: 1x Reset (GPIO 38 Active Low)
Known issue:
- QCA9887 doesn't come up (possibly due to 1-lane PCIe phy not coming up or missing method to drive power),
hence the host PCIe controller is disabled in the DTS.
First flash a ubinized OpenWrt initramfs that will serve as the intermediate step, since
OpenWrt uses unified rootfs in order to fully utilize NAND and provide enough space for
packages, through either of the below two methods:
Installation via XMIR Patcher:
1. Load the initramfs image: openwrt-qualcommax-ipq50xx-xiaomi_ax6000-initramfs-factory.ubi
Installation via ubiformat method, through SSH:
1. If needed, enable SSH using XMIR Patcher.
2. Copy the file openwrt-qualcommax-ipq50xx-xiaomi_ax6000-initramfs-factory.ubi to the /tmp directory
3. Open an SSH shell to the router
4. Check which rootfs partition is your router booted in (0 = rootfs | 1 = rootfs_1):
nvram get flag_boot_rootfs
5. Find the rootfs and rootfs_1 mtd indexes respectively:
cat /proc/mtd
Please confirm if mtd18 and mtd19 are the correct indexes from above!
6. Use the command ubiformat to flash the opposite mtd with UBI image:
If nvram get flag_boot_rootfs returned 0:
ubiformat /dev/mtd19 -y -f /tmp/openwrt-qualcommax-ipq50xx-xiaomi_ax6000-initramfs-factory.ubi && nvram set flag_boot_rootfs=1 && nvram set flag_last_success=1 && nvram commit
otherwise:
ubiformat /dev/mtd18 -y -f /tmp/openwrt-qualcommax-ipq50xx-xiaomi_ax6000-initramfs-factory.ubi && nvram set flag_boot_rootfs=0 && nvram set flag_last_success=0 && nvram commit
7. Reboot the device by:
reboot
Continue in order to pernamently flash OpenWrt:
1. Upload the sysupgrade image to /tmp/ using SCP:
scp -O <path to image> root@192.168.1.1:/tmp/
2. Open an SSH shell to 192.168.1.1 from a PC within the same subnet
3. Use sysupgrade to flash the sysupgrade image:
sysupgrade -n -v /tmp/openwrt-qualcommax-ipq50xx-xiaomi_ax6000-squashfs-sysupgrade.bin
Device will reboot with OpenWrt, and then sysupgrade can be used to upgrade the device when desired.
George Moussalem [Wed, 28 May 2025 08:53:00 +0000 (12:53 +0400)]
mtd: spinand: esmt: fix id code for F50D1G41LB
Upon detecting the ID for the ESMT F50D1G41LB chip, the fifth byte
returned is always 0x00 instead of the expected JEDEC continuation code
of 0x7f. This causes detection to fail:
[ 0.304399] spi-nand spi0.0: unknown raw ID c8117f7f00
[ 0.508943] spi-nand: probe of spi0.0 failed with error -524
So let's revert back to the 4 byte ID code for this chip
specifically.
Fixes: 4bd14b2fd8a8 ("mtd: spinand: esmt: Extend IDs to 5 bytes") Signed-off-by: George Moussalem <george.moussalem@outlook.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://github.com/openwrt/openwrt/pull/19004 Signed-off-by: Robert Marko <robimarko@gmail.com>
George Moussalem [Fri, 25 Apr 2025 07:07:55 +0000 (11:07 +0400)]
net: dsa: qca8k: fix led devicename when using external mdio bus
The qca8k dsa switch can use either an external or internal mdio bus.
This depends on whether the mdio node is defined under the switch node
itself and, as such, the internal_mdio_mask is populated with its
internal phys. Upon registering the internal mdio bus, the
internal_mdio_bus of the dsa switch is assigned to this bus.
When an external mdio bus is used, it is left unassigned, though its id
is used to create the device names of the leds.
This leads to the leds being named '(efault):00:green:lan' and so on as
the internal_mdio_bus is null. So let's fix this by adding a null check
and use the devicename of the external bus instead when an external bus
is configured.
- pre-install calls preinst
- pre-upgrade calls preinst with PKG_UPGRADE=1
- post-upgrade calls postinst with PKG_UPGRADE=1
- prerm and postrm from the previous version of a package are NOT
executed on upgrade, so packages are expected to handle their own
migrations in the new versions
Link: https://wiki.alpinelinux.org/wiki/Creating_an_Alpine_package Fixes: #18527 Reported-by: Dobroslaw Kijowski <dobo90@gmail.com> Suggested-by: Eric Fahlgren <ericfahlgren@gmail.com> Suggested-by: Jonas Gorski <jonas.gorski@gmail.com> Suggested-by: Thomas Richard <thomas.richard@bootlin.com> Signed-off-by: George Sapkin <george@sapk.in> Link: https://github.com/openwrt/openwrt/pull/18531 Signed-off-by: Robert Marko <robimarko@gmail.com>
George Moussalem [Fri, 13 Jun 2025 07:36:16 +0000 (11:36 +0400)]
wifi: ath11k: increase max ATH11K_QMI_CALDB_SIZE macro
QCN6122 wifi in fw-memory-mode 1 has a slightly larger caldb size than
currently defined in the ath11k driver. When coldboot calibration was
disabled, the fw mem mode was changed from 2 (256MB mem profile) to 1
(512MB mem profile), which is the correct setting for devices in scope.
However, in fw mem mode, the caldb size is 0x500000 instead of the max
0x480000 defined in the driver, causing QCN6122 wifi failing to boot:
ath11k b00a040.wifi1: qmi mem size is low to load caldata
ath11k b00a040.wifi1: failed to assign qmi target memory: -22
As such, change the max caldb memory size accordingly.
This macro is used by the driver only as a max size limit to validate
the requested caldb size returned by QMI. Different ath11k wifi chips
have different caldb sizes (for ex. the size for IPQ5018 is 0x200000).
Fixes: cf715a230589 ("wifi: ath11k: disable coldboot calibration for ipq5018") Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/19118 Signed-off-by: Robert Marko <robimarko@gmail.com>
Felix Fietkau [Thu, 12 Jun 2025 11:28:47 +0000 (13:28 +0200)]
ucode: update to Git HEAD (2025-06-09)
54b00e3b1fa9 ubus: fix double registry clear on disconnect 69521b55855c ubus: fix use-after-free on deferred request reply() method 22e8c16d9deb debug: fix crash when passing tagged string to getinfo() 2c9eea5174d6 ubus: use ucv_resource_create_ex for connections/channels 0a4cf4b7e71a ubus: use ucv_resource_create_ex for for ubus.request resources 99ee75a69cd3 ubus: use ucv_resource_create_ex for ubus.deferred resources f085a42b977f ubus: use ucv_resource_create_ex for objects 94ad17d13a0d ubus: use ucv_resource_create_ex for ubus.notify resources a3fa47fdda3e ubus: use ucv_resource_create_ex for ubus.listener resources 9ab5fa869dec ubus: use ucv_resource_create_ex for ubus.subscriber resources be92ebd70633 CI: debian: install cmake package fd202fd40bd1 socket: respect port argument in sockinst.connect() 767c209b917b socket: properly handle async `connect(2)` errors in socket.connect() 37ac8f112af6 socket: improve port argument validation in sockinst.connect()
Fixes: https://github.com/jow-/ucode/issues/302 Fixes: https://github.com/jow-/ucode/issues/303 Signed-off-by: Felix Fietkau <nbd@nbd.name>
Specifications:
- SoC: Broadcom BCM6358 dual 300MHz MIPS
- Flash: 16MB NOR
- RAM: 64MB DDR
- Ethernet: 4x 100M
- Wifi: Broadcom BCM4318
- 2x USB 2.0 port
- 2x Button
- 9x LED
- RJ11 2x FXS VoIP (unsupported)
- RJ11 xDSL (unsupported)
Install instructions:
- Assign static IP 192.168.1.100 to PC.
- Unplug the power source.
- Press the RESTART button at the router, don't release it yet!
- Plug the power source and wait at least 15 seconds.
- Release the RESTART button.
- Browse to http://192.168.1.1 with your PC.
- Upload the openwrt-bmips-bcm6358-huawei_hg553-squashfs-cfe.bin file.
- Wait some minutes until the firmware upgrade completes.
1. Boot WN-DAX3000GR with router mode
2. Access to the WebUI ("http://192.168.0.1/") on the device and open
the firmware update page ("ファームウェア")
3. Select the OpenWrt factory.bin image and click update ("更新") button
4. Wait ~120 seconds to complete flashing
- This device has a Macronix MX35UF1G24AD SPI-NAND chip registered as
oobsize=128 in Linux Kernel. But using BCH8 breaks I/O on the chip
with the following errors, so this support uses BCH4 instead.
[ 1.542261] 0x000000480000-0x000000500000 : "0:appsblenv"
[ 1.547959] 1 fixed-partitions partitions found on MTD device 0:appsblenv
[ 1.551265] Creating 1 MTD partitions on "0:appsblenv":
[ 1.558096] 0x000000000000-0x000000040000 : "env-data"
[ 1.627282] u-boot-env-layout 79b0000.qpic-nand:flash@0:partitions:partition-0-appsblenv:partition@0:nvmem-layout: probe with driver u-boot-env-layout failed with error -74
root@OpenWrt:~# strings /dev/mtdblock10
[ 77.806720] mtdblock: MTD device '0:appsblenv' is NAND, please consider using UBI block devices instead.
[ 77.807554] I/O error, dev mtdblock10, sector 0 op 0x0:(READ) flags 0x80700 phys_seg 4 prio class 0
[ 77.815977] I/O error, dev mtdblock10, sector 8 op 0x0:(READ) flags 0x80700 phys_seg 3 prio class 0
[ 77.824721] I/O error, dev mtdblock10, sector 16 op 0x0:(READ) flags 0x80700 phys_seg 2 prio class 0
[ 77.834095] I/O error, dev mtdblock10, sector 24 op 0x0:(READ) flags 0x80700 phys_seg 1 prio class 0
[ 77.843278] I/O error, dev mtdblock10, sector 0 op 0x0:(READ) flags 0x0 phys_seg 1 prio class 0
[ 77.851577] Buffer I/O error on dev mtdblock10, logical block 0, async page read
Notes:
- This device has dual-boot feature and it's managed by the index in the
0:bootconfig and 0:bootconfig1 partitions.
- There are through-holes on PCB for USB 2.0, but it cannot be accessed
without disassembly of the housing. So it's not enabled in this
support.
- WN-DAX3000GR has the "bt_fw" volume in the firmware UBI in addition to
the volumes that will be removed in the section of ELECOM WRC-X3000GS2
in /lib/upgrade/platform.sh.
That volume is unnecessary for OpenWrt and add
`remove_oem_ubi_volume bt_fw` to remove that volume when sysupgrade.
(that function doesn't anything without errors if no specified volume)
INAGAKI Hiroshi [Tue, 3 Jun 2025 14:56:13 +0000 (23:56 +0900)]
qualcommax: make header length configurable on Build/mstc-header
I-O DATA WN-DAX3000GR has a MSTC (Mitra Star Technology Corp.) specific
header with a different length than ELECOM WRC-X3000GS2.
Make the header length configurable by parameterizing on
Build/mstc-header.
George Moussalem [Tue, 10 Jun 2025 10:45:55 +0000 (14:45 +0400)]
qualcommax: ipq50xx: correct fw memory mode for ipq5018 and qcn6122 wifi
The reason fwmode 2 was used for ipq5018 and qcn6122 wifi was that
coldboot calibration doesn't work and causes the firmware to crach
during wifi bringup. Since coldboot calibration is now disabled in the
driver, all boards can now use their respective firmware memory mode, so
let's the property in all board DTS files accordingly.
realtek: 6.12: refactor EEE for RTL8218B/D and RTL8214FC
Three different code paths for the same phy model. Now the bus
is prepared to handle c45 (mmd) read/writes correctly. Remove
the custom implementations and let generic kernel functions do
their best. To achieve this
- disable the PHY-mode EEE in rtl821x_config_init() as upstream does
- provide mmd read/write functions that avoid EEE via c45 over c22
While chaning the phy_driver functions sort them alphabetically.
With the follow up EEE patches the mdio bus will run c22 and c45
accesses during initial scan. Especially when accessing addresses
beyond the CPU port phy requests might fail in a way that cannot
be handled gratefully. Do two things
- do not allow access to addresses starting from cpu port
- set the scan disable bitmask to ports starting from cpu port
realtek: 6.12: enhance mdio max port patch (once again)
Some bits where missed during the last enhancement of the mdio
patch. In the forthcoming patches the phy_mask will be populated
to avoid unwanted ports (>= cpu port) from being scanned. Add
additional locations where 32 bit values need to be converted
to 64 bits.
realtek: 6.12: align internal/external mac eee function names
The DSA driver uses set_mac_eee() for the outside API while
the interal helper is called port_eee_set(). Align that.
Additionally do not call the internal helpers directly by
the function names but use the register assignments.
Upstream will get rid of the get_mac_eee() function in the DSA
driver and replace it by a boolean alternative. While we fill a
lot of data here (because of EEE bugs in the Realtek phy layer)
other DSA drivers only return if EEE is available or not for a
port. To make the next kernel upgrade easier follow that design.
realtek: 6.12: relocate R4K deactivation to late CPU init
To avoid unneeded interrupts the R4K timer is deactivated during
secondary cpu initialization. This is currently done during
phase init_secondary(). With the upgrade to 6.12 the kernel runs
a primary/secondary cpu timer/counter synchronization to verify the
proper setup in synchronise_count_slave(). That runs at a later
point in time and expects the secondary counter to be fully
functional. Finding a deactivated counter results in the following
messages:
WARNING: CPU: 1 PID: 0 at arch/mips/kernel/sync-r4k.c:99 check_counter_warp+0x220/0x254
Warning: zero counter calibration delta: 0 [max: 6500000]
Counter synchronization [CPU#0 -> CPU#1]:
Measured 278760029 cycles counter warp between CPUs
Relocate the deactivation to smp_finsh() at the end of the cpu
startup sequence. Additionally polish the startup code and remove
all unneeded parts.
realtek: 6.12: fix phy-mode for XGS1250-12 port 1-8
Per IEEE 802.3 definition we have:
- parallel XGMII for single 10GBit ONLY links
- serial USGMII for 8 port 1GBit links (not known by kernel)
- serial USXGMII: for single/multiple links with a total bandwidth of 10GBit
The phy-mode of the first eight ports of the XGS1250-12 have always been
defined as XGMII (without S). This came from a confusion with the similar
named Realtek proprietary XSGMII (with S) mode that is basically 10GB SGMII.
From the above definition this is wrong but worked until kernel 6.6. With
the upgrade to 6.12 there is an enforced capabilities check within
phy_caps_from_interface() and link validation fails with
lan1: validation of xgmii with support 62ef and advertisement 62c0 failed: -EINVAL
lan1: failed to connect to PHY: -EINVAL
lan1: error -22 setting up PHY for tree 0, switch 0, port 0
Switch the ports to USXGMII as the most flexible option. This might be no
final solution but at least it better describes the phy/mac link.
realtek: 6.12: adapt RTL9300 i2c bus & mux drivers
Fix minor compilation errors due to kernel changes.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/18935 Signed-off-by: Robert Marko <robimarko@gmail.com>
Upstream has integrated the Realtek target into the generic MIPS
initialization and so MACH_REALTEK_RTL has gained some new features.
Especially:
- CONFIG_MACH_GENERIC_CORE generates central modules
- board-realtek module adds device specific extensions
The current downstream initialization works well and upgrading to
kernel 6.12 is not the right time to harmonize this. Modify the
MACH definitions to the current needs.
The validate function no longer exists in phylink_mac_ops. Remove
it for the internal ethernet interface. Instead provide some
meaningful mac capabilities.
realtek: 6.12: replace ethtool_eee with ethtool_keee
EEE functions are now called with ethtool_keee instead of
ethtool_eee. Replace all occurrences. This will fix function
signature checks but still produces compilation errors due
to structure changes.
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