video: menu "TrueType Fonts" depends on TrueType enabled
The Kconfig menu "TrueType Fonts" should only be shown if TrueType is
enabled.
Put all TrueType dependent customization within one if statement.
Remove `depends TRUETYPE` clauses.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <simon.glass@canonical.com>
Tom Rini [Wed, 4 Feb 2026 16:40:37 +0000 (10:40 -0600)]
Merge patch series "arm: k3: j722s: add PCIe support"
George McCollister <george.mccollister@konsulko.com> says:
This patch series brings over several changes from Linux that are required
to get PCIe working on the j722s and also enables PCIe in
j722s_evm_a53_defconfig. This allows Linux to be booted from an NVMe drive.
The J722S SoC provides pcie0 (using pcie_cdns_ti) thru serdes1
(using phy-cadence-torrent) thru serdes_wiz1 (using phy-j721e-wiz). Changes
to the three drivers needed to be ported from Linux to enable the REFCLK
output which is used with this SoC. These changes should be tested on other
platforms using these drivers by those with the hardware available to make
sure no problems were introduced.
The PCIe controller in this SoC relies on the code performing the PCI scan
not scanning devices which cannot exist. In Linux this is implemented as
only_one_child() in probe.c. If this mechanism is not used, PCI config reads
for subsequent functions will return information for device 0 resulting in
U-Boot detecting 32 devices when only 1 is present. This change should be
tested on other platforms with PCI to ensure the same PCI devices are
enumerated before and after the patch is applied.
I would like to thank Opto 22 for sponsoring the initial development and
anyone that is able to contribute to testing of patches.
TI's J722S SoC has one instance of PCIe namely PCIe0 which is a Gen3
single lane PCIe controller. Add support for the "ti,j722s-pcie-host"
compatible specific to J722S SoC.
Based on:
https://lore.kernel.org/all/20240524092349.158443-1-s-vadapalli@ti.com/
Signed-off-by: George McCollister <george.mccollister@konsulko.com> Tested-by: Bryan Brattlof <bb@ti.com>
phy: cadence-torrent: Add support to drive refclk out
cmn_refclk_<p/m> lines in Torrent SERDES are used for connecting an
external reference clock. cmn_refclk_<p/m> can also be configured to
output the reference clock. Model this derived reference clock as a
"clock" so that platforms like AM642 EVM can enable it.
This is used by PCIe to use the same refclk both in local SERDES
and remote device. Add support here to drive refclk out.
Based on: https://lore.kernel.org/all/20210310120840.16447-7-kishon@ti.com/
Signed-off-by: George McCollister <george.mccollister@konsulko.com> Tested-by: Bryan Brattlof <bb@ti.com>
phy: ti: j721e-wiz: Enable reference clock output in cmn_refclk_<p/m>
cmn_refclk_<p/m> lines in Torrent SERDES are used for an connecting
external reference clock. cmn_refclk_<p/m> can also be configured to
output the reference clock. In order to drive the refclk out from the
SERDES (Cadence Torrent), PHY_EN_REFCLK should be set in SERDES_RST of
WIZ. Model PHY_EN_REFCLK as a clock, so that platforms like AM642 EVM
can enable it.
Based on: https://lore.kernel.org/r/20210310120840.16447-6-kishon@ti.com
Signed-off-by: George McCollister <george.mccollister@konsulko.com> Tested-by: Bryan Brattlof <bb@ti.com>
Use the same mechanism as the Linux kernel to skip unnecessary (and in
the case of the J722S, errant) scanning of direct children of root
ports, downstream ports or bridges.
Based on Linux PCI code in the following files as of b927546677c8:
drivers/pci/probe.c
drivers/pci/pci.h
include/linux/pci.h
Signed-off-by: George McCollister <george.mccollister@konsulko.com> Tested-by: Bryan Brattlof <bb@ti.com>
It was noted that a GPT partition with the maximum available partition
number (ex: /dev/mmcblk128) can't be read/write from U-Boot using
read/write commands. Futher investigation shows that the problem is
deeper.
mtdpart internally enumerate partitions starting from zero, but partition
driver API enumerate partitions starting from 1, so wrong partition will
be queried. This is wrong.
Unnecessary debug message also was removed.
Fixes: c29a6daec184 ("disk: support MTD partitions") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
=> read mmc 0#fip ${loadaddr} 0 4
Could not find "fip" partition
** Bad device specification mmc 0#fip **
** Bad device specification mmc 0#fip **
Couldn't find partition mmc 0#fip
The error is caused by invalid boundary checks. This patch fixes an
issue.
Fixes: 43fd4bcefd4e ("disk: part: implement generic function part_get_info_by_uuid()") Fixes: 56670d6fb83f ("disk: part: use common api to lookup part driver") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Acked-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
Jonas Karlman [Sat, 17 Jan 2026 00:24:42 +0000 (00:24 +0000)]
net: lwip: nfs: Prefer nfsserverip over serverip when set
Prefer use of a 'nfsserverip' env var before falling back to 'serverip'
when using the nfs command. Similar to how the 'tftpserverip' env var
is preferred over 'serverip' by the tftp command.
This also updates the error message to closer match the error message
used by the lwIP tftp command when a server ip is not set.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
Jonas Karlman [Sat, 17 Jan 2026 00:24:41 +0000 (00:24 +0000)]
net: lwip: dhcp: Save DHCP siaddr field to tftpserverip env var
The DHCP siaddr field contains the IP address of next server to use in
bootstrap. Typically this will be the IP address of a TFTP server or the
IP address of the DHCP server itself.
RFC 2131, 2. Protocol Summary, Page 10:
DHCP clarifies the interpretation of the 'siaddr' field as the
address of the server to use in the next step of the client's
bootstrap process. A DHCP server may return its own address in the
'siaddr' field, if the server is prepared to supply the next
bootstrap service (e.g., delivery of an operating system executable
image). A DHCP server always returns its own address in the 'server
identifier' option.
Set the 'tftpserverip' env variable when the siaddr field contains an
IP address that is different compared to the DHCP server IP address.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
Jonas Karlman [Sat, 17 Jan 2026 00:24:40 +0000 (00:24 +0000)]
net: lwip: Use ipaddr helpers
The ip_addr_t of lwIP has support for both IPv6 and IPv4 addresses.
Some lwIP commans is directly accessing the internal addr field of the
ip_addr_t instead of using ipaddr helper functions.
Change to use ipaddr helper functions where appropriate to remove direct
access of the internal addr field. Also change a few instances from ip4
to the version less ipaddr helpers.
There is no intended functional change, besides the change from using
ip4 addr helper to using version less ipaddr helper.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
Jonas Karlman [Sat, 17 Jan 2026 00:24:39 +0000 (00:24 +0000)]
net: lwip: dns: Call env_set() from dns loop instead of found callback
The lwIP dns command handle env_set() calls from the found callback and
printf() to console in the dns loop. Making it more complex than it
needs to be.
Simplify and ensure any environment variable that is being set is the
same value that would have been printed on console.
There should not be any intended change in behavior, besides the change
from using ip4addr helper to using version less ipaddr helper.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
Jonas Karlman [Sat, 17 Jan 2026 00:24:38 +0000 (00:24 +0000)]
net: lwip: nfs: Print device name based on current udevice
Use udevice name, similar to other lwip commands, instead of using the
legacy eth_get_name() when printing out the device being used.
Fixes: 230cf3bc2776 ("net: lwip: nfs: Port the NFS code to work with lwIP") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
Jonas Karlman [Sat, 17 Jan 2026 00:24:37 +0000 (00:24 +0000)]
net: lwip: dns: Fix print of resolved IP address
The lwIP dns command only prints out cached resolved IP addresses.
When a hostname is first resolved and ERR_INPROGRESS is returned the
dns command prints out 0.0.0.0 instead of the resolved IP address.
Fix this by printing out host_ipaddr instead of the temporary ipaddr
that only is valid when ERR_OK is returned.
Fixes: 1361d9f4f00a ("lwip: dns: do not print IP address when a variable is specified") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
Jonas Karlman [Tue, 6 Jan 2026 20:34:30 +0000 (20:34 +0000)]
net: lwip: add TFTPSERVERIP Kconfig option
With the legacy networking stack, it is possible to use USE_SERVERIP,
SERVERIP and BOOTP_PREFER_SERVERIP Kconfg options to force use of a
specific TFTP server ip.
Using the lwIP networking stack use of the 'tftpserverip' environment
variable provide the closest equivalent functionality.
Add USE_TFTPSERVERIP and TFTPSERVERIP Kconfig options that can be used
to add the 'tftpserverip' environment variable to force use of a
specific TFTP server ip.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Acked-by: Jerome Forissier <jerome.forissier@arm.com>
Andrew Goodbody [Wed, 14 Jan 2026 15:12:10 +0000 (15:12 +0000)]
net: lwip: dhcp: Do not write past end of buffer
sprintf will write a trailing \0 at the end of the string so when
writing into a buffer, that buffer must be sized to allow for that
trailing zero. In the DHCP code when the index is a number needing two
digits to express the index would use up the two \0 bytes in the buffer
and the trailing \0 from sprintf would be beyond the end of the
allocation. Fix this by adding a third \0 in the buffer.
This was found by code inspection when looking for an issue reported by
Michal Simek, but I do not have the hardware to reproduce, so cannot
confirm if this addresses that issue or not.
Fixes: 98ad145db61a ("net: lwip: add DHCP support and dhcp commmand") Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
Andrew Goodbody [Wed, 14 Jan 2026 15:12:09 +0000 (15:12 +0000)]
net: lwip: tftp: Do not write past buffer end
sprintf will add a trailing \0 so manually adding a trailing \0 will
result in an extra unaccounted for character being written. This
overwrote the first byte of the following allocation block resulting in
unexpected behavior.
This was found by Running 'pxe get' with no available file resulting in
multiple attempts, using the default algorithm, to attempt to find a file.
Eventually there would be a failed assert when free() was called.
Failing the assert would result in a system reset.
Fixes: 27d7ccda94fa ("net: lwip: tftp: add support of blksize option to client") Reported-by: Michal Simek <michal.simek@amd.com> Tested-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Tested-by: Tom Rini <trini@konsulko.com> # Pine64+ Reviewed-by: Jerome Forissier <jerome.forissier@arm.com> Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
This series provides a comprehensive cleanup of the Allwinner (sunxi)
NAND controller drivers and introduces full support for the H6 and H616
SoCs in both the main U-Boot driver and the SPL.
The series successfully deduplicates register maps between sunxi_nand.c
and sunxi_nand_spl.c while migrating to a capability-based architecture.
This approach allows the driver to handle the H616's specific
requirements—such as shifted register offsets for ECC/OOB, the removal
of 512B ECC block support, and mandatory MBUS clock gating—without
breaking compatibility for legacy A10/A23 devices.
Tom Rini [Tue, 3 Feb 2026 21:46:21 +0000 (15:46 -0600)]
Merge patch series "arm: dts: sc5xx: device tree updates and fixes"
Ozan Durgut <ozan.durgut@analog.com> says:
This series introduces updates for Analog Devices SC5xx boards.
It cleans up device trees by renaming GPIO expanders and removing
incorrect SPI flash definitions from the common include file.
For the SC598, this series updates the EZLITE board to the latest
Revision E hardware. It also adds missing GPIO hogs and enables
additional commands for the EZKIT configuration.
Ozan Durgut [Mon, 26 Jan 2026 16:15:04 +0000 (17:15 +0100)]
arm: dts: adi: rename GPIO expanders
The current naming convention for GPIO expanders across ADI SC5xx
device trees is inconsistent. This patch updates the node names to
correct indexing and clarify hardware location.
For SC573, SC584, and SC589 evaluation SBCs, switch to zero-based
indexing to align with standard conventions.
For SC594 and SC598 SoM + carrier evaluation kits, rename the nodes to
crr_gpio_expander. This prefix indicates which board the expander is on.
Philip Molloy [Mon, 26 Jan 2026 16:15:03 +0000 (17:15 +0100)]
arm: dts: sc5xx: drop SPI flash from common dtsi
SPI flash devices are not common across all SC5xx boards. They
already defined in the SoM-specific dtsi files. Keeping the
definition in the common dtsi is therefore incorrect.
Fixes: c9e893d ("board: adi: Add support for SC598") Signed-off-by: Philip Molloy <philip.molloy@analog.com> Signed-off-by: Ozan Durgut <ozan.durgut@analog.com> Reviewed-by: Greg Malysa <malysagreg@gmail.com>
Tom Rini [Tue, 3 Feb 2026 21:45:09 +0000 (15:45 -0600)]
Merge patch series "toradex: aquila-am69: fix SPL USB DFU, drop obsolete clock"
Ernest Van Hoecke <ernest.vanhoecke@toradex.com> says:
This is a small, board-specific series for Aquila AM69.
Patch 1 fixes intermittent SPL USB DFU gadget enumeration.
Patch 2 drops a stale MCU_CLKOUT0 enable for ETH_1. V1.1 hardware uses
an external 25 MHz crystal, and support for earlier revisions was
already removed from the DT before upstreaming.
On the Toradex Aquila AM69 V1.1, the on-module ETH_1 relies on an
external 25 MHz crystal oscillator. On the V1.0, we needed to enable
MCU_CLKOUT0, but support for this was already dropped from the device
tree before being sent to U-Boot.
Remove this obsolete enabling of MCU_CLKOUT0.
Fixes: 3f0528882c0d ("board: toradex: add aquila am69 support") Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
arm: dts: k3-am69-aquila: Fix SPL USB DFU gadget failures
Around 1 in 20 times, the current R5 SPL fails to pull up the D+ line to
signal that a new USB device (the USB gadget used for downloading the
next stage) joined the bus.
With these strapping options, this is greatly reduced to 1 in thousands.
Richard Genoud [Fri, 23 Jan 2026 11:45:01 +0000 (12:45 +0100)]
tools: sunxi-spl-image-builder: support H6/H616 NAND boot
The H6/H616 boot ROM doesn't expect a SPL scrambled the same way as
older SoCs.
It doesn't use a specific seeds table, it expects a maximized ECC
(BCH-80), a specific BBM (FF000301) and doesn't work if empty pages are
skipped (it needs its specific BBM, even in the padding).
So, add a --soc=h6 option to support H6/616 with:
- more ECC strengths
- specific BBM
- default_scrambler_seeds[] with all values
- no empty pages skip
In Kconfig, select BCH-80 by default for SUNXI_SPL_ECC_STRENGTH to make
BROM happy.
And in scripts/Makefile.xpl, use --soc=h6 option when building for a
SUN50I_GEN_H6 SoC.
Tested on Whatsminer H616 board, booting from NAND.
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Co-developed-by: James Hilliard <james.hilliard1@gmail.com> Signed-off-by: James Hilliard <james.hilliard1@gmail.com> Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Richard Genoud [Fri, 23 Jan 2026 11:44:59 +0000 (12:44 +0100)]
mtd: rawnand: sunxi_spl: Fix cast to pointer from integer warnings
Fix a cast to pointer from integer warning on ARM64
On 64bits platform, the casts done in {read,write}l() give that kind of
warnings:
drivers/mtd/nand/raw/sunxi_nand_spl.c: In function ‘check_value_inner’:
./arch/arm/include/asm/io.h:110:43: warning: cast to pointer from \
integer of different size [-Wint-to-pointer-cast]
110 | #define __raw_readl(a) (*(volatile unsigned int *)(a))
| ^
[...]
drivers/mtd/nand/raw/sunxi_nand_spl.c:81:27: note: in expansion of \
macro ‘readl’
81 | int val = readl(offset) & expected_bits;
Introduce {read,write}l_nfc inline function to do the right cast and
push the base address (SUNXI_NFC_BASE) into those functions, making the
code more readable.
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Richard Genoud [Fri, 23 Jan 2026 11:44:58 +0000 (12:44 +0100)]
mtd: rawnand: sunxi_spl: add support for H6/H616 nand controller
Introduce H6/H616 NAND controller support for SPL
The H616 NAND controller has the same base as A10/A23, with some
differences:
- MDMA is based on chained buffers
- its ECC supports up to 80bit per 1024bytes
- some registers layouts are a bit different, mainly due do the stronger
ECC.
- it uses USER_DATA_LEN registers along USER_DATA registers.
- it needs a specific clock for ECC and MBUS.
For SPL, most of the work was setting the clocks, adding the new
capability structure for H616 and supporting the new USER_DATA_LEN
registers.
Tested on Whatsminer H616 board (with and without scrambling, ECC)
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Richard Genoud [Fri, 23 Jan 2026 11:44:57 +0000 (12:44 +0100)]
mtd: rawnand: sunxi: add support for H6/H616 nand controller
Introduce H6/H616 NAND controller support for U-Boot
The H616 NAND controller has the same base as A10/A23, with some
differences:
- MDMA is based on chained buffers
- its ECC supports up to 80bit per 1024bytes
- some registers layouts are a bit different, mainly due do the stronger
ECC.
- it uses USER_DATA_LEN registers along USER_DATA registers.
- it needs a specific clock for ECC and MBUS.
Introduce the basic support, with ECC and scrambling, but without
DMA/MDMA.
Tested on Whatsminer H616 board (with and without scrambling, ECC)
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The NAND controller on H6/H616 uses one clock for its internal logic
(NAND0_CLK) and one clock for ECC engine (NAND1_CLK) in addition to AHB
and MBUS clocks.
As NAND{0,1}_CLKs and MBUS_GATE are missing, add them.
The bit locations are from H616/H6 User Manual.
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Richard Genoud [Fri, 23 Jan 2026 11:44:53 +0000 (12:44 +0100)]
mtd: rawnand: sunxi_spl: increase max_oobsize for 2KiB pages
Increase max_oobsize to take into account bigger OOB on 2KiB pages
Some NAND chip (e.g. Kioxia TC58NVG1S3HTA00) have a 2KiB page size +
128 bytes OOB.
In order to detect them, the max_oobsize has to be increased from 64 to
128 bytes.
Tested on Kioxia TC58NVG1S3HTA00 NAND chip on Whatsminer H616 board.
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Richard Genoud [Fri, 23 Jan 2026 11:44:52 +0000 (12:44 +0100)]
mtd: rawnand: sunxi_spl: use NFC_ECC_ERR_MSK and NFC_ECC_PAT_FOUND
Use defines instead of hardcoded values for NFC_ECC_{ERR_MSK,PAT_FOUND}
SPL is using hard coded values for ECC error detection and empty chunk
detection.
The H6/H616 registers for that have changed, the pattern found is no
more in the NFC_REG_ECC_ST register.
So, don't presume anymore that pattern_found is in NFC_REG_ECC_ST, and
read the pattern_found register to get this information.
Apart from an additional register reading, no functional change.
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The H616 controller can't handle 512 bytes ECC block size. The
NFC_ECC_BLOCK_512 bit disappeared in H6, and NDFC_RANDOM_EN took its
place.
So, add has_ecc_block_512 capability to only set this bit on SoC having
it.
On the way, let's drop NFC_ECC_BLOCK_SIZE_MSK which was just a mask for
the very same bit.
No functional change.
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Richard Genoud [Fri, 23 Jan 2026 11:44:45 +0000 (12:44 +0100)]
mtd: rawnand: sunxi: move ECC_PAT_FOUND register in SoC caps
Move ECC_PAT_FOUND register in SoC capabilities structure
This register offset moved in H616, it's now its own register (@0x3c,
bits 0-31), not shared with NFC_ECC_ST any more (was @0x38 bits 16-31).
Push that specificity in caps structure.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Richard Genoud [Fri, 23 Jan 2026 11:44:44 +0000 (12:44 +0100)]
mtd: rawnand: sunxi: move USER_DATA register offset in SoC caps
USER_DATA register offset moved in H616, so let's make it a SoC cap
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Richard Genoud [Fri, 23 Jan 2026 11:44:43 +0000 (12:44 +0100)]
mtd: rawnand: sunxi: move ECC_ERR_CNT register offset in SoC caps
ECC_ERR_CNT register offset moved in H616, so let's make it a SoC cap
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Richard Genoud [Fri, 23 Jan 2026 11:44:42 +0000 (12:44 +0100)]
mtd: rawnand: sunxi: add per SoC capabilities
Introduce per SoC capabilities in sunxi_nand.c
This prepares for the H616 support that has quite a lot differences in
registers offset and capabilities.
Start with the ECC strength table.
No functional change.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Richard Genoud [Fri, 23 Jan 2026 11:44:41 +0000 (12:44 +0100)]
mtd: rawnand: sunxi: merge register definitions for sunxi_nand{, _spl}.c
Merge common register definitions from sunxi_nand{,_spl}.c
The Allwinner NAND controller registers where in both files, so let's
just merge all that in a header, it will be easier for maintenance.
NB: the defines are also harmonized with Linux driver
No functional change
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Richard Genoud [Fri, 23 Jan 2026 11:44:40 +0000 (12:44 +0100)]
mtd: rawnand: sunxi: remove usage of struct sunxi_ccm_reg
The sunxi_ccm_reg is legacy, drop its usage from nand related code
For that, CCU_NAND0_CLK_CFG and CCU_AHB_GATE1 are added to the clock
files when missing.
And clock code in sunxi_nand{,_spl}.c and board.c are changed to use the
new scheme.
Moreover, drop AHB_DIV_1 in favor of the more readable CCM_NAND_CTRL_M/N
Suggested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Richard Genoud [Fri, 23 Jan 2026 11:44:39 +0000 (12:44 +0100)]
mtd: rawnand: sunxi_spl: cosmetic: use definitions from linux/mtd/rawnand.h
Remove unneeded definitions NFC_CMD_R* in sunxi_nand_spl.c
No need to define NFC_CMD_RNDOUTSTART, NFC_CMD_RNDOUT and
NFC_CMD_READSTART here since they are already in linux/mtd/rawnand.h
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Richard Genoud [Fri, 23 Jan 2026 11:44:37 +0000 (12:44 +0100)]
mtd: rawnand: sunxi_spl: fix pointer from integer without a cast
Fix pointer from interget warning when compiling for ARM64
When compiling for arm64, we get this error:
error: passing argument 2 of ‘__memcpy_fromio’ makes pointer from
integer without a cast [-Wint-conversion]
Moreover the copy should be made with dedicated readl(), like for any
register access on this peripheral, since they are 32bit wide.
So, instead of memcpy_fromio(), just use a readl() loop.
Introduce nand_readlcpy() to implement this loop.
Fixes: 6ddbb1e936c7 ("spl: nand: sunxi: use PIO instead of DMA") Suggested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The 'complete' member isn't part of the structure, let's remove it.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Patrick Rudolph [Mon, 15 Dec 2025 08:16:39 +0000 (09:16 +0100)]
x86: cpu: Fix crash on FTRACE enabled builds
When compiled with FTRACE=1 U-boot will crash as %rdi is clobbered
in board_init_f_alloc_reserve() and board_init_f_init_reserve() will
memset the .text segment instead of the global_data struct.
According to the System V AMD64 ABI %rdi is not preserved and the
existing code only worked as board_init_f_alloc_reserve() was small
enough to not use %rdi.
Fix that by always passing the correct argument to
board_init_f_init_reserve().
TEST=Can boot on qemu-q35 with FTRACE=1 enabled during build.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Shiji Yang [Sun, 27 Jul 2025 05:55:20 +0000 (13:55 +0800)]
mips: mtmips: add CPU reset support for MT7628
Allow the system to reset the CPU without calling the reset
controller. This patch also removed the default SYSRESET controller
for MT7628, as it is now optional.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Excessive default value causes crash on hardware: x86 baytrail E3845
It is unclear where the data is being populated being 'BLOBLISTT_TCPA_LOG'
is not found elsewhere in the u-boot tree. This leads to confusion about
how much space for TPM log is actually needed.
This was tested on hardware using TPMv1.
Signed-off-by: Eric Schikschneit <eric.schikschneit@novatechautomation.com>
Yao Zi [Fri, 30 Jan 2026 18:03:53 +0000 (18:03 +0000)]
cmd: mmc: Return symbolic value when part switching fails in mmc dev
Return symbolic value CMD_RET_FAILURE instead of literal "1" when
failing to switch the partition to improve readability.
Signed-off-by: Yao Zi <me@ziyao.cc> Tested-by: Anshul Dalal <anshuld@ti.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Yao Zi [Fri, 30 Jan 2026 18:03:52 +0000 (18:03 +0000)]
cmd: mmc: Check whether arguments are valid numbers in dev subcommand
Currently when any of speed_mode, part, or dev fails to be parse as a
number, no error is reported. In this case __init_mmc_device() is called
with weird arguments, probably zeroes if there's no digit prefixing the
argument, which is especially confusing when the invocation occasionally
succeeds.
Let's check whether arguments are valid numbers without trailing
characters. This is quite helpful for speed_mode: it requires an index
instead of a mode name, one may easily pass in a string, which will be
parsed as zero (MMC_LEGACY), without carefully reading the
documentation, then finds the MMC device is under an unexpected mode.
Signed-off-by: Yao Zi <me@ziyao.cc> Tested-by: Anshul Dalal <anshuld@ti.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Yao Zi [Fri, 30 Jan 2026 18:03:51 +0000 (18:03 +0000)]
cmd: mmc: Simplify dev subcommand handling
Replace the big if-else block in do_mmc_dev() with switch-case and use
fallthrough to remove the duplicated code for parsing dev and part.
Signed-off-by: Yao Zi <me@ziyao.cc> Tested-by: Anshul Dalal <anshuld@ti.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tanmay Kathpalia [Sun, 25 Jan 2026 12:39:57 +0000 (04:39 -0800)]
mmc: Fix typos in comments and debug messages
Fix the following typos in drivers/mmc/mmc.c:
- "neiter" -> "neither" in __mmc_switch() comment
- "witdh" -> "width" in bus_width() warning message
- "enver" -> "never" in mmc_select_mode_and_width() comment
Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
ht.lin [Wed, 21 Jan 2026 22:36:26 +0000 (16:36 -0600)]
mmc: mediatek: add DMA mode support
Implement DMA support in the MediaTek MMC driver to enhance data
transfer speed.
- Define DMA control and configuration registers
- Implement functions for starting, stopping, and completing DMA
transfers
- Modify data transfer logic to utilize DMA when enabled
- Ensure proper cache management during DMA operations
Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com> Signed-off-by: ht.lin <ht.lin@mediatek.com> Signed-off-by: Julien Masson <jmasson@baylibre.com> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
David Lechner [Wed, 21 Jan 2026 22:36:24 +0000 (16:36 -0600)]
mmc: mtk-sd: use GENMASK and FIELD macros
Replace separate mask and shift definitions with GENMASK and FIELD_*
macros for better readability and maintainability.
All macros ending in _M have the suffix dropped. The value remains the
same but is now generated with GENMASK. All macros ending in _S are
removed and their uses replaced with FIELD_PREP and FIELD_GET macros.
Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Mon, 2 Feb 2026 20:24:56 +0000 (14:24 -0600)]
Merge patch series "m68k: Add support for QEMU virt machine"
Kuan-Wei Chiu <visitorckw@gmail.com> says:
Add support for the QEMU 'virt' machine on the m68k architecture. The
QEMU virt machine models a generic system utilizing Goldfish virtual
peripherals and is capable of emulating various classic 68k CPUs.
Currently, U-Boot's m68k architecture support focuses on ColdFire
variants. This series expands support to include the classic M680x0
architecture, implementing the necessary exception vectors, startup
code, and a bootinfo parser compatible with the QEMU interface.
Drivers for Goldfish peripherals (TTY, Timer, RTC) and the QEMU
Virtual System Controller (sysreset) are also added to enable serial
console, timekeeping, and system reset functionality.
The implementation has been verified on QEMU targeting the M68040 CPU,
confirming successful hardware initialization and boot to the U-Boot
command shell. Additionally, the CI configuration was verified locally
using gitlab-ci-local "qemu_m68k_virt test.py", resulting in
PASS qemu_m68k_virt test.py.
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:37 +0000 (20:18 +0000)]
MAINTAINERS: Update m68k entry
Rename the "COLDFIRE" entry to "M68K" to reflect that the architecture
support now encompasses traditional m680x0 CPUs (e.g., M68040) in
addition to ColdFire platforms.
Remove Huan Wang from the maintainers list as she is no longer active,
as suggested by Angelo Dureghello.
Add myself as a co-maintainer to assist with reviewing and testing
m68k-related patches.
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:36 +0000 (20:18 +0000)]
CI: Add test jobs for QEMU m68k virt machine
Enable CI testing for the newly introduced QEMU m68k 'virt' board on
both GitLab CI and Azure Pipelines. This ensures the new M68040
architecture support is built and booted correctly in the emulated
environment.
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <simon.glass@canonical.com>
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:35 +0000 (20:18 +0000)]
board: Add QEMU m68k virt board support
Add support for the QEMU 'virt' machine on the m68k architecture. This
board emulates a generic machine based on the Motorola 68040 CPU
equipped with Goldfish virtual peripherals.
Introduce the necessary board configuration and initialization
infrastructure. The implementation includes logic to parse the QEMU
bootinfo interface, enabling dynamic detection of system RAM size to
adapt to the virtual machine's configuration.
Enable the Goldfish TTY driver for serial console output. Additionally,
enable Goldfish RTC and timer drivers to support real-time clock
functionality and nanosecond-resolution delays. Include comprehensive
documentation covering build instructions and usage examples.
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Tested-by: Daniel Palmer <daniel@0x0f.com> Reviewed-by: Simon Glass <simon.glass@canonical.com>
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:34 +0000 (20:18 +0000)]
m68k: Add support for M68040 CPU
Add support for the Motorola 68040 architecture. Currently, m68k
support in U-Boot is primarily focused on ColdFire variants. Introduce
the necessary infrastructure to support the classic M680x0 series,
specifically targeting the M68040 as emulated by QEMU.
The implementation includes exception vectors, early startup code, and
minimal CPU initialization and relocation stubs. It also defines the
standard m68k boot information structure used for passing hardware
information to the operating system. To ensure compatibility, ColdFire-
specific library objects such as cache and interrupt handling are
excluded from the build when M68040 is selected.
Additionally, apply a specific workaround during the early memory
reservation stage. Use a manual loop to clear global data instead of
the standard memset() function, as utilizing memset() at this point was
observed to cause a hang on the QEMU platform.
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:33 +0000 (20:18 +0000)]
sysreset: Add QEMU virtual system controller driver
Introduce a new sysreset driver for the QEMU Virtual System Controller.
This device is found on QEMU "virt" machines (such as the m68k virt
target) and provides a mechanism to trigger system reset and power-off
events.
The driver maps U-Boot sysreset types to the corresponding controller
commands:
- SYSRESET_WARM / SYSRESET_COLD -> VIRT_CTRL_CMD_RESET
- SYSRESET_POWER_OFF -> VIRT_CTRL_CMD_HALT
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Reviewed-by: Simon Glass <simon.glass@canonical.com>
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:32 +0000 (20:18 +0000)]
rtc: goldfish: Support platform data for non-DT probing
Currently, the Goldfish RTC driver exclusively relies on device tree
to retrieve the base address, failing immediately if dev_read_addr()
returns FDT_ADDR_T_NONE. This restriction prevents the driver from
being used on platforms that instantiate devices via U_BOOT_DRVINFO()
instead of device tree, such as the QEMU m68k virt machine.
Add support for platform data to address this limitation. Introduce a
new .of_to_plat hook to handle device tree parsing and populate the
platform data. Update the probe function to rely exclusively on this
platform data, enabling support for both Device Tree and manual
instantiation.
Introduce a new header file include/goldfish_rtc.h to define the
platform data structure.
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:31 +0000 (20:18 +0000)]
timer: Add Goldfish timer driver
Add support for the Goldfish timer driver. This driver utilizes the
Goldfish RTC hardware to provide a nanosecond-resolution timer. This
virtual device is commonly found in QEMU virtual machines (such as the
m68k virt machine) and Android emulators.
The driver implements the standard U-Boot timer UCLASS interface,
exposing a 64-bit monotonically increasing counter with a 1GHz clock
rate derived from the RTC registers.
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Tested-by: Daniel Palmer <daniel@0x0f.com> Reviewed-by: Yao Zi <me@ziyao.cc> Reviewed-by: Simon Glass <simon.glass@canonical.com> Reviewed-by: Angelo Dureghello <angelo@kernel-space.org>
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:30 +0000 (20:18 +0000)]
serial: Add Goldfish TTY driver
Add support for the Google Goldfish TTY serial device. This virtual
device is commonly used in QEMU virtual machines (such as the m68k
virt machine) and Android emulators.
The driver implements basic console output and input polling using the
Goldfish MMIO interface.
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Reviewed-by: Yao Zi <me@ziyao.cc> Tested-by: Daniel Palmer <daniel@0x0f.com> Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <simon.glass@canonical.com> Acked-by: Angelo Dureghello <angelo@kernel-space.org>
Tom Rini [Mon, 2 Feb 2026 19:39:52 +0000 (13:39 -0600)]
Merge patch series "arm: mach-k3: j721s2: Provide a way to obtain boot device for non SPLs"
This series from Dominik Haller <d.haller@phytec.de> provides a way for
TI K3 platforms to determine their boot device outside of SPL and then
adds support for the PHYTEC phyCORE-AM68x/TDA4x SoM.
Dominik Haller [Fri, 16 Jan 2026 01:41:11 +0000 (17:41 -0800)]
arm: mach-k3: j721s2: Provide a way to obtain boot device for non SPLs
Introduce get_boot_device() to obtain the booting device. Make it also
available for non SPL builds so u-boot can also know the device it
is booting from.
Marek Vasut [Thu, 29 Jan 2026 03:53:29 +0000 (04:53 +0100)]
mkimage: fit: align DTs in external data to 8 Bytes by default
Unless specified otherwise using the mkimage -B n option, align
DTs in fitImage external data to 8 Bytes, and retain alignment
of everything else to 4 Bytes. This should fulfill the DTspec
requirement, that DTs must be placed at 8 Byte aligned addresses,
even for DTs that are part of fitImage with external data. For
fitImage with embedded data, there is nothing we can do, as the
embedded data are aligned to 4 Bytes, just like any other DT
property.
Replace fdtdec_get_child_count() counting of images with counting
of padding using fdt_for_each_subnode(). This is much more useful,
as the added up padding can be passed directly to calloc() when
allocating the buffer which holds the external data. The image
count is no longer needed.
Adjust the image layouting such, that buf_ptr is incremented to
place the next image at align_size aligned offset. This is done
at the beginning of the loop, once the align_size for current
image can be determined from the current image type.
Update binman test to validate the new 8 Byte alignment.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
David Lechner [Thu, 29 Jan 2026 20:03:41 +0000 (14:03 -0600)]
boot/fit: print error name in boot_get_fdt_fit()
Print the actual error code in a couple of places in boot_get_fdt_fit().
These are FDT error codes, not errno, so printing the string is more
helpful than printing the numeric value.
The only caller of boot_get_fdt_fit() unconditionally replaces the
returned error code (fdt_noffset) with ENOENT so the actual error would
otherwise be lost.
Signed-off-by: David Lechner <dlechner@baylibre.com>
dts: add Exynos vendor support for OF_UPSTREAM_VENDOR
When building Exynos boards, configure OF_UPSTREAM_VENDOR to build all
device trees in:
- "samsung/" for 32-bit ARM platforms.
- "exynos/" for 64-bit ARM platforms.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Anshul Dalal [Thu, 22 Jan 2026 07:19:56 +0000 (12:49 +0530)]
mach-k3: am64x: add support for speed grades
With the support for common speed grade configuration added in commit 65a6b83a9b7f ("mach-k3: refactor A53 speed grade clock-rate fixup"),
this patch extends the support to AM64x SoCs.
Tom Rini [Thu, 29 Jan 2026 15:00:01 +0000 (09:00 -0600)]
Merge tag 'u-boot-stm32-20260129' of https://source.denx.de/u-boot/custodians/u-boot-stm
- spi: stm32: OSPI and QSPI optimization
- Update stm32 clock drivers to restore boot for STM32MP13/STM32MP2
board family
- Add bootph-all in ltdc node in stm32mp257f-ev1-u-boot
- Use CONFIG_STM32MP15X to discern STM32MP15xx on DH STM32MP15xx DHSOM
- Reinstate missing SPL configs for DH STM32MP15xx DHSOM
- stm32mp2 boards: read boot index from backup register
- video: simple_panel: add support for "rocktech,rk043fn48h" display
- Add .of_to_plat callback in stm32_ltdc driver
Tom Rini [Wed, 28 Jan 2026 19:26:17 +0000 (13:26 -0600)]
misc: Keep FSL_IFC available on PowerPC as well
This symbol is used on a number of PowerPC platforms as well, so make it
available there again.
Fixes: 424b324165ea ("armv7: Add CPLD support via IFC to the ls1021a-iot board.") Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Dario Binacchi [Sun, 18 Jan 2026 10:48:43 +0000 (11:48 +0100)]
board: stm32mp2: read boot index from backup register
Following the 'commit 95b5a7de30f6 ("FWU: STM32MP1: Add support to
read boot index from backup register")', this patch enables reading
the boot index from backup registers on STM32MP2 platforms.
projects / thirdparty / u-boot.git / log
