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5 weeks agobuild: Remove $gnu_ld
Rainer Orth [Wed, 1 Jul 2026 08:43:45 +0000 (10:43 +0200)] 
build: Remove $gnu_ld

With the removal of HAVE_GNU_LD, the gnu_ld variable used in config.gcc
etc. has few uses left, so this patch removes or replaces them:

* In config.gcc:

  hppa*64*-*-hpux11*: According to install.tex, this configuration
  requires the native HP linker, so the target_cpu_default setting for
  gld is removed.

  ia64*-*-elf*: This configuration is gld-only, so target_cpu_default is
  set unconditionally.

  mips*-*-*: After the removal of IRIX support, MIPS configurations are
  also gld-only, so target_cpu_default2 is set unconditionally.

* In configure.ac, checks of gnu_ld are changed to ld_flavor instead.

* The gnu_ld checks for the --version-script and -soname options are
  replaced by checking the ld --help output, matching what is done for
  -Bstatic/-Bdynamic.

  The references to jit/Makefile.in are no longer true, thus removed.

* The gnu_ld check for the --demangle option isn't necessary since the
  test already checks ld --help output.

2026-04-13  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc:
* config.gcc: Remove gnu_ld.
<*-*-vms*>: Check ld_flavor instead of gnu_ld.
<ia64*-*-elf*> (target_cpu_default): Always add MASK_GNU_LD.
<mips*-*-*> (target_cpu_default2): Always add
MASK_SPLIT_ADDRESSES.
<hppa*64*-*-hpux11*> (target_cpu_default): Check ld_flavor instead
of gnu_ld.  Move ...
* configure.ac: ... here.
Remove gnu_ld.
Check ld_flavor instead of gnu_ld.
(gcc_cv_ld_static_dynamic) <*-*-hpux*>: Don't check gnu_ld.
(gcc_cv_ld_version_script): Check ld --help for --version-script.
(gcc_cv_ld_soname): Check ld --help for -soname.
<*-*-darwin*>: Always use Darwin version.
<*-*-solaris2*>: Always use Solaris version with Solaris ld.
(gcc_cv_ld_demangle): Don't check gnu_ld.
* configure: Regenerate.

5 weeks agoRemove HAVE_GNU_LD
Rainer Orth [Wed, 1 Jul 2026 08:38:26 +0000 (10:38 +0200)] 
Remove HAVE_GNU_LD

Similar to HAVE_GNU_AS, there's only a single use of HAVE_GNU_LD left,
i.e. linker support for GNU style response files.  Therefore this patch
replaces it with the result of a new configure test, HAVE_LD_AT_FILE.

Apart from that, there's a reference in alpha/vms.h.  However, there's
no documentation on the support status of the alpha*-dec-*vms*
configuration.  The last non-mechanical change to VMS files in
gcc/config dates back to 2014, so I've left that alone.

2026-04-13  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc:
* configure.ac (HAVE_GNU_LD): Remove.
(gcc_cv_ld_at_file): New test.
* configure: Regenerate.
* config.in: Regenerate.

* collect2.cc: Check HAVE_LD_AT_FILE instead of HAVE_GNU_LD.

gcc/ada:
* link.c: Check HAVE_LD_AT_FILE instead of HAVE_GNU_LD.
Update comment.
[VMS]: Remove.
[__svr4__ && __i386__]: Remove.

gcc/testsuite:
* gcc.misc-tests/outputs.exp (gld): Update comment.

5 weeks agobuild: Remove --with-gnu-as
Rainer Orth [Wed, 1 Jul 2026 08:36:00 +0000 (10:36 +0200)] 
build: Remove --with-gnu-as

The removal of HAVE_GNU_AS and the gas variable in config.gcc etc. also
makes the --with-gnu-as configure option unnecessary.  This patch
removes it together with gas_flag.

The latter is also used to annotate the DEFAULT_ASSEMBLER message in
configure.ac.  Given that the vast majority of configurations uses gas,
this doesn't carry much information and is also removed.

2026-04-13  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc:
* configure.ac: Remove --with-gnu-as, gas_flag.
* configure: Regenerate.
* config.gcc: Remove gas_flag.

* doc/install.texi (Configuration, --with-gnu-as): Remove.
(Specific, hppa64-hp-hpux11*): Remove --with-gnu-as reference.
(Specific, ia64-*-hpux*): Likewise.  Recomment --with-as instead.
* doc/invoke.texi (IA-64 Options, -mgnu-as): Remove comment.

contrib:
* config-list.mk (sparc64-sun-solaris2.11): Remove --with-gnu-as.

contrib/regression:
* btest-gcc.sh (withopt): Remove --with-gnu-as.

5 weeks agobuild: Remove $gas
Rainer Orth [Wed, 1 Jul 2026 08:31:07 +0000 (10:31 +0200)] 
build: Remove $gas

By the removal of HAVE_GNU_AS, the gas variable in config.gcc etc. has
become unnecessary.  This patch removes it.

* In some cases, the code is changed to use as_flavor instead.

* In config.gcc several tests can be removed:

  ia64*-*-elf*, hppa*-*-*: : These are a gas-only configurations.

  ia64-hp-*vms*: The requirements and support status of this
  configuration isn't documented.

* The check in configure.ac to require gas on mips*-*-*, loongarch*-*,
  and *-*-hpux* can be done unconditionally.

2026-04-11  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc:
* acinclude.m4 (gcc_GAS_FLAGS): Check as_flavor instead of gas.
* config.gcc: Remove gas.
<ia64*-*-elf*> (target_cpu_defaults): Always add MASK_GNU_AS.
<ia64-hp-*vms*>: Likewise.
<hppa*-*-*> (target_cpu_default2): Always add MASK_GAS.
* configure.ac: Remove gas.
* configure: Regenerate.

5 weeks agoPTA: Fix wrong optimization of conditional dynamic allocation
Eric Botcazou [Wed, 1 Jul 2026 08:23:46 +0000 (10:23 +0200)] 
PTA: Fix wrong optimization of conditional dynamic allocation

This is a regression present on mainline, 16, 15 and 14 branches introduced
by the fix for PR tree-optimization/112653 (PTA and return).  What happens
is that DSE incorrectly eliminates a call to memcpy, whose destination is
obtained from (an equivalent of) malloc and is ultimately returned from the
function.  But this happens only when the dynamic allocation is conditional.

The difference between the unconditional and conditional cases is:

ESCAPED_RETURN = { ESCAPED NONLOCAL HEAP(30) }

vs

ESCAPED_RETURN = { ANYTHING }

The fix is to apply in set_uids_in_ptset the same treatment to ANYTHING in
the escaped return case as in the escaped case.

gcc/
* tree-ssa-structalias.cc (set_uids_in_ptset): If ANYTHING is
present in the ESCAPED_RETURN solution, record that the global
solution has an escaped heap if FROM contains a heap variable.

gcc/testsuite/
* gnat.dg/opt109.adb: New test.
* gnat.dg/opt109_pkg.ads, gnat.dg/opt109_pkg.adb: New helper.

5 weeks agoRemove HAVE_GNU_AS
Rainer Orth [Wed, 1 Jul 2026 08:26:12 +0000 (10:26 +0200)] 
Remove HAVE_GNU_AS

This patch removes or replaces the remaining uses of HAVE_GNU_AS:

* gcc.cc (asm_options) has a sub-spec to map the gcc -v/-w/-I options to
  their assembler equivalents.  It is replaced by ASM_V_SPEC, defaulting
  to the gas version.  Non-gas configurations define their own versions.

* Darwin has ASM_OPTIONS which is identical to the default ASM_V_SPEC
  and can just be removed.

* sol2.h currently handles -v in ASM_SPEC_BASE.  This patch moves this
  to an Solaris-as only version of ASM_V_SPEC.  This also handles the
  gcc -w -> as -n mapping.  The spec doesn't pass on -I, though:
  preprocessing .S files is handled by gcc itself, the -I option is only
  used for gas' .include directive which as doesn't support.  Solaris as
  instead could handle preprocessing by passing the source through cpp
  when the -P option is given.  It also uses -D/-U/-I for that.

* ia64/hpux.h guards AS_NEEDS_DASH_FOR_PIPED_INPUT with !HAVE_GNU_AS,
  but according to install.texi ia64-*-hpux* requires gas so this can
  just go.

* nvptx/nvptx.h handles the mapping in ASM_SPEC.  This is done in
  ASM_V_SPEC now.  The nvptx as has no equivalents of -w and -I.

* AIX as only supports -v and -W, so rs6000/aix.h gets a matching
  ASM_V_SPEC when as is in use.

2026-04-10  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc:
* gcc.cc (asm_options) [HAVE_GNU_AS]: Move to ...
(ASM_V_SPEC) ... this.
* config/nvptx/nvptx.h (ASM_SPEC): Rename to ASM_V_SPEC.
Adjust comment.
* config/rs6000/aix.h [HAVE_AIX_AS] (ASM_V_SPEC): Define.
* config/sol2.h (ASM_SPEC_BASE): Move -v handling to ...
[HAVE_SOLARIS_AS] (ASM_V_SPEC): ... this.  Also handle -w.
* doc/tm.texi.in (Driver, ASM_V_SPEC): Document.
* doc/tm.texi: Regenerate.

* config/darwin.h (ASM_OPTIONS): Remove.
* config/i386/darwin.h (ASM_SPEC): Remove ASM_OPTIONS.

* config/ia64/hpux.h (AS_NEEDS_DASH_FOR_PIPED_INPUT): Remove.

* configure.ac (HAVE_GNU_AS): Remove.
* configure: Regenerate.
* config.in: Regenerate.

5 weeks agobuild: Introduce {as,ld}_flavor
Rainer Orth [Wed, 1 Jul 2026 08:24:10 +0000 (10:24 +0200)] 
build: Introduce {as,ld}_flavor

When working to handle more vendor assemblers and linkers for the patch
series described in

[PATCH 0/6] Remove HAVE_GNU_{AS,LD} etc.
        https://gcc.gnu.org/pipermail/gcc-patches/2026-April/715161.html

it turned out that the original plan to follow what I'd done for Solaris
so far with the solaris_{as,ld} variables leads to code that is hard to
understand.

Therefore this patch uses a different approach: it introduces two new
variables, as_flavor, and ld_flavor.  They both default to gnu, i.e. the
GNU Binutils toolchain or compatible assemblers and linkers.

To deal with incompatible vendor toolchains, those variables can take
other values.  In addition to solaris, there are aix, darwin, hpux, and
nvptx.  More could be added as necessary.

In preparation for the patch series above, this patch switches existing
code from solaris_{as,ld} to {as,ld}_flavor=solaris.

It also checks the configured assembler and linker for the vendor
toolchains above.  If there's a choice between native and GNU toolchains
(AIX, HP-UX, Solaris), the as and ld version outputs are examined.
Otherwise (Darwin, NVPTX), the values are hardcoded and only used in
configure messages.

In addition to {as,ld}_flavor, HAVE_<FLAVOR>_{AS,LD} macros are defined
in cases they are actually needed, matching existing HAVE_SOLARIS_{AS,LD}.

Tested together with a reworked version of the patch series above on
x86_64-pc-linux-gnu, powerpc-ibm-aix7.3.1.0 (as/ld and gas/gld),
x86_64-apple-darwin17.7.0, i386-pc-solaris2.11 and sparc-sun-solaris2.11
(as/ld, gas/ld, and gas/gld).  Also tested by Dave on HP-UX.

2026-05-03  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc:
* acinclude.m4: Check as_flavor, ld_flavor instead of solaris_as,
solaris_ld.
* configure.ac: Likewise.
(as_flavor, ld_flavor): New variables.
Adapt messages.
Set based on as, ld version output.
(HAVE_AIX_AS): Define.
* configure: Regenerate.
* config.in: Regenerate.

5 weeks agobuild: Fix ax_pthread.m4 on Solaris 11.4
Rainer Orth [Wed, 1 Jul 2026 07:36:36 +0000 (09:36 +0200)] 
build: Fix ax_pthread.m4 on Solaris 11.4

As uncovered by PR testsuite/125310, libcaf_shmem isn't built on
Solaris.  This happens because the AX_PTHREAD autoconf macro erroneously
thinks that Solaris lacks pthread support.

The problem is that the macros expects _REENTRANT to be defined in
multithreaded programs.  However, as described in
https://gcc.gnu.org/gcc-16/porting_to.html#solaris the Solaris 11.4
system headers no longer reference _REENTRANT, so GCC 16 doesn't define
it any longer.

The issue is still present in current ax_pthread.m4 (serial 31) in the
autoconf archive.  This patch fixes this by only requiring _REENTRANT in
older Solaris versions that still need it by checking for pre-XPG7
system headers.

Bootstrapped without regressions on i386-pc-solaris2.11 and
sparc-sun-solaris2.11.  Also tested manually on Solaris 11.3.

2026-05-14  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

config:
* ax_pthread.m4 (ax_pthread_check_macro) <solaris*>: Only require
_REENTRANT before Solaris 11.4

libgfortran:
* configure: Regenerate.

cherry picked from approved upstream pull request

AX_PTHREAD: Fix pthread detection on Solaris 11.4
https://github.com/autoconf-archive/autoconf-archive/pull/341

5 weeks agoi386: Remove AMX-TF32 support
Haochen Jiang [Wed, 1 Jul 2026 02:31:58 +0000 (10:31 +0800)] 
i386: Remove AMX-TF32 support

AMX-TRANSPOSE is removed from ISE. Since there is no actual hardware, we
choose to directly remove it in GCC 17 and backport DMR enable part to
GCC 15/16.

gcc/ChangeLog:

* common/config/i386/cpuinfo.h
(get_available_features): Remove AMX-TF32.
* common/config/i386/i386-common.cc
(OPTION_MASK_ISA2_AMX_TF32_SET): Removed.
(OPTION_MASK_ISA2_AMX_TF32_UNSET): Ditto.
(OPTION_MASK_ISA2_AMX_TILE_UNSET): Remove AMX_TF32.
(ix86_handle_option): Ditto.
* common/config/i386/i386-cpuinfo.h
(enum processor_features): Remove FEATURE_AMX_TF32.
* common/config/i386/i386-isas.h: Remove AMX-TF32.
* config.gcc: Do not include amxtf32intrin.h.
* config/i386/amxtf32intrin.h: Remove AMX-TF32 intrins.
* config/i386/cpuid.h (bit_AMX_TF32): Removed.
* config/i386/i386-c.cc
(ix86_target_macros_internal): Remove AMX_TF32.
* config/i386/i386-isa.def (AMX_TF32): Removed.
* config/i386/i386-options.cc
(ix86_valid_target_attribute_inner_p): Remove AMX-TF32.
* config/i386/i386.opt: Ditto.
* config/i386/i386.opt.urls: Ditto.
* config/i386/immintrin.h: Do not include amxtf32intrin.h.
* doc/extend.texi: Remove amx-tf32.
* doc/invoke.texi: Ditto.
* doc/sourcebuild.texi: Ditto.

gcc/testsuite/ChangeLog:

* g++.dg/other/i386-2.C: Remove AMX-TF32 test.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/amx-check.h: Ditto.
* gcc.target/i386/funcspec-56.inc: Ditto.
* gcc.target/i386/sse-12.c: Ditto.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* lib/target-supports.exp: Ditto.
* g++.target/i386/pr122446-amxtf32.C: Removed.
* gcc.target/i386/amxtf32-asmatt-1.c: Ditto.
* gcc.target/i386/amxtf32-asmintel-1.c: Ditto.
* gcc.target/i386/amxtf32-mmultf32ps-2.c: Ditto.

5 weeks agoi386: Disable AMX-TF32 for Diamond Rapids
Haochen Jiang [Wed, 1 Jul 2026 02:31:52 +0000 (10:31 +0800)] 
i386: Disable AMX-TF32 for Diamond Rapids

AMX-TF32 will be removed from Diamond Rapids according to ISE.

We will backport this patch to GCC15/16.

gcc/ChangeLog:

* config/i386/i386.h (PTA_DIAMONDRAPIDS): Remove PTA_AMX_TF32.
* doc/invoke.texi: Correct documentation.

5 weeks agolibiberty d_compact_number signed integer overflow
Alan Modra [Wed, 1 Jul 2026 01:27:51 +0000 (10:57 +0930)] 
libiberty d_compact_number signed integer overflow

https://lists.gnu.org/archive/html/bug-binutils/2026-06/msg00189.html
Fix this by doing the addition in unsigned arithmetic.

* cp-demangle.c (d_compact_number): Avoid signed overflow.

5 weeks agoDaily bump.
GCC Administrator [Wed, 1 Jul 2026 00:16:44 +0000 (00:16 +0000)] 
Daily bump.

5 weeks agoSH: Tighten memory predicates and constraints
Oleg Endo [Sun, 29 Sep 2024 12:33:29 +0000 (21:33 +0900)] 
SH: Tighten memory predicates and constraints

In particular, reject invalid hard-regs for memory address registers when using
LRA.  Unfortunately we need to distingquish between old reload and LRA behaviors
for the transitional period.  LRA seems to require stricter predicates and
constraints.

gcc/ChangeLog:

PR target/55212
* config/sh/predicates.md (simple_mem_operand):
Use 'satisfies_constraint_Sra'.
(post_inc_mem, pre_dec_mem): Use 'satisfies_constraint_Rab'.
* config/sh/constraints.md (Rab, Rai, Sgb): New constraints.
(Sua, Sdd, Snd, Ssd, Sbv, Sra, Ara, Add): Use Rab and Rai constraints.
* config/sh/sync.md (atomic_mem_operand_0, atomic_mem_operand_1): Reject
GBR addresses when hard-llcs atomic mode is enabled.

5 weeks agoaarch64: Use SBFIZ for widening signed pow2 multiplies
Abhishek Kaushik [Mon, 29 Jun 2026 15:26:53 +0000 (15:26 +0000)] 
aarch64: Use SBFIZ for widening signed pow2 multiplies

For a widening conversion of the result of a signed multiply by a
positive power of two, rewrite the sequence to widen the multiplicand
before multiplying.  This exposes the form that AArch64 can emit as
SBFIZ and avoids a separate sign extension.  The rewrite is valid
because overflow in the original signed multiply is undefined.

Bootstrapped and regression tested on aarch64-linux-gnu.

gcc/
* config/aarch64/aarch64.cc: Include gimple-fold.h.
(aarch64_try_widen_mult_by_pow2): New function.
(aarch64_instruction_selection): Call it for conversion assignments.

gcc/testsuite/
* gcc.target/aarch64/sbfiz-widen-mult-1.c: New test.

5 weeks agotestsuite: i386: Fix gcc.target/i386/bt-cmov-1.c on Solaris
Rainer Orth [Tue, 30 Jun 2026 19:49:26 +0000 (21:49 +0200)] 
testsuite: i386: Fix gcc.target/i386/bt-cmov-1.c on Solaris

The new gcc.target/i386/bt-cmov-1.c FAILs on Solaris:

FAIL: gcc.target/i386/bt-cmov-1.c scan-assembler-times cmov[n]*c 4

The Solaris assembler uses a slightly different syntax:

cmovl.c %edx, %eax
cmovl.nc %edx, %eax

instead of

cmovc %edx, %eax
cmovnc %edx, %eax

This patch allows for both forms.  At the same time, it avoids escaping
by using brace quoting.  The character sets with a single character
aren't necessary.  'l' in "btl" isn't optional or does 'c' in "cmov"
occur more than one.

Tested on i386-pc-solaris2.11 (as and gas, 32 and 64-bit), and
x86_64-pc-linux-gnu (32 and 64-bit).

2026-06-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc/testsuite:
* gcc.target/i386/bt-cmov-1.c (scan-assembler-times): Simplify
patterns.  Allow for Solaris as syntax.

5 weeks agoFortran: Fix memory leak found in pdt_86.f03 [PR121972]
Paul Thomas [Tue, 30 Jun 2026 09:39:57 +0000 (10:39 +0100)] 
Fortran: Fix memory leak found in pdt_86.f03 [PR121972]

Followup on memory leaks found using -fsanitize=address
in existing test cases.

Co-authored-by: Jerry DeLisle <jvdelisle@gcc.gnu.org>
PR fortran/121972

gcc/fortran/

* decl.cc (gfc_get_pdt_instance): A PDT that has a derived type
component, which has allocatable components, must be marked as
having allocatable components.
* resolve.cc (gfc_resolve_ref): Initialize last_pdt from the base
symbol's declared type when the expression type is not a PDT.

gcc/testsuite/

* gfortran.dg/pdt_86.f03: Add tree dump for counts of frees and
mallocs (41 & 31 respectively).
* gfortran.dg/pdt_86_reduced.f90: New test to check that the
non-PDT version of the leak has gone.

5 weeks agophiopt: use remove_phi_node instead of gsi_remove for phi node [PR125961]
Andrew Pinski [Tue, 30 Jun 2026 00:06:46 +0000 (17:06 -0700)] 
phiopt: use remove_phi_node instead of gsi_remove for phi node [PR125961]

While working on some other code I noticed that we call gsi_remove
for the phi node but then don't release the phi node so it takes until
the next gc to free it. This changes the 2 places in phiopt to use
remove_phi_node instead of gsi_remove so that the phi node can be reused
instead. Note we need to pass false here since we use the result
of the phi still.

Bootstrapped and tested on x86_64-linux-gnu.

PR tree-optimization/125961
gcc/ChangeLog:

* tree-ssa-phiopt.cc (factor_out_conditional_operation): Use
remove_phi_node instead of gsi_remove for the phi node.
(factor_out_conditional_load): Likewise.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
5 weeks agocobol: Improve conversions; reduce aliasing; address big-endian architectures.
Robert Dubner [Tue, 30 Jun 2026 13:59:01 +0000 (09:59 -0400)] 
cobol: Improve conversions; reduce aliasing; address big-endian architectures.

This patch comprises three sets of related changes.

1) Considerable effort has been made to consolidate and improve
interconversions between various COBOL data types, both in generated GENERIC
and in libgcobol.so.

2) An ongoing effort is underway to identify and eliminate data assignments
involving pointer casting that risk aliasing problems.  (It turns out that
forty years of C programming experience sometimes means that one ends up
writing, with a great deal of assurance, code that is bad in a modern
compiler.) Some of the changes here still risk aliasing; it is an ongoing
effort.

3) Building and running GCOBOL on a big-endian S390 system has exposed a
glorious number of things that don't work because of that self-same
forty years of C programming experience on the little-endian X86_64
architecture.  Some of these changes are the beginning of writing code
that is endian agnostic in C form; some use BYTES_BIG_ENDIAN in the front
end to address endianness of the target during compile-time code
generation; and some use __BYTE_ORDER__ to handle endianness in both the
host at compile time and the target in the run-time library.

gcc/cobol/ChangeLog:

* compare.cc (alpha_compare_figconst): Make the code endian-agnostic.
(alpha_compare): Likewise.
(numeric_alpha_compare): Likewise.
(float_compare): Force proper data comparisons.
* genapi.cc (parser_goto): Use improved get_binary_value() routine.
(parser_perform_times): Likewise.
(internal_perform_through_times): Likewise.
(parser_display_internal): Set formal parameter to const.
(program_end_stuff): Use get_binary_value().
(parser_relop_long): Likewise.
(parser_see_stop_run): Likewise.
(parser_perform): Set formal parameter to const.
(parser_perform_inline_times): Use new get_binary_value().
(parser_file_write): Likewise.
(parser_file_start): Likewise.
(handle_gg_trim): Endian.
(parser_trim): Likewise.
(field_increment): Use new get_binary_value().
(parser_lsearch_start): Likewise.
(parser_release): Set formal parameter to const.
(parser_match_exception): Use new get_binary_value().
(parser_field_attr_set): Set formal parameter to const.
* genapi.h (parser_display_internal): Likewise.
(parser_perform_times): Likewise.
(parser_perform): Likewise.
(parser_goto): Likewise.
(parser_field_attr_set): Likewise.
(parser_file_start): Likewise.
(parser_release): Likewise.
* gengen.cc (gg_assign): Comment.
* genmath.cc (fast_add): New get_binary_value; address aliasing.
(fast_subtract): Likewise.
(fast_multiply): Likewise.
(fast_divide): Likewise.
* genutil.cc (get_scaled_rdigits): Set formal parameter to const.
(get_scaled_digits): Set formal parameter to const.
(get_integer_value): Improved data conversion; make local static.
(CHECK_FOR_FRACTIONAL_DIGITS): Moved here from genutil.h.
(giv_helper): New get_integer_value helper routine.
(get_and_check_refstart_and_reflen): get_binary_value and aliasing.
(get_depending_on_value_from_odo): Set some variables to const.
(get_data_offset): Use new get_integer_value() routine.
(digit): Eliminate as part of improved get_binary_value() conversion.
(num_disp_dive): Likewise.
(pd_dive): Likewise.
(get_pd_value): Likewise.
(get_binary_value_tree): Likewise.
(get_binary_value): New binary conversion routines.
(field_is_super_clean): Likewise.
(refer_is_working_storage): Likewise.
(is_working_storage): Likewise.
(refer_refmod_length): Likewise.
(binary_from_FldNumericBin5): Likewise.
(binary_from_FldLiteralN): Likewise.
(binary_from_FldNumericBinary): Likewise.
(binary_from_FldNumericDisplay): Likewise.
(binary_from_numdisp): Likewise.
(binary_from_comp_3): Likewise.
(b_from_c3): Likewise.
(binary_from_comp_6): Likewise.
(binary_from_FldPacked): Likewise.
(binary_from_FldFloat): Likewise.
(get_location): Avoid aliasing.
(safe_cast): Likewise.
(attribute_bit_clear): Set formal parameter to const.
(attribute_bit_get): Likewise.
(attribute_bit_set): Likewise.
(round_this_value): New routine for COBOL rounding.
* genutil.h (get_scaled_rdigits): Set formal parameter to const.
(get_scaled_digits): Set formal parameter to const.
(get_binary_value): Modified declaration.
(get_binary_value_tree): Eliminate.
(CHECK_FOR_FRACTIONAL_DIGITS): Move to genutil.cc.
(get_integer_value): Eliminated declaration.
(field_is_super_clean): New declaration.
(refer_is_working_storage): Changed to is_working_storage().
(is_working_storage): Eliminated.
(get_location): New declaration for field_t * overload.
(safe_cast): New declaration.
(attribute_bit_clear): Set formal parameter to const.
(attribute_bit_get): Likewise.
(attribute_bit_set): Likewise.
* move.cc (copy_little_endian_into_place): Changed to
copy_native_into_place().
(copy_native_into_place): Endian awareness.
(mh_little_endian): Change name to mh_to_binary.
(mh_to_binary): Endian awareness.
(move_helper): Use mh_to_binary.
* parse.y: Comment out code pending a bug fix.
* parse_ante.h (cbl_field_t::blank_initial): Endian awareness.
* show_parse.h: Make a variable const.
* structs.cc (member): Set formal parameter to const.
* structs.h (member): Likewise.
* util.cc (binary_initial): Endian awareness.
(cbl_field_t::encode_numeric): Endian and aliasing awareness.

libgcobol/ChangeLog:

* charmaps.h (class charmap_t): Return uint8_t instead of uint32_t
when possible to avoid endian problems.
(class cbl_iconv_t): Formatting.
* inspect.cc (normalize_id): Return endian agnostic uint8_t.
(normalize_id_sbc): Use endian agnostic uint8_t.
* libgcobol-fp.h: Add cppcheck-suppress.
* libgcobol.cc (native_to_binary_signed): New conversion.
(native_to_binary_unsigned): New name.
(big_endian_to_binary_unsigned): Endian-aware conversion.
(big_endian_to_binary_signed): Likewise.
(get_binary_value_local): Likewise.
(binary_to_big_endian): Likewise.
(binary_to_little_endian): Changed name.
(binary_to_native_binary): New name; new conversion.
(int128_to_field): Use new routine.
* libgcobol.h (__gg__mabort): Create COBOL_BIG_ENDIAN and
COBOL_LITTLE_ENDIAN macros.
(defined): Likewise.
(COBOL_BIG_ENDIAN): Likewise.
(COBOL_LITTLE_ENDIAN): Likewise.
* stringbin.cc (packed_from_combined): Endian awareness.

gcc/testsuite/ChangeLog:

* cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.cob: Removed.
* cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.out: Removed.

5 weeks agofortran: Fix finalizer list truncated when >= 3 finalizers match [PR121972]
Jerry DeLisle [Mon, 29 Jun 2026 15:36:06 +0000 (08:36 -0700)] 
fortran: Fix finalizer list truncated when >= 3 finalizers match [PR121972]

When gfc_resolve_finalizers copies matching finalizers from the template
type into a derived type's finalizer list, a linked-list bug caused the
third and later entries to be orphaned.  Fix by using the standard
tail-pointer idiom.

PR fortran/121972

gcc/fortran/ChangeLog:

* resolve.cc (gfc_resolve_finalizers): Fix linked-list tail-pointer
bug that dropped all but the first two finalizers from a derived
type's finalizer list when three or more matched.

gcc/testsuite/ChangeLog:

* gfortran.dg/pdt_70.f03: Add a matrix finalizer and update the
check of the value of 'flag'.

5 weeks agotestsuite: Skip atomic-builtins-1 on targets with sync_int_128 support
Paul-Antoine Arras [Fri, 26 Jun 2026 09:08:04 +0000 (11:08 +0200)] 
testsuite: Skip atomic-builtins-1 on targets with sync_int_128 support

The test checks that __int128 OMP atomic operations expand to
GOMP_atomic_start/end when hardware 128-bit atomic support is unavailable.  It
should not run on targets that do support such operations natively.

Update check_effective_target_sync_int_128 to return 1 for targets that do *not*
emit a call to __atomic_compare_exchange_16, and restrict the test to targets
where that check is false.

gcc/testsuite/ChangeLog:

* c-c++-common/gomp/atomic-builtins-1.c: Skip test when sync_int_128 is
available.
* lib/target-supports.exp (check_effective_target_sync_int_128): Return
1 for targets that do not emit a call to __atomic_compare_exchange_16.

5 weeks agoaarch64: Port NEON reinterpret intrinsics to pragma-based framework
Karl Meakin [Mon, 20 Apr 2026 12:08:19 +0000 (12:08 +0000)] 
aarch64: Port NEON reinterpret intrinsics to pragma-based framework

Port the `vreinterpret` family of intrinsics to the pragma-based framework.

gcc/ChangeLog:

* config/aarch64/aarch64-acle-builtins.h
(TYPES_neon_reinterpret1, TYPES_neon_reinterpret,
TYPES_neon_reinterpretq1, TYPES_neon_reinterpretq,
neon_reinterpret, neon_reinterpretq): New type lists.
* config/aarch64/aarch64-builtins.cc (VREINTERPRET_BUILTIN2,
VREINTERPRET_BUILTINS1, VREINTERPRET_BUILTINS,
VREINTERPRETQ_BUILTIN2, VREINTERPRETQ_BUILTINS1,
VREINTERPRETQ_BUILTINS, VREINTERPRET_BUILTIN): Delete macros.
(AARCH64_SIMD_VREINTERPRET_BUILTINS): Delete enum member.
(aarch64_init_simd_intrinsics): Delete function.
(init_arm_neon_builtins): Delete call to
`aarch64_init_simd_intrinsics`.
(aarch64_general_fold_builtin): Delete case for
`AARCH64_SIMD_VREINTERPRET_BUILTINS`.
* config/aarch64/aarch64-neon-builtins-base.cc (struct
gimple_reinterpret): New struct.
(vreinterpret, vreinterpretq): New function bases.
* config/aarch64/aarch64-neon-builtins-base.def (vreinterpret,
vreinterpretq): New function groups.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/neon/vreinterpret.c: New test.

5 weeks agoaarch64: Port NEON permutation intrinsics to pragma-based framework
Karl Meakin [Fri, 20 Feb 2026 17:54:19 +0000 (17:54 +0000)] 
aarch64: Port NEON permutation intrinsics to pragma-based framework

Port the following intrinsics to the pragma-based framework:
* vext
* vrev
* vtrn
* vuzp
* vzip

gcc/ChangeLog:

* config/aarch64/aarch64-simd-pragma-builtins.def (vext_mf8,
vextq_mf8, vrev64_mf8, vrev64q_mf8, vrev32_mf8, vrev32q_mf8,
vrev16_mf8, vrev16q_mf8, vtrn1_mf8, vtrn1q_mf8, vtrn2_mf8,
vtrn2q_mf8, vtrn_mf8, vtrnq_mf8, vuzp1_mf8, vuzp1q_mf8,
vuzp2_mf8, vuzp2q_mf8, vuzp_mf8, vuzpq_mf8, vzip1_mf8,
vzip1q_mf8, vzip2_mf8, vzip2q_mf8, vzip_mf8, vzipq_mf8):
Delete functions.
* config/aarch64/aarch64-sve-builtins-shapes.cc (parse_type):
Handle `D` or `Q` followed by `x1,x2,x3,x4` to mean tuple
types.
* config/aarch64/aarch64-acle-builtins.h (TYPES_bh_poly,
TYPES_bhs_neon, TYPES_neon_rev16, TYPES_neon_rev32,
TYPES_neon_rev64): New type lists.
(bh_poly, bhs_neon, neon_rev16, neon_rev32, neon_rev64):
Likewise.
* config/aarch64/aarch64-builtins.cc (aarch64_simd_tuple_types):
Remove `static` qualifier.
* config/aarch64/aarch64-builtins.h (aarch64_simd_tuple_types):
New declaration.
* config/aarch64/aarch64-neon-builtins-base.cc (build_tuple_get,
build_tuple_set): New functions.
(class gimple_permute, class gimple_permute_pair): New classes.
(ext_mask, rev_mask, trn_mask, uzp_mask, zip_mask): New
functions.
(vext, vextq, vrev16, vrev16q, vrev32, vrev32q, vtrn1, vtrn1q,
btrn2, vtrn2q, vtrn, vtrnq, vuzp1, vuzp1q, vuzp2, vuzp2q, vuzp,
vuzpq, vzip1, vzip1q, vzip2, vzip2q, vzip, vzipq): New function
bases.
* config/aarch64/aarch64-neon-builtins-base.def (vext, vextq,
vrev16, vrev16q, vrev32, vrev32q, vrev64, vrev64q, vtrn,
vtrn1, vtrn1q, vtrn2, vtrn2q, vtrnq, vuzp, vuzp1, vuzp1q,
vuzp2, vuzp2q, vuzpq, vzip, vzip1, vzip1q, vzip2, vzip2q,
vzipq): New function groups.
* config/aarch64/aarch64-simd-builtins.def (zip1, zip2, uzp1,
uzp2, trn1, trn2): Delete builtin functions.
* config/aarch64/arm_neon.h (vext_f16, vext_f32, vext_f64,
vext_p8, vext_p16, vext_p64, vext_s8, vext_s16, vext_s32,
vext_s64, vext_u8, vext_u16, vext_u32, vext_u64, vextq_f16,
vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_p64,
vextq_s8, vextq_s16, vextq_s32, vextq_s64, vextq_u8,
vextq_u16, vextq_u32, vextq_u64, vrev16_p8, vrev16_s8,
vrev16_u8, vrev16q_p8, vrev16q_s8, vrev16q_u8, vrev32_p8,
vrev32_p16, vrev32_s8, vrev32_s16, vrev32_u8, vrev32_u16,
vrev32q_p8, vrev32q_p16, vrev32q_s8, vrev32q_s16, vrev32q_u8,
vrev32q_u16, vrev64_f16, vrev64_f32, vrev64_p8, vrev64_p16,
vrev64_s8, vrev64_s16, vrev64_s32, vrev64_u8, vrev64_u16,
vrev64_u32, vrev64q_f16, vrev64q_f32, vrev64q_p8, vrev64q_p16,
vrev64q_s8, vrev64q_s16, vrev64q_s32, vrev64q_u8, vrev64q_u16,
vrev64q_u32, vtrn1_f16, vtrn1_f32, vtrn1_p8, vtrn1_p16,
vtrn1_s8, vtrn1_s16, vtrn1_s32, vtrn1_u8, vtrn1_u16,
vtrn1_u32, vtrn1q_f16, vtrn1q_f32, vtrn1q_f64, vtrn1q_p8,
vtrn1q_p16, vtrn1q_s8, vtrn1q_s16, vtrn1q_s32, vtrn1q_s64,
vtrn1q_u8, vtrn1q_u16, vtrn1q_u32, vtrn1q_p64, vtrn1q_u64,
vtrn2_f16, vtrn2_f32, vtrn2_p8, vtrn2_p16, vtrn2_s8,
vtrn2_s16, vtrn2_s32, vtrn2_u8, vtrn2_u16, vtrn2_u32,
vtrn2q_f16, vtrn2q_f32, vtrn2q_f64, vtrn2q_p8, vtrn2q_p16,
vtrn2q_s8, vtrn2q_s16, vtrn2q_s32, vtrn2q_s64, vtrn2q_u8,
vtrn2q_u16, vtrn2q_u32, vtrn2q_u64, vtrn2q_p64, vtrn_f16,
vtrn_f32, vtrn_p8, vtrn_p16, vtrn_s8, vtrn_s16, vtrn_s32,
vtrn_u8, vtrn_u16, vtrn_u32, vtrnq_f16, vtrnq_f32, vtrnq_p8,
vtrnq_p16, vtrnq_s8, vtrnq_s16, vtrnq_s32, vtrnq_u8,
vtrnq_u16, vtrnq_u32, vuzp1_f16, vuzp1_f32, vuzp1_p8,
vuzp1_p16, vuzp1_s8, vuzp1_s16, vuzp1_s32, vuzp1_u8,
vuzp1_u16, vuzp1_u32, vuzp1q_f16, vuzp1q_f32, vuzp1q_f64,
vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32,
vuzp1q_s64, vuzp1q_u8, vuzp1q_u16, vuzp1q_u32, vuzp1q_u64,
vuzp1q_p64, vuzp2_f16, vuzp2_f32, vuzp2_p8, vuzp2_p16,
vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8, vuzp2_u16,
vuzp2_u32, vuzp2q_f16, vuzp2q_f32, vuzp2q_f64, vuzp2q_p8,
vuzp2q_p16, vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64,
vuzp2q_u8, vuzp2q_u16, vuzp2q_u32, vuzp2q_u64, vuzp2q_p64,
vzip1_f16, vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8,
vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32,
vzip1q_f16, vzip1q_f32, vzip1q_f64, vzip1q_p8, vzip1q_p16,
vzip1q_s8, vzip1q_s16, vzip1q_s32, vzip1q_s64, vzip1q_u8,
vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip1q_p64, vzip2_f16,
vzip2_f32, vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16,
vzip2_s32, vzip2_u8, vzip2_u16, vzip2_u32, vzip2q_f16,
vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16, vzip2q_s8,
vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16,
vzip2q_u32, vzip2q_u64, vzip2q_p64): Delete functions.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/neon/vext.c: New test.
* gcc.target/aarch64/neon/vrev.c: New test.
* gcc.target/aarch64/neon/vtrn.c: New test.
* gcc.target/aarch64/neon/vuzp.c: New test.
* gcc.target/aarch64/neon/vzip.c: New test.

5 weeks agoaarch64: Port NEON bit manipulation intrinsics to pragma-based framework
Karl Meakin [Fri, 20 Feb 2026 16:33:53 +0000 (16:33 +0000)] 
aarch64: Port NEON bit manipulation intrinsics to pragma-based framework

Port the following intrinsics to the pragma-based framework:
* vand
* vbcax
* vbic
* vbsl
* vcls
* vclz
* vcnt
* veor
* veor3
* vmvn
* vorn
* vorr
* vrax1
* vrbit
* vxar

gcc/ChangeLog:

* config/aarch64/aarch64.md (UNSPEC_BSL): Delete unspec.
* config/aarch64/aarch64-simd-pragma-builtins.def (vbsl_mf8,
vbslq_mf8): Delete functions.
* config/aarch64/aarch64-neon-builtins-base.cc (build_cast): New
function.
(class gimple_not_rhs, class gimple_bsl, class gimple_rbit,
class gimple_eor3, class gimple_bcax, class gimple_rax1, class
gimple_xar, class gimple_ifn): New classes.
(vand, vandq, vbic, vbicq, vbsl, vbslq, veor, veorq, vmvn,
vmvnq, vorn, vornq, vorr, vorrq, vrbit, vrbitq, vbcaxq, veor3q,
vrax1q, vxarq, vcls, vclsq, vclz, vclzq, vcnt, vcntq): New
function bases.
* config/aarch64/aarch64-neon-builtins-shapes.cc (shift): New function.
* config/aarch64/aarch64-builtins.cc
(aarch64_types_bsl_p_qualifiers,
aarch64_types_bsl_s_qualifiers,
aarch64_types_bsl_u_qualifiers): Delete unused qualifiers.
* config/aarch64/aarch64-simd.md
(@aarch64_rbit<mode><vczle><vczbe>): Add `@` modifier so that
it is callable from `aarch64-neon-builtins-base.cc`.
* config/aarch64/aarch64-acle-builtins.h (TYPES_b_neon,
TYPES_b_poly): New type lists.
* config/aarch64/aarch64-neon-builtins-base.def (vand, vandq,
vbic, vbicq, vbsl, vbslq, veor, veorq, vmvn, vmvnq, vorn,
vornq, vorr, vorrq, vrbit, vrbitq, vbcaxq, veor3q, vrax1q,
vxarq, vcls, vclsq, vclz, vclzq, vcnt, vcntq): New function
groups.
* config/aarch64/aarch64-simd-builtins.def (clrsb, clz, ctz,
popcount, rbit, simd_bsl): Delete builtin functions.
* config/aarch64/arm_neon.h (vbsl_f16, vbsl_f32, vbsl_f64,
vbsl_p8, vbsl_p16, vbsl_p64, vbsl_s8, vbsl_s16, vbsl_s32,
vbsl_s64, vbsl_u8, vbsl_u16, vbsl_u32, vbsl_u64, vbslq_f16,
vbslq_f32, vbslq_f64, vbslq_p8, vbslq_p16, vbslq_s8,
vbslq_s16, vbslq_p64, vbslq_s32, vbslq_s64, vbslq_u8,
vbslq_u16, vbslq_u32, vbslq_u64, vcls_s8, vcls_s16, vcls_s32,
vclsq_s8, vclsq_s16, vclsq_s32, vcls_u8, vcls_u16, vcls_u32,
vclsq_u8, vclsq_u16, vclsq_u32, vclz_s8, vclz_s16, vclz_s32,
vclz_u8, vclz_u16, vclz_u32, vclzq_s8, vclzq_s16, vclzq_s32,
vclzq_u8, vclzq_u16, vclzq_u32, vcnt_p8, vcnt_s8, vcnt_u8,
vcntq_p8, vcntq_s8, vcntq_u8, vrbit_p8, vrbit_s8, vrbit_u8,
vrbitq_p8, vrbitq_s8, vrbitq_u8, veor3q_u8, veor3q_u16,
veor3q_u32, veor3q_u64, veor3q_s8, veor3q_s16, veor3q_s32,
veor3q_s64, vrax1q_u64, vxarq_u64, vbcaxq_u8, vbcaxq_u16,
vbcaxq_u32, vbcaxq_u64, vbcaxq_s8, vbcaxq_s16, vbcaxq_s32,
vbcaxq_s64): Delete functions.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/neon/vand.c: New test.
* gcc.target/aarch64/neon/vbcax.c: New test.
* gcc.target/aarch64/neon/vbic.c: New test.
* gcc.target/aarch64/neon/vbsl.c: New test.
* gcc.target/aarch64/neon/vcls.c: New test.
* gcc.target/aarch64/neon/vclz.c: New test.
* gcc.target/aarch64/neon/vcnt.c: New test.
* gcc.target/aarch64/neon/veor.c: New test.
* gcc.target/aarch64/neon/veor3.c: New test.
* gcc.target/aarch64/neon/vmvn.c: New test.
* gcc.target/aarch64/neon/vorn.c: New test.
* gcc.target/aarch64/neon/vorr.c: New test.
* gcc.target/aarch64/neon/vrax1.c: New test.
* gcc.target/aarch64/neon/vrbit.c: New test.
* gcc.target/aarch64/neon/vxar.c: New test.
* gcc.target/aarch64/sme/inlining_10.c: Replace `call_vbsl` with
`call_vhadd` since `vbsl` is no longer implemented as an
`always_inline` function.
* gcc.target/aarch64/sme/inlining_11.c: Likewise.
* gcc.target/aarch64/target_attr_10.c: Fix expected error message.

5 weeks agoaarch64: Port NEON lane get/set intrinsics to pragma-based framework
Karl Meakin [Thu, 25 Jun 2026 15:21:15 +0000 (15:21 +0000)] 
aarch64: Port NEON lane get/set intrinsics to pragma-based framework

Port the following intrinsics to the pragma-based framework:

* vget_lane
* vget_high
* vget_low
* vset_lane
* vdup_lane
* vcopy_lane

gcc/ChangeLog:

* config/aarch64/aarch64-simd-pragma-builtins.def (
vcopy_lane_mf8, vcopyq_lane_mf8, vcopy_laneq_mf8,
vcopyq_laneq_mf8, vdup_lane_mf8, vdupq_lane_mf8,
vdup_laneq_mf8, vdupq_laneq_mf8, vset_lane_mf8,
vsetq_lane_mf8): Delete entries.
* config/aarch64/aarch64-builtins.cc
(AARCH64_SIMD_VGET_LOW_BUILTINS,
AARCH64_SIMD_VGET_HIGH_BUILTINS, VGET_LOW_BUILTIN,
VGET_HIGH_BUILTIN): Delete macros.
(enum aarch64_builtins): Delete
`AARCH64_SIMD_BUILTIN_LANE_CHECK`.
(aarch64_init_simd_builtin_functions): Delete code that
registers `__builtin_aarch64_im_lane_boundsi`.
(aarch64_pragma_builtins_checker::check): Delete cases for
`UNSPEC_DUP_LANE`, `UNSPEC_GET_LANE` and `UNSPEC_VEC_COPY`.
(aarch64_simd_expand_builtin): Delete case for
`AARCH64_SIMD_BUILTIN_LANE_CHECK`.
(aarch64_expand_pragma_builtin): Delete cases for
`UNSPEC_DUP_LANE` and `UNSPEC_VEC_COPY`.
(aarch64_general_fold_builtin): Delete cases for
`AARCH64_SIMD_VGET_LOW_BUILTINS`,
`AARCH64_SIMD_VGET_HIGH_BUILTINS` and
`AARCH64_SIMD_BUILTIN_LANE_CHECK`.
(aarch64_gimple_fold_pragma_builtin): Delete cases for
`UNSPEC_DUP_LANE` and `UNSPEC_VEC_COPY`.
(aarch64_general_gimple_fold_builtin): Delete cases for
`AARCH64_SIMD_BUILTIN_LANE_CHECK`.
* config/aarch64/aarch64.md (UNSPEC_DUP_LANE): Delete unspec.
* config/aarch64/aarch64-neon-builtins-shapes.cc (range, lane):
New functions.
(struct neon_shape): Add new fields for additional checks, and
call them in `check()`.
* config/aarch64/aarch64-acle-builtins.cc
(gimple_folder::force_val, gimple_folder::assign): New
functions.
* config/aarch64/aarch64-acle-builtins.h (TYPES_all_neon,
TYPES_bhsd_neon, TYPES_neon_copy_lane): New type lists.
* config/aarch64/iterators.md (VALL_F16_NO_V2Q): Add `V4BF` and `V8BF`.
* config/aarch64/aarch64-neon-builtins-base.def (vget_lane,
vgetq_lane, vget_high, vget_low, vset_lane, vsetq_lane,
vdup_lane, vdupq_lane, vdup_laneq, vdupq_laneq, vcopy_lane,
vcopy_laneq, vcopyq_lane, vcopyq_laneq): New function groups.
* config/aarch64/aarch64-neon-builtins-base.cc (build_lane_get,
build_lane_set, build_vec_dup): New functions.
(struct gimple_get_lane, struct gimple_get_half, struct
gimple_set_lane, struct gimple_copy_lane, struct gimple_dup,
struct gimple_dup_lane): New structs.
(vget_lane, vgetq_lane, vset_lane, vsetq_lane, vcopy_lane,
vcopyq_lane, vcopy_laneq, vcopyq_laneq, vdup_lane, vdupq_lane,
vdupq_lane, vdupq_laneq): New function bases.
* config/aarch64/arm_neon.h (__aarch64_vdup_lane_p8,
__aarch64_vdup_lane_p16, __aarch64_vdup_lane_p64,
__aarch64_vdup_lane_s8, __aarch64_vdup_lane_s16,
__aarch64_vdup_lane_s32, __aarch64_vdup_lane_s64,
__aarch64_vdup_lane_u8, __aarch64_vdup_lane_u16,
__aarch64_vdup_lane_u32, __aarch64_vdup_lane_u64,
__aarch64_vdup_laneq_p8, __aarch64_vdup_laneq_p16,
__aarch64_vdup_laneq_p64, __aarch64_vdup_laneq_s8,
__aarch64_vdup_laneq_s16, __aarch64_vdup_laneq_s32,
__aarch64_vdup_laneq_s64, __aarch64_vdup_laneq_u8,
__aarch64_vdup_laneq_u16, __aarch64_vdup_laneq_u32,
__aarch64_vdup_laneq_u64, __aarch64_vdupq_lane_p8,
__aarch64_vdupq_lane_p16, __aarch64_vdupq_lane_p64,
__aarch64_vdupq_lane_s8, __aarch64_vdupq_lane_s16,
__aarch64_vdupq_lane_s32, __aarch64_vdupq_lane_s64,
__aarch64_vdupq_lane_u8, __aarch64_vdupq_lane_u16,
__aarch64_vdupq_lane_u32, __aarch64_vdupq_lane_u64,
__aarch64_vdupq_laneq_p8, __aarch64_vdupq_laneq_p16,
__aarch64_vdupq_laneq_p64, __aarch64_vdupq_laneq_s8,
__aarch64_vdupq_laneq_s16, __aarch64_vdupq_laneq_s32,
__aarch64_vdupq_laneq_s64, __aarch64_vdupq_laneq_u8,
__aarch64_vdupq_laneq_u16, __aarch64_vdupq_laneq_u32,
__aarch64_vdupq_laneq_u64, __AARCH64_LANE_CHECK,
__aarch64_vget_lane_any, __aarch64_vset_lane_any): Delete
macros.
(vget_lane_f16, vget_lane_f32, vget_lane_f64, vget_lane_p8,
vget_lane_p16, vget_lane_p64, vget_lane_s8, vget_lane_s16,
vget_lane_s32, vget_lane_s64, vget_lane_u8, vget_lane_u16,
vget_lane_u32, vget_lane_u64, vgetq_lane_f16, vgetq_lane_f32,
vgetq_lane_f64, vgetq_lane_p8, vgetq_lane_p16, vgetq_lane_p64,
vgetq_lane_s8, vgetq_lane_s16, vgetq_lane_s32, vgetq_lane_s64,
vgetq_lane_u8, vgetq_lane_u16, vgetq_lane_u32, vgetq_lane_u64,
vset_lane_f16, vset_lane_f32, vset_lane_f64, vset_lane_p8,
vset_lane_p16, vset_lane_p64, vset_lane_s8, vset_lane_s16,
vset_lane_s32, vset_lane_s64, vset_lane_u8, vset_lane_u16,
vset_lane_u32, vset_lane_u64, vsetq_lane_f16, vsetq_lane_f32,
vsetq_lane_f64, vsetq_lane_p8, vsetq_lane_p16, vsetq_lane_p64,
vsetq_lane_s8, vsetq_lane_s16, vsetq_lane_s32, vsetq_lane_s64,
vsetq_lane_u8, vsetq_lane_u16, vsetq_lane_u32, vsetq_lane_u64,
vcopy_lane_f32, vcopy_lane_f64, vcopy_lane_p8, vcopy_lane_p16,
vcopy_lane_p64, vcopy_lane_s8, vcopy_lane_s16, vcopy_lane_s32,
vcopy_lane_s64, vcopy_lane_u8, vcopy_lane_u16, vcopy_lane_u32,
vcopy_lane_u64, vcopy_laneq_f32, vcopy_laneq_f64,
vcopy_laneq_p8, vcopy_laneq_p16, vcopy_laneq_p64,
vcopy_laneq_s8, vcopy_laneq_s16, vcopy_laneq_s32,
vcopy_laneq_s64, vcopy_laneq_u8, vcopy_laneq_u16,
vcopy_laneq_u32, vcopy_laneq_u64, vcopyq_lane_f32,
vcopyq_lane_f64, vcopyq_lane_p8, vcopyq_lane_p16,
vcopyq_lane_p64, vcopyq_lane_s8, vcopyq_lane_s16,
vcopyq_lane_s32, vcopyq_lane_s64, vcopyq_lane_u8,
vcopyq_lane_u16, vcopyq_lane_u32, vcopyq_lane_u64,
vcopyq_laneq_f32, vcopyq_laneq_f64, vcopyq_laneq_p8,
vcopyq_laneq_p16, vcopyq_laneq_p64, vcopyq_laneq_s8,
vcopyq_laneq_s16, vcopyq_laneq_s32, vcopyq_laneq_s64,
vcopyq_laneq_u8, vcopyq_laneq_u16, vcopyq_laneq_u32,
vcopyq_laneq_u64, vdup_lane_f16, vdup_lane_f32, vdup_lane_f64,
vdup_lane_p8, vdup_lane_p16, vdup_lane_p64, vdup_lane_s8,
vdup_lane_s16, vdup_lane_s32, vdup_lane_s64, vdup_lane_u8,
vdup_lane_u16, vdup_lane_u32, vdup_lane_u64, vdup_laneq_f16,
vdup_laneq_f32, vdup_laneq_f64, vdup_laneq_p8, vdup_laneq_p16,
vdup_laneq_p64, vdup_laneq_s8, vdup_laneq_s16, vdup_laneq_s32,
vdup_laneq_s64, vdup_laneq_u8, vdup_laneq_u16, vdup_laneq_u32,
vdup_laneq_u64, vdupq_lane_f16, vdupq_lane_f32,
vdupq_lane_f64, vdupq_lane_p8, vdupq_lane_p16, vdupq_lane_p64,
vdupq_lane_s8, vdupq_lane_s16, vdupq_lane_s32, vdupq_lane_s64,
vdupq_lane_u8, vdupq_lane_u16, vdupq_lane_u32, vdupq_lane_u64,
vdupq_laneq_f16, vdupq_laneq_f32, vdupq_laneq_f64,
vdupq_laneq_p8, vdupq_laneq_p16, vdupq_laneq_p64,
vdupq_laneq_s8, vdupq_laneq_s16, vdupq_laneq_s32,
vdupq_laneq_s64, vdupq_laneq_u8, vdupq_laneq_u16,
vdupq_laneq_u32, vdupq_laneq_u64, vmulq_lane_f64,
vset_lane_bf16, vsetq_lane_bf16, vget_lane_bf16,
vgetq_lane_bf16, vdup_lane_bf16, vdup_laneq_bf16,
vdupq_lane_bf16, vdupq_laneq_bf16, vcopy_lane_bf16,
vcopyq_lane_bf16, vcopy_laneq_bf16, vcopyq_laneq_bf16): Delete
functions.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/simd/mf8_data_2.c: Fix test.
* gcc.target/aarch64/simd/fold_to_highpart_6.c: Fix test.
* g++.target/aarch64/lane-bound-1.C: Fix test.
* gcc.target/aarch64/advsimd-intrinsics/bf16_vect_copy_lane_1.c:
Fix test.
* gcc.target/aarch64/lane-bound-3.c: Fix test.
* gcc.target/aarch64/pr113573.c: Fix test.
* gcc.target/aarch64/simd/vset_lane_s16_const_1.c: Fix test.
* gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c,
gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_2.c,
gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_1.c,
gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_2.c,
gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_1.c,
gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_2.c,
gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_1.c,
gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_2.c: Replace with...
gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_indices.c: ...this.
* gcc.target/aarch64/simd/vget_lane_f32_indices_1.c,
gcc.target/aarch64/simd/vget_lane_f64_indices_1.c,
gcc.target/aarch64/simd/vget_lane_p16_indices_1.c,
gcc.target/aarch64/simd/vget_lane_p8_indices_1.c,
gcc.target/aarch64/simd/vget_lane_s16_indices_1.c,
gcc.target/aarch64/simd/vget_lane_s32_indices_1.c,
gcc.target/aarch64/simd/vget_lane_s64_indices_1.c,
gcc.target/aarch64/simd/vget_lane_s8_indices_1.c,
gcc.target/aarch64/simd/vget_lane_u16_indices_1.c,
gcc.target/aarch64/simd/vget_lane_u32_indices_1.c,
gcc.target/aarch64/simd/vget_lane_u64_indices_1.c,
gcc.target/aarch64/simd/vget_lane_u8_indices_1.c,
gcc.target/aarch64/simd/vgetq_lane_f32_indices_1.c,
gcc.target/aarch64/simd/vgetq_lane_f64_indices_1.c,
gcc.target/aarch64/simd/vgetq_lane_p16_indices_1.c,
gcc.target/aarch64/simd/vgetq_lane_p8_indices_1.c,
gcc.target/aarch64/simd/vgetq_lane_s16_indices_1.c,
gcc.target/aarch64/simd/vgetq_lane_s32_indices_1.c,
gcc.target/aarch64/simd/vgetq_lane_s64_indices_1.c,
gcc.target/aarch64/simd/vgetq_lane_s8_indices_1.c,
gcc.target/aarch64/simd/vgetq_lane_u16_indices_1.c,
gcc.target/aarch64/simd/vgetq_lane_u32_indices_1.c,
gcc.target/aarch64/simd/vgetq_lane_u64_indices_1.c,
gcc.target/aarch64/simd/vgetq_lane_u8_indices_1.c: Replace with...
* gcc.target/aarch64/simd/vget_lane_indices.c: ...this.
* gcc.target/aarch64/neon/arm_neon_test.h(VEC_LEN): New macro.
* gcc.target/aarch64/neon/vcopy_lane.c: New test.
* gcc.target/aarch64/neon/vdup_lane.c: New test.
* gcc.target/aarch64/neon/vget_lane.c: New test.
* gcc.target/aarch64/neon/vset_lane.c: New test.

5 weeks agoaarch64: Port NEON vector creation intrinsics to pragma-based framework
Karl Meakin [Thu, 25 Jun 2026 13:45:09 +0000 (13:45 +0000)] 
aarch64: Port NEON vector creation intrinsics to pragma-based framework

Port the following intrinsics to the pragma-based framework:

* vcreate
* vcombine
* vdup_n
* vmov_n

gcc/ChangeLog:

* config/aarch64/aarch64-simd-builtins.def (combine): Delete
function declarations.
* config/aarch64/aarch64-simd-pragma-builtins.def (vcombine_mf8,
vcreate_mf8, vdup_n_mf8, vdupq_n_mf8, vmov_n_mf8,
vmovq_n_mf8,): Delete entries.
(aarch64_expand_pragma_builtin): Delete cases for
`UNSPEC_COMBINE` and `UNSPEC_VCREATE`.
(aarch64_fold_combine): Delete function.
(aarch64_gimple_fold_pragma_builtin): Delete cases for
`UNSPEC_COMBINE` and `UNSPEC_VCREATE`.
(aarch64_general_gimple_fold_builtin): Delete cases for
`vcombine`.
* config/aarch64/aarch64.md (UNSPEC_COMBINE): Delete unspec.
* config/aarch64/aarch64-builtins.cc
(aarch64_expand_pragma_builtin): Delete cases for
`UNSPEC_COMBINE` and `UNSPEC_VCREATE`.
(aarch64_fold_combine): Delete function.
(aarch64_gimple_fold_pragma_builtin): Delete cases for
`UNSPEC_COMBINE` and `UNSPEC_VCREATE`.
(aarch64_general_gimple_fold_builtin): Delete cases for
`combine`.
* config/aarch64/aarch64-acle-builtins.cc
(gimple_folder::force_val, gimple_folder::assign): New
functions.
* config/aarch64/aarch64-acle-builtins.h (TYPES_all_neon,
TYPES_bhsd_neon): New type lists.
* config/aarch64/aarch64-neon-builtins-base.def (vcreate,
vcombine, vdup_n, vdupq_n, vmov_n, vmovq_n): New function groups.
* config/aarch64/aarch64-neon-builtins-base.cc (build_vec_dup): New function.
(struct gimple_create, struct gimple_combine, struct struct
gimple_dup): New structs.
(vcreate, vcombine, vdup_n, vdupq_n, vmov_n, vmovq_n): New
function bases.
* config/aarch64/arm_neon.h (vcreate_s8, vcreate_s16,
vcreate_s32, vcreate_s64, vcreate_f16, vcreate_f32,
vcreate_u8, vcreate_u16, vcreate_u32, vcreate_u64,
vcreate_f64, vcreate_p8, vcreate_p16, vcreate_p64,
vcombine_s8, vcombine_s16, vcombine_s32, vcombine_s64,
vcombine_f16, vcombine_f32, vcombine_u8, vcombine_u16,
vcombine_u32, vcombine_u64, vcombine_f64, vcombine_p8,
vcombine_p16, vcombine_p64, vdup_n_f16, vdup_n_f32,
vdup_n_f64, vdup_n_p8, vdup_n_p16, vdup_n_p64, vdup_n_s8,
vdup_n_s16, vdup_n_s32, vdup_n_s64, vdup_n_u8, vdup_n_u16,
vdup_n_u32, vdup_n_u64, vdupq_n_f16, vdupq_n_f32, vdupq_n_f64,
vdupq_n_p8, vdupq_n_p16, vdupq_n_p64, vdupq_n_s8, vdupq_n_s16,
vdupq_n_s32, vdupq_n_s64, vdupq_n_u8, vdupq_n_u16,
vdupq_n_u32, vdupq_n_u64, vmov_n_f16, vmov_n_f32, vmov_n_f64,
vmov_n_p8, vmov_n_p16, vmov_n_p64, vmov_n_s8, vmov_n_s16,
vmov_n_s32, vmov_n_s64, vmov_n_u8, vmov_n_u16, vmov_n_u32,
vmov_n_u64, vmovq_n_f16, vmovq_n_f32, vmovq_n_f64, vmovq_n_p8,
vmovq_n_p16, vmovq_n_p64, vmovq_n_s8, vmovq_n_s16,
vmovq_n_s32, vmovq_n_s64, vmovq_n_u8, vmovq_n_u16,
vmovq_n_u32, vmovq_n_u64, vcreate_bf16, vcombine_bf16,
vdup_n_bf16, vdupq_n_bf16): Delete functions.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c: Fix test.
* gcc.target/aarch64/vmov_n_1.c: Fix test.
* gcc.target/aarch64/neon/vcombine.c: New test.
* gcc.target/aarch64/neon/vcreate.c: New test.
* gcc.target/aarch64/neon/vdup.c: New test.
* gcc.target/aarch64/neon/vmov_n.c: New test.

5 weeks agoaarch64: Port NEON add intrinsics to pragma-based framework
Karl Meakin [Fri, 20 Feb 2026 15:38:46 +0000 (15:38 +0000)] 
aarch64: Port NEON add intrinsics to pragma-based framework

Add all the necessary infrastructure for defining NEON intrinsics using
the pragma-based framework, and port the `vadd` family of functions to
demonstrate that it works.

gcc/ChangeLog:

* config/aarch64/aarch64-neon-builtins-base.cc: New file.
* config/aarch64/aarch64-neon-builtins-base.def: New file.
* config/aarch64/aarch64-neon-builtins-base.h: New file.
* config/aarch64/aarch64-neon-builtins-functions.h: New file.
* config/aarch64/aarch64-neon-builtins-shapes.cc: New file.
* config/aarch64/aarch64-neon-builtins-shapes.h: New file.
* config/aarch64/aarch64-neon-builtins.def: New file.
* config.gcc (extra_headers, extra_objs): Add new files and
reformat for readability.
* config/aarch64/t-aarch64: Add recipes for new files.
* config/aarch64/aarch64-protos.h (handle_arm_neon_h): Rename to
`init_arm_neon_builtins`.
* config/aarch64/aarch64-builtins.cc (handle_arm_neon_h): Likewise.
* config/aarch64/aarch64-c.cc (aarch64_pragma_aarch64): Call
`aarch64_acle::handle_arm_neon_h`.
* config/aarch64/aarch64-acle-builtins.cc (TYPES_*): Move to
aarch64-acle-builtins.h
(NONSTREAMING_SVE, SVE_AND_SME, SSVE): Likewise.
(neon_function_groups): New variable.
(arm_neon_h_handled): Likewise.
(handle_arm_neon_h): New function.
* config/aarch64/aarch64-sve-builtins-shapes.cc:
(gimple_folder::fold): Allow folding if `TARGET_SVE` is
false but `TARGET_SIMD` is true.
* config/aarch64/aarch64-sve-builtins.def (p8, p16, p64, 128):
New type suffixes.
* config/aarch64/aarch64-acle-builtins.h (enum
handle_pragma_index): New enum member `arm_neon_handle`.
(enum type_class_index): New enum member `TYPE_poly`.
(TYPES_*): Moved from `aarch64-acle-builtins.cc`.
(NONSTREAMING_SVE, SVE_AND_SME, SSVE): Likewise.
* config/aarch64/arm_neon.h (vadd_s8, vadd_s16, vadd_s32,
vadd_f32, vadd_f64, vadd_u8, vadd_u16, vadd_u32, vadd_s64,
vadd_u64, vaddq_s8, vaddq_s16, vaddq_s32, vaddq_s64,
vaddq_f32, vaddq_f64, vaddq_u8, vaddq_u16, vaddq_u32,
vaddq_u64, vadd_f16, vaddq_f16, vadd_p8, vadd_p16, vadd_p64,
vaddq_p8, vaddq_p16, vaddq_p64, vaddq_p128, vaddd_u64,
vaddd_s64): Delete function definitions.

gcc/testsuite/ChangeLog:

* g++.target/aarch64/pr103147-6.C: Fix tests.
* g++.target/aarch64/pr117048.C: Fix tests.
* gcc.target/aarch64/pr103147-6.c: Fix tests.
* gcc.target/aarch64/neon/aarch64-neon.exp: New test.
* gcc.target/aarch64/neon/arm_neon_test.h: New test.
* gcc.target/aarch64/neon/vadd.c: New test.

5 weeks agoaarch64: Rename `aarch64-sve-builtins` to `aarch64-acle-builtins`
Karl Meakin [Mon, 23 Mar 2026 17:32:12 +0000 (17:32 +0000)] 
aarch64: Rename `aarch64-sve-builtins` to `aarch64-acle-builtins`

The files `aarch64-sve-builtins.h` and `aarch64-sve-builtins.cc` contain
definitions that we will want to use for the NEON builtins as well. To
avoid confusion, rename them to `acle` to avoid implying that it is only
for the SVE builtins. Do the same for the `aarch64_sve` namespace as
well.

gcc/ChangeLog:

* config.gcc (target_gtfiles): Rename
`aarch64-sve-builtins.{h,cc}` to
`aarch64-acle-builtins.{h,cc}`.
* config/aarch64/t-aarch64: Likewise.
* config/aarch64/aarch64-sve-builtins.h: Move to...
* config/aarch64/aarch64-acle-builtins.h: ...here.
* config/aarch64/aarch64-sve-builtins.cc: Move to...
* config/aarch64/aarch64-acle-builtins.cc: ...here.
* config/aarch64/aarch64-c.cc (aarch64_pragma_aarch64): Rename
namespace `aarch64_sve` to `aarch64_acle`.
(aarch64_resolve_overloaded_builtin): Likewise.
(aarch64_check_builtin_call): Likewise.
* config/aarch64/aarch64-protos.h: Likewise.
* config/aarch64/aarch64-sve-builtins-base.cc: Likewise.
* config/aarch64/aarch64-sve-builtins-base.h: Likewise.
* config/aarch64/aarch64-sve-builtins-functions.h: Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc: Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.h: Likewise.
* config/aarch64/aarch64-sve-builtins-sme.cc: Likewise.
* config/aarch64/aarch64-sve-builtins-sme.h: Likewise.
* config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
* config/aarch64/aarch64-sve-builtins-sve2.h: Likewise.
* config/aarch64/aarch64.cc: Likewise.

5 weeks agoaarch64: Reformat `config.gcc`
Karl Meakin [Mon, 18 May 2026 15:24:28 +0000 (15:24 +0000)] 
aarch64: Reformat `config.gcc`

Split the `extra_headers`, `extra_objs` and `target_gtfiles` lists over several lines for
readability.

gcc/ChangeLog:

* config.gcc: Reformat lists over several lines.

5 weeks ago[RISC-V] Improve logicals when ~C is cheaper to synthesize than C when Zbb is enabled
Jeff Law [Tue, 30 Jun 2026 13:38:23 +0000 (07:38 -0600)] 
[RISC-V] Improve logicals when ~C is cheaper to synthesize than C when Zbb is enabled

This patch covers another set of cases where we can improve synthesis of
logical operations spotted by comparing LLVM and GCC generated code.

With Zbb, we have andn, orn and xnor.  Right now we rely on combine to identify
cases where the inverted constant is cheaper to produce than the original
constant and then invert things via define_insn_and_split patterns.

This interacts particularly poorly with mvconst_internal and we're generally
moving towards trying to generate better code earlier in the RTL pipeline
rather relying so much on combine to clean things up later.

So in the logical synthesis code, if we've determined constant synthesis is
necessary and Zbb is enabled, then we query to the cost on the original
constant C and the adjusted constant ~C.  If ~C is cheaper to synthesize, then
use that in combination with andn, orn or xnor.

Bootstrapped and regression tested on the K3, the c920 is in flight.  Also
tested on riscv64-elf and riscv32-elf without regressions.  As usual waiting
for pre-commit CI to do its thing.

gcc/
* config/riscv/riscv.cc (synthesize_ior_xor): If we must synthesize a
constant and Zbb is enabled, try both C and ~C to see which is cheaper.
(synthesize_and): Likewise.

gcc/testsuite
* gcc.target/riscv/and-synthesis-2.c: New test.

5 weeks agoRISC-V: Fix empty arch_str for native multilib path ".::riscv64-linux-gnu" [PR125853]
Jim Lin [Tue, 30 Jun 2026 13:30:43 +0000 (07:30 -0600)] 
RISC-V: Fix empty arch_str for native multilib path ".::riscv64-linux-gnu" [PR125853]

riscv_multi_lib_info_t::parse received the raw multilib path string
(e.g. ".::riscv64-linux-gnu" on a native build) and compared it against
".".  Because the raw string still carries the multi_os_dir suffix, the
comparison failed, the default arch/abi branch was skipped, and arch_str
and abi_str were left empty.  The empty arch_str then flowed into
riscv_subset_list::parse.

multi_lib_info->path is already truncated at the first ':' to just the
path component, so use it instead of passing the raw string.

PR target/125853
gcc/
* common/config/riscv/riscv-common.cc (riscv_multi_lib_info_t::parse):
Remove the path parameter and compare multi_lib_info->path against
"." instead.
(riscv_compute_multilib): Update caller.

5 weeks agoRISC-V: Run smart multilib match even when generic matcher picked a dir
Jim Tsung-Chun Lin [Wed, 3 Jun 2026 01:03:10 +0000 (09:03 +0800)] 
RISC-V: Run smart multilib match even when generic matcher picked a dir

The generic textual matcher in gcc.cc:set_multilib_dir does not
understand RISC-V arch supersetting and treats MULTILIB_DEFAULTS
entries as if they were on the command line via default_arg().  When
the user passes a -march= that is a superset of one of MULTILIB_OPTIONS'
arches but does not textually match, default_arg can rescue the wrong
entry and pick a multilib that is not the closest match.

riscv_compute_multilib used to early-return whenever multilib_dir was
already set, accepting that incorrect generic pick.  Drop the early
return and run the match-score-based selection unconditionally.

There is no need to fall back to the generic-matched multilib_dir
after the smart matcher runs: the default "." multilib is parsed into
multilib_infos with the compiler's default arch/abi, so the smart
matcher handles every case the generic matcher can reach.  If it
still returns NULL the request is genuinely incompatible with all
configured multilibs and riscv_multi_lib_check fires the proper
"Cannot find suitable multilib" diagnostic instead of silently
linking against incompatible default-arch libraries.

Reproduce with:

./configure --enable-multilib --with-abi=lp64d --with-arch=rv64gc \
  --with-multilib-generator="rv64gc-lp64f--;rv64g_zcmp_zcmt-lp64f--"

With the pre-fix driver, "-march=rv64g_zba_zcmp_zcmt -mabi=lp64f"
selects the rv64gc multilib (textual default rescue); after the fix
the smart matcher correctly picks the rv64g_zcmp_zcmt multilib.

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc (riscv_select_multilib):
Don't set riscv_no_matched_multi_lib here; let the caller own
the flag.
(riscv_compute_multilib): Drop the early return that accepted
the generic-matched multilib_dir; always run the smart matcher
and set riscv_no_matched_multi_lib when it finds no candidate.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/multilib.exp: New test.

(cherry picked from commit 6dbcda7f978ce7fba81e81971911d00b2d1ccab0)

5 weeks ago[PATCH] RISC-V: Add basic Spacemit-A100 core support
Mark Zhuang [Tue, 30 Jun 2026 13:21:20 +0000 (07:21 -0600)] 
[PATCH] RISC-V: Add basic Spacemit-A100 core support

Add the Spacemit-A100 processor to -mcpu/-mtune.
The A100 is an in-order, dual-issue core whose microarchitecture
is close to the X60, so for now it reuses the Spacemit X60 costs.
On the ISA side, the A100 is closest to the X100. The main differences
are that it does not implement the H (hypervisor) extension, its
vector length is VLEN=1024 (zvl1024b), and it has the xsmtvdotii extension.

gcc/ChangeLog:

* config/riscv/riscv-ext-spacemit.def (xsmtvdotii): New extension.
* config/riscv/riscv-ext.opt: Regenerate.
* config/riscv/riscv-cores.def (RISCV_TUNE): Add spacemit-a100.
(RISCV_CORE): Add spacemit-a100.
* doc/riscv-ext.texi: Regenerate.
* doc/riscv-mcpu.texi: Regenerate.
* doc/riscv-mtune.texi: Regenerate.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/mcpu-spacemit-a100.c: New test.

Signed-off-by: Mark Zhuang <mark.zhuang@spacemit.com>
5 weeks agoOpenMP: support for uses_allocators clause: Fix build and test case regressions
Thomas Schwinge [Tue, 30 Jun 2026 12:42:21 +0000 (14:42 +0200)] 
OpenMP: support for uses_allocators clause: Fix build and test case regressions

Fix-up for commit 7a8f98b48104ccf10c6dceccc51b70de69288eaa
"OpenMP: support for uses_allocators clause".

As was already pointed out, 'libgomp/config.h.in' was not regenerated.

In a configuration with:

    checking whether the target supports __sync_*_compare_and_swap... (cached) no

..., I see:

    configure: error: offload hosts require __sync_val_compare_and_swap to build libgomp.
    make[1]: *** [Makefile:17208: configure-target-libgomp] Error 1

Fixed the inverted condition.

Next, I see:

    ../../../source-gcc/libgomp/config/linux/../../allocator.c: In function â€˜omp_init_allocator’:
    ../../../source-gcc/libgomp/config/linux/../../allocator.c:619:28: error: passing argument 1 of â€˜gomp_mutex_init’ makes pointer from integer without a cast [-Wint-conversion]
      619 |       gomp_mutex_init (data->lock);
          |                        ~~~~^~~~~~
          |                            |
          |                            gomp_mutex_t {aka int}
    ../../../source-gcc/libgomp/config/linux/../../allocator.c:619:28: note: possible fix: take the address with â€˜&’
      619 |       gomp_mutex_init (data->lock);
          |                        ~~~~^~~~~~
          |                        &
    In file included from ../../../source-gcc/libgomp/libgomp.h:209,
                     from ../../../source-gcc/libgomp/config/linux/allocator.c:31:
    ../../../source-gcc/libgomp/config/linux/mutex.h:41:32: note: expected â€˜gomp_mutex_t *’ {aka â€˜int *’} but argument is of type â€˜gomp_mutex_t’ {aka â€˜int’}
       41 | gomp_mutex_init (gomp_mutex_t *mutex)
          |                  ~~~~~~~~~~~~~~^~~~~
    ../../../source-gcc/libgomp/config/linux/../../allocator.c: In function â€˜gomp_map_omp_init_allocator’:
    ../../../source-gcc/libgomp/config/linux/../../allocator.c:1587:68: error: passing argument 1 of â€˜gomp_mutex_init’ makes pointer from integer without a cast [-Wint-conversion]
     1587 |             (((struct omp_allocator_data *) allocator_data_devaddr)->lock);
          |              ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~
          |                                                                    |
          |                                                                    gomp_mutex_t {aka int}
    ../../../source-gcc/libgomp/config/linux/../../allocator.c:1587:68: note: possible fix: take the address with â€˜&’
     1587 |             (((struct omp_allocator_data *) allocator_data_devaddr)->lock);
          |              ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~
          |              &
    ../../../source-gcc/libgomp/config/linux/mutex.h:41:32: note: expected â€˜gomp_mutex_t *’ {aka â€˜int *’} but argument is of type â€˜gomp_mutex_t’ {aka â€˜int’}
       41 | gomp_mutex_init (gomp_mutex_t *mutex)
          |                  ~~~~~~~~~~~~~~^~~~~
    make[4]: *** [Makefile:819: allocator.lo] Error 1

Fixed.

Testing (with as well as without 'HAVE_SYNC_BUILTINS'):

I see:

    PASS: g++.dg/gomp/deprecate-2.C  -std=c++20  at line 31 (test for warnings, line 22)
    PASS: g++.dg/gomp/deprecate-2.C  -std=c++20  at line 43 (test for warnings, line 34)
    PASS: g++.dg/gomp/deprecate-2.C  -std=c++20  expected multiline pattern lines 24-27
    PASS: g++.dg/gomp/deprecate-2.C  -std=c++20  expected multiline pattern lines 36-39
    [-XFAIL:-]{+XPASS:+} g++.dg/gomp/deprecate-2.C  -std=c++20 (test for excess errors)
    [Etc.]

..., due to:

    { dg-excess-errors "sorry, unimplemented: 'uses_allocators' clause" }

Removed.

I see:

    {+PASS: libgomp.c++/../libgomp.c-c++-common/uses_allocators-2.c  (test for errors, line 9)+}
    {+FAIL: libgomp.c++/../libgomp.c-c++-common/uses_allocators-2.c (test for excess errors)+}

..., due to:

    [...]/libgomp.c++/../libgomp.c-c++-common/uses_allocators-2.c:7:34: error: invalid conversion from 'int' to 'omp_alloctrait_key_t' [-fpermissive]
    [...]/libgomp.c++/../libgomp.c-c++-common/uses_allocators-2.c:16:40: error: invalid conversion from 'int' to 'omp_alloctrait_key_t' [-fpermissive]

Replaced '1' by 'omp_atk_sync_hint'.

I see:

    {+FAIL: libgomp.c++/../libgomp.c-c++-common/uses_allocators-9.c (test for excess errors)+}
    {+UNRESOLVED: libgomp.c++/../libgomp.c-c++-common/uses_allocators-9.c compilation failed to produce executable+}

..., due to:

    [...]/libgomp.c++/../libgomp.c-c++-common/uses_allocators-9.c:11:24: error: invalid conversion from 'void*' to 'int*' [-fpermissive]
    [...]/libgomp.c++/../libgomp.c-c++-common/uses_allocators-9.c:21:24: error: invalid conversion from 'void*' to 'int*' [-fpermissive]
    [...]/libgomp.c++/../libgomp.c-c++-common/uses_allocators-9.c:33:32: error: invalid conversion from 'void*' to 'int*' [-fpermissive]

Added type casts.

I see:

    [-PASS:-]{+FAIL:+} libgomp.fortran/dep-uses-allocators.f90   -O   at line 12 (test for warnings, line 11)
    PASS: libgomp.fortran/dep-uses-allocators.f90   -O   at line 2 (test for warnings, line 11)
    PASS: libgomp.fortran/dep-uses-allocators.f90   -O  (test for excess errors)

..., due to:

    { dg-message "sorry, unimplemented: 'uses_allocators' clause [...]

Removed.

I see:

    PASS: libgomp.fortran/uses_allocators-7.f90   -O  (test for excess errors)
    {+PASS: libgomp.fortran/uses_allocators-7.f90   -O  execution test+}
    {+PASS: libgomp.fortran/uses_allocators-7.f90   -O   scan-tree-dump-times gimple "#pragma omp target .*uses_allocators\\(memspace\\(\\), traits\\(trait\\) : my_alloc\\)" 1+}
    {+PASS: libgomp.fortran/uses_allocators-7.f90   -O   scan-tree-dump-times gimple "#pragma omp target .*uses_allocators\\(memspace\\(\\), traits\\(\\) : my_alloc\\)" 1+}
    {+FAIL: libgomp.fortran/uses_allocators-7.f90   -O   scan-tree-dump-times original "#pragma omp target .*uses_allocators\\(memspace\\(1\\), traits\\(\\) : my4\\) uses_allocators\\(memspace\\(\\), traits\\(t2\\) : my3\\) uses_allocators\\(memspace\\(\\), traits\\(\\) : my2\\) uses_allocators\\(memspace\\(3\\), traits\\(t\\) : my\\)" 1+}

XFAILed (for now.)

gcc/testsuite/
* g++.dg/gomp/deprecate-2.C: Remove obsolete 'dg-excess-errors'.
libgomp/
* config.h.in: Regenerate.
* configure.ac [x$libgomp_cv_have_sync_builtins = xno]: Fix check.
* configure: Regenerate.
* allocator.c (omp_init_allocator, gomp_map_omp_init_allocator)
[!HAVE_SYNC_BUILTINS]: Fix build.
* testsuite/libgomp.c-c++-common/uses_allocators-2.c: Fix for C++ testing.
* testsuite/libgomp.c-c++-common/uses_allocators-9.c: Likewise.
* testsuite/libgomp.fortran/dep-uses-allocators.f90: Remove
obsolete "sorry, unimplemented: [...]" diagnostic check.
* testsuite/libgomp.fortran/uses_allocators-7.f90: XFAIL one
'scan-tree-dump-times' check.

5 weeks agolibstdc++: Add symlink support on Windows
Adam Wood [Mon, 16 Feb 2026 22:36:58 +0000 (14:36 -0800)] 
libstdc++: Add symlink support on Windows

Tested on x86_64-w64-mingw32 on Windows 11.

The the new symlink functions are only defined/enabled on versions of
Windows with symlink support.

Because path resolution may be different between Windows and POSIX when a
dotdot follows a symlink, I also made some edits to tests involving that
specific case.

Finally, I dealt with the issue that creating symlinks with the
unprivileged flag returns an error in earlier versions of Windows by
just trying again if ERROR_INVALID_PARAMETER occurs without the
unprivileged flag. This is how MSVC STL does it as well.

The patch does not support junctions or mount points.

libstdc++-v3/Changelog:

* src/c++17/fs_ops.cc: Include <winioctl.h> for
FSCTL_GET_REPARSE_POINT. Include <ntdef.h> for
REPARSE_DATA_BUFFER.
(windows_create_symlink): New helper function for
fs::create_symlink and fs::create_directory_symlink.
(fs::create_directory_symlink): Call windows_create_symlink on
Windows.
(fs::create_symlink): Call windows_create_symlink on Windows.
(auto_win_file_handle::auto_win_file_handle): Add follow_symlink
parameter to control whether the handle should open the symlink
or the target, with a default value of true.
(windows_read_symlink_handle): New helper function
for fs::read_symlink.
(fs::read_symlink): Call windows_read_symlink_handle on Windows.
(fs::remove): Call RemoveDirectoryW only for directories, and
DeleteFileW for regular files, but attempt both for symlinks.
(fs::remove_all): Return immediately if path is empty.
Check if path points to a symlink, and if so, remove the
symlink using fs::remove.
* src/filesystem/ops-common.h [_GLIBCXX_FILESYSTEM_IS_WINDOWS]
(S_IFLNK, S_ISLNK): Define.
(__detail::__open_for_stat): New helper function for stat and
lstat.
(__detail::FileType): New enum type.
(__detail::__check_handle_type): New helper function for stat
and lstat.
(__detail::__is_handle_symlink): New helper function for
fs::read_symlink.
(__detail::__stat_windows): New helper function for stat and
lstat.
(__gnu_posix::stat, __gnu_posix::lstat): Use __stat_windows to
properly follow or not follow symlinks, and check if file is a
symlink.
* testsuite/27_io/filesystem/operations/canonical.cc (test03):
Use fs::create_directory_symlink instead of fs::create_symlink.
Check if NO_SYMLINKS or _GLIBCXX_FILESYSTEM_IS_WINDOWS instead
of just checking NO_SYMLINKS when defining baz.
* testsuite/27_io/filesystem/operations/copy.cc (test02):
Create a symlink to temporary file instead of ".".  Use
fs::exists(symlink_status()) instead of fs::exists for symlinks.
* testsuite/27_io/filesystem/operations/weakly_canonical.cc
(test01): Use fs::create_directory_symlink instead of
fs::create_symlink.  Wrap statements that test a dotdot after a
symlink in an ifndef _GLIBCXX_FILESYSTEM_IS_WINDOWS.
* testsuite/util/testsuite_fs.h: Do not define NO_SYMLINKS on
Windows.

Co-authored-by: Jonathan Wakely <jwakely@redhat.com>
5 weeks agolibstdc++: Test that fs::remove and fs::remove_all do not follow symlinks
Adam Wood [Tue, 30 Jun 2026 03:42:59 +0000 (21:42 -0600)] 
libstdc++: Test that fs::remove and fs::remove_all do not follow symlinks

Test that fs::remove and fs::remove_all delete an initial directory
symlink instead of following it. Also test that fs::remove_all
delete symlinks inside a directory rather than following them.

libstdc++-v3/ChangeLog:

* testsuite/27_io/filesystem/operations/remove.cc: Check that
fs::remove deletes symlink instead of target.
* testsuite/27_io/filesystem/operations/remove_all.cc: Likewise.

5 weeks agoAdd auto var tracking to PTA
Richard Biener [Mon, 13 Apr 2026 09:18:45 +0000 (11:18 +0200)] 
Add auto var tracking to PTA

The following records whether a points-to solution contains any
local automatic variables, not including parameters or result storage.

* tree-ssa-alias.h (pt_solution::vars_contains_auto): New.
(ptr_deref_may_alias_auto_p): Declare.
(pt_solution_includes_auto): Likewise.
* tree-ssa-structalias.cc (set_uids_in_ptset): Record auto
variables.
(pt_solution_includes_auto): New function.
(ipa_escaped_pt): Adjust.
* tree-ssa-alias.cc (ptr_deref_may_alias_auto_p): New function.

5 weeks agoFix confusing variable names in build_vector_from_ctor
Christopher Bazley [Tue, 23 Jun 2026 10:36:10 +0000 (10:36 +0000)] 
Fix confusing variable names in build_vector_from_ctor

'nelts' is not the number of encoded elements in a VECTOR_CST; it
is the number of patterns. Sometimes those interpretations coincide,
as in the case of fixed length vector types (for which the number of
elements per pattern is one), but not always.

'step' is not the step between the second and third element of
a stepped pattern; it is the number of elements per pattern.
This has led to confusion on the mailing list.

Both variables are hereby renamed and the code that assigns their
values refactored to be more palatable.

gcc/ChangeLog:

* tree.cc (build_vector_from_ctor): Rename variables and
refactor assignments.

Co-authored-by: Richard Sandiford <rdsandiford@googlemail.com>
5 weeks agoExpand TMR fixup when we end up with a (void *)0 base
Richard Biener [Mon, 29 Jun 2026 11:08:07 +0000 (13:08 +0200)] 
Expand TMR fixup when we end up with a (void *)0 base

When create_mem_ref falls back to a (void *)0 base address we
currently only fall back to LEA plus indirection when the target
can use a second index register.  But we also need to do this
if there's a scaled by one index.  Or rather always to be safe.

* tree-ssa-loop-ivopts.cc (rewrite_use_address): Always
avoid TARGET_MEM_REF with a base of zero.
* tree-ssa-sccvn.cc (vn_reference_maybe_forwprop_address): Do
not forward TARGET_MEM_REF addresses.

5 weeks agoaarch64: Fall back to AAPCS for variadic functions with preserve_none [PR 125838]
Alfie Richards [Wed, 17 Jun 2026 11:17:09 +0000 (11:17 +0000)] 
aarch64: Fall back to AAPCS for variadic functions with preserve_none [PR 125838]

PR target/125838

gcc/ChangeLog:

* config/aarch64/aarch64.cc (aarch64_fntype_abi): Fall back to
AAPCS for preserve_none variadic calls.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/preserve_none_5.c: Update to use AAPCS.

5 weeks agotree-optimization/126032 - pasto in gimple-ssa-warn-access.cc
Richard Biener [Tue, 30 Jun 2026 08:19:27 +0000 (10:19 +0200)] 
tree-optimization/126032 - pasto in gimple-ssa-warn-access.cc

The maybe case should also diagnose a may be.

PR tree-optimization/126032
* gimple-ssa-warn-access.cc (maybe_warn_for_bound): Fixup
diagnostic string.

5 weeks agoOpenMP: support for uses_allocators clause
Chung-Lin Tang [Tue, 30 Jun 2026 09:15:22 +0000 (09:15 +0000)] 
OpenMP: support for uses_allocators clause

This patch completes the implementation of uses_allocators.

A new map kind for libgomp GOMP_MAP_USES_ALLOCATORS has been implemented,
which completes the required allocator initialization inside libgomp on the
host side for the accel target. This bypasses the various problems of
initializing on the accel target.

To this end, the libgomp omp_allocator_data format must be strictly the
same between host/accelerator, which is not a hard to satisfy requirement.
New configure time checks have been added in this patch to enforce this.

There is now however a duplication of the 'memspace_validate' logic, which
before was only present in libgomp/config/<accel_tgt>/allocator.c, now
also is duplicated in libgomp/plugin/plugin-<accel_tgt>.c, as a plugin hook
to allow the host to use to validate for the accel target.

Reviewed-by: Tobias Burnus <tburnus@baylibre.com>
gcc/c/ChangeLog:

* c-typeck.cc (c_finish_omp_clauses): Fix comments.

gcc/fortran/ChangeLog:

* trans-array.cc (gfc_conv_array_initializer): Always set PURPOSE
when building constructor for get_initialized_tmp_var, adjust test
to use integer_zerop instead of != NULL_TREE.
* trans-openmp.cc (gfc_trans_omp_clauses): Handle uses_allocators.

gcc/ChangeLog:

* gimplify.cc (enum gimplify_omp_var_data):
Add GOVD_USES_ALLOCATORS_ALLOCATOR.
(gimplify_bind_expr): Diagnose missing uses_allocators clause.
(omp_get_attachment): Add GOMP_MAP_USES_ALLOCATORS cases.
(omp_group_base): Likewise.
(gimplify_scan_omp_clauses): Handle uses_allocators.
(gimplify_adjust_omp_clauses_1): Handle GOVD_USES_ALLOCATORS_ALLOCATOR.
* omp-low.cc (scan_sharing_clauses): Check if ALLOCATE clause in target
region has containing USES_ALLOCATORS clause.
Add OMP_CLAUSE_USES_ALLOCATORS cases.
(lower_omp_target): Add OMP_CLAUSE_USES_ALLOCATORS cases.
* tree-pretty-print.cc (dump_omp_clause): Handle GOMP_MAP_USES_ALLOCATORS.

gcc/testsuite/ChangeLog:

* c-c++-common/gomp/uses_allocators-1.c: Adjust test, and move to
../../libgomp/testsuite/libgomp.c-c++-common/uses_allocators-1.c
* c-c++-common/gomp/uses_allocators-2.c: Move to
../../libgomp/testsuite/libgomp.c-c++-common/uses_allocators-2.c
* c-c++-common/gomp/uses_allocators-4.c: Adjust test, and move to
../../libgomp/testsuite/libgomp.c-c++-common/uses_allocators-4.c
* c-c++-common/gomp/uses_allocators-7.c: Move to
../../libgomp/testsuite/libgomp.c-c++-common/uses_allocators-7.c
* c-c++-common/gomp/uses_allocators-8.c: Move to
../../libgomp/testsuite/libgomp.c-c++-common/uses_allocators-8.c
* gcc.dg/gomp/deprecate-2.c: Adjust test.
* gfortran.dg/gomp/allocate-1.f90: Likewise.
* gfortran.dg/gomp/scope-6.f90: Likewise.
* g++.dg/gomp/uses_allocators-1.C: Move to
../../libgomp/testsuite/libgomp.c++/uses_allocators-1.C.

include/ChangeLog:

* gomp-constants.h (enum gomp_map_kind): Add GOMP_MAP_USES_ALLOCATORS.

libgomp/ChangeLog:

* allocator.c (struct omp_allocator_data): Always enable 'memkind' field
for configurations with offloading. Adjust comments assuming
HAVE_SYNC_BUILTINS for all offload host/accelerators.
(gomp_init_allocator_data): New function, created from omp_init_allocator
logic.
(omp_init_allocator): Adjust to use gomp_init_allocator_data.
(gomp_map_omp_init_allocator): New function to call
gomp_init_allocator_data for uses_allocators clauses.
* config/gcn/allocator.c (gcn_memspace_validate): Add comments.
* config/nvptx/allocator.c (nvptx_memspace_alloc): Add PTX >= v4.1
preprocessor symbol check.
(nvptx_memspace_calloc): Likewise.
(nvptx_memspace_free): Likewise.
(nvptx_memspace_realloc): Likewise.
(nvptx_memspace_validate): Add comments.
* configure.ac: Require offload hosts and accelerator targets to support
__sync_* builtins.
* configure: Regenerate.
* libgomp-plugin.h (GOMP_OFFLOAD_memspace_validate): New declaration.
* libgomp.h (gomp_omp_allocator_data_size): New declaration.
(memspace_validate_func): New plugin hook in struct gomp_device_descr.
(gomp_map_omp_init_allocator): New declaration.
* oacc-host.c (host_dispatch): Init .memspace_validate_func = NULL.
* plugin/plugin-gcn.c (GOMP_OFFLOAD_memspace_validate): New function.
* plugin/plugin-nvptx.c (GOMP_OFFLOAD_memspace_validate): New function.
* target.c (gomp_map_vars_internal): Implement GOMP_MAP_USES_ALLOCATORS
map kind.
(calculate_firstprivate_requirements): Likewise.
(copy_firstprivate_data): Likewise.
(gomp_load_plugin_for_device): Add DLSYM_OPT of memspace_validate_func
hook.

* testsuite/libgomp.c++/uses_allocators-1.C: Moved from
../gcc/testsuite/g++.dg/gomp/uses_allocators-1.C.
* testsuite/libgomp.c-c++-common/uses_allocators-1.c: Moved from
../gcc/testsuite/c-c++-common/gomp/uses_allocators-1.c.
* testsuite/libgomp.c-c++-common/uses_allocators-2.c: Moved from
../gcc/testsuite/c-c++-common/gomp/uses_allocators-2.c.
* testsuite/libgomp.c-c++-common/uses_allocators-4.c: Moved from
../gcc/testsuite/c-c++-common/gomp/uses_allocators-4.c.
* testsuite/libgomp.c-c++-common/uses_allocators-7.c: Moved from
../gcc/testsuite/c-c++-common/gomp/uses_allocators-7.c.
* testsuite/libgomp.c-c++-common/uses_allocators-8.c: Moved from
../gcc/testsuite/c-c++-common/gomp/uses_allocators-8.c.

* testsuite/libgomp.c-c++-common/uses_allocators-3.c: New test.
* testsuite/libgomp.c-c++-common/uses_allocators-5.c: New test.
* testsuite/libgomp.c-c++-common/uses_allocators-6.c: New test.
* testsuite/libgomp.c-c++-common/uses_allocators-9.c: New test.

* testsuite/libgomp.fortran/uses_allocators-1.f90: New test.
* testsuite/libgomp.fortran/uses_allocators-2.f90:
Rename from uses_allocators_1.f90.
* testsuite/libgomp.fortran/uses_allocators-3.f90:
Rename from uses_allocators_2.f90.
* testsuite/libgomp.fortran/uses_allocators-4.f90: New test.
* testsuite/libgomp.fortran/uses_allocators-5.f90: New test.
* testsuite/libgomp.fortran/uses_allocators-6.f90: New test.
* testsuite/libgomp.fortran/uses_allocators-7.f90: Adjust test.
* testsuite/libgomp.fortran/uses_allocators-8.f90: New test.

* testsuite/libgomp.fortran/uses_allocators_1.f90:
Renamed to uses_allocators-2.f90 and deleted.
* testsuite/libgomp.fortran/uses_allocators_2.f90:
Renamed to uses_allocators-3.f90 and deleted.

* testsuite/libgomp.c++/c++.exp (check_effective_target_c): Add.
(check_effective_target_c++): Add.
* testsuite/libgomp.c/c.exp (check_effective_target_c): Add.
(check_effective_target_c++): Add.

5 weeks agotree-optimization/126008 - redo PR125730 fix
Richard Biener [Mon, 29 Jun 2026 11:21:16 +0000 (13:21 +0200)] 
tree-optimization/126008 - redo PR125730 fix

This reverts r17-1586, keeping its testcase and adding the one
that regressed, fixing PR125730 in a different way, recognizing
the issue at hand there is the emitted POINTER_PLUS_EXPRs that
we should not have generated due to association done by
IVOPTs via using tree-affine and by create_mem_ref as part of
distributing the pieces.

PR tree-optimization/126008
* tree-ssa-loop-ivopts.cc (alloc_iv): Revert last change.
* tree-ssa-address.cc (add_to_parts): Use unsigned arithmetic
to accumulate to base.

* gcc.dg/torture/pr126008.c: New testcase.

5 weeks agoHandle divisor bigger than dividend in can_div_away_from_zero_p
Christopher Bazley [Fri, 12 Jun 2026 13:44:48 +0000 (13:44 +0000)] 
Handle divisor bigger than dividend in can_div_away_from_zero_p

PR middle-end/125767

When the magnitude of the divisor is known to be bigger
than that of the dividend, the output quotient should be 1
when divisor and dividend have the same sign or -1
when they have opposite signs.

Previously, can_div_away_from_zero_p was overreliant on
can_div_trunc_p: if can_div_trunc_p returned a failure
indication then can_div_away_from_zero_p did likewise.

This matters because can_div_away_from_zero_p is commonly
used to answer questions such as "How many registers does
this value occupy?" If the register has a scalable vector
type, then the answer should be 1 if the number of bits
occupied by the value is known to be not greater than
the minimum number of bits in the vector type (as well as
if the number of bits occupied by the value is known to be
smaller). Previously, can_div_away_from_zero_p had to be
used with care to avoid wrongly concluding that a value of
type V16QI would not fit in a register of type VNx16QI.
That could cause selection of inefficient instruction
sequences or even an ICE in cases where V8QI in VNx16QI
behaved as expected.

Because polynomial division truncated toward zero can
fail to produce a constant quotient in cases where
polynomial division rounded away from zero can produce a
constant quotient, it is not sufficient for the
implementation of can_div_away_from_zero_p to simply adjust
the quotient produced by can_div_trunc_p.

can_div_trunc_p requires |b * Q| <= |a| whereas
can_div_away_from_zero_p requires |b * Q| >= |a|. The
latter can be proven in cases where the former cannot.
For example, when a = 16 + 0i and b = 16 + 16i, |b * Q|
cannot be smaller than |a| unless Q = 0, which would
violate a common requirement that |a - b * Q| < |b|
(because |a| >= 16 and |b| >= 16). In contrast, |b * Q|
is bigger than |a| if Q > 1 or i > 0. Crucially, it's
impossible to know the value of i at compile time, so
can_div_trunc_p must conservatively return false.

Another way of looking at it is:
Q = (16 + 0i) / (16 + 16i)
  = 16 / (16 + 16i)
  = 1 / (1 + i)

which is not "some constant Q" that these functions must
find in order to return true; however, we can be sure that
whatever the unknowable value of 1 / (1 + i) is, it lies
within the range 0 < Q <= 1. We cannot know whether that
answer should be truncated to zero, but we can know that
it should be rounded to one.

gcc/ChangeLog:

* poly-int.h (can_div_away_from_zero_p):
Exit early if |a| <= |b| instead of calling
can_div_trunc_p and returning false if it
returned false.

gcc/testsuite/ChangeLog:

* gcc.dg/plugin/poly-int-tests.h: New test cases.

Co-authored-by: Richard Sandiford <rdsandiford@googlemail.com>
5 weeks agotree-optimization/126034 - remove dead code
Richard Biener [Tue, 30 Jun 2026 06:32:45 +0000 (08:32 +0200)] 
tree-optimization/126034 - remove dead code

The following removes a dead else if which I failed to elide when
removing non-SLP paths from vectorizable_load.

PR tree-optimization/126034
* tree-vect-stmts.cc (vectorizable_load): Elide dead else if.

5 weeks agoc-family: Regenerate c.opt.urls [PR125837]
Jakub Jelinek [Tue, 30 Jun 2026 07:51:17 +0000 (09:51 +0200)] 
c-family: Regenerate c.opt.urls [PR125837]

I forgot to make regenerate-opt-urls after adding -Wc++29-extensions.

2026-06-30  Jakub Jelinek  <jakub@redhat.com>

PR c++/125837
* c.opt.urls: Regenerate.

5 weeks agoi386: Remove identical branches in avx512vl_<code><mode>v4hi2_mask_store_1 [PR126030]
Jakub Jelinek [Tue, 30 Jun 2026 07:27:43 +0000 (09:27 +0200)] 
i386: Remove identical branches in avx512vl_<code><mode>v4hi2_mask_store_1 [PR126030]

Before r13-1355 PR106095 fix, this pattern used to be
{
  if (GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)) == 4)
    return "vpmov<trunsuffix><pmov_suff_4>\t{%1, %0%{%2%}|%0%{%2%}, %t1}";
  return "vpmov<trunsuffix><pmov_suff_4>\t{%1, %0%{%2%}|%0%{%2%}, %g1}";
}
so depending on the iterator it used t vs. g override in -masm=intel.
That was incorrect and since then both branches are the same, so there
is no point to test anything, we can just use the same pattern
unconditionally.

2026-06-30  Jakub Jelinek  <jakub@redhat.com>

PR target/126030
* config/i386/sse.md (avx512vl_<code><mode>v4hi2_mask_store_1):
Use a single output pattern instead of conditionally returning
the same string based on a condition.

5 weeks agoc++: Fix up __builtin_is_implicit_lifetime [PR126007]
Jakub Jelinek [Tue, 30 Jun 2026 07:26:29 +0000 (09:26 +0200)] 
c++: Fix up __builtin_is_implicit_lifetime [PR126007]

https://eel.is/c++draft/class.prop#8.2 says that implicit lifetime
class shall have at least one trivial eligible constructor.
We currently walk all ctors and if it is default/copy/move ctor
which is trivial and not deleted, return true, but as the following testcase
shows, we should check also for unsatisfied constraints.

2026-06-30  Jakub Jelinek  <jakub@redhat.com>

PR c++/126007
* tree.cc (eligible_special_member_function_p): New function.
(implicit_lifetime_type_p): Use true instead of 1 in function comment.
Add some further comments.  Use eligible_special_member_function_p
instead of !DECL_DELETED_FN.

* g++.dg/ext/is_implicit_lifetime3.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
5 weeks agoc: Use bool rather than _Bool in debug info and diagnostics for C23 and later [PR125935]
Jakub Jelinek [Tue, 30 Jun 2026 07:24:56 +0000 (09:24 +0200)] 
c: Use bool rather than _Bool in debug info and diagnostics for C23 and later [PR125935]

In C23, the primary boolean spelling is bool rather than _Bool, which is
just a backward compatibility thing.
So, we shouldn't spell the type as _Bool in debug info (and in diagnostics)
but as bool.
Obviously, for C17 and earlier it should be _Bool.

The following patch does that.

2026-06-30  Jakub Jelinek  <jakub@redhat.com>

PR c/125935
* c-decl.cc (c_init_decl_processing): Use "bool" rather than "_Bool"
as the name of boolean_type_node for C23+.

* gcc.dg/debug/dwarf2/pr125935-1.c: New test.
* gcc.dg/debug/dwarf2/pr125935-2.c: New test.
* gcc.dg/debug/dwarf2/pr125935-3.c: New test.
* gcc.dg/debug/ctf/ctf-bitfields-3.c: Expect bool rather than _Bool.
* gcc.dg/Warray-bounds-65.c: Expect bool in diagnostics instead of
_Bool.
* gcc.dg/Wbad-function-cast-1.c: Likewise.

Reviewed-by: Jeffrey Law <jeffrey.law@oss.qualcomm.com>
5 weeks agoc++, libcpp: Implement C++29 P3540R3 - #embed offset parameter [PR125837]
Jakub Jelinek [Tue, 30 Jun 2026 07:22:16 +0000 (09:22 +0200)] 
c++, libcpp: Implement C++29 P3540R3 - #embed offset parameter [PR125837]

The following patch implements the C++29 P3540R3 - #embed offset parameter
paper.

2026-06-30  Jakub Jelinek  <jakub@redhat.com>

PR c++/125837
gcc/
* doc/invoke.texi (Wc++29-extensions): Document.
gcc/c-family/
* c.opt (Wc++29-extensions): New option.
* c-cppbuiltin.cc (c_cpp_builtins): Change __cpp_pp_embed value for
C++29.
gcc/testsuite/
* g++.dg/cpp29/feat-cxx29.C (__cpp_pp_embed): Expect 202606L
rather than 202502L.
* c-c++-common/cpp/embed-18.c: Adjust expected diagnostics.
* g++.dg/cpp/embed-30.C: New test.
* g++.dg/cpp/embed-31.C: New test.
* g++.dg/cpp/embed-32.C: New test.
libcpp/
* include/cpplib.h: Implement C++29 P3540R3 - #embed offset parameter.
(enum cpp_warning_reason): Add CPP_W_CXX29_EXTENSIONS.
* directives.cc (EMBED_PARAMS): Add OFFSET.
(enum embed_param_kind): Change NUM_EMBED_STD_PARAMS.
(_cpp_parse_embed_params): Handle offset parameter for C++.

Reviewed-by: Jason Merrill <jason@redhat.com>
5 weeks agoOpenMP: Add omp_get_device_distances routine: Gracefully handle failure to open Linux...
Thomas Schwinge [Tue, 30 Jun 2026 06:55:08 +0000 (08:55 +0200)] 
OpenMP: Add omp_get_device_distances routine: Gracefully handle failure to open Linux sysfs file for NUMA node [PR125877]

Fix-up for commit 8af1592882509fbead16e30fd2d056330a9609e4
"OpenMP: Add omp_get_device_distances routine [PR125877]".  Without this,
'libgomp/config/linux/numa.c:gomp_get_numa_distance' faults when trying to
'fscanf' from the null pointer upon 'fopen' failure.

PR libgomp/125877
libgomp/
* config/linux/numa.c (gomp_get_numa_distance): Gracefully handle
failure to open Linux sysfs file for NUMA node.

5 weeks agoOpenMP: Add omp_get_device_distances routine: Initialize NUMA node for NVIDIA GPUs...
Thomas Schwinge [Tue, 30 Jun 2026 06:55:08 +0000 (08:55 +0200)] 
OpenMP: Add omp_get_device_distances routine: Initialize NUMA node for NVIDIA GPUs [PR125877]

Fix-up for commit 8af1592882509fbead16e30fd2d056330a9609e4
"OpenMP: Add omp_get_device_distances routine [PR125877]".  Without this,
'libgomp/plugin/plugin-nvptx.c:GOMP_OFFLOAD_get_numa_node' returns random junk:

    /* Initialized to 0; to distinguish, save with offset.  */
    if (dev->numa_node != 0)
      return dev->numa_node > 0 ? dev->numa_node - 1 : dev->numa_node;

PR libgomp/125877
libgomp/
* plugin/plugin-nvptx.c (nvptx_open_device): Initialize 'numa_node'.

5 weeks agors6000: Add new builtin __builtin_ppc_atomic_cas_local
Avinash Jayakar [Wed, 3 Jun 2026 11:07:13 +0000 (16:37 +0530)] 
rs6000: Add new builtin __builtin_ppc_atomic_cas_local

This patch adds a new powerpc specific atomic builtin which is similar
to the generic __atomic_compare_exchange builtin.

bool __builtin_ppc_atomic_cas_local (type *ptr, type *expected,
     type *desired, bool weak,
     int success_memorder,
     int failure_memorder)

It behaves like __atomic_compare_exchange(), but it uses an EH value of
1 in the larx (load-and-reserve) instruction, which provides a hint
whether the program will perform a subsequent store to the specified
location. The new builtin helps optimize lock contention on PowerPC by
keeping the lock cacheline in the local processor longer, reducing
performance penalties from cache coherence protocol traffic.

2026-06-30  Avinash Jayakar  <avinashd@linux.ibm.com>
    Surya Kumari Jangala  <jskumari@linux.ibm.com>

gcc/ChangeLog:
* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Add logic to
handle __builtin_ppc_atomic_cas_local.
* config/rs6000/rs6000-builtins.def: New builtins for
__builtin_ppc_atomic_cas_local with types.
* config/rs6000/rs6000-c.cc (altivec_build_resolved_builtin): Handle
builtins with up to 6 arguments.
* config/rs6000/rs6000-overload.def: Overload builtin for signed/unsiged
char, short, int, long, __int128.
* config/rs6000/rs6000-protos.h (rs6000_expand_atomic_compare_and_swap): Add
additional parameter 'local' to the prototype.
* config/rs6000/rs6000.cc (emit_load_locked): Add new parameter. Pass new
parameter to generate load-locked instruction.
(rs6000_expand_atomic_compare_and_swap): Add new parameter. Call
emit_load_locked() with additional parameter value of EH bit.
(rs6000_expand_atomic_exchange): Pass EH value 0 to emit_load_locked().
(rs6000_expand_atomic_op): Likewise.
* config/rs6000/sync.md (load_locked<mode>): Add new operand in RTL template.
Specify EH bit in the larx instruction.
(load_locked<QHI:mode>_si): Likewise.
(load_lockedpti): Likewise.
(load_lockedti): Add new operand in RTL template. Pass EH bit to
gen_load_lockedpti().
(atomic_compare_and_swap<mode>): Pass new parameter 'false' to
rs6000_expand_atomic_compare_and_swap.
(atomic_compare_and_swap_local<mode>): New define_expand.
* doc/extend.texi: Add documentation for new builtin.

gcc/testsuite/ChangeLog:
* gcc.target/powerpc/acmp-tst-32bit.c: New test.
* gcc.target/powerpc/acmp-tst.c: New test.
* gcc.target/powerpc/acmp-tst-indexed.c: New test.

5 weeks agoRevert "rs6000: Add new builtin __builtin_ppc_atomic_cas_local"
Avinash Jayakar [Tue, 30 Jun 2026 04:29:13 +0000 (09:59 +0530)] 
Revert "rs6000: Add new builtin __builtin_ppc_atomic_cas_local"

This reverts commit c14275e192efa75020b88d7b1bd5a6167f80a81d.

5 weeks agors6000: Add new builtin __builtin_ppc_atomic_cas_local
Avinash Jayakar [Wed, 3 Jun 2026 11:07:13 +0000 (16:37 +0530)] 
rs6000: Add new builtin __builtin_ppc_atomic_cas_local

This patch adds a new powerpc specific atomic builtin which is similar
to the generic __atomic_compare_exchange builtin.

bool __builtin_ppc_atomic_cas_local (type *ptr, type *expected,
     type *desired, bool weak,
     int success_memorder,
     int failure_memorder)

It behaves like __atomic_compare_exchange(), but it uses an EH value of
1 in the larx (load-and-reserve) instruction, which provides a hint
whether the program will perform a subsequent store to the specified
location. The new builtin helps optimize lock contention on PowerPC by
keeping the lock cacheline in the local processor longer, reducing
performance penalties from cache coherence protocol traffic.

2026-06-30  Avinash Jayakar  <avinashd@linux.ibm.com>
    Surya Kumari Jangala  <jskumari@linux.ibm.com>

gcc/ChangeLog:
* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Add logic to
handle __builtin_ppc_atomic_cas_local.
* config/rs6000/rs6000-builtins.def: New builtins for
__builtin_ppc_atomic_cas_local with types.
* config/rs6000/rs6000-c.cc (altivec_build_resolved_builtin): Handle
builtins with up to 6 arguments.
* config/rs6000/rs6000-overload.def: Overload builtin for signed/unsiged
char, short, int, long, __int128.
* config/rs6000/rs6000-protos.h (rs6000_expand_atomic_compare_and_swap): Add
additional parameter 'local' to the prototype.
* config/rs6000/rs6000.cc (emit_load_locked): Add new parameter. Pass new
parameter to generate load-locked instruction.
(rs6000_expand_atomic_compare_and_swap): Add new parameter. Call
emit_load_locked() with additional parameter value of EH bit.
(rs6000_expand_atomic_exchange): Pass EH value 0 to emit_load_locked().
(rs6000_expand_atomic_op): Likewise.
* config/rs6000/sync.md (load_locked<mode>): Add new operand in RTL template.
Specify EH bit in the larx instruction.
(load_locked<QHI:mode>_si): Likewise.
(load_lockedpti): Likewise.
(load_lockedti): Add new operand in RTL template. Pass EH bit to
gen_load_lockedpti().
(atomic_compare_and_swap<mode>): Pass new parameter 'false' to
rs6000_expand_atomic_compare_and_swap.
(atomic_compare_and_swap_local<mode>): New define_expand.
* doc/extend.texi: Add documentation for new builtin.

gcc/testsuite/ChangeLog:
* gcc.target/powerpc/acmp-tst-32bit.c: New test.
* gcc.target/powerpc/acmp-tst.c: New test.
* gcc.target/powerpc/acmp-tst-indexed.c: New test.

5 weeks agoLoongArch: fix SSP routines with ILP32
Xi Ruoyao [Sun, 24 May 2026 11:23:22 +0000 (19:23 +0800)] 
LoongArch: fix SSP routines with ILP32

I completely forgot ILP32 when I wrote those routines.

gcc/

* config/loongarch/loongarch.md
(@stack_protect_combined_set_normal_<mode>): Replace `st.d'
with `st.<d>', reject stptr.d on LA32 with enabled attribute.
(@stack_protect_combined_test_internal_<mode>): Replace `ld.d'
with `ld.<d>', reject ldptr.d on LA32 with enabled attribute.
(@stack_protect_combined_set_extreme_<mode>): Rename to ...
(stack_protect_combined_set_extreme): ... here.  Force DImode.
Add TARGET_ABI_LP64 as the condition.
(stack_protect_combined_set): Adapt for the change of
stack_protect_combined_set_extreme.

gcc/testsuite/

* gcc.target/loongarch/ssp-ilp32.c: New test.

5 weeks agoSH: Add another related test case for PR55212 c#464
Oleg Endo [Tue, 30 Jun 2026 01:20:45 +0000 (10:20 +0900)] 
SH: Add another related test case for PR55212 c#464

This case was not posted in the PR but it's related since it's
triggered by fsca insn and v2sf usage.

gcc/testsuite/ChangeLog:

PR target/55212
* gcc.target/sh/torture/pr55212-c464-3.c: New.

5 weeks agoSH: Add test case from PR55212 c#419 / c#420 / c#412 / att. 59549
Oleg Endo [Tue, 30 Jun 2026 00:36:37 +0000 (09:36 +0900)] 
SH: Add test case from PR55212 c#419 / c#420 / c#412 / att. 59549

gcc/testsuite/ChangeLog:

PR target/55212
* gcc.target/sh/torture/pr55212-c421.c

5 weeks agoRISC-V: Add scalar-mode handling to vector misalignment hook [PR125994].
Robin Dapp [Tue, 30 Jun 2026 00:46:01 +0000 (18:46 -0600)] 
RISC-V: Add scalar-mode handling to vector misalignment hook [PR125994].

Hi,

Julien reported that we don't peel for alignment anymore after my
vector-misalignment changes last year.  Indeed, I didn't consider the
"scalar vectorization" case for slow-misaligned targets.  We fail
to perform peeling for alignment and instead emit byte accesses.

This patch now only returns true (=misalignment supported) if misaligned
scalar accesses are not slow.

Regtested on rv64gcv_zvl512b.  Going to wait for the CI before moving
forward.

Reported-by: Julien Thillard <julien.thillard@univ-grenoble-alpes.fr>
Regards
 Robin

PR target/125994

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_support_vector_misalignment):
Handle scalar modes.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr125994.c: New test.

5 weeks agoDaily bump.
GCC Administrator [Tue, 30 Jun 2026 00:16:45 +0000 (00:16 +0000)] 
Daily bump.

5 weeks ago[RISC-V] Improve logical and with some constants where high 32 bits in mask are clear
Jeff Law [Mon, 29 Jun 2026 20:51:24 +0000 (14:51 -0600)] 
[RISC-V] Improve logical and with some constants where high 32 bits in mask are clear

I was playing around with our logical sequences on Friday spurred by a case
that showed up in a BZ.  In that effort I stumbled over a second class of cases
that's pretty easy to handle.

In general if we need to do a logical AND where the mask is just a series of on
bits in the middle of a word, then that is at worst a 3 instruction sequence.
Logical shift right to clear some number of low bits, logical shift left to
clear upper bits, logical shift right to put everything into its final
position.  We already support this.

srliw is an interesting instruction in this space because it can clear the
upper 32 bits and some number of low bits at the same time.  So let's take a &
0x00000000ffff0000.

We could shift "a" right by 16, left by 48, the right again by 16. But using
slliw is better.  We just srliw by 16 bits to clear the upper 32 bits as well
as the low 16 bits.  Then slli to put the bits into their final position.  This
works for any case where the upper 32 bits are clear and there's a run of 1s in
the low 32 bits ending at bit #31.

When this applies we avoid synthesizing the constant and thus trivially reduce
our reliance on mvconst_internal to help clean things up.  This did require
tightening up an unnamed define_insn_and_split which tried to use zext.[hw] to
do bulk clearing of upper bits.  We just want it to avoid matching for cases
where the upper 32 bits are clear and we have a run of 1s ending at bit 31 on
in the mask.

Bootstrapped and regression tested on the c920 and K3 as well as regression
tested on riscv64-elf and riscv32-elf.  It's worth noting this sequence doesn't
require any special extension support, so it has the potential to trigger on
the c920.

Waiting on pre-commit before moving forward.

gcc/
* config/riscv/riscv.cc (synthesize_and): Use srliw to handle
clearing both upper and lower bits in some cases.
* config/riscv/bitmanip.md (ZBA splitter using sext.w): Do not
use in cases where we can use srliw to clear those upper bits.

gcc/testsuite
* gcc.target/riscv/and-synthesis-1.c: New test.

5 weeks ago[PATCH] RISC-V: Add basic spacemit-x100 core support
Mark Zhuang [Mon, 29 Jun 2026 15:31:56 +0000 (09:31 -0600)] 
[PATCH] RISC-V: Add basic spacemit-x100 core support

From: Mark Zhuang <mark.zhuang@spacemit.com>

Add the spacemit-x100 processor to -mcpu/-mtune.
Scheduling is mapped to the existing generic_ooo.

gcc/ChangeLog:

* config/riscv/riscv-cores.def (RISCV_TUNE): Add spacemit-x100.
(RISCV_CORE): Add spacemit-x100.
* config/riscv/riscv.cc (spacemit_x100_tune_info): New.
* doc/riscv-mcpu.texi: Regenerate.
* doc/riscv-mtune.texi: Regenerate.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/mcpu-spacemit-x100.c: New test.

5 weeks agolibstdc++: Fix comment typo in bits/chrono_io.h
Jonathan Wakely [Mon, 29 Jun 2026 19:16:53 +0000 (20:16 +0100)] 
libstdc++: Fix comment typo in bits/chrono_io.h

libstdc++-v3/ChangeLog:

* include/bits/chrono_io.h: Fix comment typo.

5 weeks agoc++: Fix production comment for mangle_ctor_vtbl_for_type.
Georg-Johann Lay [Mon, 29 Jun 2026 11:49:23 +0000 (13:49 +0200)] 
c++: Fix production comment for mangle_ctor_vtbl_for_type.

mangle.cc::mangle_ctor_vtbl_for_type has

   write_string ("_Z");
   write_string ("TC");

and hence the function comment should read

   We use the production
   <special-name> ::= TC <type> ...

instead of the current

   <special-name> ::= CT <type> ...

gcc/cp/
* mangle.cc (mangle_ctor_vtbl_for_type): Fix production in comment.

5 weeks agolibstdc++: Doxygen improvements in <bits/stl_algo.h>
Jonathan Wakely [Thu, 30 Apr 2026 15:05:50 +0000 (16:05 +0100)] 
libstdc++: Doxygen improvements in <bits/stl_algo.h>

I noticed that we were generating ill-formed XML because of a Doxygen
bug (https://github.com/doxygen/doxygen/issues/12113) and so switched
some of the messy Doxygen comments to use Markdown instead of (mis)using
the @p and @c Doxygen commands (and then having to write C++ code
expressions without spaces so that the @p applies to the whole thing).

For half-closed range expressions like [first, last) I've enclosed the
whole thing in backticks, so that the opening bracket, the comma, and
the closing paren are in code font.  While this seems less formally
correct, the generated HTML looks better to me. With [`first`,`last`)
the bracket and paren are narrower and the expression seems less clear.

This change also adds @cond/@endcond pairs to prevent internal helper
functions from being added to the docs.

Finally, this removes another config variable which has been obsoleted
in the latest Doxygen 1.17.0 release.

libstdc++-v3/ChangeLog:

* doc/doxygen/user.cfg.in (DOT_MULTI_TARGETS): Remove obsolete
config.
* include/bits/stl_algo.h: Use markdown and fix some typos in
Doxygen comments.  Mark internal helper functions as
undocumented.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
5 weeks agoAArch64: Add streaming compatible memory operations implementation in libgcc
Claudio Bantaloukas [Wed, 17 Jun 2026 13:46:34 +0000 (13:46 +0000)] 
AArch64: Add streaming compatible memory operations implementation in libgcc

The ACLE[1] specified the following four functions in "Streaming-compatible
versions of standard routines" as having "the same behavior as the standard C
functions that they are named after" and external linkage.

- void *__arm_sc_memcpy(void *dest, const void *src, size_t n)
    __arm_streaming_compatible;
- void *__arm_sc_memmove(void *dest, const void *src, size_t n)
    __arm_streaming_compatible;
- void *__arm_sc_memset(void *s, int c, size_t n)
    __arm_streaming_compatible;
- void *__arm_sc_memchr(void *s, int c, size_t n)
    __arm_streaming_compatible;

Declarations for these are already available in arm_sme.h
This patch provides implementations for these based entirely on scalar
operations, along with basic tests that exercise the code both in streaming and
non-streaming mode.

See also [2] for further testing.

[1] https://arm-software.github.io/acle/main/acle.html
[2] https://github.com/ARM-software/optimized-routines/pull/94

libgcc/ChangeLog:
* config/aarch64/__arm_sc_memchr_scalar.S: New file.
* config/aarch64/__arm_sc_memcpy_scalar.S: Likewise.
* config/aarch64/__arm_sc_memset_scalar.S: Likewise.
* config/aarch64/libgcc-sme.ver (GCC_17.0): Export
__arm_sc_memchr, __arm_sc_memcpy, __arm_sc_memmove and
__arm_sc_memset.
* config/aarch64/t-aarch64: Add new files.
* config/aarch64/aarch64-asm.h: Add ENTRY_ALIAS.

gcc/testsuite/ChangeLog:
* gcc.target/aarch64/acle/arm_sc_memchr.c: New file.
* gcc.target/aarch64/acle/arm_sc_memcpy.c: Likewise.
* gcc.target/aarch64/acle/arm_sc_memmove.c: Likewise.
* gcc.target/aarch64/acle/arm_sc_memset.c: Likewise.
* gcc.target/aarch64/sme/arm_sc_memchr.c: New file.
* gcc.target/aarch64/sme/arm_sc_memcpy.c: Likewise.
* gcc.target/aarch64/sme/arm_sc_memmove.c: Likewise.
* gcc.target/aarch64/sme/arm_sc_memset.c: Likewise.

5 weeks agoMIPS: Add -mmxu and -mno-mxu driver pass through
Matthew Fortune [Mon, 29 Jun 2026 15:16:09 +0000 (09:16 -0600)] 
MIPS: Add -mmxu and -mno-mxu driver pass through

From: Matthew Fortune <matthew.fortune@imgtec.com>

Cherry-picked 9acbf0b0efdfcc27e30b1db7a707dbe9cc6b64eb
from https://github.com/MIPS/gcc

gcc/
* config/mips/mips.h (ASM_SPEC): Add placeholders for -mmxu and
-mno-mxu.
* config/mips/mips.opt: New undocumented target option.

gcc/testsuite/
* gcc.target/mips/mxu-compile-no.c: New test.
* gcc.target/mips/mxu-compile.c: New test.
* gcc.target/mips/mxu-driver-no.c: New test.
* gcc.target/mips/mxu-driver.c: New test.

Signed-off-by: Matthew Fortune <matthew.fortune@imgtec.com>
Signed-off-by: Faraz Shahbazker <fshahbazker@wavecomp.com>
Signed-off-by: Aleksandar Rakic <aleksandar.rakic@htecgroup.com>
Signed-off-by: Eldar Osmanovic <eldar.osmanovic@htecgroup.com>
5 weeks agoMIPS: Frame barrier fix
Matthew Fortune [Mon, 29 Jun 2026 15:12:23 +0000 (09:12 -0600)] 
MIPS: Frame barrier fix

From: Matthew Fortune <matthew.fortune@imgtec.com>

Ensure the frame barrier prevents reordering of stack pointer changes.

It is possible for a load/store accessing the stack via a copy of the
stack pointer to be moved across the epilogue meaning that it accesses
stack that is no longer allocated. This leads to a situation where the
code is unsafe in the event of an interrupt where the same stack is
used for interrupt handling.

Cherry-picked 0c240da6f6032bd19348b97148d25c05ba2e8356
from https://github.com/MIPS/gcc

gcc/
* config/mips/mips.cc (mips_frame_barrier): Upgrade to a full
blockage.

gcc/testsuite/
* gcc.target/mips/frame-barrier-1.c: New test.

Signed-off-by: Matthew Fortune <matthew.fortune@imgtec.com>
Signed-off-by: Faraz Shahbazker <fshahbazker@wavecomp.com>
Signed-off-by: Aleksandar Rakic <aleksandar.rakic@htecgroup.com>
Signed-off-by: Eldar Osmanovic <eldar.osmanovic@htecgroup.com>
5 weeks agotestsuite: arm: change `noinline` to `noipa` for long call tests
Torbjörn SVENSSON [Mon, 29 Jun 2026 06:26:12 +0000 (08:26 +0200)] 
testsuite: arm: change `noinline` to `noipa` for long call tests

Since r17-1602-ga5ab19d9db2d13, the tests starts to fail due to that
GCC thinks it can optimize away the function. With `noipa`, the function
is preserved.

gcc/testsuite/ChangeLog:

* gcc.target/arm/long-calls-1.c: Change to `noipa` to prevent
optimizing away the functions.
* gcc.target/arm/long-calls-2.c: Likewise.
* gcc.target/arm/long-calls-3.c: Likewise.
* gcc.target/arm/long-calls-4.c: Likewise.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
5 weeks agoFortran: Correct error in accessing CLASS declared type [PR84622]
Paul Thomas [Mon, 29 Jun 2026 13:43:39 +0000 (14:43 +0100)] 
Fortran: Correct error in accessing CLASS declared type [PR84622]

2026-06-29  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/84622
* resolve.cc (resolve_symbol): In detecting coarray components,
use the derived type of the class data component, not the data
component itself. New boolean 'declared_has_coarray_comp' to
detect this.

gcc/testsuite/
PR fortran/84622
* gfortran.dg/pr84622.f90: New test.

5 weeks agoPR target/94871: Simplify (not (eq x y)) as (ne x y) for vectors.
Roger Sayle [Mon, 29 Jun 2026 13:07:08 +0000 (14:07 +0100)] 
PR target/94871: Simplify (not (eq x y)) as (ne x y) for vectors.

This patch is my proposed fix for PR target/94871, a missed optimization
for simplifying vector comparisons in the RTL optimizers (combine) that
includes both middle-end and i386 backend changes.

The testcase from the original bugzilla PR is:

typedef long long int64_t;
typedef signed char int8_t;

typedef double v2df __attribute__((vector_size(16)));
typedef int64_t v2di __attribute__((vector_size(16)));
typedef int8_t v16qi __attribute__((vector_size(16)));

inline v2di set1_epi8(int8_t a)
{
    return (v2di)(v16qi){a, a, a, a, a, a, a, a, a, a, a, a, a, a, a, a};
}

v2di foo(v2df a, v2df b)
{
    return ((v2di)__builtin_ia32_cmpeqpd(a, b) ^ set1_epi8(0xFF));
}

where GCC with -O2 currently generates:

foo: cmpeqpd %xmm1, %xmm0
        pcmpeqd %xmm1, %xmm1
        pxor    %xmm1, %xmm0
        ret

where with this pair of changes, we instead generate:

foo: cmpneqpd        %xmm1, %xmm0
        ret

Basically, the usual optimizations (not (eq x y)) -> (ne x y) and
(not (ne x y)) -> (eq x y), but applied to vector mode comparisons
(and in this case floating point vector comparisons).

The first (i386 backend) part is to observe that the middle-end
RTL optimizers enjoy canonicalizing floating point vector comparisons
to return integer vector results.  Hence -fdump-rtl-combine-all
contains the lines:

Failed to match this instruction:
(set (reg:V2DI 105)
    (eq:V2DI (reg:V2DF 106 [ aD.2972 ])
        (reg:V2DF 107 [ bD.2973 ])))

Currently sse.md contains patterns for matching vector comparisons
for comparing V2DFs returning a V2DF, but not the equivalent patterns
for comparing V2DFs but returning a V2DI.  Very easily handled by
cloning the existing define_insn but substituting <sseintvecmode> for
the comparison result mode.

The second (simplify-rtx.cc) part is to tweak the current
(not (eq X Y)) -> (ne X Y) transformation in
simplify_unary_operation_1 to allow/handle vector modes.
In fact, this is a (latent) bug fix, as the current logic
checks STORE_FLAG_VALUE even for modes where this isn't
relevant.  The target's STORE_FLAG_VALUE is applicable for
SCALAR_INT_MODE_P comparisons; VECTOR_STORE_FLAG_VALUE
should be used for VECTOR integer modes.

For symmetry, I've also added the equivalent optimization for
targets with STORE_FLAG_VALUE == 1 or VECTOR_STORE_FLAG_VALUE
== const1_rtx (such as aarch64), such that (not (neg (eq x y)))
-> (neg (ne x y)).

2026-06-29  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
PR target/94871
* simplify-rtx.cc (simplify_unary_operation_1) <case NOT>:
Update (not (eq X Y)) -> (ne X Y) to support vector comparions
using VECTOR_STORE_FLAG_VALUE, and check SCALAR_INT_MODE_P
when checking STORE_FLAG_VALUE.  Add equivalent optimization
(not (neg (eq X Y))) -> (neg (ne X Y)) for targets with
STORE_FLAG_VALUE == 1 or VECTOR_STORE_FLAG_VALUE is const1_rtx.

* config/i386/sse.md (*<sse>_imaskcmp<mode>3_comm): Clone
of *<sse>_maskcmp<mode>3_comm pattern with integer vector
result.

gcc/testsuite/ChangeLog
PR target/94871
* gcc.target/i386/pr94871.c: New test case.

5 weeks agoaarch64: Add SVE2 unpredicated SMULH/UMULH patterns
Abhishek Kaushik [Fri, 26 Jun 2026 13:09:16 +0000 (13:09 +0000)] 
aarch64: Add SVE2 unpredicated SMULH/UMULH patterns

SVE has predicated SMULH and UMULH, while SVE2 provides unpredicated
forms.  The ACLE _x forms carry an inactive predicate wrapper in RTL,
so add a split that removes the UNSPEC_PRED_X wrapper from MUL_HIGHPART
and add a pattern that emits the corresponding unpredicated form.

Add ACLE asm tests for all signed and unsigned integer element widths,
covering vector, scalar and immediate operands.

Bootstrapped and regression tested on aarch64-linux-gnu.

gcc/ChangeLog:

* config/aarch64/aarch64-sve2.md: Add unpredicated high-part
multiplication section.
(@aarch64_sve2_<optab><mode>): New insn.
* config/aarch64/aarch64-sve.md (@aarch64_pred_<optab><mode>):
Change to define_insn_and_split and split SVE2 highpart
multiplication into unpredicated MUL_HIGHPART.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/sve2/acle/asm/mulh_s8.c: New test.
* gcc.target/aarch64/sve2/acle/asm/mulh_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/mulh_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/mulh_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/mulh_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/mulh_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/mulh_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/mulh_u64.c: Likewise.

5 weeks agoMAINTAINERS: Add myself to write after approval
Abhishek Kaushik [Mon, 29 Jun 2026 11:43:49 +0000 (11:43 +0000)] 
MAINTAINERS: Add myself to write after approval

ChangeLog:

* MAINTAINERS (Write After Approval): Add myself.

5 weeks agoada: Fix internal error on subtraction in array bound with -gnatc
Eric Botcazou [Mon, 15 Jun 2026 16:23:38 +0000 (18:23 +0200)] 
ada: Fix internal error on subtraction in array bound with -gnatc

The problem is that the expansion of intrinsic operators is not performed
in semantic-only (-gnatc) mode and thus one of them is handed down to gigi
unexpanded and trips on an assertion about type consistency.  The simplest
fix is to disable the translation for them at the beginning of gnat_to_gnu.

gcc/ada/ChangeLog:

* gcc-interface/trans.cc (gnat_to_gnu): Return a NULL_EXPR for the
use of an intrinsic operator and exclude more cases explicitly.

5 weeks agoada: Improve error message for -gnatw.q
Viljar Indus [Wed, 10 Jun 2026 08:30:07 +0000 (11:30 +0300)] 
ada: Improve error message for -gnatw.q

Use continuations to group the messages so that they will be
handled as a set.

Post the error on the type instead of the component to avoid
ambiguities with derived types.

Have the second continuation message explicitly point to the
component that is causing the problem.

gcc/ada/ChangeLog:

* gcc-interface/decl.cc (warn_on_field_placement): Improve error message.

5 weeks agoada: Fix pragma Import ignored in conjunction with address aspect
Eric Botcazou [Tue, 16 Jun 2026 16:28:01 +0000 (18:28 +0200)] 
ada: Fix pragma Import ignored in conjunction with address aspect

The special mechanism used to "deinitialize" an object in the presence of
a pragma Import works in conjunction with an address clause, but not with
an address aspect.  This tweaks the expansion so as to plug this loophole.

gcc/ada/ChangeLog:

* einfo.ads (Initialization_Statements): Adjust description.
* exp_ch3.adb (Default_Initialize_Object): Use the special mechanism
of Initialization_Statements, if need be, instead of inserting the
initialization statements directly into the freeze actions.

5 weeks agoada: Fix support for initialization of components in constructors
Javier Miranda [Mon, 15 Jun 2026 11:05:45 +0000 (11:05 +0000)] 
ada: Fix support for initialization of components in constructors

Enforce the following rule: If the component of a record type is of
a type that doesn't have a parameterless constructor, it has to be
initialized by one of these two mechanism: 1) through the default
value provided at component declaration, or 2) through an Initialize
aspect that can rely on constructor parameters.

Enforce the following rule: a constructor for a derived type whose
parent type needs construction and has no default parameterless
constructor must call the parent constructor through a Super aspect
to initialize its parent components.

Fix order of initialization of derived record type components.

gcc/ada/ChangeLog:

* sem_ch6.adb (Constructor_Components_OK): New local subprogram of
Analyze_Direct_Attribute_Definition. Checks performed when processing
the body of a constructor.
(Analyze_Direct_Attribute_Definition) <Name_Constructor>: Report an
error on the body of a constructor for a derived type whose parent
type needs construction and has no default parameterless constructor
and has no Super aspect to initialize its parent components.
* sem_ch7.adb (Inspect_Components_Needing_Construction): New local
subprogram of Analyze_Package_Specification.
(Inspect_Abstract_Constructors_Completion): Rename formal parameter.
* exp_ch6.adb (Prepend_Constructor_Procedure_Prologue): Fix the order
of initialization of record type components: parent components must
be initialized first, then the own components following their
declaration order.
* sem_util.ads (First_Component_Declaration): New subprogram.
* sem_util.adb (First_Component_Declaration): New utility subprogram
that returns the first non-pragma non-inherited component declaration
of a record type.

5 weeks agoada: Add global contracts to Ada.Command_Line subprograms
Joffrey Huguet [Mon, 15 Jun 2026 15:44:35 +0000 (17:44 +0200)] 
ada: Add global contracts to Ada.Command_Line subprograms

This patch adds an abstract state defined in Ada.Command_Line and
global contracts to subprograms defined in this unit.

gcc/ada/ChangeLog:

* libgnat/a-comlin.ads (Argument_Count): Add global contract.
(Argument): Likewise.
(Command_Name): Likewise.
(Set_Exit_Status): Likewise.
* libgnat/a-comlin.adb: Refine abstract state.

5 weeks agoada: Fix contracts in Ada.Text_IO
Joffrey Huguet [Mon, 15 Jun 2026 15:40:04 +0000 (17:40 +0200)] 
ada: Fix contracts in Ada.Text_IO

This patch adds Data_Error in Exceptional_Cases contracts for Get
procedures in Ada.Text_IO.

gcc/ada/ChangeLog:

* libgnat/a-textio.ads (Get): Add Data_Error in Exceptional_Cases contract.
(Look_Ahead): Likewise.
(Get_Immediate): Likewise.
(Get_Line): Likewise.

5 weeks agoada: Stop Unwind_Backtrace on null PC
Olivier Hainque [Tue, 16 Jun 2026 15:54:50 +0000 (15:54 +0000)] 
ada: Stop Unwind_Backtrace on null PC

A null "pc" return address in the Unwind_Backtrace callback
normally means that unwinding has reached the top of the call
chain. Or something else, abnormal. Recognize this early as a
stop condition, which makes sure we don't accidentally add an
entry for it after applying possible offsets.

gcc/ada/ChangeLog:

* tracebak.c (trace_callback): Return early for pc == 0;

5 weeks agoada: Fix wrong error message with Finalizable and overloading
Eric Botcazou [Tue, 16 Jun 2026 09:27:29 +0000 (11:27 +0200)] 
ada: Fix wrong error message with Finalizable and overloading

We accept overloading for the primitives denoted by the Finalizable aspect,
so Find_Controlled_Prim_Op needs to filter out the unrelated primitives.

gcc/ada/ChangeLog:

* exp_util.ads (Find_Optional_Prim_Op): Add Controlled_Op parameter
defaulting to False.
* exp_util.adb (Find_Optional_Prim_Op): Likewise.  When it is set to
True, test whether the primitive has the signature of the controlled
primitives.
* sem_ch13.adb (Resolve_Finalization_Procedure): Reset Is_Overloaded
once an interpretation has been selected among the set.

5 weeks agoada: Implementation of attribute subprograms for additional aspects
Gary Dismukes [Tue, 2 Jun 2026 01:10:15 +0000 (01:10 +0000)] 
ada: Implementation of attribute subprograms for additional aspects

This set of changes completes the support for the "attribute subprogram"
feature outlined in the RFC at:

https://github.com/AdaCore/ada-spark-rfcs/blob/master/features/rfc-oop-attributes.rst

There was already preliminary support implemented for the Constructor and
Destructor aspects. Support has now been added for all of the other cases
of subprogram-valued aspects, which are the indexing aspects, literal aspects,
Default_Iterator, Put_Image, and the stream attributes/aspects. Part of these
changes involves revising the form of internal names for attribute subprograms,
where they now consist of just the type and aspect names separated by an
apostrophe (rather than adding special prefixes and suffixes, and using
"__" as a separator). There are also a number of changes related to
improved error reporting, so that messages are flagged on the attribute
subprograms themselves rather than on the type. Support is also added
for allowing the names of attribute subprograms to be used in expanded
names, plus allowing attribute subprograms to be called directly using
the attribute name. Finally, documentation of the feature is added in
the GNAT Reference Manual.

gcc/ada/ChangeLog:

* doc/gnat_rm/gnat_language_extensions.rst: Add documentation for
"attribute subprograms" extension feature.
* errout.adb (Set_Msg_Node): Remove special-case treatment for
attribute names (no longer call Replace_With_Attribute_Definition).
* erroutc.ads (Replace_With_Attribute_Definition): Removed.
* erroutc.adb (Replace_With_Attribute_Definition): Removed.
(Set_Msg_Insertion_Name): Remove special-case treatment for attribute
names.
* exp_attr.adb (Expand_N_Attribute_Reference): Add indexing, literal,
and Default_Iterator attributes as case choices in the alternative
that raises Program_Error.
* par-ch4.adb (Is_Parameterless_Attribute): Add various aspects as
entries in this table that are set to True (for proper handling of
actual parameters on subprogram calls made using the attribute name).
* par-ch6.adb (P_Subprogram): Add calls to procedure
Rewrite_Entity_If_Direct_Attribute_Def for subprogram renamings
and body stubs.
* sem_attr.adb (Analyze_Attribute): Add indexing, Default_Iterator,
and literal attributes to case choices. Rewrite_As_Attribute_Subp_Name
is called for those, as well as for stream and Put_Image attribute
cases (the latter group being guarded by a call to the following
new function).
(Is_Reference_To_Attribute_Subp_Name): New function to determine
whether to rewrite an N_Attribute_Reference as an N_Identifier
denoting an attribute subprogram.
(Rewrite_As_Attribute_Subp_Name): New procedure to rewrite an attribute
reference as an N_Identifier whose Chars field is the combined type
and aspect name, and call Analyze on that (providing support for use
in expanded names). Also validates that the prefix is a type and that
the type has the aspect corresponding to the attribute.
(Eval_Attribute): Add choices for the various subprogram-valued
aspects/attributes to the alternative that raises Program_Error.
* sem_ch3.adb (Set_Derived_Name): Construct a direct attribute name for
an inherited subprogram whose parent subprogram has such a name, and
augment spec comment.
* sem_ch6.adb (Create_And_Append_Aspect): New procedure local to
procedure Analyze_Direct_Attribute_Definition, for creating implicit
aspects on a type for aspects associated with attribute subprograms.
(Analyze_Direct_Attribute_Definition): Add handling for the various
subprogram-valued aspects, including special handling for "'Class"
aspects. Add an error check to prevent library attribute subprograms,
plus validate that "'Class" can only be written for stream cases and
when the prefix type is tagged.
* sem_ch8.adb (Find_Direct_Name): Add missing init on Msg to avoid
invalid data usages.
* sem_ch10.adb (Analyze_Subprogram_Body_Stub): Add an error check to
disallow attribute subprograms with bodies given by body stubs.
* sem_ch13.ads (Analyze_One_Aspect): Procedure declaration moved here
from package body.
* sem_ch13.adb
(Analyze_One_Aspect): Procedure declaration moved to package spec.
Save and restore Expander_Active (in Aspect_Initialize handling).
(Analyze_Put_Image_TSS_Definition): In the abstract-subprogram case,
flag the error on the subprogram rather than the attribute name.
When the attribute name is not Comes_From_Source, flag a bad subprogram
itself rather than flagging the attribute name.
(Analyze_Stream_TSS_Definition): Ditto.
(Analyze_Attribute_Definition_Clause, case Default_Iterator): Move
error check about untagged to the end of the case alternative, and
remove error about nonfunctions (checking in Check_Iterator_Functions
is sufficient).
(Check_Aspect_At_Freeze_Point, case Default_Iterator): Add test of
Is_Direct_Attribute_Subp_Name as additional condition for calling
Check_Iterator_Functions.
(Report_Ineligible_Indexing_Function): Don't issue warnings in the case
of attribute subprograms (always give an error). Flag the error on the
subprogram rather than the type in the case of attribute subprograms.
(Check_Function_For_Indexing_Aspect): Force error messages in the case
of attribute subprograms, despite Has_Eligible_Func being True.
(Check_Iterator_Functions): Minor improvement to message requiring Expr
to denote a function.
(Validate_Literal_Aspect): Add test of whether the aspect denotes
an attribute subprogram, to avoid returning early due to the
"not Comes_From_Source" condition. Code cleanup to traverse formals
rather than Parameter_Specifications. Flag the subprogram rather than
the aspect when found function is an attribute subprogram.
* sem_util.ads (Is_Direct_Attribute_Subp_Name): New function.
* sem_util.adb (Direct_Attribute_Definition_Name): Remove 'D' prefix
and "_Attr" suffix, plus adjust suffix to start with "'" rather than
"_". Handle class-wide stream attribute names, and remove error about
unsupported stream attributes. Add error check to reject child units.
(Corresponding_Op_Of_Derived_Type): Account for differences between
names of parent and descendant subprograms when they have direct
attribute names.
(Direct_Attribute_Names_Correspond): New function.
(Inherit_Nonoverridable_Aspect): Construct a new name denoted by an
inherited aspect when the parent aspect has a direct attribute name.
(Is_Direct_Attribute_Subp_Name): New function.
(Primitive_Names_Match): Add testing for direct attribute subprograms
to condition of return statement.
* snames.ads-tmpl: Move indexing and Default_Iterator aspect names
earlier in name ordering and move literal aspect names later (these
are all now considered to be recognized as attribute names).
(type Attribute_Id): Move indexing attribute names earlier in attribute
ordering (those no longer considered to be "internal" attribute names).
(subtype Internal_Attribute_Id): Adjust subtype bounds.
* snames.adb-tmpl (Get_Attribute_Id): Remove alternatives for
indexing and Default_Iterator names, as these now belong to the
"normal" attribute range.
(Is_Direct_Attribute_Definition_Name): Return True for indexing aspect
names, literal aspect names, stream attribute names, and Put_Image
and Default_Iterator aspect names.
* gnat_rm.texi: Regenerate.

5 weeks agoada: Fix internal error on type derived from untagged controlled private type
Eric Botcazou [Tue, 16 Jun 2026 06:59:59 +0000 (08:59 +0200)] 
ada: Fix internal error on type derived from untagged controlled private type

The problem stems from an internal confusion as to whether such a type has
a dispatch table.  The answer is no and the fix is to additionally prevent
the associated class-wide type from being built.

gcc/ada/ChangeLog:

* exp_ch3.adb (Expand_Freeze_Record_Type): Minor cleanup.
* sem_ch3.adb (Build_Derived_Private_Type.Copy_And_Build): Set the
Is_Implicit_Full_View flag early in the case of a record type.
(Build_Derived_Record_Type): Do not build the class-wide type for
an implicit full view.

5 weeks agoada: Implement __gnat_get_executable_load_address for Android
Olivier Hainque [Sat, 13 Jun 2026 16:56:59 +0000 (16:56 +0000)] 
ada: Implement __gnat_get_executable_load_address for Android

Even though Android is a variant of Linux, it doesn't expose
a _r_debug struct so handily as with GLIBC.  Program headers
from dl_iterate_phdr show name/addr sequences of pairs such as

   dpli_name                                       dpli_addr
   /system/bin/linker64                            0x720f3d3000
   /data/data/com.arachnoid.sshelper/home/testone  0x64f217f000 (exe)
   [vdso]                                          0x720f3d2000
   /apex/com.android.runtime/lib64/bionic/libc.so  0x720de25000
   /apex/com.android.runtime/lib64/bionic/libdl.so 0x720ddd6000
   /system/lib64/libnetd_client.so                 0x720dc83000
   /system/lib64/libc++.so                         0x720d30b000
   /apex/com.android.runtime/lib64/bionic/libm.so  0x720dcc3000

The name is not empty for the executable and there's no documentation
saying it would always come second or so, so this provides no obvious
reliable means to discriminate the exe load address.

As a variant of linux, the default link policy for Android authorizes
undefined refs when creating shared libs, with resolution deferred at least
until the lib is loaded. "main" will have to be available then, so resort
to dladdr(&main) to figure out the main module load address from here.

gcc/ada/ChangeLog:

* adaint.c (__gnat_get_executable_load_address): Provide
an implementation based on dladdr(&main) and use it for Android.

5 weeks agoada: Accept Modifies contract as a pragma
Piotr Trojanek [Fri, 5 Jun 2026 13:53:31 +0000 (15:53 +0200)] 
ada: Accept Modifies contract as a pragma

Typically, the recently added Modifies contract for SPARK will appear as an
aspect, but we also allow it to appear as a pragma, just like we do for Global,
Depends and other SPARK contracts.

gcc/ada/ChangeLog:

* par-ch13.adb (P_Modifies_Specification): Now public, so it can be
reused when parsing a pragma.
* par-ch2.adb (P_Pragma): Parse pragma Modifies with a custom syntax.
* par-prag.adb (Prag): A ??? comment is now implemented.
* par.adb (P_Modifies_Specification): Now public, so it can be reused.

5 weeks agoada: Add missing interrupt state guards in __gnat_install_handler for Android
Olivier Hainque [Sun, 14 Jun 2026 08:18:35 +0000 (08:18 +0000)] 
ada: Add missing interrupt state guards in __gnat_install_handler for Android

For non tasking programs, the Android ports currently fail to account
for pragma Interrupt_State on various signals.

gcc/ada/ChangeLog:

* init.c (__gnat_install_handler, __ANDROID__): Guard calls
to sigaction with a test for a possible 's' (System) interrupt
state.

5 weeks agoada: Enable debug hook when changing node kind
Piotr Trojanek [Thu, 4 Jun 2026 19:51:54 +0000 (21:51 +0200)] 
ada: Enable debug hook when changing node kind

The debug hook "nnd" is triggered by Mutate_Nkind and now is similarly
triggered by Change_Node, which implements a special-case of node kind
mutation.

gcc/ada/ChangeLog:

* atree.adb (Change_Node): Enable "nnd" debug hook.

5 weeks agoada: Fix whitespace in preanalysis routine
Piotr Trojanek [Thu, 4 Jun 2026 19:50:59 +0000 (21:50 +0200)] 
ada: Fix whitespace in preanalysis routine

Code style cleanup.

gcc/ada/ChangeLog:

* sem_ch3.adb (Preanalyze_And_Resolve_Assert_Expression): Fix style.

5 weeks agoada: Fix spurious conflict introduced by Ada 2022 declare expression
Eric Botcazou [Wed, 10 Jun 2026 17:40:37 +0000 (19:40 +0200)] 
ada: Fix spurious conflict introduced by Ada 2022 declare expression

This streamlines the resolution of declare expressions in Ada 2022, which
started as a manual name resolution to avoid scope management issues, then
added local visibility support, and eventually added scope management with
a kludge for transient scopes.

Transient scopes are not really scopes but placeholders and, therefore, may
traverse regular scopes when the node they service is higher up.  This also
has uncovered a loophole in Find_Type_Of_Object in the preanalysis case.

gcc/ada/ChangeLog:

* sem_ch3.adb (Find_Type_Of_Object): In the subtype indication case
for a stand-alone object, invoke Process_Subtype during preanalysis
instead of partially reimplementing it.
* sem_ch5.ads (Has_Sec_Stack_Call): Move back declaration to...
* sem_ch5.adb (Has_Sec_Stack_Call): ...here.
* sem_ch4.adb (Analyze_Expression_With_Actions): Deal with transient
scopes created during analysis.
* sem_res.adb: Add clauses for Sem_Ch9 package.
(Resolve_Declare_Expression): Streamline and deal with transient
scopes created during resolution.

5 weeks agoi386: Fix up *add<mode>_1<nf_name> [PR125469]
Jakub Jelinek [Mon, 29 Jun 2026 11:06:06 +0000 (13:06 +0200)] 
i386: Fix up *add<mode>_1<nf_name> [PR125469]

I've debugged this now on the 16 branch where my patch is not present.
The
(define_split
  [(set (match_operand:SWI 0 "register_operand")
        (plus:SWI (match_operand:SWI 1 "register_operand")
                  (match_operand:SWI 2 "<nonmemory_operand>")))]
  "TARGET_APX_NF && reload_completed
   && ix86_lea_for_add_ok (insn, operands)"
  [(set (match_dup 0)
        (plus:<LEAMODE> (match_dup 1) (match_dup 2)))]
{
  if (<MODE>mode != <LEAMODE>mode)
    {
      operands[0] = gen_lowpart (<LEAMODE>mode, operands[0]);
      operands[1] = gen_lowpart (<LEAMODE>mode, operands[1]);
      operands[2] = gen_lowpart (<LEAMODE>mode, operands[2]);
    }
})
splitter there is matched, including ix86_lea_for_add_ok on
(insn 12 10 13 2 (set (reg:DI 2 cx [108])
        (plus:DI (reg:DI 0 ax [orig:104 s ] [104])
            (reg:DI 5 di [ _2+8 ]))) "apx-nf-pr125469.c":10:5 288 {*adddi_1_nf}
     (nil))
But then goes into:
 rtx_insn *
 gen_split_138 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
 {
   if (dump_file)
     fprintf (dump_file, "Splitting with gen_split_138 (i386.md:7136)\n");
   start_sequence ();
 #define FAIL return (end_sequence (), nullptr)
 #define DONE return end_sequence ()
 #line 7144 "../../gcc/config/i386/i386.md"
 {
   if (DImode != DImode)
     {
       operands[0] = gen_lowpart (DImode, operands[0]);
       operands[1] = gen_lowpart (DImode, operands[1]);
       operands[2] = gen_lowpart (DImode, operands[2]);
     }
 }
 #undef DONE
 #undef FAIL
   static const uint8_t expand_encoding[] = {
      0x01, 0x1f, 0x01, 0x00, 0x3b, 0x12, 0x01, 0x01,
      0x01, 0x02
   };
   return complete_seq (expand_encoding, operands);
 }
That returns
(insn 37 0 0 (set (reg:DI 2 cx [108])
        (plus:DI (reg:DI 0 ax [orig:104 s ] [104])
            (reg:DI 5 di [ _2+8 ]))) -1
     (nil))
But then in try_split we have:
   /* Avoid infinite loop if any insn of the result matches
      the original pattern.  */
   insn_last = seq;
   while (1)
     {
       if (INSN_P (insn_last)
           && rtx_equal_p (PATTERN (insn_last), pat))
         return trial;
which is a must, otherwise we'd try to split the newly created insn again
and again succeed in splitting it and so forth forever.

So, this patch instead sets INSN_CODE to -1 in the splitter to indicate
that it needs to be re-recognized.

2026-06-29  Jakub Jelinek  <jakub@redhat.com>

PR target/125469
* config/i386/i386.md (*add<mode>_1<nf_name>): Revert 2026-05-28
changes.
(define_split from *add<mode>_1_nf to *lea<mode>): Set INSN_CODE
to -1 if <LEAMODE> and <MODE> are the same.

Reviewed-by: Uros Bizjak <ubizjak@gmail.com>
5 weeks agoLRA: reload non-representable subregs of hard registers through memory [PR105116]
Kyrylo Tkachov [Wed, 17 Jun 2026 14:25:31 +0000 (07:25 -0700)] 
LRA: reload non-representable subregs of hard registers through memory [PR105116]

PR target/105116 is an aarch64 ICE in lra_split_hard_reg_for ("unable to
find a register to spill").  A wide vector value (OImode, a pair of Q
registers) is pinned to FP registers via asm register variables and an
operation with no Advanced SIMD form (an integer vector divide or modulo) is
scalarised by vector lowering.  The scalar pieces read non-lowpart scalar
subregs of the OImode register, e.g. (subreg:DI (reg:OI v2) 8), the high 64
bits of the first Q register.

Such a subreg is not representable as a hard register (subreg_get_info
returns representable_p == false), but the hard-register branch of
simplify_operand_subreg only called alter_subreg, which resolves it to the
wrong part of the register.  For GENERAL_REGS uses, curr_insn_transform then
tried to reload the whole OImode inner register into GENERAL_REGS, which is
impossible (aarch64_hard_regno_mode_ok is false for OImode in GENERAL_REGS)
and gave the ICE; for FP-context uses the bad subreg survived to final and
silently read the wrong bytes (a latent wrong-code bug).

Handle this in simplify_operand_subreg: when a narrowing subreg of a hard
register is not representable, reload the inner register through memory
(NO_REGS) so that the correct bytes are accessed, mirroring the existing
handling for pseudos.  The frame, arg and stack pointers are left alone, as
simplify_subreg_regno can reject them merely because reload is not finished.
This only affects the already non-representable case; representable subregs
are unchanged.

Bootstrapped and tested on aarch64-none-linux-gnu and x86_64-linux.

Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
gcc/ChangeLog:

PR target/105116
* lra-constraints.cc (simplify_operand_subreg): Reload a
non-representable narrowing subreg of a hard register through
memory instead of resolving it lossily.

gcc/testsuite/ChangeLog:

PR target/105116
* gcc.target/aarch64/sve/pr105116.c: New test.
* gcc.target/aarch64/sve/pr105116-run.c: New test.

5 weeks agomatch: X % Y < Y -> Y >= 0 and X % Y >= Y -> Y < 0 [PR125737]
Kael Andrew Alonzo Franco [Tue, 23 Jun 2026 18:34:29 +0000 (14:34 -0400)] 
match: X % Y < Y -> Y >= 0 and X % Y >= Y -> Y < 0 [PR125737]

We had a pattern for `X % Y < Y` when X and Y where non-negative but
this can be generalized for all values. And also we can handle `>=` too.

Bootstrapped and tested on x86_64-pc-linux-gnu

PR tree-optimization/125737

gcc:
* match.pd: Optimize X % Y < Y -> Y >= 0 and X % Y >= Y -> Y < 0

gcc/testsuite:
* gcc.dg/pr125737.c: Move test to pr125737-1.c.
* gcc.dg/pr125737-1.c: Add test for (a % b) >= b when a and b are nonnegative.
* gcc.dg/pr125737-2.c: New test for (a % b) {<,>=} b.

Signed-off-by: Kael Franco <kaelfandrew@gmail.com>
5 weeks agox86-64: Don't use overlapping unaligned moves to move 1 byte
H.J. Lu [Wed, 24 Jun 2026 10:48:42 +0000 (18:48 +0800)] 
x86-64: Don't use overlapping unaligned moves to move 1 byte

commit b41f96465190751561f6909e858604ceab00595b
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Mon Oct 20 16:14:34 2025 +0800

x86-64: Inline memmove with overlapping unaligned loads and stores.

inlines memmove with overlapping unaligned and stores.  For

void
foo (char *dest, char *src, size_t len)
{
  if (len <= 1)
    __builtin_memmove (dest, src, len);
}

it uses overlapping unaligned and stores to move 1 byte:

cmpl $1, %edx
jb .L1
movl %edx, %edx
movzbl (%rsi), %ecx
movzbl -1(%rsi,%rdx), %eax
movb %cl, (%rdi)
movb %al, -1(%rdi,%rdx)
ret

Don't call ix86_expand_n_overlapping_move_movmem when max size == 1 to
generate:

cmpl $1, %edx
jb .L1
movzbl (%rsi), %eax
movb %al, (%rdi)
ret

gcc/

PR target/125968
* config/i386/i386-expand.cc (ix86_expand_movmem): Don't call
ix86_expand_n_overlapping_move_movmem when max size == 1.

gcc/testsuite/

PR target/125968
* gcc.target/i386/builtin-memmove-16.c: New test.
* gcc.target/i386/builtin-memmove-17.c: Likewise.
* gcc.target/i386/builtin-memmove-18a.c: Likewise.
* gcc.target/i386/builtin-memmove-18b.c: Likewise.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
5 weeks agomatch.pd: Simplify (signed)A >= 0 & (A & INT_MAX) != 0 to (signed)A > 0 [PR112390]
Naveen [Mon, 29 Jun 2026 03:36:13 +0000 (20:36 -0700)] 
match.pd: Simplify (signed)A >= 0 & (A & INT_MAX) != 0 to (signed)A > 0 [PR112390]

The patch adds simplifications for the pattern where a sign-bit check and a
lower-bits check are combined with a bitwise or logical AND/OR:

  (1) ((signed)A >= 0) &/&& ((A & INT_MAX) != 0)  -->  (signed)A > 0
  (2) ((signed)A <  0) |/|| ((A & INT_MAX) == 0)  -->  (signed)A <= 0

Both patterns arise naturally from code that separately tests the sign
bit and the magnitude of an unsigned integer.  The combined expression
is equivalent to a single signed comparison, and the simplification
eliminates the intermediate BIT_AND_EXPR mask as well as the weaker
comparison operator.

gcc/ChangeLog:
PR tree-optimization/112390
* match.pd: Add simplifications for combined sign-bit and
magnitude checks:
((signed)A >= 0) &/&& ((A & INT_MAX) != 0) -> (signed)A > 0
((signed)A <  0) |/|| ((A & INT_MAX) == 0) -> (signed)A <= 0

gcc/testsuite/ChangeLog:
PR tree-optimization/112390
* gcc.dg/pr112390.c: New test.
* gcc.dg/pr112390_bitint.c: New test.

Signed-off-by: Naveen <naveen.siddegowda@oss.qualcomm.com>
5 weeks agoi386: Allow immediate cmov arm in *cmov_bt<mode> [PR125907]
liuhongt [Mon, 22 Jun 2026 06:29:49 +0000 (23:29 -0700)] 
i386: Allow immediate cmov arm in *cmov_bt<mode> [PR125907]

The "bt followed by cmov" splitter only matched when both cmov arms
were nonimmediate_operand, so "(a & (1 << b)) ? c : imm" could not be
folded into bt + cmov and instead emitted a sal/shr + and + cmov
sequence.

Keep the existing define_split for the two-register case unchanged, and
add a separate define_insn_and_split for the immediate false-arm case.
The immediate arm must be materialized into a register, and that extra
move cannot be expressed in a combine define_split (which is limited to
two insns), so the new pattern is a define_insn_and_split that combine
recognizes as a single insn.  Because it is a real insn whose split sets
the flags register, it carries a (clobber (reg:CC FLAGS_REG)), matching
the sibling bt helpers.

gcc/ChangeLog:

PR target/125907
* config/i386/i386.md (*cmov_bt<SWI248:mode>): New
define_insn_and_split handling a const_int false arm, forced into
a register by the splitter.  Leave the existing define_split for
the nonimmediate case unchanged.

gcc/testsuite/ChangeLog:

PR target/125907
* gcc.target/i386/bt-cmov-1.c: New test.

5 weeks agoLoongArch: add usdot_prod pattern [PR 125474]
Xi Ruoyao [Sun, 24 May 2026 11:23:22 +0000 (19:23 +0800)] 
LoongArch: add usdot_prod pattern [PR 125474]

A hot loop in SPEC 2026 stockfish_r calculates the dot product of a
sign-extended vector and a zero-extended vector.  Add the corresponding
usdot_prod pattern to use the instructions with such a semantic, for
example xvmulwev.h.bu.b, to optimize the loop.

PR target/125474

gcc/

* config/loongarch/simd.md (usdot_prod<wvec_half><mode>): New
define_expand.
(usdot_prod<wvec_quarter><mode>): New define_expand.

gcc/testsuite/

* gcc.target/loongarch/vector/lasx/dot-prod-mixed-signedness.c:
New test.

5 weeks agoRISC-V: Add testcase for unsigned scalar SAT_MUL form 15
Pan Li [Tue, 23 Jun 2026 13:21:59 +0000 (21:21 +0800)] 
RISC-V: Add testcase for unsigned scalar SAT_MUL form 15

The form 15 of unsigned scalar SAT_MUL has supported from
the previous change.  Thus, add the test cases to make sure
it works well.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_mul-16-u16-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-16-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-16-u16-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-16-u16-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-16-u32-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-16-u32-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-16-u32-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-16-u64-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-16-u8-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-16-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-16-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-16-u8-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-16-u8-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-16-u16-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-16-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-16-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-16-u32-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-16-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-16-u64-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-16-u8-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-16-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-16-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-16-u8-from-u64.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
5 weeks agoRISC-V: Add testcase for unsigned scalar SAT_MUL form 14
Pan Li [Tue, 23 Jun 2026 13:11:10 +0000 (21:11 +0800)] 
RISC-V: Add testcase for unsigned scalar SAT_MUL form 14

The form 14 of unsigned scalar SAT_MUL has supported from
the previous change.  Thus, add the test cases to make sure
it works well

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_mul-15-u16-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-15-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-15-u16-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-15-u16-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-15-u32-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-15-u32-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-15-u32-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-15-u64-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-15-u8-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-15-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-15-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-15-u8-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-15-u8-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-15-u16-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-15-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-15-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-15-u32-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-15-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-15-u64-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-15-u8-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-15-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-15-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-15-u8-from-u64.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
5 weeks agoMatch: Support unsigned scalar SAT_MUL form 14
Pan Li [Tue, 23 Jun 2026 13:04:44 +0000 (21:04 +0800)] 
Match: Support unsigned scalar SAT_MUL form 14

This patch would like to try to match the the unsigned
SAT_MUL form 14, aka below

  #define DEF_SAT_U_MUL_FMT_14(NT, WT)             \
  NT __attribute__((noinline))                     \
  sat_u_mul_##NT##_from_##WT##_fmt_14 (NT a, NT b) \
  {                                                \
    WT x = (WT)a * (WT)b;                          \
    NT hi = x >> (sizeof(NT) * 8);                 \
    NT lo = (NT)x;                                 \
    return hi == 0 ? lo : -1;                      \
  }

while WT is uint128_t, uint64_t, uint32_t and uint16_t, and
NT is uint64_t, uint32_t, uint16_t or uint8_t.

gcc/ChangeLog:

* match-sat-alu.pd: Add pattern for unsigned scalar
SAT_MUL form 14.

Signed-off-by: Pan Li <pan2.li@intel.com>
5 weeks agoconfigury: replace autoconf obsolete macros [PR103459]
Pietro Monteiro [Mon, 29 Jun 2026 01:09:16 +0000 (21:09 -0400)] 
configury: replace autoconf obsolete macros [PR103459]

Autoreconf -Wall complains about obsolete macros, so replace them according to
the autoconf documentation[0].

This patch doesn't fully fix all warnings because I focused on doing simple
fixes and keeping the changes to the generated files to a minimum.

[0]: https://www.gnu.org/software/autoconf/manual/autoconf-2.69/html_node/Obsolete-Macros.html

PR bootstrap/103459

ChangeLog:

* configure: Regenerate.
* configure.ac: Replace AC_TRY_COMPILE with AC_COMPILE_IFELSE.
Replace AC_TRY_LINK with AC_LINK_IFELSE.

c++tools/ChangeLog:

* configure: Regenerate.
* configure.ac: Replace AC_CANONICAL_SYSTEM with AC_CANONICAL_TARGET.

config/ChangeLog:

* acx.m4: Remove uses of AC_CHECK_TOOL_PREFIX.  Replace AC_TRY_COMPILE
with AC_COMPILE_IFELSE.
* asmcfi.m4: Replace AC_TRY_COMPILE with AC_COMPILE_IFELSE.
* bitfields.m4: Likewise.
* cet.m4: Replace AC_TRY_LINK with AC_LINK_IFELSE.  Replace AC_TRY_RUN
with AC_RUN_IFELSE.
* codeset.m4: Replace AC_TRY_LINK with AC_LINK_IFELSE.
* enable.m4: Replace AC_HELP_STRING with AS_HELP_STRING.
* gcc-plugin.m4: Replace AC_TRY_LINK with AC_LINK_IFELSE.
* hwcaps.m4: Replace AC_TRY_COMPILE with AC_COMPILE_IFELSE.  Replace
AC_TRY_LINK with AC_LINK_IFELSE.
* isl.m4: Replace AC_TRY_LINK with AC_LINK_IFELSE.
* lcmessage.m4: Replace AC_TRY_LINK with AC_LINK_IFELSE.
* no-executables.m4: Replace AC_TRY_COMPILE with AC_COMPILE_IFELSE.
Replace AC_TRY_LINK with AC_LINK_IFELSE.
* po.m4: Replace AC_OUTPUT_COMMANDS with AC_CONFIG_COMMANDS.
* tls.m4: Add explicit 4th argument to AC_LINK_IFELSE.

fixincludes/ChangeLog:

* configure: Regenerate.
* configure.ac: Replace AC_CANONICAL_SYSTEM with AC_CANONICAL_TARGET.

gcc/ChangeLog:

* acinclude.m4: Replace AC_FOREACH with m4_foreach_w.  Replace
AC_TRY_LINK with AC_LINK_IFELSE.
* configure: Regenerate.
* configure.ac: Replace AC_HELP_STRING with AS_HELP_STRING.  Replace
AC_PROG_LIBTOOL with LT_INIT.

gnattools/ChangeLog:

* configure: Regenerate.
* configure.ac: Replace AC_HELP_STRING with AS_HELP_STRING.

gotools/ChangeLog:

* configure: Regenerate.
* configure.ac: Replace AC_CANONICAL_SYSTEM with AC_CANONICAL_TARGET.

libada/ChangeLog:

* configure.ac: Replace AC_HELP_STRING with AS_HELP_STRING.

libatomic/ChangeLog:

* acinclude.m4: Replace AC_ERROR with AS_MSG_ERROR.  Replace AC_TRY_LINK
with AC_LINK_IFELSE.  Replace AC_TRY_COMPILE with AC_COMPILE_IFELSE.
Replace AC_HELP_STRING with AS_HELP_STRING.  Replace
AC_TRY_RUN with AC_RUN_IFELSE.
* configure.ac: Replace AM_PROG_LIBTOOL with LT_INIT.  Replace
AC_STDC_HEADERS with AC_HEADER_STDC.

libbacktrace/ChangeLog:

* configure: Regenerate.
* configure.ac: Remove redundant AM_PROG_LIBTOOL.

libcc1/ChangeLog:

* configure: Regenerate.
* configure.ac: Replace AC_CANONICAL_SYSTEM with AC_CANONICAL_TARGET.
Remove redundant AM_PROG_LIBTOOL.

libcpp/ChangeLog:

* configure: Regenerate.
* configure.ac: Replace AC_CANONICAL_SYSTEM with AC_CANONICAL_TARGET.
Replace AC_TRY_COMPILE with AC_COMPILE_IFELSE.

libgcc/ChangeLog:

* configure: Regenerate.
* configure.ac: Replace AC_HELP_STRING with AS_HELP_STRING.  Replace
AC_TRY_COMPILE with AC_COMPILE_IFELSE.

libgcobol/ChangeLog:

* configure: Regenerate.
* configure.ac: Remove redundant AM_PROG_LIBTOOL.

libgfortran/ChangeLog:

* acinclude.m4: Replace AC_TRY_COMPILE with AC_COMPILE_IFELSE.
* configure.ac: Replace AC_LANG_C with AC_LANG([C]).  Replace
AM_PROG_LIBTOOL with LT_INIT.

libgm2/ChangeLog:

* acinclude.m4: Replace AC_HELP_STRING with AS_HELP_STRING.  Replace
AC_LANG_SAVE AC_LANG_CPLUSPLUS (...) AC_LANG_RESTORE with
AC_LANG_PUSH([C++]) (...) AC_LANG_POP([C++]).  Replace AC_TRY_LINK with
AC_LINK_IFELSE.  Replace AC_TRY_COMPILE with AC_COMPILE_IFELSE.
* configure: Regenerate.
* configure.ac: Replace AC_HELP_STRING AS_HELP_STRING.  Remove redundant
AM_PROG_LIBTOOL.  Replace AC_LANG_C with AC_LANG([C]).  Replace
AC_FOREACH with m4_foreach_w.

libgomp/ChangeLog:

* acinclude.m4: Replace AC_TRY_LINK with AC_LINK_IFELSE.  Replace
AC_TRY_COMPILE with AC_COMPILE_IFELSE.  Replace AC_HELP_STRING with
AS_HELP_STRING.  Replace AC_TRY_RUN with AC_RUN_IFELSE.
* configure: Regenerate.
* configure.ac: Replace AM_PROG_LIBTOOL with LT_INIT.  Replace
AC_STDC_HEADERS with AC_HEADER_STDC.  Replace _AC_COMPUTE_INT with
AC_COMPUTE_INT.

libgrust/ChangeLog:

* configure.ac: Replace AC_FOREACH with m4_foreach_w.

libiberty/ChangeLog:

* acinclude.m4: Replace AC_TRY_RUN with AC_RUN_IFELSE.  Replace
AC_TRY_COMPILE with AC_COMPILE_IFELSE.
* configure.ac: Replace AC_TRY_COMPILE with AC_COMPILE_IFELSE.  Replace
AC_ISC_POSIX with AC_SEARCH_LIBS([strerror],[cposix]).

libitm/ChangeLog:

* acinclude.m4: Replace AC_TRY_LINK with AC_LINK_IFELSE.  Replace
AC_TRY_COMPILE with AC_COMPILE_IFELSE.  Replace AC_HELP_STRING with
AS_HELP_STRING.  Replace AC_TRY_RUN with AC_RUN_IFELSE.
* configure.ac: Replace AM_PROG_LIBTOOL with LT_INIT.  Replace
AC_STDC_HEADERS with AC_HEADER_STDC.

libobjc/ChangeLog:

* configure: Regenerate.
* configure.ac: Replace AC_CANONICAL_SYSTEM with AC_CANONICAL_TARGET.
Replace AM_PROG_LIBTOOL with LT_INIT. Remove unnecessary escape in
double quoted string.

libphobos/ChangeLog:

* configure: Regenerate.
* configure.ac: Replace AC_CANONICAL_SYSTEM with AC_CANONICAL_TARGET.
Remove redundant AM_PROG_LIBTOOL.  Replace AC_FOREACH with m4_foreach_w.
* m4/druntime.m4: Replace AC_HELP_STRING AS_HELP_STRING.  Replace
AC_TRY_COMPILE with AC_COMPILE_IFELSE.
* m4/druntime/cpu.m4: Replace AC_TRY_LINK with AC_LINK_IFELSE.
* m4/druntime/os.m4: Replace AC_TRY_COMPILE with AC_COMPILE_IFELSE.

libquadmath/ChangeLog:

* configure.ac: Replace AM_PROG_LIBTOOL with LT_INIT.  Replace
AC_LANG_C with AC_LANG([C]).  Replace AC_TRY_COMPILE with
AC_COMPILE_IFELSE.  Replace AC_TRY_LINK with AC_LINK_IFELSE.

libsanitizer/ChangeLog:

* configure.ac: Replace AM_PROG_LIBTOOL with LT_INIT.  Replace
AC_TRY_COMPILE with AC_COMPILE_IFELSE.  Replace AC_FOREACH with
m4_foreach_w.

libssp/ChangeLog:

* configure.ac: Replace AC_LANG_C with AC_LANG([C]).  Replace
AC_TRY_COMPILE with AC_COMPILE_IFELSE.  Replace AC_TRY_LINK with
AC_LINK_IFELSE.  Replace AM_PROG_LIBTOOL with LT_INIT.

libvtv/ChangeLog:

* configure.ac: Replace AC_GNU_SOURCE with AC_USE_SYSTEM_EXTENSIONS.
Replace AM_PROG_LIBTOOL with LT_INIT.  Replace AC_FOREACH with
m4_foreach_w.

lto-plugin/ChangeLog:

* configure: Regenerate.
* configure.ac: Replace AC_CANONICAL_SYSTEM with AC_CANONICAL_TARGET.
Replace AC_TRY_LINK with AC_LINK_IFELSE. Replace AM_PROG_LIBTOOL with
LT_INIT.

5 weeks agoDaily bump.
GCC Administrator [Mon, 29 Jun 2026 00:16:29 +0000 (00:16 +0000)] 
Daily bump.