libstdc++: Update AC_HELP_STRING to AS_HELP_STRING [PR103459]

AC_HELP_STRING has been deprecated by Autoconf.  Update to
AS_HELP_STRING.  No changes to generated files.

PR bootstrap/103459

libstdc++-v3/ChangeLog:

* acinclude.m4 (GLIBCXX_EXPORT_INSTALL_INFO): Update
AC_HELP_STRING to AS_HELP_STRING.
(GLIBCXX_ENABLE): Likewise.
(GLIBCXX_ENABLE_CLOCALE): Likewise.
(GLIBCXX_ENABLE_HOSTED): Likewise.
(GLIBCXX_ENABLE_VERBOSE): Likewise.
(GLIBCXX_ENABLE_LOCK_POLICY): Likewise.
(GLIBCXX_EMERGENCY_EH_ALLOC): Likewise.
(GLIBCXX_ZONEINFO_DIR): Likewise.

Signed-off-by: Pietro Monteiro <pietro@sociotechnical.xyz>

libstdc++: Workaround legacy iconv signature [PR125956]

The signature of iconv in SUSv2 and legacy systems used const char** for
the second parameter. We already have a workaround for this in the
<ext/codecvt_specializations.h> header, but were not handling this when
using iconv in src/c++20/format.cc.

Define a concept to check that we can call iconv with a char** and then
use that to decide which type we cast the input pointer to.

libstdc++-v3/ChangeLog:

PR libstdc++/125956
* src/c++20/format.cc [_GLIBCXX_HAVE_ICONV] (iconv_input): New
concept.
(__encoding::conv) [_GLIBCXX_HAVE_ICONV]: Use iconv_input to
decide which type to cast the input pointer to.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>

tail-merge: Combine conditions of merged blocks for ccmp [PR102793]

After tail merging combines duplicate blocks, their predecessors
branch to the same successor.  Combine the sequential conditions
leading to the merged block using the ifcombine infrastructure; on
targets with conditional compares this lets the backend emit ccmp.
Whether combining is profitable is left to ifcombine's own cost model.

The candidate selection identifies predecessor blocks of the merged
block that have conditional branches, excluding the immediate
dominator.  After the tail-merge loop completes, dominance info is
(re)computed, SSA names that may be undefined are marked, and
tree_ssa_ifcombine_bb is called for each candidate.

Combining the scalar conditions that guard a loop would turn the
loop's analyzable entry test into a boolean one, defeating the
number-of-iterations analysis (and thus passes such as ivopts); extend
ifcombine's existing niter-safety check to leave loop guards alone
too.

gcc/ChangeLog:

PR tree-optimization/102793

* tree-ssa-ifcombine.cc (bb_guards_loop_p): New function.
(ifcombine_ifandif): Use it to avoid combining the conditions
guarding a loop.
* tree-ssa-tail-merge.cc: Include tree-ssa-ifcombine.h and
tree-ssa.h.
(ifcombine_candidate_bbs): New static bitmap.
(apply_clusters): Collect the merged block's predecessors as
ifcombine candidates.
(tail_merge_optimize): Run tree_ssa_ifcombine_bb on the candidates;
return TODO_cleanup_cfg when it changed the CFG.

gcc/testsuite/ChangeLog:

PR tree-optimization/102793

* g++.dg/tree-ssa/pr117123.C: --param logical-op-non-short-circuit=0.
* gcc.dg/tree-ssa/pr102793-1.c: New test.
* gcc.dg/tree-ssa/pr102793-2.c: New test.
* gcc.dg/uninit-pred-13.c: New test.

uninit: Relax PHI def predicate by maybe-undef edge conditions

When ifcombine has combined the conditions guarding a definition, the
guard that distinguishes the defined value from the undefined one can
end up on the maybe-undef incoming edge of the merge PHI rather than
on the use's control-dependence chain.  The definition-predicate
superset test in uninit_analysis::is_use_guarded then fails on that
conjunct and a bogus -Wmaybe-uninitialized warning is emitted.

When the superset test fails, drop from a copy of the definition
predicate any conjunct implied by the incoming-edge condition of every
maybe-undef operand, and retry.  Such a conjunct cannot make the use
unsafe: when it is false the maybe-undef edge is not taken either, so
no undefined value reaches the PHI.  The edge condition is found by
walking up single-predecessor forwarder blocks to the controlling
conditional.

gcc/ChangeLog:

* gimple-predicate-analysis.cc (get_pred_info_from_cond_edge):
New function.
(predicate::init_from_control_deps): Use it.
(predicate::drop_conjuncts_implied_by): New method.
(uninit_analysis::is_use_guarded): Retry the superset test
after relaxing the definition predicate by the maybe-undef
edge conditions.
* gimple-predicate-analysis.h (class predicate): Declare
drop_conjuncts_implied_by.

ifcombine: Add tree-ssa-ifcombine.h and update function signatures

This patch adds the tree-ssa-ifcombine.h header file, with the function
declarations for `recognize_if_then_else` and `tree_ssa_ifcombine_bb` and
removes 'static' from the definitions in tree-ssa-ifcombine.cc, so that they
can be used in other passes.

gcc/ChangeLog:

* tree-ssa-ifcombine.cc: Include tree-ssa-ifcombine.h.
(recognize_if_then_else): Removed 'static'.
(tree_ssa_ifcombine_bb): Removed 'static'.
* tree-ssa-ifcombine.h: New file.

middle-end/125977 - disable RTL expansion ranger use at -O0

It wasn't the intention to enable it without optimizing, so disable it.

PR middle-end/125977
* cfgexpand.cc (pass_expand::execute): Guard ranger use
on optimize.

AArch64/SVE: Relax the expectations of the popcnt-sve test

When predicated tails are enabled for basic block SLP vectorization,
the assembly language generated by GCC when compiling popcnt-sve.c
will change. Relax the regular expressions used by this test in
preparation.

Currently, analysis of f_v8hi succeeds with vector mode V16QI and the
following GIMPLE is produced:

vector(8) short unsigned intD.19 vect__1.18D.4648;
...
vect__1.18_69 = MEM <vector(8) short unsigned intD.19>
  [(short unsigned intD.19 *)vectp.17_68 clique 1 base 1];
vect_patt_60.19_70 = .POPCOUNT (vect__1.18_69);

With predicated tails, analysis instead succeeds with a variable-length
vector mode and the following GIMPLE is produced:

vector([8,8]) short unsigned intD.19 vect__1.18D.4649;
...
slp_mask_45 = .WHILE_ULT (0, 8, { 0, ... }); # VUSE <.MEM_25(D)>
vect__1.18_46 = .MASK_LOAD (vectp.17_44, 16B, slp_mask_45, { 0, ... });
vect_patt_36.19_47 = .POPCOUNT (vect__1.18_46);

When lowered to RTL, the WHILE_ULT is replaced by
reinterpretation of a V16QI as VNx8HI:

(insn 7 4 8 2 (
  set (reg:V16QI 107) (mem:V16QI (reg/v/f:DI 103 [ b ]) [1 S16 A16])
) "gcc.target/aarch64/popcnt-sve.c":33:8 discrim 1 -1 (nil))

(insn 8 7 9 2 (
  set (reg:VNx8HI 106) (subreg:VNx8HI (reg:V16QI 107) 0))
  "gcc.target/aarch64/popcnt-sve.c":33:8 discrim 1 -1 (nil))

A mask is still required to lower POPCOUNT, so an all-ones mask
is synthesized:

(insn 9 8 10 2 (set (reg:VNx16BI 108)
  (const_vector:VNx16BI repeat [(const_int 1 [0x1])
  ])) "gcc.target/aarch64/popcnt-sve.c":69:8 discrim 1 -1
(nil))

(insn 10 9 11 2 (set (reg:VNx4SI 105)
  (unspec:VNx4SI [
    (subreg:VNx4BI (reg:VNx16BI 108) 0)
    (popcount:VNx4SI (reg:VNx4SI 106))
  ] UNSPEC_PRED_X))
  "gcc.target/aarch64/popcnt-sve.c":69:8 discrim 1 -1
(nil))

However, this mask is not the same as the specific-width mask
currently expected by the tests.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/popcnt-sve.c: Update test expectations
to allow both current and alternative valid mask
specifications.

libgomp.texi: Fix missing @end smallexample arguments

libgomp/ChangeLog:

* libgomp.texi (Implementing MASKED and MASTER construct): Fix
@end smallexample.
(Implementing FOR construct): Likewise.

aarch64: split r->w moves for partial AdvSIMD vectors [PR125716]

This is a fix for PR125716, where under specific circumstances we end
up emitting an insn like:

(insn 32 26 27 2 (set (reg:V2HI 63 v31 [orig:130 _13 ] [130])
        (reg:V2HI 0 x0 [orig:115 _13 ] [115])) "testcase.c":3:17 1392 {*aarch64_simd_movv2hi}
     (nil))

for which aarch64_simd_mov instruction variant taking sub-64-bit vector
operands there is no (w,r) alternative and things blow up later during
reload.

This is a problem specifically in the case of reg-reg transfers and only
when transfer cost between relevant register classes is 2, which, as I've
learned thanks to Andrea's writeup at [0] (and as is confirmed by e.g.
gcc/lra-constraints.cc:4245), is a magic value that tells LRA/reload to not
try different reloads which would have helped here.

The testcase added is a blend between those provided in PR125716 and in
PR125947.  As stable as affected tuning models may be, I've opted to
create a dedicated JSON file for this test to guarantee a GP2FP cost of 2.

Bootstrapped and regtested on aarch64-linux-gnu with and without
-mtune=octeontx81.

[0] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125947#c1

PR target/125716

gcc/ChangeLog:

* config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>): Add
(?w,r) alternative for VSUB64 types.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/aarch64-json-tunings/gp2fp-2.json: New JSON
tuning file.
* gcc.target/aarch64/simd/pr125716.c: New test.

libstdc++: Fix up bits/std.cc symlink installation

>       * src/c++23/Makefile.am (libstdc++.modules.json): Rewrite
>       without abspath make function.
>       (stamp-modules-bits): Likewise.
>       * src/c++23/Makefile.in: Rebuilt.

This change broke various module tests (and got backported even to 15 :( ).
I'm using objdir as a subdirectory of the gcc tree, so ../configure ...

> @@ -57,7 +57,9 @@ std.compat.cc: std.compat.cc.in std-clib.cc.in
>  # Also put the interface units in the build-includes bits directory.
>  stamp-modules-bits: $(includebits_DATA)
>       @-mkdir -p $(top_builddir)/include/bits
> -     -cd $(top_builddir)/include/bits && $(LN_S) $(abspath $?) . 2>/dev/null
> +     -for f in $(includebits_DATA); do \
> +       $(LN_S) $(abs_srcdir)/$$f $(top_builddir)/include/bits; \
> +     done 2>/dev/null
>       @$(STAMP) $@
>
>  all-local: stamp-module-manifest stamp-modules-bits

Before this change, the
/home/jakub/src/gcc/obj38/x86_64-pc-linux-gnu/libstdc++-v3/include/bits
std.cc symlink used to point to
/home/jakub/src/gcc/obj38/x86_64-pc-linux-gnu/libstdc++-v3/src/c++23/std.cc
Now it points to
/home/jakub/src/gcc/obj40/x86_64-pc-linux-g~-v3/../../../libstdc++-v3/src/c++23/std.cc
which doesn't exist, the source directory only has std.cc.in file from which
the std.cc file is generated in the build directory.

The following patch fixes it by using abs_builddir instead of abs_srcdir.

Fixes up
-FAIL: g++.dg/modules/compile-std1.C -std=c++29 (test for excess errors)
-FAIL: g++.dg/modules/compile-std1.C -std=c++29 module-cmi std (gcm.cache/std.gcm)
-FAIL: g++.dg/modules/compile-std1.C -std=c++29 module-cmi std.compat (gcm.cache/std.compat.gcm)
-FAIL: g++.dg/plugin/std-module-exports-c++20.C -fplugin=./std_module_exports_plugin.so (test for excess errors)
-FAIL: g++.dg/plugin/std-module-exports-c++23.C -fplugin=./std_module_exports_plugin.so (test for excess errors)
-FAIL: g++.dg/plugin/std-module-exports-c++26.C -fplugin=./std_module_exports_plugin.so (test for excess errors)

2026-06-25  Jakub Jelinek  <jakub@redhat.com>

* src/c++23/Makefile.am (stamp-modules-bits): Use abs_builddir instead
of abs_srcdir.
* src/c++23/Makefile.in: Regenerate.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>

libgomp.texi: Document new GOMP entry points for OMPT observability

libgomp/ChangeLog:

* libgomp.texi (Implementing MASKED and MASTER construct): Update
pseudocode; describe GOMP_has_masked_thread_num.
(Implementing ATOMIC construct): Fix stale function names; note
exclusivity to explicit atomic constructs.
(Implementing BARRIER construct): Document GOMP_barrier_ext and
GOMP_barrier_cancel_ext; describe the kind parameter.
(Implementing REDUCTION clause): Document GOMP_reduction_start and
GOMP_reduction_end.
(Implementing FOR construct): Document GOMP_loop_static_worksharing
and GOMP_distribute_static_worksharing.

Revert "MIPS: harden SSP set and test routines [PR 125077]"

This reverts commit a1fc8045881850df83c5143ea6d9311ce3a0c540.

It's not ready, I mistakenly issued "git push" in a wrong workspace :(.

mips: fix unintialized operand use in sync_{old,new}_<optab>_12 [PR 125628]

In GCC, if the RTL template of define_insn has multiple elements, it's
treated as a parallel expression.  And, "in parallel" means that first
all the values used in the invidiviual side-effects are computed, and
second all the actual side-effects are performed.  So when the value of
operand 1 (the output reg) is used, it's not set yet.

When optimization is enabled, the uninitialized value is replaced with 0
and then for e.g. if atomic_hiqi_op is plus, (plus (0) (val)) is folded
to simply (val).  Now the RTL template happens to be matched by
sync_old_nand_12 (of which the RTL is written in a really inconsistent
way), causing "0 + 1 = -1".

So fix the uninitialized operand use, i.e. (match_dup 0) should be
(match_dup 1).  Also slightly alter the source of the set for the memory
in sync_new_<optab>_12 to make it clear the value in the reg and in the
memory should be same after the operation.

gcc/

PR target/125628
* config/mips/sync.md (sync_old_<optab><mode>): Fix
uninitialized operand use.
(sync_new_<optab><mode>): Fix uninitialized operand use, use the
same expression for the set source of operand 0 and 1.

MIPS: harden SSP set and test routines [PR 125077]

Add the stack_protect_combined_{set,test} expanders to expand the
routines as unsplitable insns which does not leave any sensitive data
(the canary value, the canary address, and all the intermediate values
used materializing the address) in a register.  This prevents the
attacker from defeating SSP by probing the canary value from the
register context or overwriting the address spilled onto the stack.

PR target/125077

gcc/

* config/mips/predicates.md (ssp_gp_operand): New
define_predicate.
(ssp_operand): New define_predicate.
(ssp_normal_operand): New define_predicate.
* config/mips/constraints.md (ZA): New define_constraint.
(ZB): New define_constraint.
* config/mips/mips.md (UNSPEC_SSP): New unspec.
(UNSPEC_SSP_GP): New unspec.
(cbranch<mode>4): Add '@' to generate the helper function taking
mode as a parameter.
(@stack_protect_combined_set_normal_<mode>): New define_insn.
(stack_protect_combined_set_abs64): New define_insn.
(@stack_protect_combined_test_internal_<mode>): New define_insn.
(stack_protect_combined_set): New define_expand.
(stack_protect_combined_test): New define_expand.
* config/mips/mips-protos.h (mips_canary_expose_gp_use):
Declare.
(mips_output_asm_load_canary): Declare.
* config/mips/mips.cc (mips_small_data_pattern_1): Don't rewrite
GP-relative symbol wrapped in UNSPEC_SSP_GP.
(mips_canary_expose_gp_use): Implement.
(mips_output_asm_load_canary): Implement.
(mips_print_operand): Allow 'w' to print d/w for DImode/SImode.

libgomp: Sort 'GOMP_reduction_{start,end}' correctly in 'libgomp/libgomp_g.h'

Minor fix-up for commit d50e9f17fffa9b047dcf02eb9e1fe499178a0f02
"openmp: Add GOMP_reduction_start and GOMP_reduction_end", which did:

    [...]
     * atomic.c (GOMP_reduction_start): New function.
     (GOMP_reduction_end): New function.
    [...]

libgomp/
* libgomp_g.h (GOMP_reduction_start, GOMP_reduction_end): Sort
correctly.

testsuite: Fix up gomp/atomic-builtins-1.c test on !int128 targets

The test uses unconditionally __int128, which doesn't work on most of the
32-bit targets.

Fixed by adding int128 effective target requirement.

2026-06-25  Jakub Jelinek  <jakub@redhat.com>

* c-c++-common/gomp/atomic-builtins-1.c: Add int128 effective target.

Fixup default TARGET_SCHED_REASSOCIATION_WIDTH

I failed to update the default hook for the signature change.  Done
as follows, build tested on s390x-linux.

* target.def (reassociation_width): Use default_reassociation_width.
* targhooks.h (default_reassociation_width): Declare.
* targhooks.cc (default_reassociation_width): Define.

tree-optimization/125953 - ICE with vector pattern stmts range query

Vectorizer pattern recog eventually feeds range_of_expr with both
pattern def expressions and pattern context stmts.  While that's
IMO not OK the ranger code has some existing defenses against
defs that do not reside in the IL.  Just those are incomplete.

The following makes them more robust.  I will cleanup the vectorizer
side of things on trunk.

I have documented gimple_ranger::range_of_expr as to how I understand
it works (the different range_of_* APIs seem to behave slightly
different - I find this confusing).  Esp. range_of_expr requires
a valid 'r' input range and the return value isn't always reflecting
that something was done.

PR tree-optimization/125953
* gimple-range.cc (gimple_ranger::range_of_expr): Document.
Fall back to global ranges if 'stmt' is not in the IL.

* gcc.dg/torture/pr125953.c: New testcase.

Improve vect_recog_divmod_pattern use of ranger

As we now have a ranger active during vectorization there's no need
to create a new one.  And the stmt argument of range_of_expr is for
the context of the  range.  Passing the def stmt of expr is equal
to asking for global ranges only (passing NULL as stmt).

* tree-vect-patterns.cc (vect_recog_divmod_pattern): Pass
the division stmt as context for the range query on op0.
Use the active ranger.

testsuite: Fix gcc.target/i386/pr125958.c on 32-bit Solaris/x86

The new gcc.target/i386/pr125958.c test FAILs on 32-bit Solaris/x86:

FAIL: gcc.target/i386/pr125958.c check-function-bodies vcn_init_session_buf_fc

The test needs -mno-stackrealign, the Linux default.

Tested on i386-pc-solaris2.11 and x86_64-pc-linux-gnu, both 32 and 64-bit.

2026-06-25  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc/testsuite:
* gcc.target/i386/pr125958.c (dg-options): Add -mno-stackrealign.

Forward declare tree_code in coretypes.h

The following changes the reassociation_width target hook to take
a tree_code after recognizing the x86 hook compares against rtx_code PLUS.
Like rtx_code we can now forward declare tree_code to achieve that.

gcc/
* coretypes.h (enum tree_code): Declare.
* tree-core.h (enum tree_code): Adjust.
* target.def (reassociation_width): Get a tree_code instead
of unsigned int.
* doc/tm.texi: Regenerate.
* genmatch.cc (enum tree_code): Adjust.
* gimple-loop-versioning.cc (address_info_hasher::hash): Likewise.
* config/aarch64/aarch64.cc (aarch64_reassociation_width):
Likewise.
* config/loongarch/loongarch.cc
(loongarch_cpu_sched_reassociation_width): Likewise.
* config/mips/mips.cc (mips_sched_reassociation_width): Likewise.
* config/rs6000/rs6000.cc (rs6000_reassociation_width): Likewise.
* config/i386/i386.cc (ix86_reassociation_width): Likewise
and fix bogus compares.

gcc/cp/
* module.cc (trees_out::decl_value): Adjust for enum class
tree_code.

Built-ins to access code pointer and static chain of nested function.

This patch adds two new built-ins, __builtin_call_code_address and
__builtin_call_static chain, to extract the code address and the static
chain pointer from a (nested) function, respectively.  Those can then be
used to call the nested function using the existing built-in
__builtin_call_with_static_chain.  This feature can be used to avoid the
creation of trampolines and often allows writing more efficient
code, e.g. where trampolines prevent devirtualization (PR49666).

gcc/ChangeLog:
* builtins.def (BUILT_IN_CALL_CODE_ADDRESS,
BUILT_IN_CALL_STATIC_CHAIN): New.
* builtins.cc (expand_builtin): Emit errors for invalid uses.
(is_simple_builtin): Add new built-in functions.
* gimple-fold.cc (gimple_fold_builtin_call_info): New function.
(gimple_fold_builtin): Expand new built-ins for non-nested functions.
* tree-nested.cc (convert_tramp_reference_stmt): Ingore new built-ins.
(convert_gimple_call): Expand built-ins for nested functions.
* tree-inline.cc (initialize_inlined_parameters): Set a missing
static chain to NULL.

gcc/ChangeLog:
* doc/extend.texi (Constructing Calls): Document
__builtin_call_static_chain and __builtin_call_code_address
and update __builtin_call_with_static_chain.
(Nested Functions): Update.

gcc/testsuite/ChangeLog:
* gcc.dg/builtin-call-info-1.c: New test.
* gcc.dg/builtin-call-info-2.c: New test.
* gcc.dg/builtin-call-info-3.c: New test.

RISC-V: don't use Python f"..." syntax

While commit fc8e2846c24b ("Fix riscv build, no longer works with
python2") kind of suggests any Python3 is okay to use, the f"..." syntax
has appeared only in Python 3.6. Convert to the traditional "..." % (...)
way of expressing this.

gcc/

* config/riscv/arch-canonicalize: Avoid f"..." strings.

cobol: Improve MOVE BINARY/COMP-5 to PACKED-DECIMAL and NUMERIC-DISPLAY

These are more efficient algorithms for converting binary values to
packed-decimal and zoned decimal byte strings.  There is also an
improved routine that generates GENERIC to do COBOL rounding during
such moves.

gcc/cobol/ChangeLog:

* gengen.cc (gg_abs): Use fold_build1().
* genutil.cc (scale_and_round): Remove function.
(round_this_value): New function for rounding.
* genutil.h (scale_and_round): Remove function.
(round_this_value): New declaration.
* move.cc (cobol_wider_type_with_x_signedness): New function.
(mh_binary_to_numdisp): Faster routine.
(mh_binary_to_packed): Faster routine.
(move_helper): Use the faster routines.

libgcobol/ChangeLog:

* charmaps.cc (__gg__miconverter): Use table instead of a map.
(__gg__get_charmap): Likewise.
* charmaps.h (ebcdic_zero): New constant.
(ebcdic_plus): Likewise.
(ebcdic_minus): Likewise.
* encodings.h (enum cbl_encoding_t): Guardrail for table.
(ASCII_e): Remove trailing spaces.
* stringbin.cc (string_from_combined): Improved routine.
(defined): Likewise.
(FALLTHROUGH): Likewise.
(uint_to_8_digits): Improve speed.
(__gg__binary_to_string_ascii): Likewise.
(binary_to_string): Likewise.
(__gg__binary_to_string_ebcdic): Likewise.
(__gg__binary_to_string_encoded): Likewise.
(packed_from_combined): Likewise.
(__gg__binary_to_packed): Likewise.
(__gg__packed_to_binary): Likewise.

gcc/testsuite/ChangeLog:

* cobol.dg/group1/simple-classes.cob:
* cobol.dg/group1/simple-if.cob:
* cobol.dg/group2/Rounding_from_BINARY_signable_and_negative.cob: New test.
* cobol.dg/group2/Rounding_from_BINARY_signable_and_negative.out: New test.
* cobol.dg/group2/Rounding_from_BINARY_signable_and_positive.cob: New test.
* cobol.dg/group2/Rounding_from_BINARY_signable_and_positive.out: New test.
* cobol.dg/group2/Rounding_from_BINARY_unsignable.cob: New test.
* cobol.dg/group2/Rounding_from_BINARY_unsignable.out: New test.

Daily bump.

a68: fix comparison of pack element names in packs_ordering

Entry names of packs (struct fields, union alternatives, procedure
parameter list) cannot be compared purely by pointer value.  This
patch fixes the union alternative sorting code to not rely on this
false assumption.

Signed-off-by: Jose E. Marchesi <jemarch@gnu.org>
gcc/algol68/ChangeLog

* a68-moids-sorting.cc (packs_ordering): Do not rely on pointer
comparison when comparing pack element names.

a68: fix comment in a68-imports.cc:complete_encoded_mode

Signed-off-by: Jose E. Marchesi <jemarch@gnu.org>
gcc/algol68/ChangeLog

* a68-imports.cc (complete_encoded_mode): Fix comment on ordering
of union packs entries.

openmp: Add GOMP_loop_static_worksharing and GOMP_distribute_static_worksharing: Adjust 'gcc.dg/autopar/runtime-auto.c'

Fix-up for commit 31ba6ead0d5083010698d9fc0d45c31a4ae1f61d
"openmp: Add GOMP_loop_static_worksharing and GOMP_distribute_static_worksharing",
which (assuming ISL available) regressed:

    PASS: gcc.dg/autopar/runtime-auto.c (test for excess errors)
    PASS: gcc.dg/autopar/runtime-auto.c scan-tree-dump parloops2 "parallelizing"
    PASS: gcc.dg/autopar/runtime-auto.c scan-tree-dump parloops2 "pragma omp parallel"
    [-PASS:-]{+FAIL:+} gcc.dg/autopar/runtime-auto.c scan-tree-dump parloops2 "__builtin_omp_get_num_threads"

gcc/testsuite/
* gcc.dg/autopar/runtime-auto.c: Adjust.

cobol: Ensure REPOSITORY paragraph accepts all intrinsic names.

Also clarify error when program fails to end with a Sentence.
Fixes RT 3574.  Fixes PR 40.

gcc/cobol/ChangeLog:

* parse.y: Modify grammar to accept list of intrinic function tokens.
* parse_ante.h (in_procedure_division): Remove C-syntax (void).
(in_environment_division): Declare function.
* scan_ante.h (in_procedure_division): Whitespace.
(in_environment_division): Define function.
(typed_name): Return intrinsic function token in environment division.
* scan_post.h (in_procedure_division): Remove duplicate declaration.

i386: Make _m_prefetchw parameter const-qualified

Match Clang's declaration of _m_prefetchw to avoid requiring
const_cast<void *> at call sites.

gcc/ChangeLog:

* config/i386/prfchwintrin.h (_m_prefetchw): Take
volatile const void * instead of void *.

gcc/testsuite/ChangeLog:

* gcc.target/i386/prfchw-Wcast-qual-1.c: New test.

Signed-off-by: oltolm <oleg.tolmatcev@gmail.com>

libstdc++: Disable tests for targets without symlink support

These tests for filesystem::copy_symlink should be disabled on targets
that don't support symlinks (or where the target does, but our
std::filesystem doesn't, such as mingw-w64).

libstdc++-v3/ChangeLog:

* testsuite/27_io/filesystem/operations/copy_symlink/1.cc: Add
dg-require-target-fs-symlinks.
* testsuite/27_io/filesystem/operations/copy_symlink/2.cc:
Likewise.
* testsuite/27_io/filesystem/operations/copy_symlink/3.cc:
Likewise.
* testsuite/27_io/filesystem/operations/copy_symlink/4.cc:
Likewise.

prange zero_p() should never have points to.

Intersection sometimes produced a [0, 0] range with a points to field.

PR tree-optimization/125910
gcc/
* value-range.cc (prange::set_pt): Do not set PT when zero.
(prange::intersect): If the result is zero_p, clear PT.
(prange::verify_range): Verify points-to range is valid.
* value-range.h (zero_p): Do not assert, move to verify range.
(prange::set_pt): Only set PT when the range valid.

gcc/testsuite/
* gcc.dg/pr125910.c: New.

libstdc++: Disable test on targets without mkfifo [PR118158]

This test fails to compile using mingw-w64 so disable it using the
dg-require-mkfifo directive.

libstdc++-v3/ChangeLog:

PR libstdc++/118158
* testsuite/27_io/filesystem/operations/pr118158.cc: Add
dg-require-mkfifo.

fortran: [PR125761] Unlimited-poly character array section base

When a CLASS(*) array section carrying a CHARACTER payload is passed
as the base of an array reference, build_array_ref and
gfc_build_array_ref computed the element span from the dynamic type's
vptr size alone, ignoring the unlimited-polymorphic object's _len
field.  For a deferred-length character payload this gave the wrong
element size, so the section's data pointer was offset incorrectly by
the lower bound, producing wrong code (no ICE needed to reproduce: a
section of a CLASS(*) character array passed to a procedure reads from
the wrong address).

PR fortran/125761

gcc/fortran/ChangeLog:

* trans-array.cc (build_array_ref): When the descriptor's
canonical type is a class type, pass the class container as
'decl' to gfc_build_array_ref for genuine array element
references (rank > 0), so the element size can be corrected
for an unlimited-polymorphic character payload.
* trans-types.cc (gfc_typenode_for_spec): Move setting the
GFC_CLASS_TYPE_P bit to..
(gfc_get_derived_type): .. and use attr.is_class.
(gfc_get_derived_type): Move setting the GFC_CLASS_TYPE_P bit
as the last step before returning the derived->backend_decl
if the derived->attr.is_class is true.

gcc/testsuite/ChangeLog:

* gfortran.dg/select_type_53.f90: New test.

c++/reflection: type traits and reference collapsing [PR125939]

This PR shows that some of our meta type traits don't work with
references: we emit bogus

  error: 'const' qualifiers cannot be applied to 'int&'

errors.  The problem is that build_stub_type is trying to add
const to a reference, which you can only do through a typedef,
but here we don't have a typedef.

Resolved by passing tf_ignore_bad_quals to cp_build_qualified_type.
The new build_const_lref helper is to spruce up the code a bit.

PR c++/125939

gcc/cp/ChangeLog:

* cp-tree.h (build_const_lref): Declare.
* method.cc (build_stub_type): Pass tf_ignore_bad_quals to
cp_build_qualified_type.
* reflect.cc (build_const_lref): New.
(get_range_elts): Use it.
(eval_is_copy_constructible_type): Likewise.
(eval_is_copy_assignable_type): Likewise.
(eval_is_trivially_copy_assignable_type): Likewise.
(eval_is_nothrow_copy_constructible_type): Likewise.
(eval_is_nothrow_copy_assignable_type): Likewise.
* tree.cc (trivially_copy_constructible_p): Likewise.
(handle_annotation_attribute): Likewise.

gcc/testsuite/ChangeLog:

* g++.dg/reflect/type_trait15.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>

cobol: relax format detection

For the purpose of heuristic determination, the sequence area in
Reference Format may be spaces or digits. Fixes RT 3586, fixes PR 59.

gcc/cobol/ChangeLog:

* lexio.cc (valid_sequence_area): Each character may be
ISDIGIT or ISBLANK.

cobol: Diagnose comparison of floating-point to alphanumeric.

Because MOVE of floating-point to alphanumeric is invalid, so too is comparison.
Fixes RT 3588.

gcc/cobol/ChangeLog:

* parse.y: Introduce ast_relop to apply validation.
* parse_ante.h (ast_relop): Declare.
(class eval_subject_t): Use ast_relop.

dwarf: fix inconsistency in type chains traversal [PR125421]

typedef chain traversal could sometimes skip an intermediate type.
This could happen when two DIEs have a common underlying type but diverge
due to presence of additional attribute in one case and a qualifier in
other.
In the example from testcase, variable "perm" typechain misses interim u16.

             typedef unsigned short __u16;
                      typedef __u16 u16;
  __attribute__((btf_type_tag(""))) u16 a;
                              const u16 perm;

generates

  .uleb128 0x1 # (DIE (0x66) DW_TAG_variable)
  .long .LASF3 # DW_AT_name: "perm"
   # DW_AT_decl_file (1, pr125421.c)
  .byte 0xa # DW_AT_decl_line
  .byte 0xb # DW_AT_decl_column
  .long 0x2f # DW_AT_type

  .uleb128 0x4 # (DIE (0x2f) DW_TAG_const_type)
  .long 0x23 # DW_AT_type                        <-- BUG

  .uleb128 0x3 # (DIE (0x23) DW_TAG_typedef)
  .long .LASF5 # DW_AT_name: "__u16"
  .byte 0x1 # DW_AT_decl_file (pr125421.c)
  .byte 0x7 # DW_AT_decl_line
  .byte 0xf # DW_AT_decl_column
  .long 0x34 # DW_AT_type

  .uleb128 0x5 # (DIE (0x34) DW_TAG_base_type)
  .byte 0x2 # DW_AT_byte_size
  .byte 0x5 # DW_AT_encoding
  .long .LASF6 # DW_AT_name: "short int"

What makes this issue worse is depending on the order in which the types
are specified in source, and processed, the problem may or maynot show up.
So in the test code above if lines 3 and 4 are swppaed, "perm" gets the
missing type u16 as expected.

The issue is in modified_type_die (), get_qualified_type (type) returned
pointer may not be identical to dtype: TREE_TYPE (TYPE_NAME (qualified_type))
while having the same underlying base type. And due to the failed
pointer identity test, subsequent usage of DECL_ORIGINAL_TYPE () for recursive
chain processing can peel away the needed type.

The implications are for a multi CU build, structurally similar but
non identical variants of types (due to an embedded member getting a
different chained typdef) can be generated and accumulate at link time
in the final .debug_info.

This would be OK / unnoticed for usual dwarf debugging purposes.
However in BFP workflow: kernel binary linking invokes pahole to process
the dwarf and dedup it for btf generation (gcc can emit btf directly but
thats not been done currently for other reasons). The slightly different
variations of same structure due to thi issue cause combinatiorial explosion
in pahole dedup processing trying to match and failing repeatedly in what
seems like infinite recursion. The problem showed up and was excerbated
when trying to enable attr btf_type_tag in kernel with gcc for the first
time as that is the key ingredient to trigger the latent issue.

Fix is to handle qualified_type != dtype as if they were identical when
they are different variant nodes of the same underlying typedef.

Bootstrapped and regtested on x86 and aarch64.

PR debug/125421

gcc/ChangeLog:

* dwarf2out.cc (modified_type_die): Handle qualified_type being
a variant of dtype as if they were identical to avoid peeling a
typdef.
For named types, use dentry unconditionally as that is valid for
both cases of qualified_type == and  != dentry.

gcc/testsuite/ChangeLog:

* gcc.dg/debug/dwarf2/pr125421.c: New Test.

Signed-off-by: Vineet Gupta <vineet.gupta@linux.dev>

libstdc++: Correct export checks for _GLIBCXX_EXTERN_TEMPLATE

Replace a basic_string specific _GLIBCXX_EXTERN_TEMPLATE > 0 with
simple check for _GLIBCXX_EXTERN_TEMPLATE. This make sure that
extern definition is also use for -O0 (default).
Exported declarations are also important for future extensibility,
as they always pick latest implementation.

libstdc++-v3/ChangeLog:

* include/std/format (__do_vformat_to): Change the preprocessor
check for __do_vformat_to.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>

work around ppc-vx6 make limitations

libstdc++-v3 in gcc-15 gained uses of a make function that was added
in GNU make 3.81, but ppc-vx6 is GNU make 3.80, so calling the
function returns an empty string, and the build fails.

gcc/doc/install.texi states GCC requires make 3.80 to build, so
rewrite those bits to avoid the new function.

Install locations don't need abspath because they're already supposed
to be absolute, since installation can't work with relative paths and
DESTDIR is supposed to be prependable.

$? may gain the srcdir VPATH, which would complicate dropping abspath,
so iterate over the two filenames.

for  libstdc++-v3/ChangeLog

* src/c++23/Makefile.am (libstdc++.modules.json): Rewrite
without abspath make function.
(stamp-modules-bits): Likewise.
* src/c++23/Makefile.in: Rebuilt.

libstdc++: vxworks: enable gthread_yield

ac_has_sched_yield is a bit of a misnomer in libstdc++-v3, as it
guards the __gthread_yield call.  That call is implemented on VxWorks,
even where it doesn't support POSIX sched_yield() proper.  So enable
it.

for  libstdc++-v3/ChangeLog

* acinclude.m4 (GLIBXX_ENABLE_LIBSTDCXX_TIME) [vxworks*]:
Enable __gthread_yield.
* configure: Rebuilt.

openmp: Add GOMP_reduction_start and GOMP_reduction_end

When lowering reduction clauses, the compiler brackets the critical section
around the accumulation step with calls to GOMP_atomic_start and
GOMP_atomic_end. These are the same entry points used for `#pragma omp atomic'
constructs, so OMPT cannot distinguish reductions from user atomics.

Introduce dedicated GOMP_reduction_start and GOMP_reduction_end entry
points in libgomp. Update omp-low to emit calls to the new builtins
instead.

Also register the new builtins as memory barriers to avoid illegal optimisations
in later passes.

gcc/ChangeLog:

* omp-builtins.def (BUILT_IN_GOMP_REDUCTION_START): New builtin.
(BUILT_IN_GOMP_REDUCTION_END): New builtin.
* omp-low.cc (lower_reduction_clauses): Replace
BUILT_IN_GOMP_ATOMIC_START / BUILT_IN_GOMP_ATOMIC_END with
BUILT_IN_GOMP_REDUCTION_START / BUILT_IN_GOMP_REDUCTION_END.
(lower_omp_sections): Likewise.
(lower_omp_scope): Likewise.
(lower_omp_for): Likewise.
* tree-ssa-alias.cc (check_fnspec): Handle
BUILT_IN_GOMP_REDUCTION_START and BUILT_IN_GOMP_REDUCTION_END as
memory barriers.

libgomp/ChangeLog:

* atomic.c (GOMP_reduction_start): New function.
(GOMP_reduction_end): New function.
* libgomp.map (GOMP_6.0.2): Export GOMP_reduction_start and
GOMP_reduction_end.
* libgomp_g.h (GOMP_reduction_start): New declaration.
(GOMP_reduction_end): New declaration.

gcc/testsuite/ChangeLog:

* c-c++-common/gomp/atomic-builtins-1.c: New test.
* c-c++-common/gomp/reduction-builtins-1.c: New test.

openmp: Add barrier kind to GOMP_barrier and GOMP_barrier_cancel

GOMP_barrier is called for at least three distinct purposes: implicit
barriers at the end of parallel/teams regions, implicit barriers at the
end of worksharing constructs, and explicit `#pragma omp barrier'
directives. OMPT requires distinguishing these in its sync-region
callbacks.

Create new, semantically equivalent functions GOMP_barrier_ext and
GOMP_barrier_cancel_ext with an integer `kind' parameter. Update all compiler
call sites to pass the appropriate constant. Preserve now unused functions
GOMP_barrier and GOMP_barrier_cancel for backward compatibility.

The `kind' parameter is accepted but not yet acted upon in libgomp; it
is reserved for future OMPT instrumentation.

gcc/c-family/ChangeLog:

* c-omp.cc (c_finish_omp_barrier): Pass GOMP_BARRIER_EXPLICIT to
GOMP_barrier_ext.

gcc/cp/ChangeLog:

* semantics.cc (finish_omp_barrier): Push GOMP_BARRIER_EXPLICIT
onto the argument vector.

gcc/fortran/ChangeLog:

* trans-openmp.cc (gfc_trans_omp_barrier): Pass GOMP_BARRIER_EXPLICIT
to GOMP_barrier_ext.

gcc/ChangeLog:

* omp-builtins.def (BUILT_IN_GOMP_BARRIER): Change function to
GOMP_barrier_ext and type to BT_FN_VOID_INT.
(BUILT_IN_GOMP_BARRIER_CANCEL): Change function to
GOMP_barrier_cancel_ext and type to BT_FN_VOID_INT.
* omp-expand.cc (expand_omp_for_static_nochunk): Pass
GOMP_BARRIER_IMPLICIT_WORKSHARE to omp_build_barrier.
(expand_omp_for_static_chunk): Likewise.
(expand_omp_single): Likewise.
* omp-general.cc (omp_build_barrier): Add kind parameter; pass it
to GOMP_barrier_ext or GOMP_barrier_cancel_ext.
* omp-general.h (omp_build_barrier): Update declaration to add
kind parameter.
* omp-low.cc (lower_rec_input_clauses): Determine barrier kind from
the enclosing gimple statement code and pass it to omp_build_barrier.
(lower_omp_for_scan): Pass GOMP_BARRIER_IMPLICIT_WORKSHARE to
omp_build_barrier.

include/ChangeLog:

* gomp-constants.h (GOMP_BARRIER_IMPLICIT_PARALLEL): New macro.
(GOMP_BARRIER_IMPLICIT_WORKSHARE): New macro.
(GOMP_BARRIER_EXPLICIT): New macro.

libgomp/ChangeLog:

* barrier.c (GOMP_barrier_ext): New function.
(GOMP_barrier_cancel_ext): Likewise.
* libgomp_g.h (GOMP_barrier_ext): Declare.
(GOMP_barrier_cancel_ext): Likewise.
* libgomp.map (GOMP_6.0.2): Add GOMP_barrier_ext and
GOMP_barrier_cancel_ext.
* testsuite/libgomp.c/barrier-1.c: Update GOMP_barrier_ext calls to pass
GOMP_BARRIER_EXPLICIT.

gcc/testsuite/ChangeLog:

* g++.dg/gomp/barrier-1.C: Update scan dump.
* g++.dg/gomp/tpl-barrier-1.C: Likewise.
* gcc.dg/gomp/barrier-1.c: Likewise.
* c-c++-common/gomp/implicit-barrier-1.c: New test.
* gfortran.dg/gomp/lastprivate-allocatable-barrier-1.f90: New test.

openmp: Add GOMP_loop_static_worksharing and GOMP_distribute_static_worksharing

For static-schedule worksharing loops (`omp for schedule(static)') the
compiler emits two separate calls -- omp_get_thread_num() and
omp_get_num_threads() -- to obtain the thread id and count.  Similarly,
for `omp distribute' constructs, it emits omp_get_team_num() and
omp_get_num_teams().  Because these are public OpenMP API routines, OMPT
cannot distinguish them from user-level queries.

Introduce two new libgomp entry points:

  - GOMP_loop_static_worksharing(): returns both the thread id and the thread
    count packed into a single complex value.
  - GOMP_distribute_static_worksharing(): same, but for team id and team
    count.

Using a single return value rather than two output-pointer arguments
preserves optimisations in later passes.

gcc/ChangeLog:

* builtin-types.def (BT_COMPLEX_INT, BT_FN_COMPLEX_INT): New types.
* omp-builtins.def (BUILT_IN_GOMP_LOOP_STATIC_WORKSHARING): New
builtin.
(BUILT_IN_GOMP_DISTRIBUTE_STATIC_WORKSHARING): Likewise.
* omp-expand.cc (expand_omp_for_static_nochunk): Replace separate calls
to public API functions with a single call to
GOMP_loop_static_worksharing or GOMP_distribute_static_worksharing, then
unpack id and count.
(expand_omp_for_static_chunk): Likewise.

gcc/fortran/ChangeLog:

* types.def (BT_COMPLEX_INT): New type.
(BT_FN_COMPLEX_INT): New function type.

libgomp/ChangeLog:

* config/gcn/teams.c (GOMP_distribute_static_worksharing): New
function.
* config/nvptx/teams.c (GOMP_distribute_static_worksharing): Likewise.
* libgomp.map (GOMP_6.0.2): Export GOMP_loop_static_worksharing and
GOMP_distribute_static_worksharing.
* libgomp_g.h (GOMP_loop_static_worksharing): New declaration.
(GOMP_distribute_static_worksharing): Likewise.
* parallel.c (GOMP_loop_static_worksharing): New function.
* teams.c (GOMP_distribute_static_worksharing): Likewise.

gcc/testsuite/ChangeLog:

* c-c++-common/gomp/for-8.c: New test.

openmp: Add GOMP_has_masked_thread_num

For the `omp master' and `omp masked filter(x)' constructs, the compiler lowers
the filter check by emitting omp_get_thread_num() == filter. Because
omp_get_thread_num is a public OpenMP API function, OMPT cannot distinguish this
internal check from a user-level thread-number query.

Introduce GOMP_has_masked_thread_num(int tid), a new libgomp entry point that
encapsulates the thread id check, and update lower_omp_master to call it instead
of building the comparison inline.

gcc/ChangeLog:

* omp-builtins.def (BUILT_IN_GOMP_HAS_MASKED_THREAD_NUM): New builtin.
* omp-low.cc (lower_omp_master): Call it.

libgomp/ChangeLog:

* libgomp.map (GOMP_6.0.2): New symbol version. Export
GOMP_has_masked_thread_num.
* libgomp_g.h (GOMP_has_masked_thread_num): New declaration.
* parallel.c (GOMP_has_masked_thread_num): New function.

gcc/testsuite/ChangeLog:

* c-c++-common/gomp/masked-1.c: Add scan directives verifying that
GOMP_has_masked_thread_num is emitted and omp_get_thread_num is not.
* g++.dg/gomp/master-3.C: Update scan-tree-dump-times to look for
GOMP_has_masked_thread_num instead of omp_get_thread_num.
* gcc.dg/gomp/master-3.c: Likewise.
* gfortran.dg/gomp/masked-1.f90: Add scan directive for
GOMP_has_masked_thread_num.

pta: Adjust handle_call_arg's comment

handle_call_args's comment suggests it is only called in non-IPA mode.
That's not true.  Adjust the comment to reflect that.

gcc/ChangeLog:

* gimple-ssa-pta-constraints.cc (handle_call_arg): Mention in
comment that the function can get called in IPA mode.

Signed-off-by: Filip Kastl <fkastl@suse.cz>

tree-optimization/110743 - expand RMW uninit detection

The following expands the RMW bit clear/set pattern detection to
also cover VIEW_CONVERT_EXPR as it appears when generic word_mode
vectorization is involved.

PR tree-optimization/110743
* tree-ssa-uninit.cc (maybe_warn_operand): Also cover
VIEW_CONVERT_EXPR uses for RMW bit clear/set pattern
detection.

* gcc.dg/uninit-pr110743-2.c: New testcase.

rs6000: Add Future Vector Integer Arithmetic Instructions [RFC02680]

This patch adds support for VSX vector arithmetic instructions that may
be added to future PowerPC processors. Note that the names of these
builtins may change in the future.

New VSX patterns are added for vector add, subtract, multiply, and
multiply-high instructions guarded by TARGET_FUTURE. A new builtin
enablement stanza future-vsx is added for builtins requiring
both -mcpu=future and -mvsx.

2026-06-24  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>

gcc/
* config/rs6000/altivec.md (V16QI_V2DI): New mode iterator.
(add<mode>3): Split into two patterns to support future ISA
alternatives.
(sub<mode>3): Likewise.
* config/rs6000/vsx.md (VIArith): New mode iterator.
(vsx_mul<mode>3): New insn pattern.
(smul<mode>3_highpart): Split into mode-specific patterns.
(umul<mode>3_highpart): Likewise.
(smulv8hi3_highpart): New insn pattern.
(smulv4si3_highpart): Likewise.
(smulv2di3_highpart): Likewise.
(umulv8hi3_highpart): Likewise.
(umulv4si3_highpart): Likewise.
(umulv2di3_highpart): Likewise.
* config/rs6000/rs6000-builtins.def (__builtin_vsx_xvmulhuh): New
builtin.
(__builtin_vsx_xvmulhsh): Likewise.
* config/rs6000/rs6000-overload.def (__builtin_vec_mulh): Add
overloads for vector multiply-high signed/unsigned halfword.
* config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add entry for
BSTZ_FUTURE_VSX.
(stanza_map): Add future-vsx stanza mapping.
(enable_string): Add ENB_FUTURE_VSX.
(write_decls): Add ENB_FUTURE_VSX to the bif_enable enum in the
generated header file.
* config/rs6000/rs6000.md (define_attr "isa"): Add future to the list
of ISA values.
(define_attr "enabled"): Add check for future ISA.
* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Handle
ENB_FUTURE_VSX and issue a diagnostic requiring -mcpu=future and -mvsx.
(rs6000_builtin_is_supported): Return TARGET_FUTURE && TARGET_VSX
for ENB_FUTURE_VSX built-ins.
* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions Available
on Future ISA): Document new functions.

gcc/testsuite/
* gcc.target/powerpc/vsx_arith_builtin-1.c: New test.
* gcc.target/powerpc/vsx_arith_builtin-2.c: Likewise.
* gcc.target/powerpc/vsx_arith_builtin-3.c: Likewise.
* gcc.target/powerpc/vsx_arith_builtin-4.c: Likewise.
* gcc.target/powerpc/vsx_arith_vect_1.c: Likewise.
* gcc.target/powerpc/vsx_arith_vect_2.c: Likewise.

AArch64/SVE: Optimize vec_init for partial SVE vector modes

When basic block vectorization is extended to support predicated
vector tails, it attempts to vectorize more stores. This is only
done if the cost model deems it profitable, but the cost model
assumes that vec_init is cheap; in practice, that was not always
true.

For example,

  uint8_t * vectp.2689;
  vector([4,4]) unsigned char _846;
  vector([4,4]) <signed-boolean:4> slp_mask_848;
  ...
  _846 = {_20, _30, _40, _50};
  vectp.2689_847 = src_61(D) + 64;
  slp_mask_848 = .WHILE_ULT (0, 4, { 0, ... });
  .MASK_STORE (vectp.2689_847, 8B, slp_mask_848, _846);

was expected to have a vector cost of 4 (the same as the scalar
cost) but the code actually generated for

_846 = {_20, _30, _40, _50};

was a repetitive series of write-modify-read operations
using four stack locations for temporary storage:

(set (reg:VNx16BI Y)
        (const_vector:VNx16BI repeat [
                (const_int 1 [0x1])
            ]))

(set (mem/c:VNx4QI (plus:DI (reg/f:DI 96 virtual-stack-vars)
                (const_poly_int:DI [-O, -O])) [0  S[O, O] A8])
        (unspec:VNx4QI [
                (subreg:VNx4BI (reg:VNx16BI Y) 0)
                (reg:VNx4QI 205 [ _845 ])
            ] UNSPEC_PRED_X))

(set (reg:QI Z)
        (subreg:QI (reg:SI X [ _W ]) 0))

(set (mem/c:QI (plus:DI (reg/f:DI 96 virtual-stack-vars)
                (const_poly_int:DI [-O, -O])) [0  S1 A8])
        (reg:QI Z))

(set (reg:VNx4QI 205 [ _845 ])
        (unspec:VNx4QI [
                (subreg:VNx4BI (reg:VNx16BI V) 0)
                (mem/c:VNx4QI (plus:DI (reg/f:DI 96 virtual-stack-vars)
                        (const_poly_int:DI [-O, -O])) [0  S[O, O] A8])
            ] UNSPEC_PRED_X))

(repeated four times)

which compiled to something like:

addpl   x5, sp, #6
st1b {z27.s}, p7, sp, #3, mul vl
strb w10, [x5]
ld1b {z28.s}, p7/z, sp, #3, mul vl

(repeated four times)

With these changes, the compiled code is instead:

mov z31.b, w0
insr z31.s, s28
insr z31.s, s29
insr z31.s, s30

which is not yet optimal but is a great improvement.

To achieve that, "vec_init<mode><Vel>" was modified to
accept all SVE vector modes, which means that the
associated function aarch64_sve_expand_vector_init
must now handle all partial modes (namely, VNx8QI, VNx4QI,
VNx2QI, VNx4HI, VNx2HI, VNx2SI, VNx2HF, VNx4HF, VNx2SF,
VNx2BF, VNx4BF).

I verified that the following dependencies already
handle partial vector modes:
- "@aarch64_sve_<perm_insn><mode>" (for ZIP1)
- "*vec_duplicate<mode>_reg"
- maybe_code_for_aarch64_sve_rev

I did not verify that emit_move_insn (which is a dependency
of aarch64_sve_expand_vector_init_handle_trailing_constants)
handles partial vector modes, but it seems highly likely.

"vec_shl_insert_<mode>" has been modified to accept SVE_ALL
instead of only SVE_FULL and operate on container instead of
element types.

gcc/ChangeLog:

* config/aarch64/aarch64-sve.md: Update
vec_init<mode><Vel> and vec_shl_insert_<mode> to
accept all SVE vector modes.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/sve/slp_stack.c: New test.

x86: Require GPR as previous scratch register in LCP stall peepholes

Require general purpose register as previous scratch register in LCP
stall peepholes.

gcc/

PR target/125958
* config/i386/i386-expand.cc (ix86_expand_lcp_stall_peephole):
Replace !REG_P (dest) with !GENERAL_REG_P (dest).

gcc/testsuite/

PR target/125958
* gcc.target/i386/pr125958.c: New test.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>

x86: Increase generic tune branch misprediction cost

Increase the branch misprediction scale for generic tuning from
COSTS_N_INSNS (2) to COSTS_N_INSNS (2) + 3.

Modern CPUs have deeper pipelines, making branch mispredictions more
expensive. Increasing this cost encourages if-conversion, avoiding
pipeline stalls from mispredicted branches.

This improves 544.nab_r (-O2) by 12.7% on GNR and 12.1% on Znver5 with
single-copy.

gcc/ChangeLog:

* config/i386/x86-tune-costs.h (generic_cost): Increase branch
mispredict scale from COSTS_N_INSNS (2) to COSTS_N_INSNS (2) + 3.

testsuite: Fix gcc.dg/vect/pr125567.c on SPARC

The new gcc.dg/vect/pr125567.c test FAILs on SPARC (both Solaris and Linux):

FAIL: gcc.dg/vect/pr125567.c scan-tree-dump slp1 "optimized: basic block part vectorized"

The test requires vect_hw_misalign:

gcc.dg/vect/pr125567.c:17:19: missed:   unsupported unaligned access
gcc.dg/vect/pr125567.c:17:23: missed:   not vectorized: relevant stmt not supported: _5 = *_4;

Tested on sparc-sun-solaris2.11 and x86_64-pc-linux-gnu.

2026-06-23  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc/testsuite:
* gcc.dg/vect/pr125567.c: Require vect_hw_misalign.

doc/ifn.texi: don't have whitespace after @code

Older makeinfo fails on such.

gcc/

* doc/ifn.texi: Drop blanks after @code.

libgomp: Move internal NUMA function to a separate file [PR125940]

At the previous location (affinity.c), the real and the fallback
implementation of the NUMA functions were both in that file when
HAVE_PTHREAD_AFFINITY_NP was unset. Solved by moving the internal
NUMA functions into a separate file. Follow up to commit
r17-1702-g8af1592882509f.

libgomp/ChangeLog:

PR libgomp/125940

* Makefile.am (libgomp_la_SOURCES): Add numa.c.
* Makefile.in: Regenerate.
* affinity.c (gomp_get_current_numa_node,
gomp_get_numa_distance): Move to ...
* numa.c: ... this new file.
* config/linux/affinity.c (gomp_get_current_numa_node,
gomp_get_numa_distance): Move to ...
* config/linux/numa.c: ... this new file.

libgomp: Handle omp_default_device in the fallback case [PR125951]

Support for omp_default_device was added before the commit
r17-1702-g8af1592882509f for the Linux case, but for the fallback
case, it was missed - such that the testcase failed on all
non-Linux systems.

libgomp/ChangeLog:

PR libgomp/125951

* target.c (omp_get_device_distances): Handle omp_default_device
in the fallback code.

Daily bump.

c++/modules: dependent ADL laziness [PR125334]

I was digging into modules for another bug and remembered an earlier thought
that a possible further improvement for this PR would be to just mark the
ADL functions as reachable, not actual dependencies of the current entity.
This turns out to be as simple as removing the call to add_dependency; the
test still passes, but now the ADL functions are loaded lazily because they
have their own dependency groups instead of being tightly coupled to the
call site.

This provides a speed-up of about 24% on the performance test in this PR
with my debugging build of trunk.

PR c++/125334

gcc/cp/ChangeLog:

* module.cc (depset::hash::find_dependencies): Don't add_dependency
dependent ADL functions.

gcc/testsuite/ChangeLog:

* g++.dg/modules/adl-12_b.C: Check for lazy loading.

c++/modules: imported incomplete typedef [PR125768]

Here A<S> is not instantiated in _a, so the exported a_s typedef is to an
incomplete type.  It's instantiated in _b, but when marking things reachable
we get as far as the imported typedef and stop, so we don't write out the
instantiation.  Then in _c we read in the definition of Outer with an
incomplete type for 'sub', and ICE when trying to initialize it in the
constructor.

Fixed by looking into the DECL_ORIGINAL_TYPE of an imported typedef when
gathering dependencies.

PR c++/125768

gcc/cp/ChangeLog:

* module.cc (trees_out::decl_node): When not streaming,
recurse into DECL_ORIGINAL_TYPE of an imported typedef.

gcc/testsuite/ChangeLog:

* g++.dg/modules/alias-3_a.C: New test.
* g++.dg/modules/alias-3_b.C: New test.
* g++.dg/modules/alias-3_c.C: New test.

openmp: Add macros for iterator element access

gcc/c/

* c-parser.cc (c_parser_omp_iterators): Use iterator constructors
and macros for accessing iterator elements.
(c_parser_omp_clause_affinity): Likewise.
(c_parser_omp_clause_depend): Likewise.
(c_parser_omp_clause_map): Likewise.
(c_parser_omp_clause_from_to): Likewise.
* c-typeck.cc (c_omp_finish_iterators): Likewise.

gcc/cp/

* parser.cc (cp_parser_omp_iterators): Use iterator constructors
and macros for accessing iterator elements.
(cp_parser_omp_clause_affinity): Likewise.
(cp_parser_omp_clause_depend): Likewise.
(cp_parser_omp_clause_from_to): Likewise.
(cp_parser_omp_clause_map): Likewise.
* pt.cc (tsubst_omp_clause_decl): Likewise.
* semantics.cc (cp_omp_finish_iterators): Likewise.

gcc/fortran/

* trans-openmp.cc (gfc_trans_omp_array_section): Use macros for
accessing iterator elements.
(handle_iterator): Likewise, plus the iterator constructor.
(gfc_trans_omp_clauses): Likewise.

gcc/

* gimplify.cc (gimplify_omp_affinity): Use macros for accessing
iterator elements.
(compute_omp_iterator_count): Likewise.
(build_omp_iterator_loop): Likewise.
(copy_omp_iterator): Use a boolean to force creation of an
expanded iterator vector, instead of specifying the length explicitly.
(remove_unused_omp_iterator_vars): Use accessor macros.
(build_omp_iterators_loops): Likewise.
(enter_omp_iterator_loop_context_1): Likewise.
(extract_base_bit_offset): Likewise.
* omp-low.cc (lower_omp_map_iterator_expr): Likewise.
(lower_omp_map_iterator_size): Likewise.
* tree-inline.cc (copy_tree_body_r): Likewise.
* tree-pretty-print.cc (dump_omp_iterators): Likewise.
* tree.h (OMP_ITERATOR_VAR, OMP_ITERATOR_BEGIN, OMP_ITERATOR_END,
OMP_ITERATOR_STEP, OMP_ITERATOR_ORIG_STEP, OMP_ITERATOR_BLOCK,
OMP_ITERATOR_LABEL, OMP_ITERATOR_INDEX, OMP_ITERATOR_ELEMS,
OMP_ITERATOR_COUNT, OMP_ITERATOR_EXPANDED_P): New macros.
(make_omp_iterator, make_expanded_omp_iterator): New constructor
functions.

Co-Authored-By: Sandra Loosemore <sloosemore@baylibre.com>

OpenMP, Fortran: Add comments to gfc_trans_omp_array_section.

No functional changes in this patch.

gcc/fortran/ChangeLog
* trans-openmp.cc (gfc_trans_omp_array_section): Add comments and
use a more descriptive variable name.

cobol: accept CDF PROCESS directive

If the IBM PROCESS directive appears before IDENTIFICATION DIVISION
with -dialect ibm, it is now a warning.  In all other cases it is an
error.  Controlled by -Wibm-cdf. Fixes RT 3609.

gcc/cobol/ChangeLog:

* cbldiag.h (enum cbl_diag_id_t): Add IbmCdf.
* cdf.y: Renumber tokens.
* cobol1.cc (cobol_langhook_handle_option): Accept -Wibm-cdf.
* gcobol.1: Document Wibm-cdf
* lang-specs.h: Add Wno-ibm-cdf to spec string.
* lang.opt: Add Wibm-cdf.
* messages.cc (cobol_warning_suppress): Add IbmCdf to cbl_diagnostics.
* parse.y: Handle PROCESS token.
* scan.l: Return PROCESS token.
* token_names.h: Update.

fortran: Fix memory leak for array structure-constructor element [PR121972]

Fix the remaining leak in pdt_86.f03. Added a new test in asan to avoid it.

PR fortran/121972

gcc/fortran/ChangeLog:

* trans-array.cc (has_class_alloc_comp): New helper; returns true if
derived type DER has any CLASS component.
(gfc_trans_array_ctor_element): Also free allocatable components when
the element expression is EXPR_STRUCTURE, skipping types that contain
CLASS components to avoid freeing stack-allocated _data pointers.
(gfc_constructor_is_owned_alloc_comp): Likewise treat EXPR_STRUCTURE
elements as owned only when the derived type has no CLASS components.
* trans-expr.cc (gfc_trans_alloc_subarray_assign): Free allocatable
components of the component's temporary descriptor before nulling its
data pointer, for non-variable source expressions.

gcc/testsuite/ChangeLog:

* gfortran.dg/class_array_15.f03: Adjust expected free count.
* gfortran.dg/derived_constructor_comps_6.f90: Adjust expected free count.
* gfortran.dg/asan/structure_constructor_alloc_comp_leak_1.f90: New test.

Fortran: -fc-prototypes, deferred shape and deferred length dummies [PR125902]

PR fortran/125902

gcc/fortran/ChangeLog:

* dump-parse-tree.cc (get_c_type_name): Use CFI_cdesc_t also for
deferred shape and deferred length dummies, as well as for
assumed-length scalar character dummies.

gcc/testsuite/ChangeLog:

* gfortran.dg/c-prototypes_1.F90: New test.

cobol: Elevate keyword priority.

Move keyword patterns higher in the lexer file, giving them higher
priority than user-defined names. Fix tests that allowed keywords for
Program-ID, which must be a user-defined name. Fixes PR 119933.

gcc/cobol/ChangeLog:

* parse.y: Restrict Program-ID as name to top-level.
* scan.l: Elevate keyword priority in lexer.

ira: Add dependent filter handling.

This adds dependent-filter handling to ira in a similar way register
filters where added.  The actual querying of the filter is partially
routed to the lra routines introduced before.

gcc/ChangeLog:

* ira-build.cc (ira_create_allocno): Initialize dependent
filters.
(copy_dependent_filters): New function to copy filters.
(create_cap_allocno): Use new function.
(propagate_allocno_info): Ditto.
(propagate_some_info_from_allocno): Ditto.
* ira-color.cc (ira_dependent_filter): New function that
calls lra_get_dependent_filter.
(assign_hard_reg): Use new function.
(improve_allocation): Ditto.
(fast_allocation): Ditto.
* ira-conflicts.cc (dependent_filter_same_reg_ok_p): New
function to check if a dependent filter allows the same reg.
(can_use_same_reg_p): Use new function.
* ira-int.h (struct ira_dependent_filter): New struct holding
allocno-specific dependent-filter properties.
(ALLOCNO_DEPENDENT_FILTERS): New accessor.
(ira_add_dependent_filter): Declare.
* ira-lives.cc (ira_add_dependent_filter): New function.
(process_dependent_filters): New function.
(process_bb_node_lives): Call new function.
* ira.cc (ira): Reset filters.

RISC-V: Example dependent filter for RVV widen overlap.

This is an example of how a dependent filter would look like.
In RVV sources of widening instructions cannot overlap the
destination except in the highest-numbered part (for EMUL>1).

The dependent filter attached to the constraint "Wtt" is
implemented in riscv_widen_operand_ok.

gcc/ChangeLog:

* config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS):
Add widen overlap dependent constraint.
* config/riscv/riscv-protos.h (riscv_widen_overlap_ok): Declare.
* config/riscv/riscv.cc (riscv_widen_operand_ok): New function.
* config/riscv/vector.md: Use new constraint.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-4.c: Un-xfail.
* gcc.target/riscv/rvv/base/pr112431-5.c: Ditto.
* gcc.target/riscv/rvv/base/pr112431-6.c: Ditto.

lra: Support dependent filters.

This patch adds dependent-filter support to lra.  As with register
filters, this is the part that ensures correctness, while the later
ira patch improves register allocation.

As dependent filters can be expensive, the patch adds a hash-table
cache that is integrated into lra_get_dependent_filter.

In order to keep track of dependent filters during pseudo phases, the
patch adds a vector of them to lra_reg.  It is filled after reloading
and queried in find_hard_regno_for_1 so we can fold it into
conflict_set.

gcc/ChangeLog:

* lra-assigns.cc (find_hard_regno_for_1): Query dependent
filter of current pseudo.
* lra-constraints.cc (struct dependent_filter_cache_hasher): New
hasher.
(lra_init_dependent_filter_cache): New function.
(lra_finish_dependent_filter_cache): Ditto.
(lra_reset_dependent_filters): Ditto.
(lra_get_dependent_filter): New function to query (and add)
a dependent filter from/to the cache.
(lra_add_dependent_filter): New function to add a dependent
filter to an lra_reg.
(get_dependent_filter): New function to get a dependent filter
from a constraint.
(process_dependent_filters): New function to get all dependent
filters from the current insn's constraints.
(process_alt_operands): Initialize dependent-filter regset.
(curr_insn_transform): Fill lra_reg dependent filters.
* lra-int.h (struct dependent_filter): Declare.
(struct dependent_filter_entry): Ditto.
(lra_init_dependent_filter_cache): Ditto.
(lra_finish_dependent_filter_cache): Ditto.
* lra.cc (initialize_lra_reg_info_element): New function.
(finish_reg_info): Release dependent-filter vector.
(lra_init_once): Init hash table.
(lra_finish_once): Clear hash table.
* lra.h (lra_reset_dependent_filters): Declare.

recog: Handle dependent filters.

This patch adds dependent-filter handling to recog.
When verifying the constraints of an instruction, just after register
filters are checked, it calls eval_dependent_filter for the operand and
its referenced operand.

gcc/ChangeLog:

* recog.cc (preprocess_constraints): Initialize dependent
filter.
(test_dependent_filter): New function wrapping
eval_dependent_filter.
(constrain_operands): Test dependent filter in strict mode.
* recog.h (struct operand_alternative): Declare
dependent_filters.
(alternative_dependent_filters): New function.

genpreds: Dependent, dynamic register filters.

This patch adds foundational support for register filters that depend on
or reference another operand.  The patch borrows heavily from Richard's
work on register filters.

As opposed to register filters, dependent filters need a runtime
evaluation function that dispatches to a target function (usually).
Common code can then evaluate the filter via
 eval_dependent_filter (id, ...);

gcc/ChangeLog:

* doc/md.texi: Document dependent filters.
* doc/tm.texi: Ditto.
* doc/tm.texi.in: Ditto.
* genconfig.cc (main): Add number of dependent filters.
* genpreds.cc (add_constraint): Add dependent-filter reference
operand.
(process_define_register_constraint): Handle dependent filter.
(write_get_register_filter): Ditto.
(write_get_register_filter_id): Ditto.
(write_dependent_filter_helpers_h): Ditto.
(write_dependent_filter_functions_c): Ditto.
(write_tm_preds_h): Ditto.
(write_insn_preds_c): Ditto.
(main): Ditto.
* gensupport.cc (process_define_register_constraint): Ditto.
* gensupport.h (get_register_filter_id): Declare.
* rtl.def (DEFINE_REGISTER_CONSTRAINT): Adjust for dependent
filter.

vect: Do not use grouped gather for single pieces.

Right now, we even use a grouped gather/scatter for single pieces, i.e.
when there is no stride involved.  This patch guards grouped gather with
>= 2 pieces.

gcc/ChangeLog:

* tree-vect-stmts.cc (vect_use_grouped_gather): Only use when
there are at least two pieces.

Revert "mips: fix unintialized operand use in sync_{old,new}_<optab>_12"

This reverts commit 1d6d7e982a982724ed8d9efc7eaa0f38638f8027.

libstdc++: Use const void* for parameters of some internal helpers [PR125684]

libstdc++-v3/ChangeLog:

PR libstdc++/125684
* src/c++11/random.cc (bad_seed, which_source): Change void*
parameters to const void *.

libstdc++: Fix comment typo in <bits/chrono.h>

libstdc++-v3/ChangeLog:

* include/bits/chrono.h (std::chrono_literals): Fix typo in
comment.

libstdc++: Remove STLport link from docs

libstdc++-v3/ChangeLog:

* doc/xml/manual/debug_mode.xml: Remove 404 link to stlport
website and modernise some text about debug modes in other
implementations.
* doc/html/manual/debug_mode_design.html: Regenerate.

MAINTAINERS: Add missing write-after accounts

A small number of accounts associated with maintainer roles were missing an
entry in the write-after section of the MAINTAINERS file with the
associated sourceware account.

ChangeLog:

* MAINTAINERS (Write After): Add details for Robert Dubner,
Ben Kosnik, James Lowden, Yunhai Shang and Andrew Waterman.
(CPU Ports, nds32): Remove Shiva Chen - stepped down.

c++: ubsan and inherited vptr [PR125745]

cp_ubsan_instrument_vptr tried to open-code vfield access and failed to
look into the base subobject to find it.  We have a function for that.

PR c++/125745

gcc/cp/ChangeLog:

* cp-ubsan.cc (cp_ubsan_instrument_vptr): Use build_vfield_ref.

gcc/testsuite/ChangeLog:

* g++.dg/ubsan/vptr-19.C: New test.

RISC-V: Add support for Zvabd extension

This patch adds support for the RISC-V Zvabd (Vector Absolute Difference)
extension, based on the current draft specification:
https://github.com/riscv/integer-vector-absolute-difference/pull/1

Zvabd is now in the "Specification in Freeze" state:
https://riscv.atlassian.net/browse/RVS-3896

It adds patterns for:
- vabs
- vabd/vabdu
- vwabda/vwabdau

gcc/ChangeLog:

* config/riscv/autovec.md: Add auto-vectorization patterns for
Zvabd instructions.
* config/riscv/autovec-opt.md: Add widening absolute-difference
accumulate combine patterns.
* config/riscv/riscv-ext.def: Add Zvabd extension entry.
* config/riscv/riscv-ext.opt: Add Zvabd option.
* config/riscv/vector-iterators.md: Update for Zvabd.
* config/riscv/vector.md: Add Zvabd patterns.
* doc/riscv-ext.texi: Document zvabd extension.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/zvabd-1.c: New tests for Zvabd.

Co-authored-by: Yuke Tang <tang.yuke@zte.com.cn>
Signed-off-by: Zhongyao Chen <chen.zhongyao@zte.com.cn>

libstdc: check pmr traits allocate_at_least (P0401) [PR125890]

Add check that the specialization of std::allocator_traits on
pmr::polymorphic_allocator<T> defines allocate_at_least.

libstdc++-v3/Changelog:
PR libstdc++/125890
* testsuite/20_util/polymorphic_allocator/at_least.cc: New test.

aarch64: Fix unsharing in svset_impl::fold [PR125818]

svset_impl::fold lowers svset intrinsics into a copy of the entire tuple
and then a subsequent update of the given tuple member to the new vector
value, e.g.:

  D.14149 = svset2_f32 (a, 0, v);

gets lowered into:

  D.14149 = a;
  D.14149.__val[0] = v;

.  Because both stmts use the lhs of the original call stmt, the code
unshares the expressions.  As svset_impl::fold notes:

    /* [...]
       The fold routines expect the replacement statement to have the
       same lhs as the original call, so return the copy statement
       rather than the field update.  */

ultimately gsi_replace asserts that:

  gimple_get_lhs (orig_stmt) == gimple_get_lhs (stmt)

i.e. requiring pointer equality, but the copy stmt we build is:

  gassign *copy = gimple_build_assign (unshare_expr (f.lhs), rhs_tuple);

and notably the unshare_expr means that the pointer equality test above
fails.  For VAR_DECLs (as above) it happens to work, since those aren't
unshared.  mostly_copy_tree_r (called from unshare_expr) has:

  /* Stop at types, decls, constants like copy_tree_r.  */
  else if (TREE_CODE_CLASS (code) == tcc_type
   || TREE_CODE_CLASS (code) == tcc_declaration
   || TREE_CODE_CLASS (code) == tcc_constant)
    *walk_subtrees = 0;

but for MEM_EXPRs (as with the tescase in the PR) we *do* actually
unshare them, and thus trip the assert in gsi_replace (or since
r17-1237-g4fb2541debcca1, ICE in completely_unused, but the root cause
is the same).

We want the stmt returned from svset_impl::fold (copy) to have a
pointer-identical lhs as the original stmt, so this patch just changes
which use of f.lhs is unshared.  We keep copy's use as per the original
stmt, and unshare the use in the update stmt instead.

gcc/ChangeLog:

PR target/125818
* config/aarch64/aarch64-sve-builtins-base.cc (svset_impl::fold): Fix
unsharing to ensure the returned stmt has the exact same lhs as the
original.

gcc/testsuite/ChangeLog:

PR target/125818
* gcc.target/aarch64/torture/pr125818.c: New test.

i386: Emit vunpcklpd for register V4DF/V8DF movddup [PR107057]

The avx512f_movddup512 and avx_movddup256 patterns only accepted a
memory source operand, so an even-lane duplicate of a value already in
a register forced that register to be spilled to the stack and
reloaded with vmovddup.

Add a register source alternative that emits vunpcklpd, which performs
the same even-lane interleave directly on a register operand.  A
genuine memory source still selects vmovddup.

The register alternative duplicates a single source operand
(vunpcklpd %1, %1, %0), so it is typed sselog1, the single-source SSE
logical type, while the memory alternative keeps ssemov.

gcc/ChangeLog:

PR target/107057
* config/i386/sse.md (avx512f_movddup512<mask_name>): Add a
register source alternative that emits vunpcklpd.
(avx_movddup256<mask_name>): Likewise.

gcc/testsuite/ChangeLog:

PR target/107057
* gcc.target/i386/avx512-movedup.c: New test.

Co-authored-by: Ashwin Godbole <Ashwin.Godbole@amd.com>
Signed-off-by: Sarvesh Chandra <Sarvesh.Chandra@amd.com>

Fortran: Fix memory leaks in PDT tests. [PR121972]

2026-06-22  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/121972
* decl.cc (build_struct): Convert the PDT template before the
call to gfc_build_class_symbol.

gcc/testsuite/
PR fortran/121972
* gfortran.dg/pdt_77.f03: Add 'finalalize_navier_stokes', which
tests that the 'navier_stokes' component 'p' is pointed to the
correct vtable in both tests. Check that VIEW_CONVERT_EXPR does
not appear in the tree dump.

x86: Use previous scratch register in LCP stall peepholes

Since LCP stall peepholes are added after register allocation, each
peephole may use a different scratch register.  For input:

extern void bar (void);

void
foo (short *dst)
{
  dst[0] = 3;
  asm volatile ("" : : : "memory");
  dst[2] = 3;
  bar ();
  dst[1] = 3;
  asm volatile ("" : : : "memory");
  dst[4] = 3;
}

with LCP stall peepholes, GCC generates:

movl $3, %eax
pushq %rbx
movq %rdi, %rbx
movw %ax, (%rdi)
movl $3, %edx
movw %dx, 4(%rdi)
call bar
movl $3, %ecx
movw %cx, 2(%rbx)
movl $3, %esi
movw %si, 8(%rbx)
popq %rbx

using 4 different scratch registers vs without LCP stall peepholes:

pushq %rbx
movq %rdi, %rbx
movw $3, (%rdi)
movw $3, 4(%rdi)
call bar
movw $3, 2(%rbx)
movw $3, 8(%rbx)
popq %rbx

Add ix86_output_lcp_stall_peephole to generate LCP stall peepholes with
the previous scratch register:

1. Scan backward for the previous scratch register definition with
the same immediate operand in the same basic block.
2. The previous scratch register is unusable if it is set between the
previous scratch register definition and the current instruction.
3. If a usable previous scratch register is found, ignore the allocated
scratch register and use the previous scratch register.  Otherwise, use
the allocated scratch register.

so that the same scratch register can be reused if possible:

movl $3, %eax
pushq %rbx
movq %rdi, %rbx
movw %ax, (%rdi)
movw %ax, 4(%rdi)
call bar
movl $3, %ecx
movw %cx, 2(%rbx)
movw %cx, 8(%rbx)
popq %rbx

I backported this patch to GCC 16:

1. When bootstrapping GCC 16 with only C and C++ enabled, this optimization
triggers 54 times.  No regressions.
2. When building glibc 2.44, this optimization triggers 33 times.  No
regressions.
3. When building Linux kernel 7.1.1, this optimization triggers 2099 times.
Kernel boots correctly.

Tested on Linux/x86-64 and Linux/i686.

gcc/

PR target/125893
* config/i386/i386-expand.cc (ix86_expand_lcp_stall_peephole): New.
* config/i386/i386-protos.h (ix86_expand_lcp_stall_peephole):
Likewise.
* config/i386/i386.md (TARGET_LCP_STALL peepholes): Call
ix86_expand_lcp_stall_peephole.

gcc/testsuite/

PR target/125893
* gcc.target/i386/pr125893-1.c: New test.
* gcc.target/i386/pr125893-2.c: Likewise.
* gcc.target/i386/pr125893-3.c: Likewise.
* gcc.target/i386/pr125893-4.c: Likewise.
* gcc.target/i386/pr125893-5.c: Likewise.
* gcc.target/i386/pr125893-6.c: Likewise.
* gcc.target/i386/pr125893-7.c: Likewise.
* gcc.target/i386/pr125893-8.c: Likewise.
* gcc.target/i386/pr125893-9.c: Likewise.
* gcc.target/i386/pr125893-10.c: Likewise.
* gcc.target/i386/pr125893-11.c: Likewise.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>

tree-optimization/110743 - do not warn for bit sets/clears to uninit memory

The following avoids diagnosing bit sets/clears that involve RMW
cycles to uninitialized memory.  This is for example exposed by
__builtin_clear_padding lowering which suppresses diagnostics but
those can re-surface with vectorization.

PR tree-optimization/110743
* tree-ssa-uninit.cc (maybe_warn_operand): Suppress diagnostics
on RMW cycles setting/clearing bits.

* gcc.dg/uninit-pr110743.c: New testcase.

i386: implement cond_vec_cbranch_any/all for narrow boolean vectors

gcc/ChangeLog:

* config/i386/sse.md (V_ANY_CBRANCH): New mode iterator.
(cond_vec_cbranch_any<mode>): New define_expand.
(cond_vec_cbranch_all<mode>): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/vect-cbranch-cond-any-128.c: New test.
* gcc.target/i386/vect-cbranch-cond-any-256.c: Ditto.
* gcc.target/i386/vect-cbranch-cond-any-run.c: Ditto.
* gcc.target/i386/vect-cbranch-cond-all-128.c: Ditto.
* gcc.target/i386/vect-cbranch-cond-all-256.c: Ditto.
* gcc.target/i386/vect-cbranch-cond-all-run.c: Ditto.

dojump: use simplify_expand_binop for vector boolean mask

When either op0 or op1 is a constant, expand_binop can emit an extra AND
during expansion. Use simplify_expand_binop here to avoid creating it in
the first place.

gcc/ChangeLog:

* dojump.cc (do_compare_rtx_and_jump): Use simplify_expand_binop
instead of expand_binop.

doc: clarify {cond,cond_len}_vec_cbranch_all patterns.

gcc/ChangeLog:

* doc/md.texi (vec_cbranch_all<mode>): Clarify how the
middle-end invoke the pattern.
(cond_vec_cbranch_all<mode>): Ditto.
(cond_len_vec_cbranch_all<mode>): Ditto.

rs6000: Add future-altivec builtin stanza predicate

This patch adds infrastructure support for future-altivec as a
builtin-stanza predicate for PowerPC. This provides a framework for
defining builtins that require both -mcpu=future and -maltivec options.

The future-altivec stanza can be used to add AltiVec-specific builtins for
future PowerPC ISA extensions.

2026-06-23  Kishan Parmar  <kishan@linux.ibm.com>

gcc/ChangeLog:
* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Handle
ENB_FUTURE_ALTIVEC and issue a diagnostic requiring -mcpu=future
and -maltivec.
(rs6000_builtin_is_supported): Check TARGET_FUTURE && TARGET_ALTIVEC
for ENB_FUTURE_ALTIVEC built-ins.
* config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add
BSTZ_FUTURE_ALTIVEC entry.
(stanza_map): Add future-altivec stanza mapping.
(enable_string): Add ENB_FUTURE_ALTIVEC.
(write_decls): Add ENB_FUTURE_ALTIVEC to the bif_enable enum in the
generated header file.

cs-elim: Don't set TODO_TODO_update_ssa_only_virtuals

Now after r17-1753-g2e5184c4a93c4b0d4067, all parts of
cs-elim manually keeps the VOPS up todate and don't need
any renaming, don't return TODO_TODO_update_ssa_only_virtuals
when something is inserted.

Pushed as obvious after a bootstrap/test on x86_64-linux-gnu.

gcc/ChangeLog:

* tree-ssa-phiopt.cc (pass_cselim::execute): Don't
return TODO_TODO_update_ssa_only_virtuals.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>

i386: Add HYGON c86-4g-m8 support

Add c86-4g-m8 as a new HYGON Family 18h model 8 processor.  It
inherits the c86-4g-m7 ISA set and most tuning decisions, including
the same processor costs and scheduling model baseline.

The patch wires c86-4g-m8 into the common x86 processor tables,
driver CPU detection, target macros, --with-arch/--with-cpu handling,
builtin CPU detection and documentation.  It also extends the c86-4g
tuning masks that already special-case c86-4g-m7 to cover c86-4g-m8.

For scheduling, rename the shared scheduling description file from
gcc/config/i386/c86-4g-m7.md to gcc/config/i386/c86-4g-m7m8.md and
reuse the c86-4g-m7 scheduling reservations for c86-4g-m8 where the
latency and resource usage are the same.  Add separate c86-4g-m8
reservations for the few operations with different latency.  This patch
does not affect genautomata build time.

gcc/ChangeLog:

* common/config/i386/cpuinfo.h (get_hygon_cpu): Detect HYGON
Family 18h model 8 as c86-4g-m8.
* common/config/i386/i386-common.cc (processor_names): Add
c86-4g-m8.
(processor_alias_table): Likewise.
* common/config/i386/i386-cpuinfo.h (enum processor_subtypes): Add
HYGONFAM18H_C86_4G_M8.
* config.gcc: Add c86-4g-m8 to supported x86 CPUs and handle
c86_4g_m8 target triples.
* config/i386/c86-4g-m7.md: Rename to ...
* config/i386/c86-4g-m7m8.md: ... this and extend shared c86-4g-m7
scheduling reservations to c86-4g-m8.
(c86_4g_m8_imovx_cwde): New reservation.
(c86_4g_m7_imov_xchg): Add c86_4g_m8 to CPU attribute.
(c86_4g_m7_imov_xchg_load): Ditto.
(c86_4g_m7_imov): Ditto.
(c86_4g_m7_imov_load): Ditto.
(c86_4g_m7_imov_store): Ditto.
(c86_4g_m7_push): Ditto.
(c86_4g_m7_push_mem): Ditto.
(c86_4g_m7_pop): Ditto.
(c86_4g_m7_pop_mem): Ditto.
(c86_4g_m7_imul): Ditto.
(c86_4g_m7_imul_load): Ditto.
(c86_4g_m7_idiv): Ditto.
(c86_4g_m7_idiv_QI): Ditto.
(c86_4g_m7_idiv_load): Ditto.
(c86_4g_m7_idiv_QI_load): Ditto.
(c86_4g_m7_insn): Ditto.
(c86_4g_m7_insn_load): Ditto.
(c86_4g_m7_insn_store): Ditto.
(c86_4g_m7_insn2_store): Ditto.
(c86_4g_m7_insn_both): Ditto.
(c86_4g_m7_setcc): Ditto.
(c86_4g_m7_setcc_load): Ditto.
(c86_4g_m7_setcc_store): Ditto.
(c86_4g_m7_alu1_double): Ditto.
(c86_4g_m7_alu1_double_load): Ditto.
(c86_4g_m7_alu1_vector): Ditto.
(c86_4g_m7_alu1_vector_load): Ditto.
(c86_4g_m7_alu1_direct): Ditto.
(c86_4g_m7_alu1_direct_load): Ditto.
(c86_4g_m7_call): Ditto.
(c86_4g_m7_branch): Ditto.
(c86_4g_m7_branch_load): Ditto.
(c86_4g_m7_lea): Ditto.
(c86_4g_m7_leave): Ditto.
(c86_4g_m7_str): Ditto.
(c86_4g_m7_str_load): Ditto.
(c86_4g_m7_ieu_vector): Ditto.
(c86_4g_m7_ieu_vector_load): Ditto.
(c86_4g_m7_sse_insertimm): Ditto.
(c86_4g_m7_sse_insert): Ditto.
(c86_4g_m7_fp_cmov): Ditto.
(c86_4g_m7_fp_mov_direct_load): Ditto.
(c86_4g_m7_fp_mov_direct_store): Ditto.
(c86_4g_m7_fp_mov_double_load): Ditto.
(c86_4g_m7_fp_mov_double_store): Ditto.
(c86_4g_m7_fp_mov_direct): Ditto.
(c86_4g_m7_fp_sqrt): Ditto.
(c86_4g_m7_fp_spc_direct): Ditto.
(c86_4g_m7_fp_spc): Ditto.
(c86_4g_m7_fp_op_mul): Ditto.
(c86_4g_m7_fp_op_mul_load): Ditto.
(c86_4g_m7_fp_op_imul_load): Ditto.
(c86_4g_m7_fp_div): Ditto.
(c86_4g_m7_fp_div_load): Ditto.
(c86_4g_m7_fp_idiv_load): Ditto.
(c86_4g_m7_fp_fsgn): Ditto.
(c86_4g_m7_fp_fcmp): Ditto.
(c86_4g_m7_fp_fcmp_load): Ditto.
(c86_4g_m7_fp_mmx): Ditto.
(c86_4g_m7_mmx_add_cmp): Ditto.
(c86_4g_m7_mmx_add_cmp_load): Ditto.
(c86_4g_m7_mmx_cvt): Ditto.
(c86_4g_m7_mmx_cvt_load): Ditto.
(c86_4g_m7_mmx_shift): Ditto.
(c86_4g_m7_mmx_shift_load): Ditto.
(c86_4g_m7_mmx_shift_avg): Ditto.
(c86_4g_m7_mmx_shift_avg_load): Ditto.
(c86_4g_m7_mmx_shift_sadbw): Ditto.
(c86_4g_m7_mmx_shift_sadbw_load): Ditto.
(c86_4g_m7_mmx_mov): Ditto.
(c86_4g_m7_mmx_mov_store): Ditto.
(c86_4g_m7_mmx_mov_load): Ditto.
(c86_4g_m7_mmx_mul): Ditto.
(c86_4g_m7_mmx_mul_load): Ditto.
(c86_4g_m7_sse_pinsr_reg): Ditto.
(c86_4g_m7_sse_pinsr_reg_load): Ditto.
(c86_4g_m7_avx_vpinsr_reg): Ditto.
(c86_4g_m7_avx_vpinsr_reg_load): Ditto.
(c86_4g_m7_avx512_perm_xmm): Ditto.
(c86_4g_m7_avx512_perm_xmm_opload): Ditto.
(c86_4g_m7_avx512_permi2_ymm): Ditto.
(c86_4g_m7_avx512_permi2_zmm): Ditto.
(c86_4g_m7_avx512_permi2_ymm_load): Ditto.
(c86_4g_m7_avx512_permi2_zmm_load): Ditto.
(c86_4g_m7_avx512_perm_zmm_imm): Ditto.
(c86_4g_m7_avx512_perm_zmm_imm_load): Ditto.
(c86_4g_m7_avx512_perm_zmm_noimm): Ditto.
(c86_4g_m7_sse_perm_zmm_noimm_load): Ditto.
(c86_4g_m7_avx512_insertx_ymm): Ditto.
(c86_4g_m7_avx512_insertx_ymem): Ditto.
(c86_4g_m7_avx512_insertx_zxmm): Ditto.
(c86_4g_m7_avx512_insertx_zxmem): Ditto.
(c86_4g_m7_avx512_insertx_zymm): Ditto.
(c86_4g_m7_avx512_insertx_zymem): Ditto.
(c86_4g_m7_avx_insertx_ymm): Ditto.
(c86_4g_m7_avx_insertx_ymem): Ditto.
(c86_4g_m7_avx512_shuf_xymm): Ditto.
(c86_4g_m7_avx512_shuf_zmm): Ditto.
(c86_4g_m7_avx512_shuf_xymem): Ditto.
(c86_4g_m7_avx512_shuf_zmem): Ditto.
(c86_4g_m7_sselogic_xymm): Ditto.
(c86_4g_m7_sselogic_xymm_load): Ditto.
(c86_4g_m7_avx512_cmpestr): Ditto.
(c86_4g_m7_avx512_cmpestr_load): Ditto.
(c86_4g_m7_avx512_log): Ditto.
(c86_4g_m7_avx512_log_load): Ditto.
(c86_4g_m7_avx512_vdbpsadbw_xymm): Ditto.
(c86_4g_m7_avx512_vdbpsadbw_xymem): Ditto.
(c86_4g_m7_avx512_vdbpsadbw_zmm): Ditto.
(c86_4g_m7_avx512_vdbpsadbw_zmem): Ditto.
(c86_4g_m7_avx512_abs): Ditto.
(c86_4g_m7_avx512_abs_load): Ditto.
(c86_4g_m7_avx_sign): Ditto.
(c86_4g_m7_avx_sign_load): Ditto.
(c86_4g_m7_avx_blend): Ditto.
(c86_4g_m7_avx_blend_load): Ditto.
(c86_4g_m7_avx512_aes): Ditto.
(c86_4g_m7_avx512_aes_load): Ditto.
(c86_4g_m7_avx_aes): Ditto.
(c86_4g_m7_avx_aes_load): Ditto.
(c86_4g_m7_extr): Ditto.
(c86_4g_m7_extr_store): Ditto.
(c86_4g_m7_avx_ssecomi_comi): Ditto.
(c86_4g_m7_avx_ssecomi_comi_load): Ditto.
(c86_4g_m7_avx_ssecomi_test): Ditto.
(c86_4g_m7_avx_ssecomi_test_load): Ditto.
(c86_4g_m7_avx512_imul): Ditto.
(c86_4g_m7_avx512_imul_mem): Ditto.
(c86_4g_m7_avx_imul): Ditto.
(c86_4g_m7_avx_imul_mem): Ditto.
(c86_4g_m7_avx512_mov_vmov): Ditto.
(c86_4g_m7_avx512_mov_vmov_store): Ditto.
(c86_4g_m7_avx512_mov_vmov_load): Ditto.
(c86_4g_m7_avx512_vpmovx_y): Ditto.
(c86_4g_m7_avx512_vpmovx_y_load): Ditto.
(c86_4g_m7_avx512_vpmovx_z): Ditto.
(c86_4g_m7_avx512_vpmovx_z_load): Ditto.
(c86_4g_m7_avx512_vpmovx_x): Ditto.
(c86_4g_m7_avx512_vpmovx_x_load): Ditto.
(c86_4g_m7_avx_vpmovx_xx): Ditto.
(c86_4g_m7_avx_vpmovx_xx_load): Ditto.
(c86_4g_m7_avx512_expand): Ditto.
(c86_4g_m7_avx512_expand_load): Ditto.
(c86_4g_m7_avx512_expand_z): Ditto.
(c86_4g_m7_avx512_expand_z_load): Ditto.
(c86_4g_m7_avx512_movnt_load): Ditto.
(c86_4g_m7_avx512_movnt_store): Ditto.
(c86_4g_m7_sse_movnt_store): Ditto.
(c86_4g_m7_sse_movnt): Ditto.
(c86_4g_m7_avx512_blendv): Ditto.
(c86_4g_m7_avx512_blendv_load): Ditto.
(c86_4g_m7_sse_mov2): Ditto.
(c86_4g_m7_sse_mov2_load): Ditto.
(c86_4g_m7_avx512_sseishft_aligr): Ditto.
(c86_4g_m7_avx512_sseishft_aligr_load): Ditto.
(c86_4g_m7_avx512_sseishft_vshift): Ditto.
(c86_4g_m7_avx512_sseishft_vshift_load): Ditto.
(c86_4g_m7_avx512_sseadd_maxmin): Ditto.
(c86_4g_m7_avx512_sseadd_maxmin_load): Ditto.
(c86_4g_m7_avx_sseadd_maxmin): Ditto.
(c86_4g_m7_avx_sseadd_maxmin_load): Ditto.
(c86_4g_m7_sse_sseadd_maxmin): Ditto.
(c86_4g_m7_sse_sseadd_maxmin_load): Ditto.
(c86_4g_m7_avx512_sseadd): Ditto.
(c86_4g_m7_avx512_sseadd_load): Ditto.
(c86_4g_m7_avx_sseadd_hplus): Ditto.
(c86_4g_m7_avx_sseadd_hplus_load): Ditto.
(c86_4g_m7_avx512_sseiadd_madd): Ditto.
(c86_4g_m7_avx512_sseiadd_madd_mem): Ditto.
(c86_4g_m7_avx_sseiadd_sadbw): Ditto.
(c86_4g_m7_avx_sseiadd_sadbw_mem): Ditto.
(c86_4g_m7_sse_sseiadd_sadbw): Ditto.
(c86_4g_m7_sse_sseiadd_sadbw_mem): Ditto.
(c86_4g_m7_sse_sseiadd_madd): Ditto.
(c86_4g_m7_sse_sseiadd_madd_mem): Ditto.
(c86_4g_m7_avx512_sseiadd_avg): Ditto.
(c86_4g_m7_avx512_sseiadd_avg_load): Ditto.
(c86_4g_m7_avx_sseiadd_hplus): Ditto.
(c86_4g_m7_avx_sseiadd_hplus_load): Ditto.
(c86_4g_m7_sse_sseiadd_hplus): Ditto.
(c86_4g_m7_sse_sseiadd_hplus_load): Ditto.
(c86_4g_m8_avx512_ssemul): New reservation.
(c86_4g_m8_avx512_ssemul_load): Ditto.
(c86_4g_m7_avx512_ssediv_x): Add c86_4g_m8 to CPU attribute.
(c86_4g_m7_avx512_ssediv_xmem): Ditto.
(c86_4g_m7_avx512_ssediv_y): Ditto.
(c86_4g_m7_avx512_ssediv_ymem): Ditto.
(c86_4g_m7_avx512_ssediv_z): Ditto.
(c86_4g_m7_avx512_ssediv_zmem): Ditto.
(c86_4g_m7_avx512_ssecmp): Ditto.
(c86_4g_m7_avx512_ssecmp_load): Ditto.
(c86_4g_m7_avx512_ssecmp_z): Ditto.
(c86_4g_m7_avx512_ssecmp_z_load): Ditto.
(c86_4g_m7_avx512_ssecmp_vp): Ditto.
(c86_4g_m7_avx512_ssecmp_vp_load): Ditto.
(c86_4g_m7_avx512_ssecmp_vp_z): Ditto.
(c86_4g_m7_avx512_ssecmp_vp_z_load): Ditto.
(c86_4g_m7_avx_ssecmp_vp): Ditto.
(c86_4g_m7_avx_ssecmp_vp_load): Ditto.
(c86_4g_m7_avx512_ssecmp_test): Ditto.
(c86_4g_m7_avx512_ssecmp_test_load): Ditto.
(c86_4g_m7_avx512_ssecvt_xy): Ditto.
(c86_4g_m7_avx512_ssecvt_xy_load): Ditto.
(c86_4g_m7_avx512_ssecvt_y_z): Ditto.
(c86_4g_m7_avx512_ssecvt_y_z_load): Ditto.
(c86_4g_m7_avx512_ssecvt_z): Ditto.
(c86_4g_m7_avx512_ssecvt_z_load): Ditto.
(c86_4g_m7_avx_ssecvt): Ditto.
(c86_4g_m7_avx_ssecvt_load): Ditto.
(c86_4g_m7_sse_ssecvt_pspi): Ditto.
(c86_4g_m7_sse_ssecvt_pspi_load): Ditto.
(c86_4g_m7_sse_ssecvt_pi): Ditto.
(c86_4g_m7_sse_ssecvt_pi_load): Ditto.
(c86_4g_m8_avx512_muladd): New reservation.
(c86_4g_m8_avx512_muladd_load): Ditto.
(c86_4g_m7_avx512_muladd_madd): Add c86_4g_m8 to CPU attribute.
(c86_4g_m7_avx512_muladd_madd_load): Ditto.
(c86_4g_m7_avx512_sse_range): Ditto.
(c86_4g_m7_avx512_sse_range_load): Ditto.
(c86_4g_m7_avx512_sse_conflict_x): Ditto.
(c86_4g_m7_avx512_sse_conflict_x_load): Ditto.
(c86_4g_m7_avx512_sse_conflict_y): Ditto.
(c86_4g_m7_avx512_sse_conflict_y_load): Ditto.
(c86_4g_m7_avx512_sse_conflict_z): Ditto.
(c86_4g_m7_avx512_sse_conflict_z_load): Ditto.
(c86_4g_m7_avx512_sse_class): Ditto.
(c86_4g_m7_avx512_sse_class_load): Ditto.
(c86_4g_m7_avx512_sse_class_z): Ditto.
(c86_4g_m7_avx512_sse_class_z_load): Ditto.
(c86_4g_m7_avx_sse): Ditto.
(c86_4g_m7_avx_sse_load): Ditto.
(c86_4g_m7_avx512_sse_sqrt_sf_x): Ditto.
(c86_4g_m7_avx512_sse_sqrt_sf_xload): Ditto.
(c86_4g_m7_avx512_sse_sqrt_sf_y): Ditto.
(c86_4g_m7_avx512_sse_sqrt_sf_yload): Ditto.
(c86_4g_m7_avx512_sse_sqrt_sf_z): Ditto.
(c86_4g_m7_avx512_sse_sqrt_sf_zload): Ditto.
(c86_4g_m7_avx512_sse_sqrt_df_x): Ditto.
(c86_4g_m7_avx512_sse_sqrt_df_xload): Ditto.
(c86_4g_m7_avx512_sse_sqrt_df_y): Ditto.
(c86_4g_m7_avx512_sse_sqrt_df_yload): Ditto.
(c86_4g_m7_avx512_sse_sqrt_df_z): Ditto.
(c86_4g_m7_avx512_sse_sqrt_df_zload): Ditto.
(c86_4g_m7_avx512_msklog): Ditto.
(c86_4g_m7_avx512_msklog_vector): Ditto.
(c86_4g_m7_avx512_mskmov_reg_k): Ditto.
(c86_4g_m7_avx512_mskmov_xy_k): Ditto.
(c86_4g_m7_avx512_mskmov_z_k): Ditto.
(c86_4g_m7_avx512_mskmov_k_k): Ditto.
(c86_4g_m7_avx512_mskmov_k_reg): Ditto.
(c86_4g_m7_avx512_mskmov_k_m): Ditto.
* config/i386/driver-i386.cc (host_detect_local_cpu): Detect
c86-4g-m8.
* config/i386/i386-c.cc (ix86_target_macros_internal): Define
c86-4g-m8 arch and tune macros.
* config/i386/i386-options.cc (m_C86_4G_M8): New macro.
(m_C86_4G): Include m_C86_4G_M8.
(processor_cost_table): Add c86_4g_m8_cost.
* config/i386/i386.cc (ix86_reassociation_width): Handle
PROCESSOR_C86_4G_M8.
* config/i386/i386.h (enum processor_type): Add
PROCESSOR_C86_4G_M8.
(PTA_C86_4G_M8): New.
* config/i386/i386.md: Add c86_4g_m8 to cpu attribute.
* config/i386/x86-tune-costs.h (c86_4g_m8_cost): New.
* config/i386/x86-tune-sched.cc (ix86_issue_rate): Handle
PROCESSOR_C86_4G_M8.
(ix86_adjust_cost): Likewise.
* config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Include
m_C86_4G_M8.
(X86_TUNE_USE_SCATTER_4PARTS): Likewise.
(X86_TUNE_USE_SCATTER_8PARTS): Likewise.
(X86_TUNE_SSE_REDUCTION_PREFER_PSHUF): Likewise.
(X86_TUNE_AVX512_SPLIT_REGS): Likewise.
(X86_TUNE_AVX512_AVOID_VEC_PERM): Likewise.
(X86_TUNE_AVX512_MOVE_BY_PIECES): Likewise.
(X86_TUNE_AVX512_MASKED_EPILOGUES): Likewise.
* doc/extend.texi: Document c86-4g-m8 for __builtin_cpu_is.
* doc/invoke.texi: Document c86-4g-m8.

gcc/testsuite/ChangeLog:

* g++.target/i386/mv33.C: Add c86-4g-m8 target clone test.
* gcc.target/i386/funcspec-56.inc: Add c86-4g-m8 arch and tune
target attribute tests.

Signed-off-by: Xin Liu <liulxx@hygon.cn>

Daily bump.

c++: fix spurious -Wrange-loop-construct warning [PR125697]

Here we issue a bogus -Wrange-loop-construct warning because the
is_trivially_xible check uses `const pair<int>` which makes it seem
like `pair<T>::pair(const pair<_U1> &&)` would actually be used,
which is non-trivial, while the loop would actually use a trivial
copy.  Fixed by using `const pair<int> &` for the is_trivially_xible
check.

PR c++/125697

gcc/cp/ChangeLog:

* cp-tree.h (trivially_copy_constructible_p): Declare.
* parser.cc (warn_for_range_copy): Use it.
* reflect.cc (eval_is_trivially_copy_constructible_type): Use it.
* tree.cc (trivially_copy_constructible_p): New.

gcc/ChangeLog:

* doc/invoke.texi: Clarify -Wrange-loop-construct description.

gcc/testsuite/ChangeLog:

* g++.dg/warn/Wrange-loop-construct4.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>

c++/reflection: include lambda op() in members_of [PR125889]

members_of doesn't append the call operator of a closure type
to ELTS in class_members_of and so the assert in the test doesn't
pass.

PR c++/125889

gcc/cp/ChangeLog:

* reflect.cc (class_members_of): Also append LAMBDA_FUNCTION_P
from the implicitly_declared vector.

gcc/testsuite/ChangeLog:

* g++.dg/reflect/members_of16.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>

phiopt: Reject instead of assert that the 2 vuse of the loads are the same [PR125923]

So it turns out I thought we would always get a virtual phi when there was a store
in front of the load. This is correct for all normal code except if heading into
an infinite loop where there are no stores/loads. Since this is leading to
an infinite loop, rejecting this case does not change performance at all.

Bootstrapped and tested on x86_64-linux-gnu.

PR tree-optimization/125923

gcc/ChangeLog:

* tree-ssa-phiopt.cc (factor_out_conditional_load): Change
assert of the vuse being the same to rejecting if they are
different without a virtual phi.

gcc/testsuite/ChangeLog:

* gcc.dg/torture/pr125923-1.c: New test.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>

cselim: Fix comment on why no loads in the middle bb when nontrap

This updates the comment in cond_store_replacement which was
added in r17-1404-gcd33e5ad1945f1 as promised.

Pushed as obvious after bootstrap/test on x86_64-linux-gnu.

gcc/ChangeLog:

* tree-ssa-phiopt.cc (cond_store_replacement): Fix comment
on no load for nontrapping.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>

cselim: manually keep upto date the vops

While working on related code I noticed that we can keep
the vops up todate so rename ssa does not need to do anything here.
This manually updates the 2 inserted statements, the load on the edge
and the store in the join bb. This should be a small compile
time optimization.

Boostrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

* tree-ssa-phiopt.cc (cond_store_replacement): Update
the vuse on the new load and the vuse/vdef on the new
store.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>

cselim: Just use gsi_insert_before instead of checking if it is the end [PR125917]

This code dates before tuples so it used to do some tricks to try to insert
at the begining of the basic block. Now post tuples, to insert at the begining
of the basic block, you just need to use gsi_after_labels followed by
gsi_insert_before. This changes to do just that and simplifies the code
slightly.

Bootstrapped and tested on x86_64-linux-gnu.

PR tree-optimization/125917
gcc/ChangeLog:

* tree-ssa-phiopt.cc (cond_store_replacement): Just call
gsi_insert_before instead of checking gsi_end_p.
(cond_if_else_store_replacement_1): Likewise.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>

cobol: Remove %I spec

Remove %I from the spec string because gcobol does not use the C
preprocessor library and does not search include/ or include-fixed/
directories.  Instead, system copybooks (as they're called) follow the
runtime library and are installed into the LIBSUBDIR, similarly to
Modula-2's .def files.

For compilations relying on non-standard paths (i.e., outside the
installation prefix), -B is already handled by the cobol1 compiler.

gcc/cobol/ChangeLog:

* gcobol.1: Document -B.
* lang-specs.h: Remove %I spec.
* lang.opt: Remove options injected by %I.
* lang.opt.urls: Likewise.

Remove -*- C++ -*- tags for Emacs from .cc files.

There are still some -*- C++ -*- markers in .cc files.
They were needed after GCC transitioned to C++ but still
used .c extensions for C++ files.

These tags are no more needed, and this patch removes these
tags from some .cc files that still have them.

The preferred way of letting Emacs chose a major mode is by
means of file-name based rules.  Such tags can be annoying
when you have a different rule for .cc files, for example
when .cc files are bound to GNU style but default C++ style isn't.

gcc/cp/
* call.cc: Remove -*- C++ -*- tags for Emacs.
* class.cc: Same.
* constexpr.cc: Same.
* decl.cc: Same.
* init.cc: Same.
* mangle.cc: Same.
* mapper-resolver.cc: Same.
* parser.cc: Same.
* pt.cc: Same.
gcc/
* splay-tree-utils.cc: Remove -*- C++ -*- tags for Emacs.
* rtl-ssa/accesses.cc: Same.
* rtl-ssa/blocks.cc: Same.
* rtl-ssa/changes.cc: Same.
* rtl-ssa/functions.cc: Same.
* rtl-ssa/insns.cc: Same.

lto-plugin.c: c23 compatibility: char * -> const char *

There are two uses of strrchr with const char * parameters in
lto-plugin.c where the result gets assigned to a non-const char *
variable.

Make the variable const char * so that we don't throw away const-ness.
I've seen clang produce warnings about this when compiling lto-plugin.c.

Regtested and bootstrapped on x86_64 linux.

lto-plugin/ChangeLog:

* lto-plugin.c (process_symtab): char *s -> const char *s.
(process_symtab_extension): Ditto.

Signed-off-by: Filip Kastl <fkastl@suse.cz>

a68: return alias set 0 for Algol 68

Hi,

Following review feedback, this version adds the requested commit
subject prefix and an explanatory comment before the return statement
in a68_get_alias_set.

The frontend builds successfully and make check-algol68 passes with this
change.

Thanks,
Kanishka Solanki
[4. text/x-patch; 0001-a68-return-alias-set-0-for-Algol-68.patch]...
From daf6fde806010dcff462d4078992621646d841ae Mon Sep 17 00:00:00 2001
From: Kanishka Solanki <kanishkasolanki456s@gmail.com>
Date: Sun, 21 Jun 2026 21:34:40 +0530
Subject: [PATCH] a68: return alias set 0 for Algol 68

The default LANG_HOOKS_GET_ALIAS_SET implementation returns -1,
causing GCC to use its default alias set machinery.

Override LANG_HOOKS_GET_ALIAS_SET in the Algol 68 frontend and
return 0 so all objects are treated as potentially aliasing.

gcc/algol68/ChangeLog

* a68-lang.cc (a68_get_alias_set): New function.
(LANG_HOOKS_GET_ALIAS_SET): Define to a68_get_alias_set.

Signed-off-by: Kanishka Solanki <kanishkasolanki456s@gmail.com>