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2 months agotestsuite: xfail shrink-wrapping-vector-1.C until PR125400 is fixed
Andrew Pinski [Mon, 1 Jun 2026 19:50:50 +0000 (12:50 -0700)] 
testsuite: xfail shrink-wrapping-vector-1.C until PR125400 is fixed

After r17-603-gacfdad706d8acc, shrink-wrapping-vector-1.C started to
fail because of a missed optimization. So let's mark it as xfail
for the C++ versions where it fails (that is c++17 and down).

Pushed as obvious after testing to see if the testcase xfails correctly.

gcc/testsuite/ChangeLog:

* g++.dg/opt/shrink-wrapping-vector-1.C: xfail for C++17down.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
2 months agofortran: wrong generic resolution when actual argument is a procedure pointer
Jerry DeLisle [Tue, 26 May 2026 19:00:33 +0000 (12:00 -0700)] 
fortran: wrong generic resolution when actual argument is a procedure pointer

When a generic interface has two specific procedures -- one with a
procedure-pointer dummy and one with a data-object (e.g. REAL) dummy --
gfortran incorrectly resolved calls where the actual argument was a
procedure pointer to the data-object specific, resulting in the pointer
address being interpreted as a numeric value (wrong code).

The root cause was a missing check in gfc_compare_actual_formal: the
two existing checks guard the case where the formal is a proc_pointer
or FL_PROCEDURE but the actual is not; however the reverse direction
(actual is a proc_pointer but formal is a plain data object) was not
checked.  F23:15.5.2.5, para 2 forbids this pairing.

Assisted by: Claude Sonnet 4.6

gcc/fortran/ChangeLog:

PR fortran/125481
* interface.cc (gfc_compare_actual_formal): Add missing check that
rejects a procedure-pointer actual argument corresponding to a
data-object dummy argument (F23:15.5.2.5, para 2).  Restrict to
EXPR_VARIABLE to avoid false positives on calls through procedure
pointer components.

gcc/testsuite/ChangeLog:

PR fortran/125481
* gfortran.dg/generic_37.f90: New test.
* gfortran.dg/generic_38.f90: New test.

2 months agoPR target/122827: aarch64: Treat SVE modes as full-Z for callee-save accounting
Kyrylo Tkachov [Wed, 27 May 2026 20:47:48 +0000 (13:47 -0700)] 
PR target/122827: aarch64: Treat SVE modes as full-Z for callee-save accounting

PR122827 is a miscompile of 526.blender_r in SPEC2017 with
-Ofast -flto=auto -mcpu=neoverse-v2 -msve-vector-bits=128 --param aarch64-autovec-preference=sve-only.
Bisection landed on g:b191e8bdecf (the IRA cost-model rework for PR117477), and the
miscompile disappears with -mearly-ra=none, -fno-caller-saves, or
-fno-early-ra, all of which steer register allocation away from V8-V15.

The bug is in shade_material_loop in shadeinput.c, where a broadcast of
a float scalar to a VNx2SF value is held in V14 across a call:

    mov     z14.s, s15            ; broadcast s15 -> all 4 .s lanes of z14
    ...
    bl      shade_lamp_loop       ; clobbers V14[127:64]
    ...
    fmla    z20.s, p7/m, z14.s, z21.s   ; reads all 4 .s lanes of z14

Under AAPCS64 only the low 64 bits of V8-V15 (D8-D15) are callee-saved.
The prologue dutifully saves d14/d15, but the broadcast and FMA both
touch the full Z register, and the upper half of v14 gets corrupted by
the call -- producing wrong floating-point results.

VNx2SF has GET_MODE_SIZE == 8, so the previous part-clobber check
treated V14 as fully preserved for that mode.  The mode size is
correct for the *data* (two 32-bit lanes), but the underlying SVE
instructions are not packed -- the two .s lanes live at byte offsets
0-3 and 8-11 of the Z register (the .d-strided layout used for partial
SVE modes), so byte 8 onwards is outside the AAPCS64-preserved range.
Any SVE mode in V8-V15 across a call is therefore partially clobbered,
regardless of GET_MODE_SIZE.

The change in g:b191e8bdecf made the cost of allocating a callee-saved
register low enough that IRA started picking V14 for these pseudos,
exposing the latent miscompile.

Two places need fixing:

  * aarch64_hard_regno_call_part_clobbered uses GET_MODE_SIZE to decide
    whether the callee-preserved low 64 bits are enough for the value.
    For SVE modes, compare against BYTES_PER_SVE_VECTOR instead: any
    SVE mode physically uses the full Z register.

  * early-RA classifies allocno groups into FPR_D/FPR_Q/FPR_Z by mode
    bit size, and partial_fpr_clobbers then maps FPR_D to V8QImode for
    the ABI check.  That synthetic V8QImode hides the fact that the
    pseudo is actually an SVE mode, so V8-V15 are not excluded from the
    candidate set.  Classify any SVE mode as FPR_Z so that
    partial_fpr_clobbers uses VNx16QImode and correctly removes V8-V15.

A new test is added in gcc.target/aarch64/sve/pr122827.c
Before the fix the execution test aborts (V14 is allocated to the broadcast
across the call, and the explicit clobber inside the callee corrupts its upper
lanes). after the fix it passes.

Explicitly clobbering V14 with inline assembly in the test may be a bit fragile
as it depends on RA picking V14 for the pre-call broadcast to trigger the bug
but I couldn't find a good way of generalising it without perturbing RA in ways
that made the bug not trigger.

With this patch blender passes again and no regressions on
aarch64-none-linux-gnu bootstrap.

Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
gcc/ChangeLog:

PR target/122827
* config/aarch64/aarch64.cc (aarch64_hard_regno_call_part_clobbered):
For SVE modes use BYTES_PER_SVE_VECTOR for the per-register size
rather than GET_MODE_SIZE.
* config/aarch64/aarch64-early-ra.cc (early_ra::get_allocno_subgroup):
Classify any SVE mode as FPR_Z.

gcc/testsuite/ChangeLog:

PR target/122827
* gcc.target/aarch64/sve/pr122827.c: New test.

2 months agoc++/modules: Add reflection in module dialect.
yxj-github-437 [Sat, 30 May 2026 08:41:01 +0000 (16:41 +0800)] 
c++/modules: Add reflection in module dialect.

Some ICE will occur when reflection codes compile without
-freflection but the std module built with -freflection.
So the module dialect should include reflection.

gcc/cp/ChangeLog:
* module.cc (module_state_config::get_dialect): Add reflection
dialect.

Reviewed-by: Jason Merrill <jason@redhat.com>
2 months agoc++: > in requires in template argument [PR125317]
Eczbek [Fri, 22 May 2026 16:57:09 +0000 (12:57 -0400)] 
c++: > in requires in template argument [PR125317]

PR c++/125317

gcc/cp/ChangeLog:

* parser.cc (cp_parser_requirement_body): Set
parser->greater_than_is_operator_p.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/concepts-requires42.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
2 months agoaarch64: Adjust vectorizer loads+store issue info for Olympus
Kyrylo Tkachov [Mon, 1 Jun 2026 16:00:48 +0000 (09:00 -0700)] 
aarch64: Adjust vectorizer loads+store issue info for Olympus

After some more experimentation and evaluation I'm adjusting the
Olympus issue numbers. This unlocks more vector unrolling that's
beneficial for that core.

Bootstrapped and tested on aarch64-none-linux-gnu.

Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
* config/aarch64/tuning_models/olympus.h (olympus_scalar_issue_info,
olympus_advsimd_issue_info, olympus_sve_issue_info): Set
loads_stores_per_cycle to 6.

2 months agoaarch64: Adjust alignment tunings for Olympus
Kyrylo Tkachov [Sun, 31 May 2026 09:05:56 +0000 (02:05 -0700)] 
aarch64: Adjust alignment tunings for Olympus

After some more benchmarking and evaluation I'd like to increase the alignments
needed for -mcpu=olympus.  All three of loop_align, function_align and
jump_align are needed to get a good mix of improvements.  I've added skip
amounts to keep the code size bloat down.  There is some, but the performance
benefit on -mcpu=olympus binaries is worth it (cpython from SPEC2026 in
particular benefits consistently).

As an aside, I do think we'll want a more fine-grained description of alignment
in our CPU tuning structs for -O3 binaries.  -O3 may be willing to pay the
extra padding cost for speed-tuned functions and loops and may want to avoid
the skip amount if the CPU is good enough at skipping past them.
But the -O2 settings may still want to use skip amount to avoid excessive
distro binary bloat.

Bootstrapped and tested on aarch64-none-linux-gnu.

Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
gcc/ChangeLog

* config/aarch64/tuning_models/olympus.h (olympus_tunings):
Adjust loop_align, function_align, jump_align.

2 months agoRegenerate c.opt.urls
Mark Wielaard [Mon, 1 Jun 2026 16:22:20 +0000 (18:22 +0200)] 
Regenerate c.opt.urls

Regenerate opt.urls for deprecation (and removal) of -Wstrict-overflow.

Fixes: b31a43560e88 ("gcc: finalize deprecation of -Wstrict-overflow")
gcc/c-family/ChangeLog:

* c.opt.urls: Regenerate.

2 months agoRe-flow lines made longer than 80 characters by typo fixes
Dhruv Chawla [Wed, 27 May 2026 12:28:38 +0000 (12:28 +0000)] 
Re-flow lines made longer than 80 characters by typo fixes

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/arm/arm-mve-builtins-shapes.cc (struct viddup_def):
Re-flow comment.
(struct vidwdup_def): Likewise.
* config/arm/arm.cc (arm_mve_check_reg_origin_is_num_elems): Likewise.
* config/loongarch/sync.md: Likewise.
* config/microblaze/microblaze.cc (compute_frame_size): Likewise.
* config/rs6000/rs6000-call.cc (rs6000_gimplify_va_arg): Likewise.

2 months agolibstdc++: Fix typos in os/vxworks/os_defines.h
Dhruv Chawla [Thu, 21 May 2026 12:29:54 +0000 (12:29 +0000)] 
libstdc++: Fix typos in os/vxworks/os_defines.h

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
libstdc++-v3/ChangeLog:

* config/os/vxworks/os_defines.h: Fix typos.

2 months agolibitm: Fix typo in config/linux/futex_bits.h
Dhruv Chawla [Thu, 21 May 2026 12:29:05 +0000 (12:29 +0000)] 
libitm: Fix typo in config/linux/futex_bits.h

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
libitm/ChangeLog:

* config/linux/futex_bits.h: Fix typo.

2 months agolibgomp: Fix typos in various files
Dhruv Chawla [Thu, 21 May 2026 12:28:26 +0000 (12:28 +0000)] 
libgomp: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
libgomp/ChangeLog:

* config/gcn/simple-bar.h: Fix typos.
* config/linux/futex.h: Likewise.
* config/nvptx/bar.c (gomp_team_barrier_cancel): Likewise.
* config/nvptx/bar.h (gomp_team_barrier_wake): Likewise.
* config/nvptx/simple-bar.h: Likewise.
* config/posix/sem.c: Likewise.
* config/posix/sem.h: Likewise.
* config/posix/simple-bar.h: Likewise.

2 months agolibatomic: Fix typos in various files
Dhruv Chawla [Thu, 21 May 2026 11:48:48 +0000 (11:48 +0000)] 
libatomic: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
libatomic/ChangeLog:

* config/mingw/lock.c: Fix typos.
* config/posix/lock.c: Likewise.

2 months agogcc/config: Fix typos in various files
Dhruv Chawla [Thu, 21 May 2026 11:48:10 +0000 (11:48 +0000)] 
gcc/config: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/darwin-c.cc (find_subframework_header): Fix typos.
* config/darwin-driver.cc (darwin_find_version_from_kernel): Likewise.
* config/darwin.cc (darwin_label_is_anonymous_local_objc_name): Likewise.
(fprintf): Likewise.
* config/sol2-stubs.cc: Likewise.
* config/sol2.cc (solaris_elf_asm_comdat_section): Likewise.
* config/sol2.h: Likewise.
* config/vx-common.h: Likewise.
* config/vxworks.h (vxworks_asm_out_destructor): Likewise.

2 months agoxtensa: Fix typo in xtensa.cc
Dhruv Chawla [Thu, 21 May 2026 11:46:41 +0000 (11:46 +0000)] 
xtensa: Fix typo in xtensa.cc

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/xtensa/xtensa.cc (xtensa_legitimize_address): Fix typos.

2 months agovms: Fix typos in various files
Dhruv Chawla [Thu, 21 May 2026 11:46:13 +0000 (11:46 +0000)] 
vms: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/vms/vms-c.cc (enum extern_model_kind): Fix typos.
(vms_pragma_message): Likewise.
(vms_c_register_includes): Likewise.
* config/vms/vms.cc (vms_function_section): Likewise.

2 months agovisium: Fix typos in visium.h
Dhruv Chawla [Thu, 21 May 2026 11:45:24 +0000 (11:45 +0000)] 
visium: Fix typos in visium.h

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/visium/visium.h (CASE_VECTOR_PC_RELATIVE): Fix typos.

2 months agovax: Fix typos in various files
Dhruv Chawla [Thu, 21 May 2026 11:44:47 +0000 (11:44 +0000)] 
vax: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/vax/vax.cc (vax_expand_addsub_di_operands): Fix typos.
* config/vax/vax.h (PRINT_OPERAND_ADDRESS): Likewise.

2 months agosparc: Fix typos in various files
Dhruv Chawla [Thu, 21 May 2026 11:44:03 +0000 (11:44 +0000)] 
sparc: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/sparc/freebsd.h: Fix typos.
* config/sparc/sparc.cc (emit_scc_insn): Likewise.
(sparc_emit_membar_for_model): Likewise.

2 months agosh: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 13:01:51 +0000 (13:01 +0000)] 
sh: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/sh/sh-mem.cc (sh_expand_cmpstr): Fix typos.
* config/sh/sh.cc (sh_option_override): Likewise.
(sh_rtx_costs): Likewise.
(fixup_addr_diff_vecs): Likewise.
(sh_expand_epilogue): Likewise.
(sh_legitimize_address_displacement): Likewise.
(sh_can_use_simple_return_p): Likewise.
(sh_find_equiv_gbr_addr): Likewise.
(sh_check_add_incdec_notes): Likewise.
* config/sh/sh.md: Likewise.
* config/sh/sh4-300.md: Likewise.
* config/sh/sh_treg_combine.cc (sh_treg_combine::try_combine_comparisons): Likewise.
(sh_treg_combine::try_eliminate_cstores): Likewise.
* config/sh/sync.md: Likewise.

2 months agorx: Fix typos in rx.cc and rx.md
Dhruv Chawla [Wed, 20 May 2026 12:16:11 +0000 (12:16 +0000)] 
rx: Fix typos in rx.cc and rx.md

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/rx/rx.cc (rx_print_operand): Fix typos.
(rx_expand_epilogue): Likewise.
* config/rx/rx.md: Likewise.

2 months agos390: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 12:14:09 +0000 (12:14 +0000)] 
s390: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/s390/2817.md: Fix typos.
* config/s390/s390.cc (s390_contiguous_bitmask_nowrap_p): Likewise.
(s390_contiguous_bitmask_p): Likewise.
(s390_short_displacement): Likewise.
(s390_expand_cmpmem): Likewise.
(s390_expand_vec_movstr): Likewise.
(s390_expand_cstoreti4): Likewise.
(s390_expand_int_spaceship): Likewise.
(s390_z10_optimize_cmp): Likewise.
(s390_support_vector_misalignment): Likewise.
* config/s390/s390.h (NO_FUNCTION_CSE): Likewise.
* config/s390/s390.md: Likewise.
* config/s390/subst.md: Likewise.
* config/s390/vx-builtins.md: Likewise.

libgcc/ChangeLog:

* config/s390/tpf-unwind.h (s390_fallback_frame_state): Likewise.

2 months agors6000: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 12:11:37 +0000 (12:11 +0000)] 
rs6000: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/rs6000/aix.h: Fix typos.
* config/rs6000/cell.md: Likewise.
* config/rs6000/darwin.h: Likewise.
* config/rs6000/mmintrin.h: Likewise.
* config/rs6000/rs6000-call.cc (rs6000_gimplify_va_arg): Likewise.
* config/rs6000/rs6000-internal.h: Likewise.
* config/rs6000/rs6000-logue.cc (is_altivec_return_reg): Likewise.
(rs6000_output_function_prologue): Likewise.
* config/rs6000/rs6000-p8swap.cc (quad_aligned_store_p): Likewise.
(const_load_sequence_p): Likewise.
(replace_swapped_aligned_store): Likewise.
* config/rs6000/rs6000-passes.def: Likewise.
* config/rs6000/rs6000-string.cc (expand_cmp_vec_sequence): Likewise.
(expand_compare_loop): Likewise.
* config/rs6000/rs6000.cc (rs6000_debug_addr_mask): Likewise.
(rs6000_setup_reg_addr_masks): Likewise.
(darwin_rs6000_override_options): Likewise.
(rs6000_option_override_internal): Likewise.
(rs6000_cost_data::determine_suggested_unroll_factor): Likewise.
(rs6000_cannot_force_const_mem): Likewise.
(rs6000_emit_le_vsx_move): Likewise.
(rs6000_secondary_reload_memory): Likewise.
(rs6000_reverse_condition): Likewise.
(rs6000_expand_float128_convert): Likewise.
(rs6000_adjust_atomic_subword): Likewise.
(rs6000_expand_atomic_op): Likewise.
(rs6000_xcoff_declare_object_name): Likewise.
(output_pcrel_opt_reloc): Likewise.
(rs6000_set_up_by_prologue): Likewise.
(rs6000_split_logical_inner): Likewise.
(rs6000_split_multireg_move): Likewise.
* config/rs6000/rs6000.h: Likewise.
* config/rs6000/rs6000.md: Likewise.
* config/rs6000/sync.md: Likewise.
* config/rs6000/vector.md: Likewise.
* config/rs6000/vsx.md: Likewise.
* config/rs6000/vxworks.h: Likewise.

2 months agorl78: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 12:07:05 +0000 (12:07 +0000)] 
rl78: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/rl78/rl78.cc (rl78_alloc_physical_registers): Fix typos.
(set_origin): Likewise.
(rl78_remove_unused_sets): Likewise.

2 months agopdp11: Fix typo in pdp11.cc
Dhruv Chawla [Wed, 20 May 2026 12:06:21 +0000 (12:06 +0000)] 
pdp11: Fix typo in pdp11.cc

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/pdp11/pdp11.cc (pdp11_insn_cost): Fix typo.

2 months agoriscv: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 12:05:56 +0000 (12:05 +0000)] 
riscv: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* common/config/riscv/riscv-common.cc (riscv_subset_list::add): Fix
typos.
(riscv_subset_list::parse_single_multiletter_ext): Likewise.
(riscv_subset_list::set_loc): Likewise.
(riscv_arch_str): Likewise.
* config/riscv/riscv-avlprop.cc: Likewise.
* config/riscv/riscv-bclr-lowest-set-bit.cc (find_later_ctz): Likewise.
* config/riscv/riscv-ext-andes.def: Likewise.
* config/riscv/riscv-ext.def: Likewise.
* config/riscv/riscv-profiles.def: Likewise.
* config/riscv/riscv-selftests.cc (run_const_vector_selftests): Likewise.
(run_broadcast_selftests): Likewise.
(riscv_run_selftests): Likewise.
* config/riscv/riscv-string.cc (riscv_expand_strcmp): Likewise.
* config/riscv/riscv-v.cc (shuffle_decompress_patterns): Likewise.
(vls_mode_valid_p): Likewise.
* config/riscv/riscv-vect-permconst.cc (vector_permconst::process_bb): Likewise.
* config/riscv/riscv-vector-builtins.cc (riscv_pragma_intrinsic_flags_pollute): Likewise.
* config/riscv/riscv-vsetvl.cc: Likewise.
* config/riscv/riscv-zicfilp.cc: Likewise.
* config/riscv/riscv.cc (riscv_expand_mult_with_const_int): Likewise.
(riscv_rtx_costs): Likewise.
(riscv_address_cost): Likewise.
(riscv_vls_cc_function_abi): Likewise.
(riscv_frm_mode_needed): Likewise.
(dispatch_function_versions): Likewise.
* config/riscv/riscv.h (DWARF_REG_TO_UNWIND_COLUMN): Likewise.
* config/riscv/riscv.md: Likewise.

2 months agopa: Fix typos in pa.cc
Dhruv Chawla [Wed, 20 May 2026 11:59:15 +0000 (11:59 +0000)] 
pa: Fix typos in pa.cc

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/pa/pa.cc (pa_assemble_integer): Fix typos.
(pa_can_change_mode_class): Likewise.

libgcc/ChangeLog:

* config/pa/linux-atomic.c: Fix typos.
* config/pa/sync-libfuncs.c: Likewise.

2 months agoor1k: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 11:52:49 +0000 (11:52 +0000)] 
or1k: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/or1k/or1k.cc (or1k_strict_argument_naming): Fix typos.
(or1k_print_operand_address): Likewise.
* config/or1k/or1k.md: Likewise.

2 months agonvptx: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 11:51:21 +0000 (11:51 +0000)] 
nvptx: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/nvptx/nvptx.cc (nvptx_option_override): Fix typos.
(nvptx_assemble_undefined_decl): Likewise.
(nvptx_mem_maybe_shared_p): Likewise.
(nvptx_discover_pars): Likewise.
(verify_neutering_labels): Likewise.
(nvptx_condjump_label): Likewise.
(nvptx_lockfull_update): Likewise.
* config/nvptx/nvptx.md: Likewise.

libgcc/ChangeLog:

* config/nvptx/atomic.c: Fix typos.

2 months agonds32: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 11:49:03 +0000 (11:49 +0000)] 
nds32: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* common/config/nds32/nds32-common.cc (nds32_except_unwind_info): Fix
typos.
* config/nds32/constants.md: Likewise.
* config/nds32/constraints.md: Likewise.
* config/nds32/nds32-cost.cc (nds32_rtx_costs_speed_prefer): Likewise.
* config/nds32/nds32-dspext.md: Likewise.
* config/nds32/nds32-e8.md: Likewise.
* config/nds32/nds32-fp-as-gp.cc (nds32_fp_as_gp_check_available): Likewise.
* config/nds32/nds32-intrinsic.cc (nds32_expand_priority_builtin): Likewise.
* config/nds32/nds32-isr.cc (nds32_emit_isr_vector_section): Likewise.
(nds32_asm_file_end_for_isr): Likewise.
* config/nds32/nds32-md-auxiliary.cc (output_cond_branch): Likewise.
(nds32_expand_cbranch): Likewise.
(nds32_expand_float_cstore): Likewise.
(nds32_expand_movcc): Likewise.
(nds32_output_stack_pop): Likewise.
(nds32_output_return): Likewise.
(nds32_split_sms): Likewise.
(nds32_legitimize_tls_address): Likewise.
* config/nds32/nds32-memory-manipulation.cc (nds32_expand_cpymemsi_unroll): Likewise.
(nds32_expand_load_multiple): Likewise.
* config/nds32/nds32-multiple.md: Likewise.
* config/nds32/nds32-n7.md: Likewise.
* config/nds32/nds32-n8.md: Likewise.
* config/nds32/nds32-n9-2r1w.md: Likewise.
* config/nds32/nds32-pipelines-auxiliary.cc (extract_nth_access_reg): Likewise.
(pbsada_insn_ra_rb_dep_reg_p): Likewise.
* config/nds32/nds32-predicates.cc (nds32_can_use_bset_p): Likewise.
(nds32_can_use_btgl_p): Likewise.
(nds32_symbol_load_store_p): Likewise.
* config/nds32/nds32-protos.h (nds32_cond_move_p): Likewise.
(nds32_mem_format): Likewise.
* config/nds32/nds32-relax-opt.cc (nds32_plus_reg_load_store_p): Likewise.
* config/nds32/nds32-utils.cc (extract_offset_rtx): Likewise.
* config/nds32/nds32.cc (nds32_compute_stack_frame): Likewise.
(nds32_emit_stack_pop_multiple): Likewise.
(nds32_emit_stack_v3pop): Likewise.
(nds32_can_change_mode_class): Likewise.
(nds32_arg_partial_bytes): Likewise.
(nds32_function_ok_for_sibcall): Likewise.
(nds32_register_move_cost): Likewise.
(nds32_print_operand): Likewise.
(nds32_merge_decl_attributes): Likewise.
(nds32_insert_attributes): Likewise.
(nds32_init_libfuncs): Likewise.
(nds32_expand_epilogue_v3pop): Likewise.
(nds32_can_use_return_insn): Likewise.
(nds32_target_alignment): Likewise.
(nds32_split_double_word_load_store_p): Likewise.
* config/nds32/nds32.h (enum nds32_builtins): Likewise.
(CASE_VECTOR_MODE): Likewise.
* config/nds32/nds32.md: Likewise.
* config/nds32/nds32_intrinsic.h (__attribute__): Likewise.
* config/nds32/nds32_isr.h: Likewise.

libgcc/ChangeLog:

* config/nds32/initfini.c: Fix typos.
* config/nds32/linux-atomic.c: Likewise.

2 months agomsp430: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 11:43:41 +0000 (11:43 +0000)] 
msp430: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/msp430/msp430-opts.h (enum msp430_cpu_types): Fix typos.
* config/msp430/msp430.cc (msp430_op_not_in_high_mem): Likewise.
* config/msp430/msp430.md: Likewise.

2 months agomingw: Fix typo in winnt-cxx.cc
Dhruv Chawla [Wed, 20 May 2026 11:42:44 +0000 (11:42 +0000)] 
mingw: Fix typo in winnt-cxx.cc

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/mingw/winnt-cxx.cc (i386_pe_adjust_class_at_definition): Fix
typos.

2 months agomicroblaze: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 11:41:39 +0000 (11:41 +0000)] 
microblaze: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/microblaze/microblaze.cc (struct microblaze_frame_info): Fix
typos.
(compute_frame_size): Likewise.
* config/microblaze/microblaze.h: Likewise.

2 months agomcore: Fix typo in mcore.h
Dhruv Chawla [Wed, 20 May 2026 11:40:58 +0000 (11:40 +0000)] 
mcore: Fix typo in mcore.h

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/mcore/mcore.h: Fix typo.

2 months agomips: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 11:40:33 +0000 (11:40 +0000)] 
mips: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/mips/driver-native.cc (host_detect_local_cpu): Fix typos.
* config/mips/mips-cpus.def (MIPS_CPU): Likewise.
* config/mips/mips.cc (mips_setup_incoming_varargs): Likewise.
(mips_function_ok_for_sibcall): Likewise.
(mips_expand_ext_as_unaligned_load): Likewise.
(mips_use_ins_ext_p): Likewise.
(mips_pop_asm_switch): Likewise.
(mips_cfun_has_inflexible_gp_ref_p): Likewise.
(mips_set_compression_mode): Likewise.
(mips_expand_vec_unpack): Likewise.
* config/mips/mips.h (while): Likewise.
* config/mips/mips.md: Likewise.

libgcc/ChangeLog:

* config/mips/linux-unwind.h (mips_fallback_frame_state): Likewise.

2 months agom68k: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 11:39:12 +0000 (11:39 +0000)] 
m68k: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/m68k/cf.md: Fix typos.
* config/m68k/m68k.cc (m68k_unwrap_symbol): Likewise.
(m68k_adjust_decorated_operand): Likewise.
(m68k_call_tls_get_addr): Likewise.
(m68k_call_m68k_read_tp): Likewise.
(m68k_sched_attr_size): Likewise.
(m68k_sched_dfa_post_advance_cycle): Likewise.
(sched_mem_operand_p): Likewise.
(m68k_sched_address_bypass_p): Likewise.
* config/m68k/m68kelf.h: Likewise.
* config/m68k/netbsd-elf.h (REGISTER_PREFIX): Likewise.

2 months agoloongarch: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 11:37:44 +0000 (11:37 +0000)] 
loongarch: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/loongarch/lasx.md: Fix typos.
* config/loongarch/loongarch-builtins.cc: Likewise.
* config/loongarch/loongarch-c.cc (loongarch_pragma_target_parse): Likewise.
* config/loongarch/loongarch-opts.cc (loongarch_generate_mrecip_scheme): Likewise.
* config/loongarch/loongarch-opts.h (loongarch_config_target): Likewise.
* config/loongarch/loongarch.cc (loongarch_setup_incoming_varargs): Likewise.
(loongarch_build_integer): Likewise.
(loongarch_explicit_relocs_p): Likewise.
(loongarch_valid_lo_sum_p): Likewise.
(loongarch_addu16i_imm12_operand_p): Likewise.
(loongarch_rewrite_mem_for_simple_ldst): Likewise.
(loongarch_is_elem_duplicate): Likewise.
(loongarch_expand_vec_perm_const): Likewise.
(loongarch_sched_reassociation_width): Likewise.
(loongarch_expand_vec_unpack): Likewise.
(dispatch_function_versions): Likewise.
(loongarch_option_same_function_versions): Likewise.
* config/loongarch/loongarch.h: Likewise.
* config/loongarch/loongarch.md: Likewise.
* config/loongarch/lsx.md: Likewise.
* config/loongarch/predicates.md: Likewise.
* config/loongarch/simd.md: Likewise.
* config/loongarch/sync.md: Likewise.

2 months agolm32: Fix typo in lm32.cc
Dhruv Chawla [Wed, 20 May 2026 11:35:02 +0000 (11:35 +0000)] 
lm32: Fix typo in lm32.cc

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/lm32/lm32.cc (lm32_compute_frame_size): Fix typos.

2 months agoia64: Fix typos in various files
Dhruv Chawla [Wed, 20 May 2026 11:34:31 +0000 (11:34 +0000)] 
ia64: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/ia64/ia64.cc (ia64_add_bundle_selector_before): Fix typos.
* config/ia64/itanium2.md: Likewise.
* config/ia64/sync.md: Likewise.

2 months agoi386: Fix typos in various files
Dhruv Chawla [Tue, 19 May 2026 13:09:50 +0000 (13:09 +0000)] 
i386: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/i386/athlon.md: Fix typos.
* config/i386/avx512fintrin.h: Likewise.
* config/i386/btver2.md: Likewise.
* config/i386/c86-4g-m7.md: Likewise.
* config/i386/c86-4g.md: Likewise.
* config/i386/cygwin.h: Likewise.
* config/i386/i386-c.cc (ix86_target_macros_internal): Likewise.
* config/i386/i386-expand.cc (ix86_expand_branch): Likewise.
(ix86_expand_int_sse_cmp): Likewise.
(ix86_expand_vec_perm): Likewise.
(expand_small_cpymem_or_setmem): Likewise.
(ix86_copy_addr_to_reg): Likewise.
(ix86_expand_special_args_builtin): Likewise.
(ix86_expand_vector_init_interleave): Likewise.
(expand_vec_perm_shufps_shufps): Likewise.
(ix86_expand_sse2_mulvxdi3): Likewise.
(ix86_gen_ccmp_first): Likewise.
* config/i386/i386-features.cc (general_scalar_to_vector_candidate_p): Likewise.
(pass_x86_cse::x86_cse): Likewise.
(ix86_apx_nf_convert): Likewise.
(dispatch_function_versions): Likewise.
* config/i386/i386-features.h (class scalar_chain): Likewise.
* config/i386/i386-options.cc (ix86_function_specific_restore): Likewise.
(ix86_valid_target_attribute_tree): Likewise.
(ix86_override_options_after_change_1): Likewise.
(ix86_option_override_internal): Likewise.
* config/i386/i386.cc (ix86_can_inline_p): Likewise.
(ix86_function_regparm): Likewise.
(construct_container): Likewise.
(ix86_return_in_memory): Likewise.
(output_indirect_thunk): Likewise.
(ix86_compute_frame_layout): Likewise.
(choose_basereg): Likewise.
(ix86_emit_save_reg_using_mov): Likewise.
(pro_epilogue_adjust_stack): Likewise.
(ix86_expand_prologue): Likewise.
(ix86_emit_restore_sse_regs_using_mov): Likewise.
(ix86_memory_address_reg_class): Likewise.
(ix86_avx_u128_mode_after): Likewise.
(ix86_output_addr_diff_elt): Likewise.
(ix86_lea_outperforms): Likewise.
(ix86_avoid_lea_for_addr): Likewise.
(ix86_cc_modes_compatible): Likewise.
(add_parameter_dependencies): Likewise.
(ix86_data_alignment): Likewise.
(ix86_gimple_fold_builtin): Likewise.
(ix86_autovectorize_vector_modes): Likewise.
(ix86_max_noce_ifcvt_seq_cost): Likewise.
(ix86_vector_costs::add_stmt_cost): Likewise.
(ix86_vector_costs::finish_cost): Likewise.
(ix86_optab_supported_p): Likewise.
(ix86_push_rounding): Likewise.
* config/i386/i386.h (host_detect_local_cpu): Likewise.
(enum reg_class): Likewise.
* config/i386/i386.md: Likewise.
* config/i386/i386elf.h: Likewise.
* config/i386/predicates.md: Likewise.
* config/i386/sse.md: Likewise.
* config/i386/x86-tune-costs.h (struct processor_costs): Likewise.
* config/i386/x86-tune-sched-atom.cc (swap_top_of_ready_list): Likewise.
(ix86_atom_sched_reorder): Likewise.
* config/i386/x86-tune-sched-bd.cc (find_constant): Likewise.
* config/i386/x86-tune-sched.cc (exact_store_load_dependency): Likewise.
* config/i386/x86-tune.def (X86_TUNE_FUSE_MOV_AND_ALU): Likewise.
(X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): Likewise.
(X86_TUNE_DOUBLE_WITH_ADD): Likewise.
(X86_TUNE_PROMOTE_QIMODE): Likewise.
* config/i386/zn4zn5.md: Likewise.
* config/i386/znver.md: Likewise.

2 months agogcn: Fix typos in various files
Dhruv Chawla [Tue, 19 May 2026 13:03:19 +0000 (13:03 +0000)] 
gcn: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/gcn/constraints.md: Fix typos.
* config/gcn/gcn-opts.h (TARGET_ARCHITECTED_FLAT_SCRATCH): Likewise.
* config/gcn/gcn-valu.md: Likewise.
* config/gcn/gcn.cc (gcn_gen_undef): Likewise.
(gcn_addr_space_debug): Likewise.
(gcn_expand_prologue): Likewise.
(gcn_frame_pointer_rqd): Likewise.
* config/gcn/gcn.h (NUM_PARM_REGS): Likewise.
(enum gcn_builtin_codes): Likewise.
* config/gcn/gcn.md: Likewise.

2 months agoft32: Fix typos in ft32.cc
Dhruv Chawla [Tue, 19 May 2026 13:01:00 +0000 (13:01 +0000)] 
ft32: Fix typos in ft32.cc

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/ft32/ft32.cc (ft32_init_machine_status): Fix typos.

2 months agofrv: Fix typos in frv-opts.h
Dhruv Chawla [Tue, 19 May 2026 13:00:22 +0000 (13:00 +0000)] 
frv: Fix typos in frv-opts.h

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/frv/frv-opts.h: Fix typos.

2 months agofr30: Fix typos in fr30.cc
Dhruv Chawla [Tue, 19 May 2026 12:59:24 +0000 (12:59 +0000)] 
fr30: Fix typos in fr30.cc

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/fr30/fr30.cc (fr30_const_double_is_zero): Fix typos.

2 months agoepiphany: Fix typos in various files
Dhruv Chawla [Tue, 19 May 2026 12:58:33 +0000 (12:58 +0000)] 
epiphany: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/epiphany/epiphany.cc (epiphany_expand_epilogue): Fix typos.
* config/epiphany/resolve-sw-modes.cc: Likewise.

2 months agocsky: Fix typos in csky.cc
Dhruv Chawla [Tue, 19 May 2026 12:57:47 +0000 (12:57 +0000)] 
csky: Fix typos in csky.cc

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/csky/csky.cc (csky_output_inline_const): Fix typos.
(emit_csky_regs_pop): Likewise.
(csky_return_in_memory): Likewise.

2 months agoc6x: Fix typos in c6x.cc
Dhruv Chawla [Tue, 19 May 2026 12:57:00 +0000 (12:57 +0000)] 
c6x: Fix typos in c6x.cc

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/c6x/c6x.cc (c6x_file_start): Fix typos.
(c6x_print_operand_address): Likewise.
(c6x_asm_emit_except_personality): Likewise.

2 months agobpf: Fix typos in various files
Dhruv Chawla [Tue, 19 May 2026 12:56:17 +0000 (12:56 +0000)] 
bpf: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/bpf/bpf.cc (bpf_asm_named_section): Fix typos.
* config/bpf/core-builtins.cc (remove_parser_plugin): Likewise.
(make_core_relo): Likewise.
(bpf_handle_plugin_finish_type): Likewise.
(bpf_output_core_reloc): Likewise.
(core_make_builtins): Likewise.

2 months agobfin: Fix typo in bfin.cc
Dhruv Chawla [Tue, 19 May 2026 12:55:00 +0000 (12:55 +0000)] 
bfin: Fix typo in bfin.cc

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/bfin/bfin.cc (bfin_function_ok_for_sibcall): Fix typos.

2 months agoavr: Fix typos in various files
Dhruv Chawla [Tue, 19 May 2026 12:53:37 +0000 (12:53 +0000)] 
avr: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* common/config/avr/avr-common.cc: Fix typos.
* config/avr/avr-passes.cc (size_to_mode): Likewise.
(struct absint_t): Likewise.
(plies_t::emit_sets): Likewise.
(avr_strict_unsigned_p): Likewise.
(avr_redundant_compare): Likewise.
(avr_optimize_casesi): Likewise.
(struct AVR_LdSt_Props): Likewise.
(avr_pass_split_nzb::split_nzb_insns): Likewise.
(make_avr_pass_fuse_move): Likewise.
* config/avr/avr.cc (avr_option_override): Likewise.
(avr_can_inline_p): Likewise.
(avr_expand_epilogue): Likewise.
(avr_init_cumulative_args): Likewise.
(reg_unused_after): Likewise.
(avr_out_lpm_no_lpmx): Likewise.
(avr_out_compare): Likewise.
(avr_out_plus_ext): Likewise.
(avr_out_fract): Likewise.
(avr_nonzero_bits_lsr_operands_p): Likewise.
* config/avr/avr.h (avr_no_devlib): Likewise.
(struct machine_function): Likewise.
* config/avr/avr.md: Likewise.
* config/avr/builtins.def (FLASH_SEGMENT): Likewise.
* config/avr/specs.h: Likewise.

libgcc/config/avr/libf7/ChangeLog:

* libf7.c (f7_addsub): Likewise.
(f7_madd_msub): Likewise.
* libf7.h (f7_Ildexp): Likewise.

2 months agoarm: Fix typos in various files
Dhruv Chawla [Tue, 19 May 2026 12:51:13 +0000 (12:51 +0000)] 
arm: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* common/config/arm/arm-common.cc (arm_config_default): Fix typos.
(arm_canon_arch_option_1): Likewise.
* config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Likewise.
* config/arm/arm-builtins.cc (MAC_LANE_PAIR_QUALIFIERS): Likewise.
(USMAC_LANE_QUADTUP_QUALIFIERS): Likewise.
* config/arm/arm-modes.def (ADJUST_FLOAT_FORMAT): Likewise.
* config/arm/arm-mve-builtins-base.cc: Likewise.
* config/arm/arm-mve-builtins-shapes.cc (struct binary_lshift_unsigned_def): Likewise.
(struct binary_maxamina_def): Likewise.
(struct viddup_def): Likewise.
(struct vidwdup_def): Likewise.
* config/arm/arm-protos.h (struct tune_params): Likewise.
* config/arm/arm.cc (arm_option_override_internal): Likewise.
(arm_option_override): Likewise.
(optimal_immediate_sequence_1): Likewise.
(arm_pcs_from_attribute): Likewise.
(aapcs_vfp_advance): Likewise.
(aapcs_layout_arg): Likewise.
(arm_init_cumulative_args): Likewise.
(arm_rtx_costs_internal): Likewise.
(mve_bool_vec_to_const): Likewise.
(operands_ok_ldrd_strd): Likewise.
(emit_multi_reg_push): Likewise.
(arm_emit_vfp_multi_reg_pop): Likewise.
(thumb2_emit_ldrd_pop): Likewise.
(arm_print_condition): Likewise.
(get_arm_condition_code): Likewise.
(thumb_pop): Likewise.
(arm_print_asm_arch_directives): Likewise.
(arm_debugger_regno): Likewise.
(arm_target_bb_ok_for_lob): Likewise.
(arm_mve_load_store_insn_p): Likewise.
(arm_mve_check_reg_origin_is_num_elems): Likewise.
(arm_mve_dlstp_check_dec_counter): Likewise.
(arm_mve_loop_valid_for_dlstp): Likewise.
(arm_loop_unroll_adjust): Likewise.
* config/arm/arm.h (ROUND_UP_WORD): Likewise.
* config/arm/arm.md: Likewise.
* config/arm/constraints.md: Likewise.
* config/arm/cortex-a17-neon.md: Likewise.
* config/arm/cortex-r4f.md: Likewise.
* config/arm/crypto.md: Likewise.
* config/arm/elf.h: Likewise.
* config/arm/fa726te.md: Likewise.
* config/arm/iterators.md: Likewise.
* config/arm/neon.md: Likewise.
* config/arm/thumb1.md: Likewise.
* config/arm/uclinuxfdpiceabi.h: Likewise.
* config/arm/unspecs.md: Likewise.
* config/arm/vec-common.md: Likewise.
* config/arm/vxworks.h (STACK_CHECK_PROTECT): Likewise.

libgcc/ChangeLog:

* config/arm/fp16.c (__gnu_float2h_internal): Fix typos.

2 months agoarc: Fix typos in various files
Dhruv Chawla [Tue, 19 May 2026 12:45:42 +0000 (12:45 +0000)] 
arc: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/arc/arc-arch.h (enum base_architecture): Fix typos.
* config/arc/arc-cpus.def: Likewise.
* config/arc/arc.cc (legitimate_small_data_address_p): Likewise.
(legitimate_scaled_address_p): Likewise.
(get_arc_condition_code): Likewise.
(arc_setup_incoming_varargs): Likewise.
(pop_reg): Likewise.
(arc_restore_callee_leave): Likewise.
(arc_asm_trampoline_template): Likewise.
(arc_add_jli_section): Likewise.
(arc_invalid_within_doloop): Likewise.
(arc_reorg): Likewise.
(conditionalize_nonjump): Likewise.
(arc_eh_uses): Likewise.
(arc_memory_move_cost): Likewise.
* config/arc/arc.h (TARGET_CPU_CPP_BUILTINS): Likewise.
(TARGET_PAD_RETURN): Likewise.
(arc_select_cc_mode): Likewise.
* config/arc/arc.md: Likewise.
* config/arc/arc.opt: Likewise.
* config/arc/arc700.md: Likewise.
* config/arc/elf.h (TARGET_ASM_FILE_END): Likewise.

libgcc/ChangeLog:

* config/arc/ieee-754/divtab-arc-df.c: Fix typos.
* config/arc/ieee-754/divtab-arc-sf.c: Likewise.

2 months agoalpha: Fix typos in various files
Dhruv Chawla [Tue, 19 May 2026 12:43:32 +0000 (12:43 +0000)] 
alpha: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* config/alpha/alpha.cc (alpha_pass_by_reference): Fix typos.
(alpha_reorg): Likewise.
* config/alpha/predicates.md: Likewise.

libgcc/ChangeLog:

* config/alpha/vms-unwind.h (alpha_vms_fallback_frame_state): Fix typos.

2 months agoaarch64: Fix typos in various files
Dhruv Chawla [Tue, 19 May 2026 12:42:07 +0000 (12:42 +0000)] 
aarch64: Fix typos in various files

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* common/config/aarch64/aarch64-common.cc (aarch64_parse_cpu): Fix
typos.
* common/config/aarch64/cpuinfo.h: Likewise.
* config/aarch64/aarch64-builtins.cc: Likewise.
* config/aarch64/aarch64-c.cc (aarch64_pragma_target_parse): Likewise.
* config/aarch64/aarch64-modes.def (FLOAT_MODE): Likewise.
* config/aarch64/aarch64-simd.md: Likewise.
* config/aarch64/aarch64-speculation.cc: Likewise.
* config/aarch64/aarch64-sve-builtins-functions.h: Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc (struct binary_za_m_def): Likewise.
* config/aarch64/aarch64-sve-builtins.cc (function_builder::add_function): Likewise.
* config/aarch64/aarch64-sve.md: Likewise.
* config/aarch64/aarch64-sve2.md: Likewise.
* config/aarch64/aarch64.cc (aarch64_init_sysregs): Likewise.
(aarch64_load_symref_appropriately): Likewise.
(aarch64_output_sve_cnt_immediate): Likewise.
(aarch64_replace_reg_mode): Likewise.
(aarch64_pass_by_reference_1): Likewise.
(aarch64_layout_arg): Likewise.
(aarch64_allocate_and_probe_stack_space): Likewise.
(aarch64_legitimize_address_displacement): Likewise.
(aarch64_output_casesi): Likewise.
(aarch64_stp_sequence_cost): Likewise.
(aarch64_vector_costs::add_stmt_cost): Likewise.
(aarch64_override_options): Likewise.
(aarch64_functions_b_resolvable_from_a): Likewise.
(dispatch_function_versions): Likewise.
(aarch64_can_inline_p): Likewise.
(aarch64_classify_symbol): Likewise.
(aarch64_build_builtin_va_list): Likewise.
(aarch64_sve_pred_valid_immediate): Likewise.
(aarch64_simd_lane_bounds): Likewise.
(aarch64_expand_vector_init_fallback): Likewise.
(aarch64_modes_compatible_p): Likewise.
(aarch64_ldrstr_offset_compare): Likewise.
(aarch64_speculation_safe_value): Likewise.
* config/aarch64/aarch64.h (DEFAULT_PCC_STRUCT_RETURN): Likewise.
(struct GTY): Likewise.
* config/aarch64/aarch64.md: Likewise.
* config/aarch64/aarch64.opt: Likewise.
* config/aarch64/arm_bf16.h: Likewise.
* config/aarch64/arm_neon.h (vbslq_u64): Likewise.
* config/aarch64/cortex-a57-fma-steering.cc: Likewise.
* config/aarch64/driver-aarch64.cc (get_cpu_from_id): Likewise.
(host_detect_local_cpu): Likewise.
* config/aarch64/iterators.md: Likewise.
* config/aarch64/thunderx.md: Likewise.
* config/aarch64/thunderx3t110.md: Likewise.

libgcc/ChangeLog:

* config/aarch64/aarch64-unwind.h (aarch64_demangle_return_addr): Fix
typos.

2 months agotestsuite: arm: adjust inline assembler for arm-none-eabi
Torbjörn SVENSSON [Mon, 11 May 2026 07:44:51 +0000 (09:44 +0200)] 
testsuite: arm: adjust inline assembler for arm-none-eabi

The fix applied to toplevel-extended-asm-1_0.c in r16-7892-gb02f9495dcf635,
that defines the symbol as a function, also needs to be applied to
toplevel-simple-asm-1_0.c.

gcc/testsuite/ChangeLog:

* gcc.dg/lto/toplevel-simple-asm-1_0.c: Adjust inline assembler
for arm-none-eabi.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
2 months agogccrs: Fix ICE when parsing empty path expression
Yap Zhi Heng [Tue, 26 May 2026 14:39:34 +0000 (22:39 +0800)] 
gccrs: Fix ICE when parsing empty path expression

gcc/rust/ChangeLog:

* parse/rust-parse-impl.hxx(parse_expr_stmt): Return error early when
parse_path_in_expression() returns an error node.

Signed-off-by: Yap Zhi Heng <yapzhhg@gmail.com>
2 months agogccrs: register the Drop lang item
lishin [Tue, 26 May 2026 16:44:14 +0000 (16:44 +0000)] 
gccrs: register the Drop lang item

gcc/rust/ChangeLog:

* util/rust-lang-item.h (Rust::LangItem::Kind): Add DROP.
* util/rust-lang-item.cc (Rust::LangItem::lang_items): Add drop lang item.

gcc/testsuite/ChangeLog:

* rust/compile/drop-lang-item.rs: New test.

Signed-off-by: lishin <lishin1008@gmail.com>
2 months agogccrs: Fix intrinsic error location
Jean-Christian CÎRSTEA [Tue, 12 May 2026 12:22:03 +0000 (15:22 +0300)] 
gccrs: Fix intrinsic error location

When an intrisic is used with an incorrect type, prin the location of
the call site, not the declaration.

Fixes Rust-GCC/gccrs#4465.

gcc/rust/ChangeLog:

* backend/rust-intrinsic-handlers.cc
(check_for_basic_integer_type): Fixed typo.
(build_atomic_builtin_name): Update message.
(unchecked_op, atomic_store, ctlz_handler)
(cttz_handler, bswap_handler): Use call location.

gcc/testsuite/ChangeLog:

* rust/compile/bswap.rs: Update error location.
* rust/compile/ctlz.rs: Likewise.
* rust/compile/ctlz_nonzero.rs: Likewise.
* rust/compile/cttz.rs: Likewise.
* rust/compile/cttz_nonzero.rs: Likewise.
* rust/compile/torture/intrinsics-5.rs: Likewise.
* rust/compile/torture/intrinsics-7.rs: Likewise.

Signed-off-by: Jean-Christian CÎRSTEA <jean-christian.cirstea@tuta.com>
2 months agogccrs: Support labeled block value breaks in HIR lowering
Islam-Imad [Tue, 21 Apr 2026 13:18:40 +0000 (15:18 +0200)] 
gccrs: Support labeled block value breaks in HIR lowering

This change implements backend lowering support for Rust labeled blocks.

Previously, labeled blocks were rejected in "CompileExpr::visit(BlockExpr)"
as unsupported. With this patch, labeled blocks are lowered by introducing
the following :-

1. A backend "LABEL_DECL" used as the jump target for "break 'label".
2. A temporary "Bvariable" used to hold the block’s resulting value.

gcc/rust/ChangeLog:

* backend/rust-compile-expr.cc (CompileExpr::visit): Lower labeled block.
(CompileExpr::construct_block_label): Utility function to construct block label.
(CompileExpr::lookup_label): Utility function to lookup label.
(CompileExpr::lookup_temp_var): Utility function to lookup block temp variables.
(CompileExpr::resolve_util): Utility to resolve NodeId to HirId.
* backend/rust-compile-expr.h: Header functions.
* resolve/rust-late-name-resolver-2.0.cc (Late::visit): Fix label resolution.

gcc/testsuite/ChangeLog:

* rust/execute/cf-labeled-block.rs: New test.

Signed-off-by: Islam-Imad <islamimad404@gmail.com>
2 months agogccrs: testsuite: Add a testcase for issue 4159
Harishankar [Thu, 7 May 2026 11:01:05 +0000 (16:31 +0530)] 
gccrs: testsuite: Add a testcase for issue 4159

gcc/testsuite/ChangeLog:
* rust/compile/issue-4159.rs: New test

Signed-off-by: Harishankar <harishankarpp7@gmail.com>
2 months agogccrs: testsuite: Add a testcase for issue 4158
Harishankar [Thu, 7 May 2026 11:32:09 +0000 (17:02 +0530)] 
gccrs: testsuite: Add a testcase for issue 4158

gcc/testsuite/ChangeLog:
* rust/compile/issue-4158.rs: New test.
Signed-off-by: Harishankar <harishankarpp7@gmail.com>
2 months agogccrs: util: Switch VisType to an enum class and rename variants.
Arthur Cohen [Mon, 18 May 2026 15:37:20 +0000 (17:37 +0200)] 
gccrs: util: Switch VisType to an enum class and rename variants.

gcc/rust/ChangeLog:

* hir/tree/rust-hir-visibility.h: Switch Visibility::VisType to an enum class, adapt
variants' case.
* backend/rust-compile-base.cc (HIRCompileBase::setup_fndecl): Use the new enum API.
* backend/rust-compile-implitem.cc (CompileTraitItem::visit): Likewise.
* checks/errors/privacy/rust-visibility-resolver.cc
(VisibilityResolver::resolve_visibility): Likewise.
* hir/rust-ast-lower.cc (translate_visibility): Likewise.
* hir/tree/rust-hir.cc (Visibility::to_string): Likewise.
* metadata/rust-export-metadata.cc (PublicInterface::is_crate_public): Likewise.
* util/rust-hir-map.cc (Mappings::Mappings): Likewise.

2 months agogccrs: testsuite: Add a testcase for issue 3537
Harishankar [Wed, 6 May 2026 13:37:56 +0000 (19:07 +0530)] 
gccrs: testsuite: Add a testcase for issue 3537

Fixes Rust-GCC/gccrs#3537
gcc/testsuite/ChangeLog:
* rust/compile/issue-3537.rs: New test.

Signed-off-by: Harishankar <harishankarpp7@gmail.com>
2 months agogccrs: Add feature gate for rustc_const_stable attribute
Pierre-Emmanuel Patry [Thu, 30 Apr 2026 13:46:13 +0000 (15:46 +0200)] 
gccrs: Add feature gate for rustc_const_stable attribute

rustc_const_stable attributes are used within the core library but were
not properly feature gated. The compiler now rejects their usage when
the feature has not been explicitly enabled.

gcc/rust/ChangeLog:

* checks/errors/feature/rust-feature-gate.cc (FeatureGate::visit): Add
a feature gate around rustc_const_stable attributes.

gcc/testsuite/ChangeLog:

* rust/compile/const-issue1440.rs: Enable staged_api feature.
* rust/compile/for-loop1.rs: Likewise.
* rust/compile/for-loop2.rs: Likewise.
* rust/compile/issue-1031.rs: Likewise.
* rust/compile/issue-1289.rs: Likewise.
* rust/compile/iterators1.rs: Likewise.
* rust/compile/rustc_const_stable.rs: Likewise.
* rust/compile/torture/issue-1075.rs: Likewise.
* rust/compile/torture/issue-1432.rs: Likewise.
* rust/execute/torture/const-generics-7.rs: Likewise.
* rust/execute/torture/for-loop1.rs: Likewise.
* rust/execute/torture/for-loop2.rs: Likewise.
* rust/execute/torture/issue-1120.rs: Likewise.
* rust/execute/torture/issue-1133.rs: Likewise.
* rust/execute/torture/issue-1232.rs: Likewise.
* rust/execute/torture/issue-1436.rs: Likewise.
* rust/execute/torture/iter1.rs: Likewise.
* rust/execute/torture/slice-magic.rs: Likewise.
* rust/execute/torture/slice-magic2.rs: Likewise.
* rust/execute/torture/str-layout1.rs: Likewise.
* rust/compile/missing_staged_api.rs: New test.

Signed-off-by: Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com>
2 months agogccrs: lex: Emit E0768 for empty non-decimal literals
Enes Cevik [Wed, 29 Apr 2026 20:18:09 +0000 (23:18 +0300)] 
gccrs: lex: Emit E0768 for empty non-decimal literals

Previously, the lexer evaluated empty non-decimal literals (like 0x, 0b, 0o) as 0.
Now, it emits error E0768 when there are no valid digits.

gcc/rust/ChangeLog:

* lex/rust-lex.cc (Lexer::parse_non_decimal_int_literal): Emit E0768.

gcc/testsuite/ChangeLog:

* rust/compile/empty-non-decimal.rs: New test.

Signed-off-by: Enes Cevik <nsvke@proton.me>
2 months agogccrs: Defer literal suffix validation to parser and preserve source fidelity
Enes Cevik [Mon, 6 Apr 2026 10:16:35 +0000 (13:16 +0300)] 
gccrs: Defer literal suffix validation to parser and preserve source fidelity

Number literal evaluation and suffix validation should be done after macro expansion,
so we defer these to the parser phase. This preserves source fidelity for macro token
trees.

gcc/rust/ChangeLog:

* ast/rust-ast-collector.cc (TokenCollector::visit): Update Token::make_int and
Token::make_float calls to include suffix_start and IntegerLiteralBase::Decimal.
* expand/rust-macro-builtins-location.cc (MacroBuiltin::column_handler): Pass string
length and base to Token::make_int.
(MacroBuiltin::line_handler): Likewise.
* lex/rust-lex.cc (Lexer::parse_in_type_suffix): Rename to parse_in_suffix and return
string instead of PrimitiveCoreType.
(Lexer::parse_in_suffix): Remove underscore stripping to preserve source fidelity for
macros.
(Lexer::parse_in_exponent_part): Preserve '+' and '-' characters in the raw string.
(Lexer::parse_in_decimal): Remove underscore stripping.
(Lexer::parse_non_decimal_int_literal): Track suffix start index and pass literal base.
(Lexer::parse_non_decimal_int_literals): Use IntegerLiteralBase enum values instead of
raw integers.
(Lexer::parse_decimal_int_or_float): Track suffix string length and pass base parameters
to token creation.
* lex/rust-lex.h: Update method signatures for suffix parsing.
* lex/rust-token.h (enum class IntegerLiteralBase): New enum to represent numeric bases.
* parse/rust-parse-impl-expr.hxx: use LiteralResolve functions to evaluate raw token
strings.
* parse/rust-parse-impl-pattern.hxx: Use evaluated literal strings for INT and FLOAT
tokens.
* parse/rust-parse.cc (resolve_literal_suffix): Move suffix validation logic from lexer
to parser.
(evaluate_integer_literal): New function to strip underscores and convert to decimal via
GMP.
(evaluate_float_literal): New function to strip underscores from floats.
* parse/rust-parse.h (evaluate_integer_literal): Declare in LiteralResolve namespace.
(evaluate_float_literal): Likewise.
(resolve_literal_suffix): Likewise.
* util/rust-token-converter.cc (from_literal): Safely reconstruct raw text and suffix to
dynamically determine base and suffix_start for ProcMacros.

gcc/testsuite/ChangeLog:

* rust/compile/deferred-suffix-validation.rs: New test.
* rust/compile/evaluate-integer-or-float.rs: New test.
* rust/compile/tuple-index.rs: New test.

Signed-off-by: Enes Cevik <nsvke@proton.me>
2 months agogccrs: nr: Do first part of path resolution in types NS
Arthur Cohen [Mon, 23 Mar 2026 11:52:00 +0000 (12:52 +0100)] 
gccrs: nr: Do first part of path resolution in types NS

gcc/rust/ChangeLog:

* resolve/rust-name-resolution-context.hxx: Do segment resolution in types NS for more
correctness and correct behavior when later resolving paths that use imports and/or
modules.

2 months agogccrs: nr: Move path resolution from ForeverStack to NRCtx
Arthur Cohen [Mon, 23 Mar 2026 04:36:16 +0000 (05:36 +0100)] 
gccrs: nr: Move path resolution from ForeverStack to NRCtx

gcc/rust/ChangeLog:

* resolve/rust-forever-stack.h: Move declarations from ForeverStack to NRCtx, make most
of the ForeverStack members public as it helps the Ctx a lot.
* resolve/rust-forever-stack.hxx: Move implementation of resolve_path methods to NRCtx.
* resolve/rust-name-resolution-context.h: Declare resolve_path methods.
* resolve/rust-name-resolution-context.hxx: New file with resolve_path impls.

2 months agogccrs: Add assert macro handler
Pierre-Emmanuel Patry [Fri, 3 Apr 2026 11:21:14 +0000 (13:21 +0200)] 
gccrs: Add assert macro handler

Assert macro handler was missing, insert a basic handler that desugars to
a condition and a call to panic.

gcc/rust/ChangeLog:

* expand/rust-macro-builtins-log-debug.cc (MacroBuiltin::assert_handler):
Add basic assert builtin macro handler.

gcc/testsuite/ChangeLog:

* rust/compile/assert_missing_panic.rs: New test.

Signed-off-by: Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com>
2 months agogccrs: Fix ICE cloning trait functions without return types
lishin [Mon, 20 Apr 2026 18:39:04 +0000 (19:39 +0100)] 
gccrs: Fix ICE cloning trait functions without return types

Fixes Rust-GCC/gccrs#3972.

Trait functions without an explicit return type can have a null
`return_type` in `TraitFunctionDecl`. When such declarations are copied,
the copy constructor and assignment operator currently try to clone the
return type unconditionally, and this can lead to an ICE.

Handle this case by keeping `nullptr` when there is no return type to
clone. Also add a regression test for the example from Rust-GCC/gccrs#3972.

gcc/rust/ChangeLog:

* hir/tree/rust-hir-item.cc (TraitFunctionDecl::TraitFunctionDecl):
Handle null return types in copy constructor.
(TraitFunctionDecl::operator=): Likewise.

gcc/testsuite/ChangeLog:

* rust/compile/issue-3972.rs: New test.

Signed-off-by: lishin <lishin1008@gmail.com>
2 months agogccrs: Recognize warn and deny as built in attributes
Owen Avery [Sat, 18 Apr 2026 19:19:09 +0000 (15:19 -0400)] 
gccrs: Recognize warn and deny as built in attributes

gcc/rust/ChangeLog:

* util/rust-attributes.cc (__definitions): Add entries for warn
and deny attributes.

Signed-off-by: Owen Avery <powerboat9.gamer@gmail.com>
2 months agogccrs: Fix ICE in get_function_expr when cfg'd return type inside macro
Harishankar [Fri, 17 Apr 2026 09:38:48 +0000 (15:08 +0530)] 
gccrs: Fix ICE in get_function_expr when cfg'd return type inside macro

the problem is cfg-strip emits an error for unstrippable expressions but
doesn't mark the parent for strip, leaving a broken subtree for later
passes to ICE on.

gcc/rust/ChangeLog:

* expand/rust-cfg-strip.cc (CfgStrip::visit): mark CallExpr for
strip when function expression fails stripping.
(CfgStrip::visit): mark ArrayIndexExpr for strip when array or
index expression fails stripping.

gcc/testsuite/ChangeLog:

* rust/compile/issue-4167.rs: New test.

Signed-off-by: Harishankar <harishankarpp7@gmail.com>
2 months agogccrs: Fix corrupted GIMPLE for CompoundAssignmentExpr in const context
Islam-Imad [Sat, 11 Apr 2026 17:31:45 +0000 (19:31 +0200)] 
gccrs: Fix corrupted GIMPLE for CompoundAssignmentExpr in const context

CompoundAssignmentExpr codegen was missing the final assignment statement
when it was evaluated in a const context.

gcc/rust/ChangeLog:

* backend/rust-compile-expr.cc (CompileExpr::visit): Emit the
missing assignment for CompoundAssignmentExpr.

gcc/testsuite/ChangeLog:

* rust/compile/const-compound-assignment.rs: New test.
* rust/execute/const-compound-assignment.rs: New test.

Signed-off-by: Islam-Imad <islamimad404@gmail.com>
2 months agogccrs: Clean up of obsolete nr2 command line option
fisnikhasani [Thu, 2 Apr 2026 13:27:11 +0000 (15:27 +0200)] 
gccrs: Clean up of obsolete nr2 command line option

Fixes: Rust-GCC/gccrs#4503
gcc/rust/ChangeLog:

* lang.opt (flag_name_resolution_2_0): Remove.
* resolve/rust-name-resolver.cc: Remove include.

Signed-off-by: Fisnik Hasani <opensource@fisnikhasani.com>
2 months agoRegenerate some autoconf configure scripts after recent spelling fixes.
Jakub Jelinek [Mon, 1 Jun 2026 10:00:00 +0000 (12:00 +0200)] 
Regenerate some autoconf configure scripts after recent spelling fixes.

The
r17-1010-gd1051b48f8330
r17-1031-ga886b383b26a0
r17-1033-g06fb00cb66d88
commits failed to regenerate corresponding generated scripts.

Fixed thusly.

2026-06-01  Jakub Jelinek  <jakub@redhat.com>

gcc/
* configure: Regenerate.
libgm2/
* configure: Regenerate.
libiberty/
* configure: Regenerate.

2 months agolibgomp/oacc-mem: add missing assert to goacc_enter_datum
Arsen Arsenović [Fri, 24 Apr 2026 12:58:49 +0000 (12:58 +0000)] 
libgomp/oacc-mem: add missing assert to goacc_enter_datum

A bug I accidentally introduced made it so that new variables are
allocated with some room to spare before them, and ergo, that tgt_offset
!= 0, leading to tests failing in what looked like a strange way.  Turns
out, goacc_enter_datum was failing to validate its assumption that
tgt_offset == 0.  This patch adds that assert.

libgomp/ChangeLog:

* oacc-mem.c (goacc_enter_datum): Assert that tgt_offset of the
newly-mapped variable is zero.

2 months agolibgomp/plugin-gcn: remove unneeded heap allocation in run_kernel
Arsen Arsenović [Fri, 24 Apr 2026 12:04:45 +0000 (12:04 +0000)] 
libgomp/plugin-gcn: remove unneeded heap allocation in run_kernel

So far, the GCN plugin has used a kernel_dispatch struct instance it
calls "shadow" to keep effectively a copy of part of the HSA dispatch
packet before populating said packet.  It also allocated it on the heap.

This, at first glance, seems useless: why double up the data in a shadow
when it's already in packet?

But, it serves a purpose.  The packet is owned by the HSA runtime.
After dispatch, its contents are to be considered no longer accessible
by the dispatcher (i.e. run_kernel).  So, we can't read back from it the
addresses or handles of resources we allocated, and so, we can't clean
them up.

However, this allocation doesn't need to happen on the heap.  It's of a
known fixed size, and its lifetime is the same as the lifetime of an
automatic variable.

This patch demotes the heap allocation into an automatic variable, and
adds commentary to make it clear what the purpose of this "shadow" is.
In the end, the result of this patch is that the run_kernel hot path has
one fewer allocation.

I've also taken the opportunity to do some very minor code cleanup.

libgomp/ChangeLog:

* plugin/plugin-gcn.c (struct kernel_dispatch): Store
hsa_signal_t, rather than a uint64_t, so that we don't rely on
knowledge of the contents of hsa_signal_t.
(create_kernel_dispatch): Rename...
(prepare_kernel_dispatch): ... to this, as it no longer creates
a kernel dispatch.  The allocation that would've created it is
hoisted...
(run_kernel): ... here, as an automatic variable.  Move logic
that copies the fields of kernel_dispatch...
(populate_packet_from_dispatch): ... into this standalone
function, to make it clearer.
(release_kernel_dispatch): Rename....
(cleanup_kernel_dispatch): ... to this, don't free 'shadow'.

2 months agolibgomp: let plugins handle allocating the target variable table
Arsen Arsenović [Thu, 23 Apr 2026 10:47:38 +0000 (10:47 +0000)] 
libgomp: let plugins handle allocating the target variable table

In my examination of BabelStream results on AMD GCN, I've found that,
for each BabelStream kernel execution, we spend significant time in
allocating and initializing memory in gomp_map_vars (~55µs, whereas the
actual BabelStream code executes in ~746µs, meaning we increase the time
BabelStream measures by 7% just on that).

Upon further examination, I've found that the only reason gomp_map_vars
decides to allocate and map any memory in the first place is because it
is constructing the table of pointers to variables on the target, which
I've taken to calling the "target variable table".  Given that the GCN
plugin already must perform some memory allocation before starting up a
kernel, namely to allocate kernel arguments, it would be beneficial if
we could merge this allocation with the kernel arguments allocation.

In addition, since the kernel arguments live in host memory, populating
them can be performed using string functions, without any need to call
for expensive host2dev copies.

This patch introduces an opaque type for "offload sessions".  This type
is defined by each plugin and allows it to store data related to a
single offload job.  The sessions are allocated and managed by libgomp,
and initialized and utilized by the plugin.  Their lifetime starts with
a call to GOMP_OFFLOAD_session_start, and ends with
GOMP_OFFLOAD_{openacc_{async_,}exec,{async_,}run}.

The patch then uses this framework to make management of the target
variable table more flexible: the plugin may elect to implement
GOMP_OFFLOAD_session_allocate_target_var_table, which allows the plugin
to attempt to allocate the target variable table in host memory.

If it fails, or if the plugin does not provide this function, libgomp
will perform this allocation as it does today - in target memory - and
tell the session about it using
GOMP_OFFLOAD_session_set_target_var_table.

In the case of AMD GCN, upon a call to
GOMP_OFFLOAD_session_allocate_target_var_table, the plugin will
immediately allocate kernel arguments with enough space for the target
variable table, no matter what size the plugin asks for[1], and return
that pointer to libgomp.

This results in the runtime of gomp_map_vars effectively disappearing
from traces.

[1] It may be beneficial to limit this, to some fixed amount, to make it
    so that the future allocation cache has a higher cache hit rate.  It
    may also depend on whether hsa_memory_allocate for kernel arguments
    takes runtime proportional to the number of bytes it needs to
    allocate.

include/ChangeLog:

* gomp-constants.h (GOMP_VERSION): Bump.  Signature of
GOMP_OFFLOAD_run et al changed.

libgomp/ChangeLog:

* libgomp-plugin.h (GOMP_OFFLOAD_run, GOMP_OFFLOAD_exec)
(GOMP_OFFLOAD_async_run, GOMP_OFFLOAD_openacc_async_exec): Pass
session in place of target variable table and devices.
(struct gomp_offload_session): New.
(GOMP_OFFLOAD_session_size): New
(GOMP_OFFLOAD_check_session_struct): New.
(GOMP_OFFLOAD_session_boilerplate): New.
(GOMP_OFFLOAD_session_start): New.
(GOMP_OFFLOAD_session_allocate_target_var_table): New.
(GOMP_OFFLOAD_session_set_target_var_table): New.
* libgomp.h (struct gomp_target_task): Add offload_session
field.
(struct gomp_device_descr): Add offload session management
functions.
(gomp_offload_session_new): New.
(goacc_map_vars): Add SESSION to signature
* oacc-host.c (struct gomp_offload_session): Define, for host
offload fallback case.
(host_session_size): New.  Implements GOMP_OFFLOAD_session_size.
(host_session_start): New.  Implements
GOMP_OFFLOAD_session_start.
(host_session_set_target_var_table): New.  Implements
GOMP_OFFLOAD_session_set_target_var_table.
(host_run): Adjust to match GOMP_OFFLOAD_run.
(host_openacc_exec): Adjust to match GOMP_OFFLOAD_openacc_exec.
(host_openacc_async_exec): Adjust to match
GOMP_OFFLOAD_openacc_async_exec.
* oacc-mem.c (acc_map_data): Adjust call to goacc_map_vars.
(goacc_enter_datum): Ditto.
(goacc_enter_data_internal): Ditto.
* oacc-parallel.c (GOACC_parallel_keyed): Allocate and pass
offload session.
(GOACC_data_start): Adjust call to goacc_map_vars.
* plugin/plugin-gcn.c (struct kernel_dispatch): Remove
kernarg_cache_node.
(struct kernargs): Add a flexible array member for the target
variable table.
(struct kernel_launch): Store an offload session rather than
target var. table pointer.
(print_kernel_dispatch): Receive kernargs as parameter.
(struct gomp_offload_session): Define.
(init_session): New.
(GOMP_OFFLOAD_session_start): Implement, using init_session.
(release_session): New.
(alloc_kernargs_on_agent): Rename to...
(allocate_session_kernargs): ... this, store result in
passed-in SESSION, and allocate extra room for target variable
table (rounding it up to nearest multiple of 64 pointers).
(GOMP_OFFLOAD_session_allocate_target_var_table): Implement
using the previous function.
(GOMP_OFFLOAD_session_set_target_var_table): Ditto.
(create_kernel_dispatch): Remove kernarg allocation, instead
receiving it as an argument.
(release_kernel_dispatch): Receive kernargs as an argument,
don't release them.
(run_kernel): Adjust to use sessions.
(destroy_module): Ditto.
(GOMP_OFFLOAD_load_image): Ditto.
(execute_queue_entry): Adjust to match changed struct
kernel_launch.
(queue_push_launch): Ditto.
(gcn_exec): Receive and pass along session.
(GOMP_OFFLOAD_run): Ditto.
(GOMP_OFFLOAD_async_run): Ditto.
(GOMP_OFFLOAD_openacc_exec): Ditto.
(GOMP_OFFLOAD_openacc_async_exec): Ditto.
* plugin/plugin-nvptx.c (struct gomp_offload_session): Define.
(GOMP_OFFLOAD_session_start): Implement.
(GOMP_OFFLOAD_session_set_target_var_table): Implement.
(GOMP_OFFLOAD_openacc_exec): Adjust to receive session.
(GOMP_OFFLOAD_openacc_async_exec): Ditto.
(GOMP_OFFLOAD_run): Ditto.
* target.c (gomp_get_tvt_size): Extract helper from...
(gomp_map_vars_internal): ... here.  Receive SESSION, iff doing
target offload.  Use a target variable table on the host
allocated by GOMP_OFFLOAD_session_allocate_target_var_table if
possible, or call GOMP_OFFLOAD_session_set_target_var_table with
an allocated device pointer otherwise.
(gomp_map_vars): Update to pass along session.
(goacc_map_vars): Ditto.
(GOMP_target): Allocate and pass along session.
(GOMP_target_ext): Ditto.
(gomp_target_data_fallback): Adjust call to gomp_map_vars.
(GOMP_target_data): Ditto.
(GOMP_target_data_ext): Ditto.
(GOMP_target_enter_exit_data): Ditto.
(gomp_target_task_fn): Start and pass along session, the storage
for which is allocated by gomp_create_target_task.
(DLSYM2): Rename from DLSYM, adding a new parameter for the
variable to populate, akin to DLSYM_OPT.
(DLSYM): Delegate to DLSYM2.
(gomp_load_plugin_for_device): Populate session-related fields.
* task.c (gomp_create_target_task): Allocate enough storage for
an offload session.
* testsuite/libgomp.c-c++-common/gcn-kernel-launch-no-tvt-alloc.c: New test.
* testsuite/libgomp.c-c++-common/gcn-kernel-launch-tvt-alloc.c: New test.

2 months agolibgomp/gcn: parallelize initializing threads of a team
Arsen Arsenović [Thu, 12 Feb 2026 15:42:02 +0000 (15:42 +0000)] 
libgomp/gcn: parallelize initializing threads of a team

Currently, libgomp performs initialization of all threads in a team
in its lead thread, and then releases all threads to do work.  This
means that, before reaching the release, each thread is doing nothing,
waiting for the lead threads to do lots of thread initialization
operations.

This initialization is identical for each thread.

We can parallelize it by performing this initialization in each thread,
after releasing each.  This allows the threads of a team to be released
near-immediately, which should cut team startup time roughly by just
under the number of threads.

In order to achieve this, the lead thread prepares the parameters each
thread needs for initialization by copying them into an object each will
be able to read from, and only initializes each remaining thread in the
team with a few pointers.

No functional changes intended in this commit.  It may seem like there
is a functional change, as gomp_prep_our_thread no longer sets
icv.nthreads_var, whereas the old code did, but the value that was being
set by old code was always equal to the value already present in the
ICV, because both are initialized from parent tasks ICV (or global ICV
if that's missing) and, hence, the write was always redundant.

libgomp/ChangeLog:

* libgomp.h (struct gomp_thread_start_data): New struct.  Holds
thread-independent parameters needed to initialize current
thread.
(struct gomp_team): On GCN, add thr_start_data field, that holds
a gomp_thread_start_data to be used in each thread.
(struct gomp_thread): Add start_data field, that points to
thread initialization parameters.
* config/gcn/team.c (gomp_team_start): Move thread
initialization steps into ...
(gomp_prep_our_thread): this new function, such that it reads
from a gomp_thread_start_data object.
(gomp_thread_start): Call the above to initialize our thread.

2 months agolibstdc++: Fix typo in piecewise_constant_distribution::param_type constructor.
Tomasz Kamiński [Mon, 1 Jun 2026 08:02:15 +0000 (10:02 +0200)] 
libstdc++: Fix typo in piecewise_constant_distribution::param_type constructor.

Fixed typo in r17-509-g7bed7d9276c11b: The __fw should be called with
__xmin + 0.5 * __delta (as in existing loop), not __xmin * 0.5 * __delta.

libstdc++-v3/ChangeLog:

* include/bits/random.tcc
(piecewise_constant_distribution:::param_type::param_type):
Replace * with + in __fw argument.

2 months agoi386: Add tuning to disable memory-form NDD
Hongyu Wang [Fri, 29 May 2026 07:18:08 +0000 (15:18 +0800)] 
i386: Add tuning to disable memory-form NDD

Benchmark shows memory form of NDD instructions is not beneficial
on NovaLake.  Add X86_TUNE_ENABLE_NDD_MEM tuning (default off) to
deprioritize NDD alternatives with memory source operands via the
preferred_for_speed attribute. For pure NDD patterns that have a
single alternative with rm constraint, split into r,m alternatives
and apply preferred_for_speed on the memory alternative. For legacy
patterns with NDD alternatives, also split the NDD rm constraint
into separate r and m alternatives so the deprioritization targets
only the memory form.

gcc/ChangeLog:

* config/i386/i386.h (TARGET_ENABLE_NDD_MEM): New.
* config/i386/x86-tune.def (X86_TUNE_ENABLE_NDD_MEM): New.
* config/i386/i386.md (*add<dwi>3_doubleword): Split NDD rm
to r,m and add preferred_for_speed for NDD memory alternatives.
(*add<dwi>3_doubleword_zext): Likewise.
(*add<mode>_1<nf_name>): Likewise.
(addsi_1_zext): Likewise.
(*addhi_1<nf_name>): Likewise.
(*addqi_1<nf_name>): Likewise.
(*add<mode>_2): Likewise.
(*addsi_2_zext): Likewise.
(*add<mode>_3): Likewise.
(*addsi_3_zext): Likewise.
(*add<mode>_5): Likewise.
(*addv<mode>4): Likewise.
(addv<mode>4_1): Likewise.
(*addv<dwi>4_doubleword_1): Likewise.
(*addv<mode>4_overflow_1): Likewise.
(*addv<mode>4_overflow_2): Likewise.
(*sub<dwi>3_doubleword): Likewise.
(*sub<dwi>3_doubleword_zext): Likewise.
(*sub<mode>_1<nf_name>): Likewise.
(*subsi_1_zext): Likewise.
(*sub<mode>_2): Likewise.
(*subsi_2_zext): Likewise.
(*subv<mode>4): Likewise.
(subv<mode>4_1): Likewise.
(*subv<dwi>4_doubleword_1): Likewise.
(*subv<mode>4_overflow_1): Likewise.
(*subv<mode>4_overflow_2): Likewise.
(*sub<mode>_3): Likewise.
(*subsi_3_zext): Likewise.
(@add<mode>3_carry): Likewise.
(*add<mode>3_carry_2): Likewise.
(*addsi3_carry_zext): Likewise.
(*addsi3_carry_zext_0): Likewise.
(*addsi3_carry_zext_0r): Likewise.
(addcarry<mode>): Likewise.
(*addcarry<mode>_1): Likewise.
(@sub<mode>3_carry): Likewise.
(*sub<mode>3_carry_2): Likewise.
(*subsi3_carry_zext): Likewise.
(*subsi3_carry_zext_0): Likewise.
(*subsi3_carry_zext_0r): Likewise.
(subborrow<mode>): Likewise.
(*subborrow<mode>_1): Likewise.
(*add<mode>3_cconly_overflow_1): Likewise.
(@add<mode>3_cc_overflow_1): Likewise.
(*addsi3_zext_cc_overflow_1): Likewise.
(*add<mode>3_cconly_overflow_2): Likewise.
(*add<mode>3_cc_overflow_2): Likewise.
(*addsi3_zext_cc_overflow_2): Likewise.
(*mul<mode>3_1<nf_name>): Likewise.
(*mulsi3_1_zext<nf_name>): Likewise.
(*mulv<mode>4): Likewise.
(*mulvhi4): Likewise.
(*and<dwi>3_doubleword): Likewise.
(*anddi_1<nf_name>): Likewise.
(*andsi_1_zext): Likewise.
(*andqi_1<nf_name>): Likewise.
(*anddi_2): Likewise.
(*andsi_2_zext): Likewise.
(*andqi_2_maybe_si): Likewise.
(*and<mode>_2): Likewise.
(*<code><dwi>3_doubleword): Likewise.
(*<code><mode>_1<nf_name>): Likewise.
(*notxor<mode>_1): Likewise.
(*<code>si_1_zext): Likewise.
(*<code>si_1_zext_imm): Likewise.
(*<code>qi_1<nf_name>): Likewise.
(*notxorqi_1): Likewise.
(*<code><mode>_2): Likewise.
(*<code>si_2_zext): Likewise.
(*<code>si_2_zext_imm): Likewise.
(*neg<dwi>2_doubleword): Likewise.
(*neg<mode>_1<nf_name>): Likewise.
(*negsi_1_zext): Likewise.
(*neg<mode>_2): Likewise.
(*negsi_2_zext): Likewise.
(*neg<mode>_ccc_1): Likewise.
(*neg<mode>_ccc_2): Likewise.
(*one_cmpl<dwi>2_doubleword): Likewise.
(*one_cmpl<mode>2_1): Likewise.
(*one_cmplsi2_1_zext): Likewise.
(*one_cmplqi2_1): Likewise.
(*one_cmpl<mode>2_2): Likewise.
(*one_cmplsi2_2_zext): Likewise.
(*ashl<dwi>3_doubleword_highpart): Likewise.
(*ashl<mode>3_1<nf_name>): Likewise.
(*ashlsi3_1_zext): Likewise.
(*ashlhi3_1<nf_name>): Likewise.
(*ashlqi3_1<nf_name>): Likewise.
(*ashl<mode>3_cmp): Likewise.
(*ashlsi3_cmp_zext): Likewise.
(*ashl<mode>3_cconly): Likewise.
(ashr<mode>3_cvt<nf_name>): Likewise.
(*ashrsi3_cvt_zext): Likewise.
(*ashr<mode>3_1<nf_name>): Likewise.
(*highpartdisi2): Likewise.
(*lshr<mode>3_1<nf_name>): Likewise.
(*<insn>si3_1_zext): Likewise.
(*lshrqi3_1<nf_name>): Likewise.
(*lshrhi3_1<nf_name>): Likewise.
(*<insn><mode>3_cmp): Likewise.
(*<insn>si3_cmp_zext): Likewise.
(*<insn><mode>3_cconly): Likewise.
(*<insn><mode>3_1<nf_name>): Likewise.
(*<insn>si3_1_zext): Likewise.
(rcrsi2): Likewise.
(rcrdi2): Likewise.
(<insn><mode>3_carry): Likewise.
(*mov<mode>cc_noc): Likewise.
(*movsicc_noc_zext): Likewise.
(*movsicc_noc_zext_1): Likewise.
(*addqi3_carry_zext<mode>_0): Likewise.
(*addhi3_carry_zext<mode>_0): Likewise.
(*addqi3_carry_zext<mode>_0r): Likewise.
(*addhi3_carry_zext<mode>_0r): Likewise.
(*subqi3_carry_zext<mode>_0): Likewise.
(*subhi3_carry_zext<mode>_0): Likewise.
(*subqi3_carry_zext<mode>_0r): Likewise.
(*subhi3_carry_zext<mode>_0r): Likewise.
(*negqi_1_zext<mode><nf_name>): Likewise.
(*neghi_1_zext<mode><nf_name>): Likewise.
(*one_cmplqi2_1_zext<mode>): Likewise.
(*one_cmplhi2_1_zext<mode>): Likewise.
(x86_64_shld_ndd<nf_name>): Likewise.
(x86_64_shld_ndd_1<nf_name>): Likewise.
(x86_shld_ndd<nf_name>): Likewise.
(x86_shld_ndd_1<nf_name>): Likewise.
(*ashlqi3_1_zext<mode><nf_name>): Likewise.
(*ashlhi3_1_zext<mode><nf_name>): Likewise.
(x86_64_shrd_ndd<nf_name>): Likewise.
(x86_64_shrd_ndd_1<nf_name>): Likewise.
(x86_shrd_ndd<nf_name>): Likewise.
(x86_shrd_ndd_1<nf_name>): Likewise.
(*<insn>qi3_1_zext<mode><nf_name>): Likewise.
(*<insn>hi3_1_zext<mode><nf_name>): Likewise.
* config/i386/sse.md
(*kortest_cmp<mode>_mov<mode>cc): Add
preferred_for_speed for NDD memory alternatives.

gcc/testsuite/ChangeLog:

* gcc.target/i386/apx-ndd-2.c: Add -mtune-ctrl=enable_ndd_mem.
* gcc.target/i386/apx-ndd-adc.c: Likewise.
* gcc.target/i386/apx-ndd-base-index-1.c: Likewise.
* gcc.target/i386/apx-ndd-cmov.c: Likewise.
* gcc.target/i386/apx-ndd-no-seg-global-1.c: Likewise.
* gcc.target/i386/apx-ndd-sbb.c: Likewise.
* gcc.target/i386/apx-ndd-seg-1.c: Likewise.
* gcc.target/i386/apx-ndd-seg-2.c: Likewise.
* gcc.target/i386/apx-ndd-seg-3.c: Likewise.
* gcc.target/i386/apx-ndd-seg-4.c: Likewise.
* gcc.target/i386/apx-ndd-seg-5.c: Likewise.
* gcc.target/i386/apx-ndd-shld-shrd.c: Likewise.
* gcc.target/i386/apx-ndd-tls-1a.c: Likewise.
* gcc.target/i386/apx-ndd-tls-1b.c: Likewise.
* gcc.target/i386/apx-ndd-tls-2.c: Likewise.
* gcc.target/i386/apx-ndd-tls-3.c: Likewise.
* gcc.target/i386/apx-ndd-tls-4.c: Likewise.
* gcc.target/i386/apx-ndd-x32-1.c: Likewise.
* gcc.target/i386/apx-ndd-x32-2a.c: Likewise.
* gcc.target/i386/apx-ndd-x32-2b.c: Likewise.
* gcc.target/i386/apx-ndd-x32-2c.c: Likewise.
* gcc.target/i386/apx-ndd-x32-2d.c: Likewise.
* gcc.target/i386/apx-ndd.c: Likewise.
* gcc.target/i386/pr113729.c: Likewise.
* gcc.target/i386/pr113729-adc-sbb.c: Likewise.
* gcc.target/i386/pr79173-13.c: Likewise.
* gcc.target/i386/pr79173-14.c: Likewise.
* gcc.target/i386/pr79173-15.c: Likewise.
* gcc.target/i386/pr79173-16.c: Likewise.

2 months agoi386: Disable SETcc.ZU generation on DMR/NVL via tune flag
Hongyu Wang [Tue, 26 May 2026 02:29:04 +0000 (07:59 +0530)] 
i386: Disable SETcc.ZU generation on DMR/NVL via tune flag

Microbenchmark performance on NovaLake/DiamondRapids shows no benefit
from SETcc.ZU encoding on these cores.  Add X86_TUNE_DISABLE_SETZUCC
to suppress setzucc generation for DMR/NVL while keeping it enabled
for other APX-capable targets.

gcc/ChangeLog:

* config/i386/x86-tune.def (X86_TUNE_DISABLE_SETZUCC): New.
Enable for m_DIAMONDRAPIDS | m_NOVALAKE.
* config/i386/i386.h (TARGET_DISABLE_SETZUCC): New define.
* config/i386/i386.md (*setcc_<mode>_zu): Guard with
TARGET_APX_ZU && !TARGET_DISABLE_SETZUCC.
(*setcc_di_1, *setcc_<mode>_1_movzbl): Guard with
(!TARGET_APX_ZU || TARGET_DISABLE_SETZUCC).
(*setcc_qi, *setcc_qi_slp): Emit setzucc only when
TARGET_APX_ZU && !TARGET_DISABLE_SETZUCC.

gcc/testsuite/ChangeLog:

* gcc.target/i386/apx-zu-4.c: New test.

2 months agodeclare Wild linker capable of LTO bootstrap
Martin Liska [Fri, 29 May 2026 06:28:37 +0000 (08:28 +0200)] 
declare Wild linker capable of LTO bootstrap

gcc/ChangeLog:

* configure.ac: Declare Wild as capable of LTO bootstrap.
* configure: Regenerate.

2 months agoDaily bump.
GCC Administrator [Mon, 1 Jun 2026 00:16:26 +0000 (00:16 +0000)] 
Daily bump.

2 months agorange-op: Add relation effect for integer mult [PR23471]
Andrew Pinski [Sat, 30 May 2026 22:54:59 +0000 (15:54 -0700)] 
range-op: Add relation effect for integer mult [PR23471]

tree_expr_nonnegative_p has code to say `a*a` is nonnegative
(for signed integers). But when I removed the call to
gimple_stmt_nonnegative_p, ranger could not figure out that
that `a*a` is nonnegative. This shows up as a regression
on riscv with `gcc.target/riscv/rvv/vsetvl/avl_single-65.c`.
But you can also reproduce the same issue if we disable forwprop
and look at the result of EVRP and look at the exported range
for that statement.

The fix is to teach the range multiply operator that when
dealing with `a*a`, the lhs will be non-negative.
That is add a op1_op2_relation_effect method to operator_mult
that handles the case where the relationship is equal.

vrp-mult-nonneg-1.c is now a testcase which GCC can optimize
which was not handled before.
vrp-mult-nonneg-2.c is the reduced testcase for PR125513 and the regression.

Bootstrapped and tested on x86_64-linux-gnu.

PR tree-optimization/23471
PR tree-optimization/125513

gcc/ChangeLog:

* range-op-mixed.h (operator_mult): Add op1_op2_relation_effect
for 2xirange.
* range-op.cc (operator_mult::op1_op2_relation_effect): New function.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/vrp-mult-nonneg-1.c: New test.
* gcc.dg/tree-ssa/vrp-mult-nonneg-2.c: New test.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
2 months ago[RISC-V][PR rtl-optimization/123313] Improve select between reg,-1
Jeff Law [Sun, 31 May 2026 22:34:42 +0000 (16:34 -0600)] 
[RISC-V][PR rtl-optimization/123313] Improve select between reg,-1

So this improves our ability to select across reg,-1.  The early versions of
this patch allowed const,-1, but those sequences weren't any better and
occasionally ever-so-slightly worse, so those are rejected.  I've spot checked
spec2017 where it does show up, but it's not clear that it's showing up in any
hot code.

The basic idea is to use an sCC to generate 1,0, subtract 1 giving 0, -1.  Then
we can IOR that with the other input.  Concretely:

> int f(int a, int b, int c)
> {
>    a = -1;
>    if (c < 10) a = b;
>    return a;
> }

Currently generates:

>         li      a5,9
>         addi    a1,a1,1
>         sgt     a2,a2,a5
>         czero.nez       a2,a1,a2
>         addi    a0,a2,-1
>         ret

After this patch:
>         slti    a0,a2,10
>         addi    a0,a0,-1
>         or      a0,a0,a1
>         ret

Probably the same performance on 4+ wide designs (and perhaps often on a 2 wide
designs).  But it encodes a lot more efficiently, 18 bytes for the first
sequence, just 10 bytes for the second.  That can be important on some designs,
particularly since if-converted blocks are more likely to be large and/or cross
cache line boundaries.

This has been bootstrapped and regression tested on x86, and riscv64.  The
riscv64 bootstraps were on the Pioneer, K1 (early version of the patch) and K3
(most recent versions).  It's also been tested on all the *-elf platforms in my
tester as well as additional bootstraps on platforms like alpha, sh4, etc.

I'll wait for a final confirmation from the pre-commit tester before moving
forward.

PR rtl-optimization/123313
gcc/
* ifcvt.cc (noce_try_store_flag_logical): New function.
(noce_process_if_block): Call it.

gcc/testsuite/
* gcc.target/riscv/pr123313.c: New test.
* gcc.target/riscv/pr124009.c: Adjust expected output.

2 months agoAVR: Fix overly long URLs in the printed PDF documentation
Georg-Johann Lay [Sun, 31 May 2026 18:48:22 +0000 (20:48 +0200)] 
AVR: Fix overly long URLs in the printed PDF documentation

...that are useless since they overflow the page boundaries
by quite some margin.

gcc/
* doc/invoke.texi (AVR Options): Fix overly long URLs.
* doc/extend.texi (Specifying the size of an asm on AVR): Dito.

2 months agogcc: finalize deprecation of -Wstrict-overflow
Daniel Barboza [Tue, 26 May 2026 18:39:30 +0000 (15:39 -0300)] 
gcc: finalize deprecation of -Wstrict-overflow

The flag has been documented as deprecated since GCC 8:

https://gcc.gnu.org/gcc-8/changes.html

"-fno-strict-overflow is now mapped to -fwrapv -fwrapv-pointer (...)
-Wstrict-overflow is deprecated."

But we kept it maintained and functional all along these years until GCC
17, where we're now "finalizing its deprecation" so to speak.

Remove the remaining enum and update all relevant docs and tests to make
it official.

gcc/c-family/ChangeLog:

* c.opt: Removed Wstrict-overflow entry.

gcc/ChangeLog:

* common.opt: Updated Wstrict-overflow entries to indicate that
they do nothing now.
* coretypes.h (enum warn_strict_overflow_code): Enum removed.
* doc/invoke.texi: Updated Wstrict-overflow entries to indicate
that they do nothing now.  Also removed the option from the
"Warning Options" list.
* opts.cc (common_handle_option): Removed OPT_Wstrict_overflow
logic.

gcc/testsuite/ChangeLog:

* gcc.dg/opts-1.c: Removed Wnostrict-overflow option test.

2 months agotestsuite: remove Wstrict-overflow related tests
Daniel Barboza [Tue, 26 May 2026 16:56:05 +0000 (13:56 -0300)] 
testsuite: remove Wstrict-overflow related tests

The following testsuite PRs are related to the now obsolete
Wstrict-overflow option:

- Bug 36227 - [4.3 Regression] POINTER_PLUS folding introduces undefined
  overflow
- Bug 48022 - [4.6 Regression] -Wstrict-overflow warning on code that
  doesn't have overflows
- Bug 49705 - -Wstrict-overflow should not diagnose unevaluated
  expressions
- Bug 52904 - -Wstrict-overflow false alarm with bounded loop

They are exercising code that no longer exists, so remove all of them.
Two other tests (pr81592.c and pragma-diag-3.c) have Wstrict-overflow
checks that got removed.

gcc/testsuite/ChangeLog:

* gcc.dg/pr81592.c: Removed strict-overflow options.
* gcc.dg/pragma-diag-3.c: Removed Wstrict-overflow option, along
with a reference and tests for PR66098 ("[5 regression] #pragma
diagnostic 'ignored' not fullyundone by pop for
strict-overflow").
* gcc.dg/pr36227.c: Removed.
* gcc.dg/pr48022-1.c: Removed.
* gcc.dg/pr48022-2.c: Removed.
* gcc.dg/pr49705.c: Removed.
* gcc.dg/pr52904.c: Removed.

2 months agotestsuite: remove all Wstrict-overflow tests
Daniel Barboza [Fri, 16 Jan 2026 17:02:07 +0000 (09:02 -0800)] 
testsuite: remove all Wstrict-overflow tests

We're no longer issuing Wstrict-overflow warnings, even with the
-Wstrict-overflow flag being used.

Remove the tests that are still testing for it.  They're either compile
tests that are testing cases where a warning shouldn't be issued or
XFAIL tests.

gcc/testsuite/ChangeLog:

* gcc.dg/Wstrict-overflow-10.c: Removed.
* gcc.dg/Wstrict-overflow-11.c: Removed.
* gcc.dg/Wstrict-overflow-12.c: Removed.
* gcc.dg/Wstrict-overflow-13.c: Removed.
* gcc.dg/Wstrict-overflow-14.c: Removed.
* gcc.dg/Wstrict-overflow-15.c: Removed.
* gcc.dg/Wstrict-overflow-16.c: Removed.
* gcc.dg/Wstrict-overflow-17.c: Removed.
* gcc.dg/Wstrict-overflow-18.c: Removed.
* gcc.dg/Wstrict-overflow-19.c: Removed.
* gcc.dg/Wstrict-overflow-2.c: Removed.
* gcc.dg/Wstrict-overflow-20.c: Removed.
* gcc.dg/Wstrict-overflow-21.c: Removed.
* gcc.dg/Wstrict-overflow-23.c: Removed.
* gcc.dg/Wstrict-overflow-26.c: Removed.
* gcc.dg/Wstrict-overflow-27.c: Removed.
* gcc.dg/Wstrict-overflow-4.c: Removed.
* gcc.dg/Wstrict-overflow-6.c: Removed.
* gcc.dg/Wstrict-overflow-7.c: Removed.
* gcc.dg/Wstrict-overflow-8.c: Removed.

2 months agogcc/fold-const: remove fold_*_overflow_warnings
Daniel Barboza [Fri, 16 Jan 2026 16:11:05 +0000 (08:11 -0800)] 
gcc/fold-const: remove fold_*_overflow_warnings

fold_undefer_overflow_warnings () is one of the last few places where
Wstrict_overflow warnings are issued.  It uses a
fold_deferring_overflow_warnings int to determine whether the warning should
be shown, a fold_defer_overflow_warnings helper that increments it,
a fold_deferred_overflow_warning string that stores the
deferred warning, an enum for the warning level of the deferred warning.

Remove all of them along with any related logic.

gcc/c-family/ChangeLog:

* c-common.cc (pointer_int_sum): Removed
fold_*_overflow_warnings uses.

gcc/c/ChangeLog:

* c-fold.cc (c_disable_warnings): Likewise.
(c_enable_warnings): Likewise.

gcc/ChangeLog:

* flags.h (issue_strict_overflow_warning): Removed.
* fold-const.cc (fold_defer_overflow_warnings): Removed.
(fold_undefer_overflow_warnings): Removed.
(fold_undefer_and_ignore_overflow_warnings): Removed.
(fold_deferring_overflow_warnings_p): Removed.
* fold-const.h (fold_defer_overflow_warnings): Removed.
(fold_undefer_overflow_warnings): Removed.
(fold_undefer_and_ignore_overflow_warnings): Removed.
(fold_deferring_overflow_warnings_p): Removed.
* gimple-fold.cc (fold_stmt_1): Removed
fold_*_overflow_warnings uses and all related logic.
* passes.cc (verify_interpass_invariants): Likewise.
(execute_one_ipa_transform_pass): Likewise.
(execute_one_pass): Likewise.
* tree-cfgcleanup.cc (cleanup_control_expr_graph): Likewise.
* tree-data-ref.cc (create_runtime_alias_checks): Likewise.
* tree-ssa-ccp.cc (evaluate_stmt): Likewise.
* tree-ssa-forwprop.cc (combine_cond_expr_cond): Likewise.
* tree-ssa-loop-niter.cc (expand_simple_operations): Likewise.
(number_of_iterations_exit_assumptions): Likewise.
(loop_niter_by_eval): Likewise.
(estimate_numbers_of_iterations): Likewise.
(loop_exits_before_overflow): Likewise.
* tree-ssa-threadedge.cc: Likewise.
* tree-vrp.cc (compare_values): Likewise.

2 months agotree-ssa-loop-ch.cc remove strict_overflow logic
Daniel Barboza [Fri, 16 Jan 2026 16:50:09 +0000 (08:50 -0800)] 
tree-ssa-loop-ch.cc remove strict_overflow logic

Remove the warn_strict_overflow block along with two Wstrict_overflow
supressed warnings.

gcc/ChangeLog:

* tree-ssa-loop-ch.cc (ch_base::copy_headers): Removed
warn_strict_overflow logic.

2 months agogcc/expr.cc: remove Wstrict-overflow from maybe_optimize_sub_cmp_0
Daniel Barboza [Mon, 25 May 2026 17:52:46 +0000 (14:52 -0300)] 
gcc/expr.cc: remove Wstrict-overflow from maybe_optimize_sub_cmp_0

Remove the single instance of Wstrict-overflow warning and the
associated testcase.

gcc/ChangeLog:

* expr.cc (maybe_optimize_sub_cmp_0): Removed warning_at () call
for Wstrict-overflow comparison.

gcc/testsuite/ChangeLog:

* gcc.dg/Wstrict-overflow-25.c: Removed.

2 months agotree-vrp: remove compare_values_warnv ()
Daniel Barboza [Mon, 25 May 2026 17:52:56 +0000 (14:52 -0300)] 
tree-vrp: remove compare_values_warnv ()

Remove compare_values_warn and all the Wstrict-overflow related logic
from the previous callers.

gcc/ChangeLog:

* tree-vrp.cc (compare_values_warnv): Removed.
(compare_values): Changed to do the same thing as the former
compare_values_warn but without the strict_overflow_p logic.
* tree-vrp.h (compare_values_warnv): Removed.
* vr-values.cc (test_for_singularity): Removed the
supress_warning logic that was used by compare_values_warnv.

2 months agotree-ssa-reassoc: remove strict_overflow_p from range_entry
Daniel Barboza [Fri, 16 Jan 2026 11:05:18 +0000 (03:05 -0800)] 
tree-ssa-reassoc: remove strict_overflow_p from range_entry

Continuing the deprecation of -Wstrict-overflow, remove the
strict_overflow_p flag from range_entry and the two associated
warning_at calls.

gcc/ChangeLog:

* tree-ssa-reassoc.cc (init_range_entry): Removed
strict_overflow_p use.
(force_into_ssa_name): Likewise.
(update_range_test): Removed strict_overflow_p from function
signature, along with the flag associated logic and the
warning_at call.
(optimize_range_tests_xor): Removed strict_overflow_p use.
(optimize_range_tests_diff): Likewise.
(optimize_range_tests_to_bit_test): Likewise.
(optimize_range_tests_cmp_bitwise): Likewise.
(optimize_range_tests_var_bound): Removed strict_overflow_p from
function signature, along with the flag associated logic and the
warning_at call.
(optimize_range_tests): Removed strict_overflow_p use.
* tree-ssa-reassoc.h (struct range_entry): Removed
strict_overflow_p flag.

2 months agoAVR: Support [[len=nl]] in asm templates.
Georg-Johann Lay [Sun, 31 May 2026 08:11:35 +0000 (10:11 +0200)] 
AVR: Support [[len=nl]] in asm templates.

Most inline asm consists of 1-word instruction, so their exact
size can be conveniently specified with [[len=nl]], which is
half the default size.

gcc/
* config/avr/avr.cc (avr_length_of_asm): Support "nl" as
the number of lines in the code template.
* doc/extend.texi (Size of an asm): Document [[len=nl]].
Simplify the description of the default length.

2 months agohppa: Fix clear_cache pattern and use it in pa_trampoline_init
John David Anglin [Sun, 31 May 2026 00:43:04 +0000 (20:43 -0400)] 
hppa: Fix clear_cache pattern and use it in pa_trampoline_init

The clear_cache pattern was broken and only flushed the instruction
cache.  On PA-RISC, both the data and instruction caches need to be
flushed and these flushes need to be separated by a sync instruction.

The code is reworked and simplified.

2026-05-30  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

* config/pa/pa.cc (pa_trampoline_init): Rework to use
clear_cache pattern.
* config/pa/pa.md (dcacheflush): Use "<<" condition instead
of "<<=".
(icacheflush): Remove.
(icacheflush1, icacheflush2, icacheflush3): New flush patterns
for PA 1.x targets, PA 2.0 targets, and PA 1.x no space
register targets.
(clear_cache): Rework to flush data and instruction caches.
Skip flush if the start address is greater than or equal to
the end address.  Don't align the end address to a cacheline
boundary.  Handle instruction flushes for PA 1.x targets,
PA 2.0 targets, and PA 1.x no space register targets.

2 months agoDaily bump.
GCC Administrator [Sun, 31 May 2026 00:16:35 +0000 (00:16 +0000)] 
Daily bump.

2 months agotestsuite: adjust tests for FIRSTP/LASTP SVE2 instructions
Artemiy Volkov [Sat, 30 May 2026 14:59:52 +0000 (14:59 +0000)] 
testsuite: adjust tests for FIRSTP/LASTP SVE2 instructions

Looks like I didn't have Wilco's recent r17-843-ge6c1179fd40d1c
when re-testing some parts of the SVE2.2 series, which led to a few
check-function-bodies mismatches discovered by the Linaro CI[0].  The fix
here is to adapt the tests by changing x0 to w0 in the expected
codegen whenever the constant value is unsigned in
aarch64/sve2/acle/general/{first,last}p.c.

Pushing to trunk as obvious.

[0] https://gcc.gnu.org/pipermail/gcc-regression/2026-May/083884.html

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/sve2/acle/general/firstp.c: Adjust testcases.
* gcc.target/aarch64/sve2/acle/general/lastp.c: Likewise.

2 months agoFix m68k bootstrap due to diagnostic
Jeff Law [Sat, 30 May 2026 17:13:18 +0000 (11:13 -0600)] 
Fix m68k bootstrap due to diagnostic

The m68k port stopped bootstrapping recently because of this error:

> In file included from ./tm.h:31,
>                  from ../../../gcc/gcc/target.h:52,
>                  from ../../../gcc/gcc/dwarf2cfi.cc:23:
> ../../../gcc/gcc/dwarf2cfi.cc: In function 'bool dwarf2out_do_cfi_asm()':
> ../../../gcc/gcc/config/m68k/m68k.h:780:22: error: use of logical '||' with constant operand '2' [-Werror=constant-logical-operand]
>   780 |         && ((GLOBAL) || (CODE)))                                           \
>       |             ~~~~~~~~~^~~~~~~~~
> ../../../gcc/gcc/dwarf2cfi.cc:3755:9: note: in expansion of macro 'ASM_PREFERRED_EH_DATA_FORMAT'
>  3755 |   enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
>       |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
> ../../../gcc/gcc/config/m68k/m68k.h:780:22: note: use '|' for bitwise operation
> ../../../gcc/gcc/dwarf2cfi.cc:3755:9: note: in expansion of macro 'ASM_PREFERRED_EH_DATA_FORMAT'
>  3755 |   enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
>       |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~

Note the "2" being passed down.  That's what triggers the warning.  The
semantic preserving change is to use !!CODE.  Given the port won't currently
bootstrap, I'm committing as-is.

gcc/

* config/m68k/m68k.h (ASM_PREFERRED_EH_DATA_FORMAT): Avoid
constant-logical diagnostic.