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14 months agotests/9p: Test `Tsetattr` can truncate unlinked file
Greg Kurz [Wed, 12 Mar 2025 15:29:32 +0000 (16:29 +0100)] 
tests/9p: Test `Tsetattr` can truncate unlinked file

Enhance the `use-after-unlink` test with a new check for the
case where the client wants to alter the size of an unlinked
file for which it still has an active fid.

Suggested-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Message-Id: <20250312152933.383967-7-groug@kaod.org>
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
14 months agotests/9p: add 'Tsetattr' request to test client
Christian Schoenebeck [Wed, 12 Mar 2025 15:29:31 +0000 (16:29 +0100)] 
tests/9p: add 'Tsetattr' request to test client

Add and implement functions to 9pfs test client for sending a 9p2000.L
'Tsetattr' request and receiving its 'Rsetattr' response counterpart.

Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20250312152933.383967-6-groug@kaod.org>

14 months ago9pfs: Introduce futimens file op
Greg Kurz [Wed, 12 Mar 2025 15:29:30 +0000 (16:29 +0100)] 
9pfs: Introduce futimens file op

Add an futimens operation to the fs driver and use if when a fid has
a valid file descriptor. This is required to support more cases where
the client wants to do an action on an unlinked file which it still
has an open file decriptor for.

Only 9P2000.L was considered.

Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Message-Id: <20250312152933.383967-5-groug@kaod.org>
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
14 months ago9pfs: Introduce ftruncate file op
Greg Kurz [Wed, 12 Mar 2025 15:29:29 +0000 (16:29 +0100)] 
9pfs: Introduce ftruncate file op

Add an ftruncate operation to the fs driver and use if when a fid has
a valid file descriptor. This is required to support more cases where
the client wants to do an action on an unlinked file which it still
has an open file decriptor for.

Only 9P2000.L was considered.

Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Message-Id: <20250312152933.383967-4-groug@kaod.org>
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
14 months ago9pfs: Don't use file descriptors in core code
Greg Kurz [Wed, 12 Mar 2025 15:29:28 +0000 (16:29 +0100)] 
9pfs: Don't use file descriptors in core code

v9fs_getattr() currently peeks into V9fsFidOpenState to know if a fid
has a valid file descriptor or directory stream. Even though the fields
are accessible, this is an implementation detail of the local backend
that should not be manipulated directly by the server code.

Abstract that with a new has_valid_file_handle() backend operation.

Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Message-Id: <20250312152933.383967-3-groug@kaod.org>
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
14 months ago9pfs: local : Introduce local_fid_fd() helper
Greg Kurz [Wed, 12 Mar 2025 15:29:27 +0000 (16:29 +0100)] 
9pfs: local : Introduce local_fid_fd() helper

Factor out duplicated code to a single helper. More users to come.

Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Message-Id: <20250312152933.383967-2-groug@kaod.org>
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
14 months ago9pfs: fix FD leak and reduce latency of v9fs_reclaim_fd()
Christian Schoenebeck [Fri, 7 Mar 2025 09:23:02 +0000 (10:23 +0100)] 
9pfs: fix FD leak and reduce latency of v9fs_reclaim_fd()

This patch fixes two different bugs in v9fs_reclaim_fd():

1. Reduce latency:

This function calls v9fs_co_close() and v9fs_co_closedir() in a loop. Each
one of the calls adds two thread hops (between main thread and a fs driver
background thread). Each thread hop adds latency, which sums up in
function's loop to a significant duration.

Reduce overall latency by open coding what v9fs_co_close() and
v9fs_co_closedir() do, executing those and the loop itself altogether in
only one background thread block, hence reducing the total amount of
thread hops to only two.

2. Fix file descriptor leak:

The existing code called v9fs_co_close() and v9fs_co_closedir() to close
file descriptors. Both functions check right at the beginning if the 9p
request was cancelled:

    if (v9fs_request_cancelled(pdu)) {
        return -EINTR;
    }

So if client sent a 'Tflush' message, v9fs_co_close() / v9fs_co_closedir()
returned without having closed the file descriptor and v9fs_reclaim_fd()
subsequently freed the FID without its file descriptor being closed, hence
leaking those file descriptors.

This 2nd bug is fixed by this patch as well by open coding v9fs_co_close()
and v9fs_co_closedir() inside of v9fs_reclaim_fd() and not performing the
v9fs_request_cancelled(pdu) check there.

Fixes: 7a46274529c ('hw/9pfs: Add file descriptor reclaim support')
Fixes: bccacf6c792 ('hw/9pfs: Implement TFLUSH operation')
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Message-Id: <5747469d3f039c53147e850b456943a1d4b5485c.1741339452.git.qemu_oss@crudebyte.com>

14 months ago9pfs: fix concurrent v9fs_reclaim_fd() calls
Christian Schoenebeck [Fri, 7 Mar 2025 09:22:56 +0000 (10:22 +0100)] 
9pfs: fix concurrent v9fs_reclaim_fd() calls

Even though this function is serialized to be always called from main
thread, v9fs_reclaim_fd() is dispatching the coroutine to a worker thread
in between via its v9fs_co_*() calls, hence leading to the situation where
v9fs_reclaim_fd() is effectively executed multiple times simultaniously,
which renders its LRU algorithm useless and causes high latency.

Fix this by adding a simple boolean variable to ensure this function is
only called once at a time. No synchronization needed for this boolean
variable as this function is only entered and returned on main thread.

Fixes: 7a46274529c ('hw/9pfs: Add file descriptor reclaim support')
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Message-Id: <5c622067efd66dd4ee5eca740dcf263f41db20b2.1741339452.git.qemu_oss@crudebyte.com>

14 months agodocs: Add support for ast2700fc machine
Steven Lee [Fri, 2 May 2025 10:34:45 +0000 (18:34 +0800)] 
docs: Add support for ast2700fc machine

- Updated Aspeed family boards list to include `ast2700fc`.
- Added boot instructions for the `ast2700fc` machine.
- Detailed the configuration and loading of firmware for the
  Cortex-A35 and Cortex-M4 processors.

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Change-Id: Id41312e9c7cf79bc55c6f24a87a7ad9993dc7261
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-10-steven_lee@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agotests/function/aspeed: Add functional test for ast2700fc
Steven Lee [Mon, 5 May 2025 03:06:18 +0000 (11:06 +0800)] 
tests/function/aspeed: Add functional test for ast2700fc

Introduce a new test suite for ast2700fc machine.
Rename the original test_aarch64_aspeed.py to
test_aarch64_aspeed_ast2700.py.

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Change-Id: I3855f55c9f6e5cca1270c179445f549f8d81f36c
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250505030618.3612042-1-steven_lee@aspeedtech.com
[ clg: Added new tests in meson.build ]
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agohw/arm: Introduce ASPEED AST2700 A1 full core machine
Steven Lee [Fri, 2 May 2025 10:34:43 +0000 (18:34 +0800)] 
hw/arm: Introduce ASPEED AST2700 A1 full core machine

- Added new machine type `ast2700fc` with full core support.
- Defined `Ast2700FCState` structure for the new machine type.
- Implemented initialization functions for CA35, SSP, and TSP components.
- Updated `ast2700fc_types` to include the new machine type.
- Set machine class properties for `ast2700fc`.

Test Step:
- Download ast2700-default-obmc.tar.gz from AspeedTech-BMC OpenBmc
  release page.
- Run the following QEMU command:

  ```
  IMGDIR=~/path/to/image
  UBOOT_SIZE=$(stat --format=%s -L ${IMGDIR}/u-boot-nodtb.bin)

  ./qemu-system-aarch64 -machine ast2700fc \
  -device loader,force-raw=on,addr=0x400000000,file=${IMGDIR}/u-boot-nodtb.bin \
  -device loader,force-raw=on,addr=$((0x400000000 + ${UBOOT_SIZE})),file=${IMGDIR}/u-boot.dtb \
  -device loader,force-raw=on,addr=0x430000000,file=${IMGDIR}/bl31.bin \
  -device loader,force-raw=on,addr=0x430080000,file=${IMGDIR}/tee-raw.bin \
  -device loader,cpu-num=0,addr=0x430000000 \
  -device loader,cpu-num=1,addr=0x430000000 \
  -device loader,cpu-num=2,addr=0x430000000 \
  -device loader,cpu-num=3,addr=0x430000000 \
  -device loader,file=${IMGDIR}/ast2700-ssp.elf,cpu-num=4 \
  -device loader,file=${IMGDIR}/ast2700-tsp.elf,cpu-num=5 \
  -drive file=${IMGDIR}/image-bmc,if=mtd,format=raw \
  -serial pty -serial pty -serial pty \
  -snapshot \
  -S -nographic
  ```

- After starting QEMU, serial devices will be redirected:

  char device redirected to /dev/pts/51 (label serial0)
  char device redirected to /dev/pts/52 (label serial1)
  char device redirected to /dev/pts/53 (label serial2)

- serial0 is the console for the four Cortex-A35 primary processors,
  serial1 and serial2 are the consoles for the two Cortex-M4 coprocessors.

- Connect to the consoles using a terminal emulator.

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Change-Id: I32447b9372a78eb53a07135afef59c2a19202328
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-8-steven_lee@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agohw/arm/aspeed_ast27x0-tsp: Introduce AST27x0 A1 TSP SoC
Steven Lee [Fri, 2 May 2025 10:34:42 +0000 (18:34 +0800)] 
hw/arm/aspeed_ast27x0-tsp: Introduce AST27x0 A1 TSP SoC

AST2700 TSP(Tertiary Service Processor) is a Cortex-M4 coprocessor
The patch adds support for TSP with following update:

- Introduce Aspeed27x0TSPSoCState structure in aspeed_soc.h
- Implement initialization and realization functions
- Add support for UART, INTC, and SCU devices
- Map unimplemented devices for IPC and SCUIO
- Defined memory map and IRQ maps for AST27x0 A1 TSP SoC

The IRQ mapping is similar to AST2700 CA35 SoC, featuring a two-level
interrupt controller.

Difference from AST2700:

    - AST2700
      - Support GICINT128 to GICINT136 in INTC
      - The INTCIO GIC_192_201 has 10 output pins, mapped as follows:
          Bit 0 -> GIC 192
          Bit 1 -> GIC 193
          Bit 2 -> GIC 194
          Bit 3 -> GIC 195
          Bit 4 -> GIC 196

    - AST2700-tsp
      - Support TSPINT128 to TSPINT136 in INTC
      - The INTCIO TSPINT_160_169 has 10 output pins, mapped as follows:
          Bit 0 -> TSPINT 160
          Bit 1 -> TSPINT 161
          Bit 2 -> TSPINT 162
          Bit 3 -> TSPINT 163
          Bit 4 -> TSPINT 164

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Change-Id: I69eec2b68b26ef04187b2922c5f2e584b9076c66
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-7-steven_lee@aspeedtech.com
[ clg: removed local 'Error* err' in aspeed_soc_ast27x0tsp_realize() ]
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agohw/arm/aspeed_ast27x0-ssp: Introduce AST27x0 A1 SSP SoC
Steven Lee [Fri, 2 May 2025 10:34:41 +0000 (18:34 +0800)] 
hw/arm/aspeed_ast27x0-ssp: Introduce AST27x0 A1 SSP SoC

The AST2700 SSP (Secondary Service Processor) is a Cortex-M4 coprocessor.
This patch adds support for A1 SSP with the following updates:

- Introduce Aspeed27x0SSPSoCState structure in aspeed_soc.h
- Define memory map and IRQ map for AST27x0 A1 SSP SoC
- Implement initialization and realization functions
- Add support for UART, INTC, and SCU devices
- Map unimplemented devices for IPC and SCUIO

The IRQ mapping is similar to AST2700 CA35 SoC, featuring a two-level
interrupt controller.

Difference from AST2700:

    - AST2700
      - Support GICINT128 to GICINT136 in INTC
      - The INTCIO GIC_192_201 has 10 output pins, mapped as follows:
          Bit 0 -> GIC 192
          Bit 1 -> GIC 193
          Bit 2 -> GIC 194
          Bit 3 -> GIC 195
          Bit 4 -> GIC 196

    - AST2700-ssp
      - Support SSPINT128 to SSPINT136 in INTC
      - The INTCIO SSPINT_160_169 has 10 output pins, mapped as follows:
          Bit 0 -> SSPINT 160
          Bit 1 -> SSPINT 161
          Bit 2 -> SSPINT 162
          Bit 3 -> SSPINT 163
          Bit 4 -> SSPINT 164

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Change-Id: I924bf1a657f1e83f9e16d6673713f4a06ecdb496
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-6-steven_lee@aspeedtech.com
[ clg: removed local 'Error* err' in aspeed_soc_ast27x0ssp_realize() ]
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agohw/intc/aspeed: Add support for AST2700 TSP INTC
Steven Lee [Fri, 2 May 2025 10:34:40 +0000 (18:34 +0800)] 
hw/intc/aspeed: Add support for AST2700 TSP INTC

- Define new types for ast2700tsp INTC and INTCIO
- Add register definitions for TSP INTC and INTCIO
- Implement write handlers for TSP INTC and INTCIO
- Register new types in aspeed_intc_register_types

The design of the TSP INTC and INTCIO controllers is similar to
AST2700, with the following differences:

- AST2700
  Support GICINT128 to GICINT136 in INTC
  The INTCIO GIC_192_201 has 10 output pins, mapped as follows:
    Bit 0 -> GIC 192
    Bit 1 -> GIC 193
    Bit 2 -> GIC 194
    Bit 3 -> GIC 195
    Bit 4 -> GIC 196

- AST2700-tsp
  Support TSPINT128 to TSPINT136 in INTC
  The INTCIO TSPINT_160_169 has 10 output pins, mapped as follows:
    Bit 0 -> TSPINT 160
    Bit 1 -> TSPINT 161
    Bit 2 -> TSPINT 162
    Bit 3 -> TSPINT 163
    Bit 4 -> TSPINT 164

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Change-Id: I3f3aca4b90129640369cf4a92deb4b9a12df5b70
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-5-steven_lee@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agohw/intc/aspeed: Add support for AST2700 SSP INTC
Steven Lee [Fri, 2 May 2025 10:34:39 +0000 (18:34 +0800)] 
hw/intc/aspeed: Add support for AST2700 SSP INTC

- Define new types for ast2700ssp INTC and INTCIO
- Add register definitions for SSP INTC and INTCIO
- Implement write handlers for SSP INTC and INTCIO
- Register new types in aspeed_intc_register_types

The design of the SSP INTC and INTCIO controllers is similar to
AST2700, with the following differences:

- AST2700
  Support GICINT128 to GICINT136 in INTC
  The INTCIO GIC_192_201 has 10 output pins, mapped as follows:
    Bit 0 -> GIC 192
    Bit 1 -> GIC 193
    Bit 2 -> GIC 194
    Bit 3 -> GIC 195
    Bit 4 -> GIC 196

- AST2700-ssp
  Support SSPINT128 to SSPINT136 in INTC
  The INTCIO SSPINT_160_169 has 10 output pins, mapped as follows:
    Bit 0 -> SSPINT 160
    Bit 1 -> SSPINT 161
    Bit 2 -> SSPINT 162
    Bit 3 -> SSPINT 163
    Bit 4 -> SSPINT 164

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Change-Id: Ib8cb0e264505cef48e17f173e057f3b2d1ea35c4
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-4-steven_lee@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agoaspeed: ast27x0: Correct hex notation for device addresses
Steven Lee [Fri, 2 May 2025 10:34:38 +0000 (18:34 +0800)] 
aspeed: ast27x0: Correct hex notation for device addresses

Corrected the hexadecimal notation for several device addresses in the
aspeed_soc_ast2700_memmap array by changing the uppercase 'X' to
lowercase 'x'.

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Change-Id: I45426e18ea8e68d7ccdf9b60c4ea235c4da33cc3
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-3-steven_lee@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agoaspeed: ast27x0: Map unimplemented devices in SoC memory
Steven Lee [Fri, 2 May 2025 10:34:37 +0000 (18:34 +0800)] 
aspeed: ast27x0: Map unimplemented devices in SoC memory

Maps following unimplemented devices in SoC memory
- dpmcu
- iomem
- iomem0
- iomem1
- ltpi

Iomem, Iomem0 and Iomem1 include unimplemented controllers in the memory ranges 0x0 - 0x1000000, 0x120000000 - 0x121000000 and
0x14000000 - 0x141000000.

For instance:
- USB hub at 0x12010000
- eSPI at 0x14C5000
- PWM at 0x140C0000

DPMCU stands for Display Port MCU controller. LTPI is used to connect to AST1700.
AST1700 is an I/O expander that supports the DC-SCM 2.1 LTPI protocol.
It provides AST2700 with additional GPIO, UART, I3C, and other interfaces.

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Change-Id: Iae4db49a4818af3e2c43c16a27fc76329d2405d6
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-2-steven_lee@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agodocs/system/arm/aspeed: Support vbootrom for AST2700
Jamin Lin [Thu, 24 Apr 2025 07:51:34 +0000 (15:51 +0800)] 
docs/system/arm/aspeed: Support vbootrom for AST2700

Using the vbootrom image support and the boot ROM binary is
now passed via the -bios option, using the image located in
pc-bios/ast27x0_bootrom.bin.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Nabih Estefan <nabihestefan@google.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250424075135.3715128-7-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agodocs/system/arm/aspeed: move AST2700 content to new section
Jamin Lin [Thu, 24 Apr 2025 07:51:33 +0000 (15:51 +0800)] 
docs/system/arm/aspeed: move AST2700 content to new section

Moved AST2700-related content from the general Aspeed board list into a
dedicated section for Aspeed 2700 family boards. Improves clarity and
readability.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250424075135.3715128-6-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agotests/functional/aspeed: Add to test vbootrom for AST2700
Jamin Lin [Thu, 24 Apr 2025 07:51:32 +0000 (15:51 +0800)] 
tests/functional/aspeed: Add to test vbootrom for AST2700

Add the AST2700 functional test to boot using the vbootrom image
instead of manually loading boot components with -device loader.
The boot ROM binary is now passed via the
-bios option, using the image located in pc-bios/ast27x0_bootrom.bin.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250424075135.3715128-5-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agohw/arm/aspeed: Add support for loading vbootrom image via "-bios"
Jamin Lin [Thu, 24 Apr 2025 07:51:31 +0000 (15:51 +0800)] 
hw/arm/aspeed: Add support for loading vbootrom image via "-bios"

Introduce "aspeed_load_vbootrom()" to support loading a virtual boot ROM image
into the vbootrom memory region, using the "-bios" command-line option.

Introduce a new "vbootrom" field in the AspeedMachineClass to indicate whether
a machine supports the virtual boot ROM region.

Set this field to true by default for the AST2700-A0 and AST2700-A1 EVB
machines.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Nabih Estefan <nabihestefan@google.com>
Tested-by: Nabih Estefan <nabihestefan@google.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250424075135.3715128-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agohw/arm/aspeed_ast27x0 Introduce vbootrom memory region
Jamin Lin [Thu, 24 Apr 2025 07:51:29 +0000 (15:51 +0800)] 
hw/arm/aspeed_ast27x0 Introduce vbootrom memory region

Introduce a new vbootrom memory region. The region is mapped at address
"0x00000000" and has a size of 128KB, identical to the SRAM region size.
This memory region is intended for loading a vbootrom image file as part of the
boot process.

The vbootrom registered in the SoC's address space using the ASPEED_DEV_VBOOTROM
index.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Nabih Estefan <nabihestefan@google.com>
Tested-by: Nabih Estefan <nabihestefan@google.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250424075135.3715128-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agotests/functional/aspeed: extract boot and login sequence into helper function
Jamin Lin [Wed, 23 Apr 2025 07:23:45 +0000 (15:23 +0800)] 
tests/functional/aspeed: extract boot and login sequence into helper function

Extracted repeated boot and login steps into a new helper function.
No change in functional behavior.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250423072350.541742-10-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agotests/functional/aspeed: Update test ASPEED SDK v09.06
Jamin Lin [Wed, 23 Apr 2025 07:23:44 +0000 (15:23 +0800)] 
tests/functional/aspeed: Update test ASPEED SDK v09.06

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250423072350.541742-9-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agotests/functional/aspeed: Move I2C test into shared helper for AST2700 reuse
Jamin Lin [Wed, 23 Apr 2025 07:23:43 +0000 (15:23 +0800)] 
tests/functional/aspeed: Move I2C test into shared helper for AST2700 reuse

Move the I2C test case into a common helper function (do_ast2700_i2c_test) so it
can be reused across multiple AST2700-based test cases. This reduces duplication
and improves maintainability.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Nabih Estefan <nabihestefan@google.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250423072350.541742-8-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agohw/arm/aspeed_ast27x0: Rename variable sram_name to name in ast2700 realize
Jamin Lin [Wed, 23 Apr 2025 07:23:37 +0000 (15:23 +0800)] 
hw/arm/aspeed_ast27x0: Rename variable sram_name to name in ast2700 realize

The variable "sram_name" was only used for naming the SRAM memory region.
Rename it to "name" for consistency with similar code and avoid unnecessary
new local variable declarations.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Nabih Estefan <nabihestefan@google.com>
Link: https://lore.kernel.org/qemu-devel/20250423072350.541742-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agotests/functional/aspeed: Update test ASPEED SDK v03.00 for AST1030
Jamin Lin [Wed, 23 Apr 2025 01:40:07 +0000 (09:40 +0800)] 
tests/functional/aspeed: Update test ASPEED SDK v03.00 for AST1030

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250423014008.147542-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agotests/functional/aspeed: Update test ASPEED SDK v09.06 for AST2600
Jamin Lin [Wed, 23 Apr 2025 01:40:06 +0000 (09:40 +0800)] 
tests/functional/aspeed: Update test ASPEED SDK v09.06 for AST2600

Update test for AST2600 production revision A3.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250423014008.147542-3-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agotests/functional/aspeed: Update test ASPEED SDK v09.06 for AST2500
Jamin Lin [Wed, 23 Apr 2025 01:40:05 +0000 (09:40 +0800)] 
tests/functional/aspeed: Update test ASPEED SDK v09.06 for AST2500

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250423014008.147542-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agohw/ssi/aspeed_smc: Allow 64-bit wide flash accesses
Joe Komlodi [Tue, 22 Apr 2025 00:27:47 +0000 (00:27 +0000)] 
hw/ssi/aspeed_smc: Allow 64-bit wide flash accesses

cde3247651dc998da5dc1005148302a90d72f21f fixed atomicity for LDRD, which
ends up making accesses 64-bits wide. However, the AST2600 bootloader
can sometimes compile with LDRD instructions, which causes the acceses
to fail when accessing the memory-mapped SPI flash.

To fix this, increase the MMIO region valid access size to allow for
64-bit accesses.

Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250422002747.2593465-1-komlodi@google.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agohw/arm: ast27x0: Wire up EHCI controllers
Troy Lee [Mon, 17 Mar 2025 06:59:38 +0000 (14:59 +0800)] 
hw/arm: ast27x0: Wire up EHCI controllers

AST27x0 has 4 EHCI controllers, where each CPU and I/O die has 2
instances. This patch use existing TYPE_PLATFORM_EHCI. After wiring up
the EHCI controller, the ast2700a1-evb can find up to 4 USB EHCI
interfaces.

ehci-platform 12061000.usb: EHCI Host Controller
ehci-platform 12061000.usb: new USB bus registered, assigned bus number 2
ehci-platform 12063000.usb: EHCI Host Controller
ehci-platform 12063000.usb: new USB bus registered, assigned bus number 3
ehci-platform 12061000.usb: irq 88, io mem 0x12061000
ehci-platform 12063000.usb: irq 90, io mem 0x12063000
ehci-platform 14121000.usb: EHCI Host Controller
ehci-platform 14123000.usb: EHCI Host Controller
ehci-platform 12061000.usb: USB 2.0 started, EHCI 1.00
ehci-platform 14121000.usb: new USB bus registered, assigned bus number 5
ehci-platform 14123000.usb: new USB bus registered, assigned bus number 6
ehci-platform 14121000.usb: irq 91, io mem 0x14121000
ehci-platform 14123000.usb: irq 92, io mem 0x14123000
ehci-platform 12063000.usb: USB 2.0 started, EHCI 1.00
usb usb2: Manufacturer: Linux 6.6.78-dirty-bafd2830c17c-gbafd2830c17c-dirty ehci_hcd
usb usb3: Manufacturer: Linux 6.6.78-dirty-bafd2830c17c-gbafd2830c17c-dirty ehci_hcd
ehci-platform 14121000.usb: USB 2.0 started, EHCI 1.00
usb usb5: Manufacturer: Linux 6.6.78-dirty-bafd2830c17c-gbafd2830c17c-dirty ehci_hcd
ehci-platform 14123000.usb: USB 2.0 started, EHCI 1.00
usb usb6: Manufacturer: Linux 6.6.78-dirty-bafd2830c17c-gbafd2830c17c-dirty ehci_hcd

Note that, AST27x0A0 only has 2 EHCI controllers due to hw issue.

Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250317065938.1902272-2-troy_lee@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agomonitor: don't wake up qmp_dispatcher_co coroutine upon cleanup
Andrey Drobyshev [Fri, 2 May 2025 21:47:29 +0000 (00:47 +0300)] 
monitor: don't wake up qmp_dispatcher_co coroutine upon cleanup

Since the commit 3e6bed61 ("monitor: cleanup detection of qmp_dispatcher_co
shutting down"), coroutine pointer qmp_dispatcher_co is set to NULL upon
cleanup.  If a QMP command is sent after monitor_cleanup() (e.g. after
shutdown), this may lead to SEGFAULT on aio_co_wake(NULL).

As mentioned in the comment inside monitor_cleanup(), the intention is to
allow incoming requests while shutting down, but simply leave them
without any response.  Let's do exactly that, and if qmp_dispatcher_co
coroutine pointer has already been set to NULL, let's simply skip the
aio_co_wake() part.

Signed-off-by: Andrey Drobyshev <andrey.drobyshev@virtuozzo.com>
Link: https://lore.kernel.org/r/20250502214729.928380-2-andrey.drobyshev@virtuozzo.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
14 months agorust: centralize config in workspace root
Stefan Zabka [Fri, 2 May 2025 21:27:48 +0000 (23:27 +0200)] 
rust: centralize config in workspace root

This commit bundles common config option in the workspace
root and applies them through <config>.workspace = true

Signed-off-by: Stefan Zabka <git@zabka.it>
Link: https://lore.kernel.org/r/20250502212748.124953-1-git@zabka.it
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
14 months agohw/char/serial: Remove unused prog_if compat property
BALATON Zoltan [Fri, 2 May 2025 09:55:24 +0000 (11:55 +0200)] 
hw/char/serial: Remove unused prog_if compat property

This property was added to preserve previous value when this was fixed
in version 2.1 but the last machine using it was already removed when
adding diva-gsp leaving this property unused and unnecessary.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Helge Deller <deller@gmx.de>
Link: https://lore.kernel.org/r/20250502095524.DE1F355D264@zero.eik.bme.hu
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
14 months agotarget/i386: do not block singlestep for STI
Paolo Bonzini [Mon, 15 Jul 2024 08:35:06 +0000 (10:35 +0200)] 
target/i386: do not block singlestep for STI

STI will trigger a singlestep exception even if it has inhibit-IRQ
behavior.  Do not suppress single-step for all IRQ-inhibiting
instructions, instead special case MOV SS and POP SS.

Cc: qemu-stable@nongnu.org
Fixes: f0f0136abba ("target/i386: no single-step exception after MOV or POP SS", 2024-05-25)
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
14 months agotarget/i386: do not trigger IRQ shadow for LSS
Paolo Bonzini [Thu, 13 Feb 2025 18:37:07 +0000 (19:37 +0100)] 
target/i386: do not trigger IRQ shadow for LSS

Because LSS need not trigger an IRQ shadow, gen_movl_seg can't just use
the destination register to decide whether to inhibit IRQs.  Add an
argument.

Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
14 months agotarget/i386/hvf: fix a compilation error
Wei Liu [Tue, 29 Apr 2025 06:24:51 +0000 (06:24 +0000)] 
target/i386/hvf: fix a compilation error

Include exec/target_page.h to fix the following build error.

x86_64-softmmu.a.p/target_i386_hvf_hvf.c.o -c ../target/i386/hvf/hvf.c
../target/i386/hvf/hvf.c:139:49: error: use of undeclared identifier 'TARGET_PAGE_SIZE'
  139 |             uint64_t dirty_page_start = gpa & ~(TARGET_PAGE_SIZE - 1u);
      |                                                 ^
../target/i386/hvf/hvf.c:141:45: error: use of undeclared identifier 'TARGET_PAGE_SIZE'
  141 |             hv_vm_protect(dirty_page_start, TARGET_PAGE_SIZE,
      |                                             ^

Signed-off-by: Wei Liu <wei.liu@kernel.org>
Link: https://lore.kernel.org/r/aBBws1ikCDfyC0RI@liuwe-devbox-ubuntu-v2.tail21d00.ts.net
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
14 months agotarget/i386/emulate: remove rflags leftovers
Magnus Kulke [Tue, 29 Apr 2025 09:33:19 +0000 (11:33 +0200)] 
target/i386/emulate: remove rflags leftovers

Fixes: c901905ea670 ("target/i386/emulate: remove flags_mask")
In c901905ea670 rflags have been removed from `x86_decode`, but there
were some leftovers.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20250429093319.5010-1-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
14 months agorust/hpet: Support migration
Zhao Liu [Mon, 14 Apr 2025 14:49:42 +0000 (22:49 +0800)] 
rust/hpet: Support migration

Based on commit 1433e38cc8 ("hpet: do not overwrite properties on
post_load"), add the basic migration support to Rust HPET.

The current migration implementation introduces multiple unsafe
callbacks. Before the vmstate builder, one possible cleanup approach is
to wrap callbacks in the vmstate binding using a method similar to the
vmstate_exist_fn macro.

However, this approach would also create a lot of repetitive code (since
vmstate has so many callbacks: pre_load, post_load, pre_save, post_save,
needed and dev_unplug_pending). Although it would be cleaner, it would
somewhat deviate from the path of the vmstate builder.

Therefore, firstly focus on completing the functionality of HPET, and
those current unsafe callbacks can at least clearly indicate the needed
functionality of vmstate. The next step is to consider refactoring
vmstate to move towards the vmstate builder direction.

Additionally, update rust.rst about Rust HPET can support migration.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250414144943.1112885-9-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
14 months agorust/timer: Define NANOSECONDS_PER_SECOND binding as u64
Zhao Liu [Mon, 14 Apr 2025 14:49:39 +0000 (22:49 +0800)] 
rust/timer: Define NANOSECONDS_PER_SECOND binding as u64

NANOSECONDS_PER_SECOND is often used in operations with get_ns(), which
currently returns a u64.

Therefore, define a new NANOSECONDS_PER_SECOND binding is with u64 type
to eliminate unnecessary type conversions (from u32 to u64).

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250414144943.1112885-6-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
14 months agorust/vmstate_test: Test varray with num field wrapped in BqlCell
Zhao Liu [Mon, 14 Apr 2025 14:49:37 +0000 (22:49 +0800)] 
rust/vmstate_test: Test varray with num field wrapped in BqlCell

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250414144943.1112885-4-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
14 months agorust: assertions: Support index field wrapped in BqlCell
Paolo Bonzini [Fri, 2 May 2025 08:56:06 +0000 (10:56 +0200)] 
rust: assertions: Support index field wrapped in BqlCell

Currently, if the `num` field of a varray is not a numeric type, such as
being placed in a wrapper, the array variant of assert_field_type will
fail the check.

HPET currently wraps num_timers in BqlCell<>. Although BqlCell<> is not
necessary from strictly speaking, it makes sense for vmstate to respect
BqlCell.

The failure of assert_field_type is because it cannot convert BqlCell<T>
into usize for use as the index.  Use a constant 0 instead for the index,
by avoiding $(...)? and extracting the common parts of
assert_field_type! into an internal case.

Commit message based on a patch by Zhao Liu <zhao1.liu@intel.com>.

Link: https://lore.kernel.org/r/20250414144943.1112885-3-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
14 months agovmstate: support varray for vmstate_clock!
Paolo Bonzini [Fri, 2 May 2025 07:45:38 +0000 (09:45 +0200)] 
vmstate: support varray for vmstate_clock!

Make vmstate_struct and vmstate_clock more similar; they are basically the
same thing, except for the clock case having a built-in VMStateDescription.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
14 months agorust/vmstate: Add support for field_exists checks
Zhao Liu [Mon, 14 Apr 2025 14:49:35 +0000 (22:49 +0800)] 
rust/vmstate: Add support for field_exists checks

Unfortunately, at present it's not possible to have a const
"with_exist_check" method to append test_fn after vmstate_struct (due
to error on "constant functions cannot evaluate destructors" for `F`).

Before the vmstate builder, the only way to support "test_fn" is to
extend vmstate_struct macro to add the such new optional member (and
fortunately, Rust can still parse the current expansion!).

Abstract the previous callback implementation of vmstate_validate into
a separate macro, and moves it before vmstate_struct for vmstate_struct
to call.

Note that there's no need to add any extra flag for a new test_fn added
in the VMStateField.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250414144943.1112885-2-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
14 months agoscripts/vmstate-static-checker.py: Allow new name for ghes_addr_le field
Thomas Huth [Tue, 29 Apr 2025 15:21:39 +0000 (17:21 +0200)] 
scripts/vmstate-static-checker.py: Allow new name for ghes_addr_le field

ghes_addr_le has been renamed to hw_error_le in commit 652f6d86cbb
("acpi/ghes: better name the offset of the hardware error firmware").
Adjust the checker script to allow that changed field name.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Link: https://lore.kernel.org/r/20250429152141.294380-3-thuth@redhat.com
Signed-off-by: Peter Xu <peterx@redhat.com>
14 months agomigration/rdma: Remove qemu_rdma_broken_ipv6_kernel
Jack Wang [Wed, 2 Apr 2025 05:13:06 +0000 (07:13 +0200)] 
migration/rdma: Remove qemu_rdma_broken_ipv6_kernel

I hit following error which testing migration in pure RoCE env:
"-incoming rdma:[::]:8089: RDMA ERROR: You only have RoCE / iWARP devices in your
systems and your management software has specified '[::]', but IPv6 over RoCE /
iWARP is not supported in Linux.#012'."

In our setup, we use rdma bind on ipv6 on target host, while connect from source
with ipv4, remove the qemu_rdma_broken_ipv6_kernel, migration just work
fine.

Checking the git history, the function was added since introducing of
rdma migration, which is more than 10 years ago. linux-rdma has
improved support on RoCE/iWARP for ipv6 over past years. There are a few fixes
back in 2016 seems related to the issue, eg:
aeb76df46d11 ("IB/core: Set routable RoCE gid type for ipv4/ipv6 networks")

other fixes back in 2018, eg:
052eac6eeb56 RDMA/cma: Update RoCE multicast routines to use net namespace
8d20a1f0ecd5 RDMA/cma: Fix rdma_cm raw IB path setting for RoCE
9327c7afdce3 RDMA/cma: Provide a function to set RoCE path record L2 parameters
5c181bda77f4 RDMA/cma: Set default GID type as RoCE when resolving RoCE route
3c7f67d1880d IB/cma: Fix default RoCE type setting
be1d325a3358 IB/core: Set RoCEv2 MGID according to spec
63a5f483af0e IB/cma: Set default gid type to RoCEv2

So remove the outdated function and it's usage.

Cc: Peter Xu <peterx@redhat.com>
Cc: Li Zhijian <lizhijian@fujitsu.com>
Cc: Yu Zhang <yu.zhang@ionos.com>
Cc: Fabiano Rosas <farosas@suse.de>
Cc: qemu-devel@nongnu.org
Cc: linux-rdma@vger.kernel.org
Cc: michael@flatgalaxy.com
Signed-off-by: Jack Wang <jinpu.wang@ionos.com>
Tested-by: Li zhijian <lizhijian@fujitsu.com>
Reviewed-by: Michael Galaxy <mrgalaxy@nvidia.com>
Link: https://lore.kernel.org/r/20250402051306.6509-1-jinpu.wang@ionos.com
[peterx: some cosmetic changes]
Signed-off-by: Peter Xu <peterx@redhat.com>
14 months agomigration/postcopy: Spatial locality page hint for preempt mode
Peter Xu [Thu, 24 Apr 2025 22:07:05 +0000 (18:07 -0400)] 
migration/postcopy: Spatial locality page hint for preempt mode

The preempt mode postcopy has been introduced for a while.  From latency
POV, it should always win the vanilla postcopy.

However there's one thing missing when preempt mode is enabled right now,
which is the spatial locality hint when there're page requests from the
destination side.

In vanilla postcopy, as long as a page request was unqueued, it will update
the PSS of the precopy background stream, so that after a page request the
background thread will move the pages after whatever was requested.  It's
pretty much a natural behavior when there's only one channel anyway, and
one scanner to send the pages.

Preempt mode didn't follow that, because preempt mode has its own channel
and its own PSS (which doesn't linearly scan the guest memory, but
dedicated to resolve page requested from destination).  So the page request
process and the background migration process are completely separate.

This patch adds the hint explicitly for preempt mode.  With that, whenever
the preempt mode receives a page request on the source, it will service the
remote page fault in the return path, then it'll provide a hint to the
background thread so that we'll start sending the pages right after the
requested ones in the background, assuming the follow up pages have a
higher chance to be accessed later.

NOTE: since the background migration thread and return path thread run
completely concurrently, it doesn't always mean the hint will be applied
every single time.  For example, it's possible that the return path thread
receives multiple page requests in a row without the background thread
getting the chance to consume one.  In such case, the preempt thread only
provide the hint if the previous hint has been consumed.  After all,
there's no point queuing hints when we only have one linear scanner.

This could measureably improve the simple sequential memory access pattern
during postcopy (when preempt is on).  For random accesses, I can measure a
slight increase of remote page fault latency from ~500us -> ~600us, that
could be a trade-off to have such hint mechanism, and after all that's
still greatly improved comparing to vanilla postcopy on random (~10ms).

The patch is verified by our QE team in a video streaming test case, to
reduce the pause of the video from ~1min to a few seconds when switching
over to postcopy with preempt mode.

Reported-by: Xiaohui Li <xiaohli@redhat.com>
Tested-by: Xiaohui Li <xiaohli@redhat.com>
Reviewed-by: Juraj Marcin <jmarcin@redhat.com>
Link: https://lore.kernel.org/r/20250424220705.195544-1-peterx@redhat.com
Signed-off-by: Peter Xu <peterx@redhat.com>
14 months agotests/qtest/migration: consolidate set capabilities
Prasad Pandit [Fri, 11 Apr 2025 11:45:33 +0000 (17:15 +0530)] 
tests/qtest/migration: consolidate set capabilities

Migration capabilities are set in multiple '.start_hook'
functions for various tests. Instead, consolidate setting
capabilities in 'migrate_start_set_capabilities()' function
which is called from the 'migrate_start()' function.
While simplifying the capabilities setting, it helps
to declutter the qtest sources.

Suggested-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Prasad Pandit <pjp@fedoraproject.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-ID: <20250411114534.3370816-7-ppandit@redhat.com>
[fix open brace]
Signed-off-by: Fabiano Rosas <farosas@suse.de>
14 months agomigration/ram: Implement save_postcopy_prepare()
Peter Xu [Fri, 11 Apr 2025 11:45:31 +0000 (17:15 +0530)] 
migration/ram: Implement save_postcopy_prepare()

Implement save_postcopy_prepare(), preparing for the enablement
of both multifd and postcopy.

Signed-off-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Prasad Pandit <pjp@fedoraproject.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-ID: <20250411114534.3370816-5-ppandit@redhat.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
14 months agomigration: Add save_postcopy_prepare() savevm handler
Peter Xu [Fri, 11 Apr 2025 11:45:30 +0000 (17:15 +0530)] 
migration: Add save_postcopy_prepare() savevm handler

Add a savevm handler for a module to opt-in sending extra sections right
before postcopy starts, and before VM is stopped.

RAM will start to use this new savevm handler in the next patch to do flush
and sync for multifd pages.

Note that we choose to do it before VM stopped because the current only
potential user is not sensitive to VM status, so doing it before VM is
stopped is preferred to enlarge any postcopy downtime.

It is still a bit unfortunate that we need to introduce such a new savevm
handler just for the only use case, however it's so far the cleanest.

Signed-off-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Prasad Pandit <pjp@fedoraproject.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-ID: <20250411114534.3370816-4-ppandit@redhat.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
14 months agomigration: refactor channel discovery mechanism
Prasad Pandit [Fri, 11 Apr 2025 11:45:29 +0000 (17:15 +0530)] 
migration: refactor channel discovery mechanism

The various logical migration channels don't have a
standardized way of advertising themselves and their
connections may be seen out of order by the migration
destination. When a new connection arrives, the incoming
migration currently make use of heuristics to determine
which channel it belongs to.

The next few patches will need to change how the multifd
and postcopy capabilities interact and that affects the
channel discovery heuristic.

Refactor the channel discovery heuristic to make it less
opaque and simplify the subsequent patches.

Signed-off-by: Prasad Pandit <pjp@fedoraproject.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-ID: <20250411114534.3370816-3-ppandit@redhat.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
14 months agomigration/multifd: move macros to multifd header
Prasad Pandit [Fri, 11 Apr 2025 11:45:28 +0000 (17:15 +0530)] 
migration/multifd: move macros to multifd header

Move MULTIFD_ macros to the header file so that
they are accessible from other source files.

Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Prasad Pandit <pjp@fedoraproject.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Message-ID: <20250411114534.3370816-2-ppandit@redhat.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
14 months agomigration: Fix latent bug in migrate_params_test_apply()
Markus Armbruster [Mon, 7 Apr 2025 07:28:33 +0000 (09:28 +0200)] 
migration: Fix latent bug in migrate_params_test_apply()

migrate_params_test_apply() neglects to apply tls_authz.  Currently
harmless, because migrate_params_check() doesn't care.  Fix it anyway.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-ID: <20250407072833.2118928-1-armbru@redhat.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
14 months agomigration: Add qtest for migration over RDMA
Li Zhijian [Tue, 11 Mar 2025 02:42:21 +0000 (10:42 +0800)] 
migration: Add qtest for migration over RDMA

This qtest requires there is a RDMA(RoCE) link in the host.
In order to make the test work smoothly, introduce a
scripts/rdma-migration-helper.sh to detect existing RoCE link before
running the test.

Test will be skipped if there is no available RoCE link.
 # Start of rdma tests
 # Running /x86_64/migration/precopy/rdma/plain
 ok 1 /x86_64/migration/precopy/rdma/plain # SKIP No rdma link available
 # To enable the test:
 # Run 'scripts/rdma-migration-helper.sh setup' with root to setup a new rdma/rxe link and rerun the test
 # Optional: run 'scripts/rdma-migration-helper.sh clean' to revert the 'setup'

 # End of rdma tests

Cc: Philippe Mathieu-Daudé <philmd@linaro.org>
Cc: Stefan Hajnoczi <stefanha@gmail.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Message-ID: <20250311024221.363421-1-lizhijian@fujitsu.com>
[add 'head -1' to script, reformat test message]
Signed-off-by: Fabiano Rosas <farosas@suse.de>
14 months agomigration: Unfold control_save_page()
Li Zhijian [Wed, 5 Mar 2025 06:28:24 +0000 (14:28 +0800)] 
migration: Unfold control_save_page()

control_save_page() is for RDMA only, unfold it to make the code more
clear.
In addition:
 - Similar to other branches style in ram_save_target_page(), involve RDMA
   only if the condition 'migrate_rdma()' is true.
 - Further simplify the code by removing the RAM_SAVE_CONTROL_NOT_SUPP.

Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Message-ID: <20250305062825.772629-6-lizhijian@fujitsu.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
14 months agomigration/rdma: Remove redundant migration_in_postcopy checks
Li Zhijian [Wed, 5 Mar 2025 06:28:23 +0000 (14:28 +0800)] 
migration/rdma: Remove redundant migration_in_postcopy checks

Since we have disabled RDMA + postcopy, it's safe to remove
the migration_in_postcopy() that follows the migrate_rdma().

Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Message-ID: <20250305062825.772629-5-lizhijian@fujitsu.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
14 months agomigration: disable RDMA + postcopy-ram
Li Zhijian [Wed, 5 Mar 2025 06:28:22 +0000 (14:28 +0800)] 
migration: disable RDMA + postcopy-ram

It's believed that RDMA + postcopy-ram has been broken for a while.
Rather than spending time re-enabling it, let's simply disable it as a
trade-off.

Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Message-ID: <20250305062825.772629-4-lizhijian@fujitsu.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
14 months agomigration: check RDMA and capabilities are compatible on both sides
Li Zhijian [Wed, 5 Mar 2025 06:28:21 +0000 (14:28 +0800)] 
migration: check RDMA and capabilities are compatible on both sides

Depending on the order of starting RDMA and setting capability,
they can be categorized into the following scenarios:
Source:
 S1: [set capabilities] -> [Start RDMA outgoing]
Destination:
 D1: [set capabilities] -> [Start RDMA incoming]
 D2: [Start RDMA incoming] -> [set capabilities]

Previously, compatibility between RDMA and capabilities was verified only
in scenario D1, potentially causing migration failures in other situations.

For scenarios S1 and D1, we can seamlessly incorporate
migration_transport_compatible() to address compatibility between
channels and capabilities vs transport.

For scenario D2, ensure compatibility within migrate_caps_check().

Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Message-ID: <20250305062825.772629-3-lizhijian@fujitsu.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
14 months agopc-bios: Add AST27x0 vBootrom
Jamin Lin [Tue, 29 Apr 2025 06:28:20 +0000 (14:28 +0800)] 
pc-bios: Add AST27x0 vBootrom

The boot ROM is a minimal implementation designed to load an AST27x0 boot image.
Its source code is available at:
https://github.com/google/vbootrom
Commit id: d6e3386709b3e49322a94ffadc2aaab9944ab77b
Build Information:
```
Build Date : Apr 29 2025 01:23:18
FW Version : git-d6e3386
```

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Nabih Estefan <nabihestefan@google.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Nabih Estefan <nabihestefan@google.com>
Link: https://lore.kernel.org/qemu-devel/20250429062822.1184920-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
14 months agoaccel/tcg: Build tcg-all.c twice
Richard Henderson [Wed, 30 Apr 2025 22:25:29 +0000 (15:25 -0700)] 
accel/tcg: Build tcg-all.c twice

Remove some unused headers.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Build translate-all.c twice
Richard Henderson [Wed, 30 Apr 2025 22:10:46 +0000 (15:10 -0700)] 
accel/tcg: Build translate-all.c twice

Remove lots and lots of unused headers.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Use target_long_bits() in translate-all.c
Richard Henderson [Wed, 30 Apr 2025 21:40:30 +0000 (14:40 -0700)] 
accel/tcg: Use target_long_bits() in translate-all.c

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128
Richard Henderson [Wed, 30 Apr 2025 21:35:47 +0000 (14:35 -0700)] 
accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128

When we changed decode_sleb128 from target_long to
int64_t, we failed to adjust the shift limit.

Cc: qemu-stable@nongnu.org
Fixes: c9ad8d27caa ("tcg: Widen gen_insn_data to uint64_t")
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agotcg: Define INSN_START_WORDS as constant 3
Richard Henderson [Wed, 30 Apr 2025 20:57:30 +0000 (13:57 -0700)] 
tcg: Define INSN_START_WORDS as constant 3

Use the same value for all targets.

Rename TARGET_INSN_START_WORDS and do not depend on
TARGET_INSN_START_EXTRA_WORDS.
Remove TCGContext.insn_start_words.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoqapi/block-core: deprecate some block-job- APIs
Vladimir Sementsov-Ogievskiy [Wed, 9 Apr 2025 08:42:31 +0000 (11:42 +0300)] 
qapi/block-core: deprecate some block-job- APIs

For change, pause, resume, complete, dismiss and finalize actions
corresponding job- and block-job commands are almost equal. The
difference is in find_block_job_locked() vs find_job_locked()
functions. What's different?

1. find_block_job_locked() checks whether the found job is a block-job.
   This is OK when moving to more generic API, no needs to document this
   change.

2. find_block_job_locked() reports DeviceNotActive on failure, when
   find_job_locked() reports GenericError. So, let's document this
   difference in deprecated.txt. Still, for dismiss and finalize errors
   are not documented at all, so be silent in deprecated.txt as well.

ACKed-by: Peter Krempa <pkrempa@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Message-ID: <20250409084232.28201-3-vsementsov@yandex-team.ru>

14 months agoqapi: synchronize jobs and block-jobs documentation
Vladimir Sementsov-Ogievskiy [Wed, 9 Apr 2025 08:42:30 +0000 (11:42 +0300)] 
qapi: synchronize jobs and block-jobs documentation

Actualize documentation and synchronize it for commands which actually
call the same functions internally.

Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Message-ID: <20250409084232.28201-2-vsementsov@yandex-team.ru>

14 months agoblock: add test non-active commit with zeroed data
Vincent Vanlaer [Sat, 26 Oct 2024 16:30:09 +0000 (18:30 +0200)] 
block: add test non-active commit with zeroed data

Signed-off-by: Vincent Vanlaer <libvirt-e6954efa@volkihar.be>
Tested-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Message-Id: <20241026163010.2865002-6-libvirt-e6954efa@volkihar.be>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
14 months agoblock: allow commit to unmap zero blocks
Vincent Vanlaer [Sat, 26 Oct 2024 16:30:08 +0000 (18:30 +0200)] 
block: allow commit to unmap zero blocks

Non-active block commits do not discard blocks only containing zeros,
causing images to lose sparseness after the commit. This commit fixes
that by writing zero blocks using blk_co_pwrite_zeroes rather than
writing them out as any other arbitrary data.

Signed-off-by: Vincent Vanlaer <libvirt-e6954efa@volkihar.be>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Message-Id: <20241026163010.2865002-5-libvirt-e6954efa@volkihar.be>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
14 months agoblock: refactor error handling of commit_iteration
Vincent Vanlaer [Sat, 26 Oct 2024 16:30:07 +0000 (18:30 +0200)] 
block: refactor error handling of commit_iteration

Signed-off-by: Vincent Vanlaer <libvirt-e6954efa@volkihar.be>
Message-Id: <20241026163010.2865002-4-libvirt-e6954efa@volkihar.be>
[vsementsov]: move action declaration to the top of the function
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
14 months agoqemu: Introduce target_long_bits()
Philippe Mathieu-Daudé [Sun, 23 Mar 2025 12:20:24 +0000 (13:20 +0100)] 
qemu: Introduce target_long_bits()

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
14 months agoqemu/target_info: Add %target_cpu_type field to TargetInfo
Philippe Mathieu-Daudé [Tue, 29 Apr 2025 18:18:03 +0000 (20:18 +0200)] 
qemu/target_info: Add %target_cpu_type field to TargetInfo

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
14 months agosystem/vl: Filter machine list available for a particular target binary
Philippe Mathieu-Daudé [Sun, 23 Mar 2025 21:46:34 +0000 (22:46 +0100)] 
system/vl: Filter machine list available for a particular target binary

Binaries can register a QOM type to filter their machines
by filling their TargetInfo::machine_typename field.

This can be used by example by main() -> machine_help_func()
to filter the machines list.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Compile cpu-exec.c twice
Richard Henderson [Mon, 28 Apr 2025 17:20:41 +0000 (10:20 -0700)] 
accel/tcg: Compile cpu-exec.c twice

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Split out accel/tcg/helper-retaddr.h
Richard Henderson [Mon, 28 Apr 2025 17:16:52 +0000 (10:16 -0700)] 
accel/tcg: Split out accel/tcg/helper-retaddr.h

Move set_helper_retaddr and clear_helper_retaddr
to a new header file.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Pass TCGTBCPUState to tb_gen_code
Richard Henderson [Wed, 30 Apr 2025 01:59:26 +0000 (18:59 -0700)] 
accel/tcg: Pass TCGTBCPUState to tb_gen_code

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Use TCGTBCPUState in struct tb_desc
Richard Henderson [Wed, 30 Apr 2025 01:39:08 +0000 (18:39 -0700)] 
accel/tcg: Use TCGTBCPUState in struct tb_desc

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Pass TCGTBCPUState to tb_htable_lookup
Richard Henderson [Tue, 29 Apr 2025 20:02:32 +0000 (13:02 -0700)] 
accel/tcg: Pass TCGTBCPUState to tb_htable_lookup

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Pass TCGTBCPUState to tb_lookup
Richard Henderson [Tue, 29 Apr 2025 19:13:18 +0000 (12:13 -0700)] 
accel/tcg: Pass TCGTBCPUState to tb_lookup

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps
Richard Henderson [Mon, 28 Apr 2025 00:22:04 +0000 (17:22 -0700)] 
accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps

Move the global function name to a hook on TCGCPUOps.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Return TCGTBCPUState from cpu_get_tb_cpu_state
Richard Henderson [Sun, 27 Apr 2025 22:32:11 +0000 (15:32 -0700)] 
accel/tcg: Return TCGTBCPUState from cpu_get_tb_cpu_state

Combine 3 different pointer returns into one structure return.

Include a cflags field in TCGTBCPUState, not filled in by
cpu_get_tb_cpu_state, but used by all callers.  This fills
a hole in the structure and is useful in some subroutines.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agotarget/riscv: Move cpu_get_tb_cpu_state to tcg-cpu.c
Richard Henderson [Sun, 27 Apr 2025 21:15:45 +0000 (14:15 -0700)] 
target/riscv: Move cpu_get_tb_cpu_state to tcg-cpu.c

This function is only relevant to tcg.
Move it to a tcg-specific file.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agotarget/arm: Unexport assert_hflags_rebuild_correctly
Richard Henderson [Tue, 29 Apr 2025 18:37:24 +0000 (11:37 -0700)] 
target/arm: Unexport assert_hflags_rebuild_correctly

This function is no longer used outside of hflags.c.
We can remove the stub as well.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agotarget/arm: Move cpu_get_tb_cpu_state to hflags.c
Richard Henderson [Tue, 29 Apr 2025 18:35:26 +0000 (11:35 -0700)] 
target/arm: Move cpu_get_tb_cpu_state to hflags.c

This is a tcg-specific function, so move it to a tcg file.
Also move mve_no_pred, a static function only used within
cpu_get_tb_cpu_state.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Hoist cpu_get_tb_cpu_state decl to accl/tcg/cpu-ops.h
Richard Henderson [Sun, 27 Apr 2025 22:15:14 +0000 (15:15 -0700)] 
accel/tcg: Hoist cpu_get_tb_cpu_state decl to accl/tcg/cpu-ops.h

For some targets, simply remove the local definition.
For other targets, move the inline definition out of line.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agotarget/i386: Split out x86_cpu_exec_reset
Richard Henderson [Sun, 27 Apr 2025 18:44:23 +0000 (11:44 -0700)] 
target/i386: Split out x86_cpu_exec_reset

Note that target/i386/cpu.h defines CPU_INTERRUPT_INIT
as CPU_INTERRUPT_RESET.  Therefore we can handle the
new TCGCPUOps.cpu_exec_reset hook.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Introduce TCGCPUOps.cpu_exec_reset
Richard Henderson [Sun, 27 Apr 2025 18:31:30 +0000 (11:31 -0700)] 
accel/tcg: Introduce TCGCPUOps.cpu_exec_reset

Initialize all instances with cpu_reset(), so that there
is no functional change.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Unconditionally use CPU_DUMP_CCOP in log_cpu_exec
Richard Henderson [Sun, 27 Apr 2025 18:02:25 +0000 (11:02 -0700)] 
accel/tcg: Unconditionally use CPU_DUMP_CCOP in log_cpu_exec

This flag is only tested by target/i386, so including this
makes no functional change.  This is similar to other places
like cpu-target.c which use CPU_DUMP_CCOP unconditionally.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Generalize fake_user_interrupt test
Richard Henderson [Sat, 26 Apr 2025 20:20:24 +0000 (20:20 +0000)] 
accel/tcg: Generalize fake_user_interrupt test

Test for the hook being present instead of ifdef TARGET_I386.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoinclude: Remove 'exec/exec-all.h'
Philippe Mathieu-Daudé [Thu, 24 Apr 2025 20:24:12 +0000 (22:24 +0200)] 
include: Remove 'exec/exec-all.h'

"exec/exec-all.h" is now fully empty, let's remove it.

Mechanical change running:

  $ sed -i '/exec\/exec-all.h/d' $(git grep -wl exec/exec-all.h)

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250424202412.91612-14-philmd@linaro.org>

14 months agoaccel/tcg: Extract probe API out of 'exec/exec-all.h'
Philippe Mathieu-Daudé [Thu, 24 Apr 2025 20:24:11 +0000 (22:24 +0200)] 
accel/tcg: Extract probe API out of 'exec/exec-all.h'

Declare probe methods in "accel/tcg/probe.h" to emphasize
they are specific to TCG accelerator.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250424202412.91612-13-philmd@linaro.org>

14 months agophysmem: Restrict TCG IOTLB code to TCG accel
Philippe Mathieu-Daudé [Thu, 24 Apr 2025 20:24:10 +0000 (22:24 +0200)] 
physmem: Restrict TCG IOTLB code to TCG accel

Restrict iotlb_to_section(), address_space_translate_for_iotlb()
and memory_region_section_get_iotlb() to TCG. Declare them in
the new "accel/tcg/iommu.h" header. Declare iotlb_to_section()
using the MemoryRegionSection typedef.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250424202412.91612-12-philmd@linaro.org>

14 months agophysmem: Move TCG IOTLB methods around
Philippe Mathieu-Daudé [Thu, 24 Apr 2025 20:24:09 +0000 (22:24 +0200)] 
physmem: Move TCG IOTLB methods around

The next commit will restrict TCG specific code in physmem.c
using some #ifdef'ry. In order to keep it simple, move
iotlb_to_section() and memory_region_section_get_iotlb()
around close together.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250424202412.91612-11-philmd@linaro.org>

14 months agoaccel/tcg: Include 'accel/tcg/getpc.h' in 'exec/helper-proto'
Philippe Mathieu-Daudé [Thu, 24 Apr 2025 20:24:08 +0000 (22:24 +0200)] 
accel/tcg: Include 'accel/tcg/getpc.h' in 'exec/helper-proto'

Most files including "exec/helper-proto.h" call GETPC().
Include it there (in the common part) instead of the
unspecific "exec/exec-all.h" header.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250424202412.91612-10-philmd@linaro.org>

14 months agotarget/riscv: Include missing 'accel/tcg/getpc.h' in csr.c
Philippe Mathieu-Daudé [Thu, 24 Apr 2025 20:24:06 +0000 (22:24 +0200)] 
target/riscv: Include missing 'accel/tcg/getpc.h' in csr.c

"accel/tcg/getpc.h" is pulled in indirectly. Include it
explicitly to avoid when refactoring unrelated headers:

  target/riscv/csr.c:2117:25: error: call to undeclared function 'GETPC' [-Wimplicit-function-declaration]
   2117 |     if ((val & RVC) && (GETPC() & ~3) != 0) {
        |                         ^

Note the TODO comment around GETPC() added upon introduction in
commit f18637cd611 ("RISC-V: Add misa runtime write support"):

 2099 static RISCVException write_misa(CPURISCVState *env, int csrno,
 2100                                  target_ulong val)
 2101 {
  ...
 2113     /*
 2114      * Suppress 'C' if next instruction is not aligned
 2115      * TODO: this should check next_pc
 2116      */
 2117     if ((val & RVC) && (GETPC() & ~3) != 0) {
 2118         val &= ~RVC;
 2119     }

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250424202412.91612-8-philmd@linaro.org>

14 months agoaccel/tcg: Remove #error for non-tcg in getpc.h
Richard Henderson [Sat, 26 Apr 2025 19:35:00 +0000 (19:35 +0000)] 
accel/tcg: Remove #error for non-tcg in getpc.h

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Compile tb-maint.c twice
Richard Henderson [Thu, 24 Apr 2025 20:24:05 +0000 (22:24 +0200)] 
accel/tcg: Compile tb-maint.c twice

Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoinclude/exec: Move tb_invalidate_phys_range to translation-block.h
Richard Henderson [Thu, 24 Apr 2025 20:24:04 +0000 (22:24 +0200)] 
include/exec: Move tb_invalidate_phys_range to translation-block.h

Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoinclude/exec: Include missing headers in exec-all.h
Philippe Mathieu-Daudé [Thu, 24 Apr 2025 20:24:03 +0000 (22:24 +0200)] 
include/exec: Include missing headers in exec-all.h

"exec/exec-all.h" declares prototypes such:

  void *probe_access(CPUArchState *env, vaddr addr, int size,
                                        ^^^^^
                     MMUAccessType access_type, int mmu_idx,
                     uintptr_t retaddr);
  MemoryRegionSection *iotlb_to_section(CPUState *cpu,
                                        hwaddr index,
                                        ^^^^^^
                                        MemTxAttrs attrs);
                                        ^^^^^^^^^^

vaddr is defined in "exec/vaddr.h", hwaddr in "exec/hwaddr.h"
and MemTxAttrs in "exec/memattrs.h". All these headers are
indirectly pulled in via "exec/translation-block.h". Since
we will remove "exec/translation-block.h" in the next commit,
include the missing ones, otherwise we'd get errors such:

  include/exec/exec-all.h:51:1: error: unknown type name 'hwaddr'
     51 | hwaddr memory_region_section_get_iotlb(CPUState *cpu,
        | ^

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250424202412.91612-5-philmd@linaro.org>

14 months agoaccel/tcg: Use vaddr in user/page-protection.h
Richard Henderson [Thu, 24 Apr 2025 20:24:01 +0000 (22:24 +0200)] 
accel/tcg: Use vaddr in user/page-protection.h

Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 months agoaccel/tcg: Use vaddr for walk_memory_regions callback
Richard Henderson [Thu, 24 Apr 2025 20:24:00 +0000 (22:24 +0200)] 
accel/tcg: Use vaddr for walk_memory_regions callback

Use vaddr instead of target_ulong.  At the same time,
use int instead of unsigned long for flags, to match
page_set_flags().

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>