Tom Rini [Tue, 9 Dec 2025 21:23:01 +0000 (15:23 -0600)]
fs: fat: Perform sanity checks on getsize in get_fatent()
We do not perform a check on the value of getsize in get_fatent to
ensure that it will fit within the allocated buffer. For safety sake,
add a check now and if the value exceeds FATBUFBLOCKS use that value
instead. While not currently actively exploitable, it was in the past so
adding this check is worthwhile.
This addresses CVE-2025-24857 and was originally reported by Harvey
Phillips of Amazon Element55.
Adriana Nicolae [Tue, 9 Dec 2025 15:55:38 +0000 (07:55 -0800)]
test: dm: fdtdec: Validate FDT size in unit test
The current FDT decoding tests calculate the memory required
for FDT manipulation by directly adding a fixed margin to
fdt_totalsize(gd->fdt_blob). The static analyzer flagged
"gd->fdt_blob->totalsize" as a tainted value being passed
to fdt_open_into().
Ensure the size is validated by checking that the total size
is within a reasonable maximum FDT limit for unit tests.
Signed-off-by: Adriana Nicolae <adriana@arista.com>
Beleswar Padhi [Tue, 9 Dec 2025 05:50:43 +0000 (11:20 +0530)]
configs: am43xx: Migrate to CONFIG_SYS_MEM_TOP_HIDE from CFG_PRAM
The TI AM43xx HS boards have been using CFG_PRAM to hide the top 64MB
firewalled DRAM memory from U-Boot. However, CFG_PRAM only prevents
U-Boot from relocating into that memory, but it is still open for access
for any other usage.
Therefore, migrate into using CONFIG_SYS_MEM_TOP_HIDE which reduces the
ram size itself ensuring that memory is not visible to U-Boot at all
(either for reloc, or general usage).
_ Add 1 GiB DRAM support for STM32MP13x DHCOR SoM
_ Fix 512 MiB DRAM support for STM32MP13x DHCOR SoM
_ Fix handling OPTEE in middle of the DRAM
_ Add missing debug UART build for STM32MP1 DHSOM
Marek Vasut [Tue, 18 Nov 2025 23:17:23 +0000 (00:17 +0100)]
ARM: stm32: Add missing build of debug UART init code on DH STM32MP1 DHSOM
Commit c37a6684818d ("stm32mp: fix compilation issue with DEBUG_UART")
split the debug UART initialization code into two files, but failed to
update other non-ST boards. This did not lead to noticeable breakage
until debug UART is enabled, which is not the default. Update the
Makefile accordingly to allow debug UART to work.
Fixes: c37a6684818d ("stm32mp: fix compilation issue with DEBUG_UART") Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Tue, 18 Nov 2025 23:19:36 +0000 (00:19 +0100)]
ARM: dts: stm32: Add 1 GiB DRAM settings for DH STM32MP13xx DHCOR SoM
Add DRAM settings for 1 GiB variant of DH STM32MP13xx DHCOR SoM
and support for SoM DRAM coding HW straps decoding and automatic
DRAM configuration selection. Enable CONFIG_BOARD_EARLY_INIT_F on
all STM32MP1 DHSOM, as it is required for the HW straps decoding.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Tue, 18 Nov 2025 23:17:14 +0000 (00:17 +0100)]
stm32mp: Fix handling of OPTEE in the middle of DRAM
STM32MP13xx may have OPTEE-OS at 0xdd000000 even on systems with 1 GiB
of DRAM at 0xc0000000, which is not the end of DRAM anymore. This puts
the OPTEE-OS in the middle of DRAM. Currently, the code sets RAM top to
0xdd000000 and prevents the DRAM range past OPTEE at 0xe0000000..0xffffffff
from being set as cacheable and from being usable. The code also sets the
area over OPTEE as invalid region in MMU tables, which is not correct.
Adjust the code such, that it only ever sets RAM top just before OPTEE
in case the OPTEE is really at the end of DRAM, mainly to be backward
compatible. Furthermore, adjust the MMU table configuration such, that
the regions over the OPTEE are simply skipped and not reconfigured, and
the regions between end of OPTEE and RAM top are set as cacheable, if
any actually exist.
Pranav Tilak [Mon, 8 Dec 2025 13:54:24 +0000 (14:54 +0100)]
arm64: versal: Fix LTO for mini_ospi/mini_qspi
With LTO enabled, mini U-Boot was hanging during reloc_fdt().
The initial stack pointer was placed too low, and the FDT memcpy
destination was carved only 4KB above it. This left insufficient
margin, causing the FDT copy to overwrite the live early stack
and corrupt execution before relocation.
To fix this, increase the malloc heap from 8KB to 12KB and raise the
initial stack pointer by 4KB. Together these adjustments increase
the separation between the early stack and the FDT region during
the pre-relocation phase, eliminating the overlap and fixing the
hang on mini builds (QSPI/OSPI).
Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com>
While adding CPSW device support to enable Ethernet boot for J722S,
dev-data and clk-data for eMMC was removed by mistake, which leads to eMMC
boot failure. Update the dev-data and clk-data to fix that.
Fixes: a02009f3a816 ("arm: mach-k3: j722s: Update SoC autogenerated data to enable Ethernet boot") Reported-by: Michael Walle <mwalle@kernel.org> Signed-off-by: Chintan Vankar <c-vankar@ti.com> Tested-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Brian Sune [Tue, 2 Dec 2025 04:10:29 +0000 (12:10 +0800)]
update GCC version check after Kbuild bump
ARM GCC tool check is not up to date,
while issues are reported such as file truncated linker errors.
Using ARM official cross tools shows that 10.0.1 is a safe
version to support latest kbuild bump properly.
* Correct and add missing pytest hook script environment variable names
* board: verdin-am62p: Fix boot log output
* Add a page for downloading the U-Boot logo with and without text
UEFI:
* Fix a memory leak when retrieving device paths from boot vars
Ilias Apalodimas [Thu, 27 Nov 2025 12:19:06 +0000 (14:19 +0200)]
efi_loader: Fix a memory leak when retrieving device paths from boot vars
get_dp_device() is used to derive the device path from a boot variable.
However, if the last efi_get_variable_int() call fails, we return an
error without freeing 'buf'.
There's no need to call efi_get_variable_int() for variables we don't
know the size since we have the efi_get_var() wrapper.
Replace that in the two instances we use it. The first one will also
fix the memory leak.
A nice sideeffect is that the code size is also reduced, since we are
re-using functions instead of open coding them
The logo with the text 'U-Boot' has been used in multiple presentations.
Up to now it was only available from my upload to wikimedia.org.
Make it available in our repository.
Sean Anderson [Wed, 3 Dec 2025 21:03:35 +0000 (16:03 -0500)]
clk: Remove myself as a maintainer
Unfortunately I don't really have time to review clock patches. When I
initially started maintaining this subsystem I had more free time than I do
now. But I also found it hard to motivate myself to review patches. Many
clock patches add support for new SoCs and they are time consuming to
review properly. You effectively have to spend a few hours reading the
reference manual (if it's public!) and reviewing drivers is no small feat
either. This is made more difficult since clocking is often very different
between SoCs and it can be difficult to determine whether something is a
bug in the driver or a workaround for some hardware behavior. I mostly
don't care about any given SoC unless I'm hacking on it so I ended up with
a ton (more than 7000) of unreviewed patches piling up in my inbox. I'd
love to be more active, but I have a day job and I usually want to work on
something more interesting when I get home. I still think the clock
subsystem is a major mess but I don't care enough to fix it :l
The subsystem itself should probably get orphaned since AFAICT all patches
go through the mach/arch maintainer or to Tom.
Sean Anderson [Wed, 3 Dec 2025 20:46:40 +0000 (15:46 -0500)]
test: strlcat: Fix SPDX license
When I modified this code I meant to accept the LGPL offer to convert the
license to GPL. However, while there is an LGPL 2.1, the next version of
the GPL after 2.0 is 3.0. Fix the license version
Fixess: c4ac52f55d9 ("test: Add test for strlcat") Signed-off-by: Sean Anderson <seanga2@gmail.com>
Chukun Pan [Tue, 2 Dec 2025 10:00:00 +0000 (18:00 +0800)]
binman: fallback to importlib_resources on Python 3.8
Python 3.7 and 3.8 lack the files attribute in importlib.resources.
Use importlib_resources to fix build errors with Python 3.8:
binman: module 'importlib.resources' has no attribute 'files'
Fixes: 538719cb6a77 ("binman: migrate from pkg_resources to importlib") Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
[trini: Re-add # pragma: no cover line] Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 3 Dec 2025 14:30:18 +0000 (08:30 -0600)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
This is R-Car X5H support. It was originally posted before rc1 and the
changes are well isolated. This is the final patchset which enables the
Gen5 drivers that are already in tree. I waited with this a bit until
the SCMI ID discussion stabilized and TFA X5H support landed. So now, I
can add the final piece into U-Boot too.
Note that this is still very much experimental, the X5H upstreaming is
in very early stages. The OF_UPSTREAM conversion will happen likely in
2026.04 or 2026.07 window, depending on when the Linux DTs land. The
compound-clock.c is surely going to go away once SCP gets updated and
the MFIS mailbox will be reworked once upstream bindings get developed.
Hai Pham [Mon, 27 Oct 2025 17:22:55 +0000 (18:22 +0100)]
arm64: renesas: Extend stub PSCI implementation to R-Car Gen5
Extend the stub PSCI implementation with support for R-Car Gen5.
R-Car Gen5 uses different register to perform reset, therefore
add a compile-time conditional. This is __secure code, therefore
the runtime SoC detection parts are not available to it, hence
the compile time conditional.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Tweak commit message
Add initial support for Renesas R-Car X5H R8A78000 Ironhide board.
This consists mainly of DTs, Makefile and Kconfig entries and board
specific configuration files.
The DTs will be gradually switched over to Linux DTs via OF_UPSTREAM
once Linux DTs become available upstream, as upstreaming progresses.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add initial device trees for Renesas R-Car X5H R8A78000 SoC.
Include very basic clock, reset, power domain headers which
are used to control supported peripherals via SCMI / SCP. The
headers are currently kept limited to avoid possible ABI break.
A lot of clock are still stubbed via fixed-clock, this is going
to be gradually removed over time, as more of the platform is
upstreamed.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Khanh Le <khanh.le.xr@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add initial changes to support Renesas R-Car Gen5 SoC.
Introduce Kconfig entries, architecture headers and PRR IDs for Renesas
R-Car Gen5 and R-Car X5H R8A78000 SoC. Add Makefile change to produce
u-boot-elf.srec with correct offset for installation tooling. Update
MAINTAINERS entry to cover both r8a77nnn and r8a78nnn .
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add support for the Renesas MFIS mailbox, which provides an interface
between the different CPU Cores, such as AP System Core domain and the
Realtime Core domain, SCP Core domain and AP System Core domain or
Realtime Core domain and AP System Core domain or Realtime Core domain.
Signed-off-by: Tuyen Dang <tuyen.dang.xa@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Update the driver
[Marek: Rename the driver to renesas-mfis, simplify the driver.
Always use only one TX channel and no RX channel, drop all
unnecessary code. Perform 1ms delay in send callback which
is perfectly fine to do in U-Boot which does RX polling]
Marek Vasut [Mon, 27 Oct 2025 16:33:07 +0000 (17:33 +0100)]
clk: renesas: Introduce temporary compound clock for SCP compatibility
The current state of SCP on Renesas R-Car Gen5 is not yet final and
is still missing full clock control, the clock control is exposed as
separate enable/disable and rate controls.
Temporarily introduce custom local compound clock, which are used as
an adaptation layer between U-Boot clock tree and current state of
SCP, and which bind two SCP clock into a single compound clock, which
provides both enable/disable and rate controls.
This is mainly meant to be used by SD/eMMC controller, to allow the
driver to both turn its clock on and off, and also obtain the current
clock rate. This is going to be removed once the SCP clock protocol
solidifies.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Wed, 19 Nov 2025 17:44:36 +0000 (18:44 +0100)]
sh: Assure end of U-Boot is at 8-byte aligned offset
Make sure the end of U-Boot is at 8-byte aligned offset, not 4-byte
aligned offset. This allows safely appending DT at the end of U-Boot
with the guarantee that the DT will be at 8-byte aligned offset. This
8-byte alignment is now checked by newer libfdt 1.7.2 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Adriana Nicolae [Thu, 27 Nov 2025 16:28:34 +0000 (08:28 -0800)]
boot/bootfdt: Add smbios3-entrypoint to FDT for non-EFI boots
The Linux kernel can discover SMBIOS tables through two primary methods:
1. Via EFI tables, when using EFI boot;
2. Via the 'smbios3-entrypoint' property in the /chosen node of the
device tree.
When U-Boot boots a Linux kernel using a non-EFI command ("bootm",
"bootz", or "booti"), the kernel relies on the device tree to detect
the hardware. If SMBIOS tables are available in U-Boot, they should
be passed to the kernel via this device tree property.
This patch modifies boot_fdt_prepare(), to inject the SMBIOSv3 table
address into the device tree if there is a table generated by U-boot.
The "board_fdt_chosen_smbios" is weak in order to leave the possibilty
for specific boards to select custom SMBIOS addresses.
The changes in this patch are added in the context of supporting this
device tree property in linux kernel:
https://lkml.org/lkml/2025/10/24/1393
Device tree schema was updated to include the "smbios3-entrypoint" node
in pull request: https://github.com/devicetree-org/dt-schema/pull/177
Signed-off-by: Adriana Nicolae <adriana@arista.com>
Marek Vasut [Wed, 19 Nov 2025 20:36:59 +0000 (21:36 +0100)]
arm64: renesas: r8a779g3: Use redundant env on Retronix R-Car V4H Sparrow Hawk board
The redundant environment offset is already set in board configuration,
but the redundant environment itself is not explicitly enabled. Make
sure the redundant environment is enabled, as we most certainly do want
to have two copies of the environment.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 6 Nov 2025 19:13:24 +0000 (20:13 +0100)]
ARM: renesas: Disable CONFIG_ENV_OVERWRITE on all boards
The CONFIG_ENV_OVERWRITE allows easy rewrite of environment variables
like 'ethaddr' and 'serial#' without any protection against accidental
removal of those variables. Remove this setting to add extra layer of
protection to those variables. The variables can still be overridden
using 'env set -f' (force set) if really needed.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
doc: samsung: exynos-mobile: add documentation for exynos7870
Document the image preparation and flashing techniques for
Exynos7870-based boards. This is done in a separate file in a
sub-directory, which is linked back to the main documentation.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
board: samsung: exynos-mobile: add exynos7870 support and three devices
Add basic support for the Exynos7870 SoC, this includes device tree
match logic using multiple boards, where devices use a stub dtb in
Samsung's QCDT format. S-BOOT, the previous stage bootloader, places its
cmdline arguments there, which has identifying information.
This is added with support for three devices:
* Samsung Galaxy A2 Core (codename: a2corelte)
* Samsung Galaxy J6 (codename: j6lte)
* Samsung Galaxy J7 Prime (codename: on7xelte)
Add their device trees in the defconfig, and also enable the clock and
pin controller drivers.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
board: samsung: add support for Samsung Exynos mobile device boards
Add support for a generic platform which intends to support multiple
boards powered by ARMv8 Samsung Exynos SoCs. Some important features
include:
* Fastboot: This is present to provide an open alternative to Samsung's
proprietary Odin protocol. The board file configures certain features
for fastboot, such as a dynamically allocated fastboot buffer, and
standardized (lowercase) partition aliases.
* EFI: Kernel image can be loaded from an EFI partition. This
adopts a standard booting process, which multiple OS distributions
can rely on.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Tom Rini [Mon, 1 Dec 2025 16:37:45 +0000 (10:37 -0600)]
Merge tag 'u-boot-socfpga-next-20251201' of https://source.denx.de/u-boot/custodians/u-boot-socfpga
This pull request delivers a broad set of improvements across the
SoCFPGA family, including Agilex5, Cyclone V, SoC64, and common code.
Key updates include refined boot flows, new driver enablement, handoff
tooling enhancements, and several stability fixes.
* Cyclone V:
- SPL FAT boot support and updated bootcmd sequence
- Disable SPL SPI to prevent contention with FAT-based boot
- New board handoff script and BSP generator tooling
- Optimized Makefile support for SoCFPGA handoff workflows* New drivers:
- Cadence xSPI driver with full protocol and command support
- SPL enablement for DW APB GPIO controller
* NAND / SoC64:
- Enable ONFI detection in Denali NAND controller for SoC64 devices
* DTS and board updates:
- Sync common SoCFPGA U-Boot DTS with kernel sources
- Fixes for FPGA2SDRAM configuration and SoCFPGA boot stall behavior
- Vining_FPGA migrated to the modern LED framework
- Device tree relocation no longer forced off for Vining FPGA
* Tooling:
- Introduces a new Python-based Cyclone V BSP generator
covering EMIF, IOCSR, HPS, XML parsing, rendering, and documentation
to simplify board enablement and handoff regeneration workflows
Overall, this series improves boot robustness, enhances xSPI and MDIO
capabilities, modernizes board support, and introduces new tooling to
streamline SoCFPGA handoff generation.
Pipelines test passing
https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/28569
Tom Rini [Wed, 26 Nov 2025 23:49:46 +0000 (17:49 -0600)]
Azure: Rework jobs for disk space and 29 jobs
The problem we face currently with Azure jobs is that we're running out
of disk space on the runners as we build. There's not a good way to
split approximately 1500 configurations across 10 jobs and not be close
to or exceeding that limit. Split this in to 29 jobs instead with a goal
of averaging an hour per job. This split gets us close, but there are
still some challenging jobs to try and break up further. The list is
mostly alphabetized but with some intentional changes (catch-all are
last, mx/imx are together, SoC family splits are just grouped together).
The average build time should be close to the same, but outliers can and
will happen.
Brian Sune [Mon, 1 Dec 2025 09:04:07 +0000 (17:04 +0800)]
Add optimized Makefile support for SoCFPGA handoff
- Introduce socfpga_g5_handoff_prepare target in U-Boot
arch/arm/mach-socfpga/config.mk
- Users can convert the handoff via make prepare.
- Detects Altera/Intel SoCFPGA boards from .config
- Combines vendor/board extraction into a single shell call
- Checks for hps_isw_handoff folder and .hiof files
- Uses ls -d instead of find for faster folder detection
- Runs BSP generator script only if files exist
- Non-blocking: continues if handoff folder or files are missing
- HANDOFF_PATH user define allows overriding auto-detected folder
- Minimizes subshells and other slow constructs for faster CI
Michael Walle [Thu, 27 Nov 2025 15:25:27 +0000 (16:25 +0100)]
net: phy: broadcom: fix RGMII delays for BCM54210E
bcm54210e_config() configures the RGMII delays and then calls
bcm5461_config(). But the latter will do a PHY soft reset and thus
resets the delay settings again. Call bcm5461_config() first to fix it.
Fixes: cba79a1b2e11 ("net: phy: broadcom: add support for BCM54210E") Signed-off-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Rafał Miłecki <rafal@milecki.pl>
Thanh Quan [Mon, 27 Oct 2025 14:03:58 +0000 (15:03 +0100)]
net: phy: dp83869: fix STRAP_OPMODE bitmask
According to the TI DP83869HM datasheet Revision D (June 2025), section
7.6.1.41 STRAP_STS Register, the STRAP_OPMODE bitmask is bit [11:9].
Fix this.
In case the PHY is auto-detected via PHY ID registers, or not described
in DT, or, in case the PHY is described in DT but the optional DT property
"ti,op-mode" is not present, then the driver reads out the PHY functional
mode (RGMII, SGMII, ...) from hardware straps.
Currently, all upstream users of this PHY specify both DT compatible string
"ethernet-phy-id2000.a0f1" and ti,op-mode = <DP83869_RGMII_COPPER_ETHERNET>
property, therefore it seems no upstream users are affected by this bug.
The driver currently interprets bits [2:0] of STRAP_STS register as PHY
functional mode. Those bits are controlled by ANEG_DIS, ANEGSEL_0 straps
and an always-zero reserved bit. Systems that use RGMII-to-Copper functional
mode are unlikely to disable auto-negotiation via ANEG_DIS strap, or change
auto-negotiation behavior via ANEGSEL_0 strap. Therefore, even with this bug
in place, the STRAP_STS register content is likely going to be interpreted
by the driver as RGMII-to-Copper mode.
However, for a system with PHY functional mode strapping set to other mode
than RGMII-to-Copper, the driver is likely to misinterpret the strapping
as RGMII-to-Copper and misconfigure the PHY.
For example, on a system with SGMII-to-Copper strapping, the STRAP_STS
register reads as 0x0c20, but the PHY ends up being configured for
incompatible RGMII-to-Copper mode.
Fixes: f3e22eea815d ("net: phy: add TI DP83869HM ethernet driver") Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Use FIELD_GET()
Disable support for using SPI in SPL to solve Cyclone V storage issue as
the OCRAM is only 64kb. The SPI configurations are only
required during uboot proper only.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Enable support for FAT filesystem with SPL for CycloneV instead of raw
mode.
Recent changes breaks CycloneV MMC boot from raw mode, and so we are taking
this opportunity to migrate MMC boot mode to FAT as smaller OCRAM size is
required, as well as aligning MMC boot flow with our other devices.
Fixes: 2a00d73d081a1 ("spl: mmc: Try to clean up raw-mode options") Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Restore legacy implementation of retrieving clkmgr base address from
mach-socfpga/misc.c driver for our legacy devices.
Excluding Agilex7/7M from this implementation as these devices' clock
driver is already following clock driver model and is supporting
enable/disable APIs.
The legacy devices' clock driver will have to be refactored to support
driver model which enables us to support enable/disable APIs for these
devices.
Fixes: ab27182cac8f ("mmc: socfpga_dw_mmc: Enable/disable SDMMC clock via API") Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
mkeficapsule tool will be built by default if EFI_LOADER is set due to
commit b7a625b1ce49 ("tools: Build mkeficapsule tool by default if
EFI_LOADER is set").
This will cause compilation error on all our SoCFPGA devices, hence we will
be disabling this config as we do not utilize this tool.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Tom Rini [Wed, 19 Nov 2025 14:55:38 +0000 (08:55 -0600)]
socfpga_vining_fpga: Stop disabling device tree relocation
Remove setting of fdt_high to ~0, which disables device tree relocation,
from the default environment. Doing so prevents U-Boot from correcting
problems such as having an unaligned device tree and leads to various
failure modes in the OS.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Brian Sune [Fri, 14 Nov 2025 16:04:23 +0000 (00:04 +0800)]
Altera SoCFpga Boot Stall Fix
Since U-Boot 2025.07 pure SD Card
boot no longer works. Now Altera released 2025.07
shows the different on the u-boot files.
After testing, the major root case is
get_managers_addr. And this patch fix the
SD boot stall via pulling from offical.
Signed-off-by: Brian Sune <briansune@gmail.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Dinesh Maniyam [Tue, 4 Nov 2025 17:16:17 +0000 (01:16 +0800)]
nand: denali: enable ONFI detection for SoCFPGA SoC64
Enable ONFI parameter page detection for SoCFPGA SoC64 devices by
selecting SYS_NAND_ONFI_DETECTION in the NAND_DENALI Kconfig entry.
This allows SoCFPGA SoC64 platforms using the Denali NAND controller
to automatically detect NAND parameters via the ONFI interface instead
of relying on hardcoded configuration values.
The selection is limited to TARGET_SOCFPGA_SOC64 to avoid affecting
non-SoC64 platforms that use legacy NAND handling.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Brian Sune [Fri, 31 Oct 2025 18:04:19 +0000 (02:04 +0800)]
Cyclone V Board handsoff script
Since turning from old build flow.
New Altera SoCFPGA requires converting handsoff
conversion via the python script. This is from
official provided, and now sync to U-Boot with
better location at tools/cv_xxxx. Meantime,
requirement.txt is also provided to further
explain the libraries require for these scripts.
Signed-off-by: Brian Sune <briansune@gmail.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Boon Khai Ng [Mon, 27 Oct 2025 06:36:54 +0000 (14:36 +0800)]
spi: cadence: Add driver for xSPI
This patch ports the Cadence xSPI controller driver from
the Linux kernel. The controller supports three operating modes:
1. ACMD (Auto Command) mode
- Includes PIO and CDMA submodes.
- CDMA mode uses linked descriptors for high-performance,
low-overhead operation.
- PIO mode is suitable for simple, single-command transactions.
2. STIG (Software Triggered Instruction Generator) mode
- Issues low-level 128-bit instructions to memory.
- Uses the Slave DMA interface for data transfers.
3. Direct mode
- Enables direct data access through the slave interface
without commands.
Currently, only the STIG work mode is enabled. Additional modes will be
supported in future updates.
At the same time, also enabling the kconfig option for xSPI driver.
This driver has been ported and functionally verified on the Intel Simics
platform. It is intended for evaluation and experimental use at this stage.
configs: agilex5: Enable FAT-based environment storage in defconfig
Enable storing the U-Boot environment in a FAT filesystem for Agilex5.
This allows the board to read and write environment variables from the
first partition of the first device formatted with FAT, in addition to the
existing UBI-based environment configuration.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Brian Sune [Mon, 20 Oct 2025 13:35:54 +0000 (21:35 +0800)]
FPGA2SDRAM setup fix
After testing, w/o proper setup
the FPGA2SDRAM bridge will not work and stall.
Pulling from official fix and w/o this initialization,
both 2025.07 and 2025.10 also suffer stall on U-Boot
and distro. Any FPGA to HPS-SDRAM action will immediate
stall the CPU. As such, this patch fix the issue.
Signed-off-by: Brian Sune <briansune@gmail.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Tanmay Kathpalia [Wed, 15 Oct 2025 15:44:45 +0000 (08:44 -0700)]
gpio: dwapb: Enable SPL support for DWAPB GPIO driver
Add SPL_DWAPB_GPIO configuration option to enable the Designware APB
GPIO driver in SPL builds.
Changes:
- Add SPL_DWAPB_GPIO Kconfig option with SPL_DM_GPIO dependency
- Update Makefile to use CONFIG_$(PHASE_)DWAPB_GPIO pattern for
conditional compilation in both SPL and main U-Boot builds
Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nikunj Kela [Fri, 29 Aug 2025 04:12:32 +0000 (21:12 -0700)]
net: xgmac: Augment mdio read/write with cl-45 format support
Currently, clause-22 format is supported. This change adds
support for clause-45 format.
Signed-off-by: Nikunj Kela <nikunj.kela@sima.ai> Reviewed-by: Boon Khai Ng <boon.khai.ng@altera.com> Tested-by: Boon Khai Ng <boon.khai.ng@altera.com> Reviewed-by: Boon Khai Ng <boon.khai.ng@altera.com> Tested-by: Boon Khai Ng <boon.khai.ng@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Tom Rini [Fri, 28 Nov 2025 14:26:44 +0000 (08:26 -0600)]
Merge tag 'rpi-2026.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Updates for RPi for 2026.01-rc4:
- rpi: Fix DRAM size reporting to show total RAM
- rpi: Use the U-Boot control FDT for fdt_addr
- pinctrl: bcm283x: Add GPIO pull-up/down control for BCM2835 and BCM2711
- rpi: Fix compilation with larger configs
Anders Roxell [Tue, 25 Nov 2025 10:23:58 +0000 (11:23 +0100)]
rpi: Fix DRAM size reporting to show total RAM
The VideoCore mailbox GET_ARM_MEMORY only reports the size of the
first accessible memory region (~947 MiB on RPi4 with 8GB), not the
total RAM. This causes U-Boot to display "DRAM: 947 MiB (total 7.9 GiB)"
instead of "DRAM: 7.9 GiB".
On Raspberry Pi 4 with 8GB RAM, the memory is split across multiple
non-contiguous banks. The dram_init() function only sets gd->ram_size
to the first bank size reported by the VideoCore firmware, while
fdtdec_setup_memory_banksize() correctly populates all memory banks
from the device tree.
Fix this by updating gd->ram_size after dram_init_banksize() has
populated all memory banks, so it reflects the actual total RAM
across all banks.
Signed-off-by: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Max Krummenacher [Wed, 26 Nov 2025 13:41:04 +0000 (14:41 +0100)]
configs: toradex-smarc-imx95: set spl_stack
The SPL_STACK config option now depends on having SPL_HAVE_INIT_STACK
defined. This made savedefconfig dropping SPL_STACK when sending the
initial configuration.
Note that SPL/U-Boot are able to boot linux from mass storage with
SPL_STACK not set but other use cases might run out of stack or
overlap with other RAM use.
Compare with:
commit d6a53f523afe ("spl: Add an SPL_HAVE_INIT_STACK option")
commit 25fefa05d732 ("configs: Resync with savedefconfig")
Fixes: ff0540fcfe49 ("board: toradex: add Toradex SMARC iMX95") Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
bootstd: rauc: Only require partitions for one slot
Partitions can be become unusable due to power cuts or failed updates.
Use the bootmeth RAUC if partitions for at least one slot exist. The
bootmeth can then select the working slot.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de> Tested-by: Martin Schwan <m.schwan@phytec.de>
Only check if the root partition exists when scanning for the slots
partitions and not if the filesystem can be accessed. It is not needed
to access the filesystem of the root partition as it might not be
supported by u-boot or be encrypted.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de> Tested-by: Martin Schwan <m.schwan@phytec.de>
Greg Malysa [Wed, 26 Nov 2025 19:50:31 +0000 (14:50 -0500)]
board: adi: Fix missing semicolon in nfsroot
The nfsroot constructed as part of the default Analog Devices boot
strategy is missing a semicolon between the server ip and the root path
itself. This adds the missing semicolon.
Maarten Brock [Tue, 25 Nov 2025 13:55:24 +0000 (13:55 +0000)]
board: ti: am335x: Fix DM_TPS65910 condition
scale_vcores_generic() calls functions implemented in
tps65910.c, not tps65910_dm.c. Change guard from CONFIG_DM_PMIC_TPS65910 to
CONFIG_SPL_POWER_TPS65910.
Fixes: 0b9ff0851592 ("board: ti: am335x: Do not call disabled PMIC functions") Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com> Signed-off-by: Maarten Brock <maarten.brock@sttls.nl> Reviewed-by: Kory Maincent <kory.maincent@bootlin.com> Acked-by: Maarten Brock <maarten.brock@sttls.nl>
Currently, the bind callback of the driver namely am65_cpsw_nuss_bind()
registers all ethernet ports including the ones that have been disabled
in the device-tree. Since the ports that have been disabled are ought to
be ignored, fix the implementation to register only the enabled ports as
indicated by their 'status' in their respective device-tree node.
power: domain: ti: fix ti_pd_get() to return after verifying transition
The helper function "ti_pd_get()" is responsible for powering on a
domain if it is powered off. In the current implementation, if a power
domain is determined to be powered off - no prior users and the PDCTL
register indicates that the user desired state is OFF, then powering on
the domain constitutes setting 'PDCTL_STATE_ON' field of the PDCTL
register.
While the current implementation indeed requests the power domain to be
transition to the ON state, the helper function "ti_pd_get()" doesn't
verify that the power domain has 'transitioned' to the ON state before
returning to its caller. As a result, it is possible that the device(s)
belonging to the power domain may be accessed before it is truly powered
on, leading to a bus abort.
Fix this by waiting for the power domain to transition to the ON state
by using "ti_pd_wait()" before returning from "ti_pd_get()".
Fixes: 144464bd2c67 ("power: domain: Introduce driver for raw TI K3 PDs") Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Tested-by: Hrushikesh Salunke <h-salunke@ti.com>
Tom Rini [Wed, 26 Nov 2025 16:30:24 +0000 (10:30 -0600)]
CI: Update to latest container
- Move to jammy-20251013 tag
- Bring in tkinter so that FATtools should run and more tests should be
run.
- Update to QEMU 10.0.6
- Pick tags for (most of) trace-cmd
Tom Rini [Wed, 26 Nov 2025 16:21:54 +0000 (10:21 -0600)]
Dockerfile: Update building trace tools slightly
We have not been picking a tag for the trace-cmd build process.
Currently the tip of libtraceevent fails to build. Address both problems
here by picking recent stable tags for libtraceevent and libtracefs
(trace-cmd has no recent tags). Further, as it is often reported that
this fails to build due to a race, stop using "make -j$(nproc)" as this
is also small enough of a set of builds to not be an issue.
Tom Rini [Thu, 13 Nov 2025 22:09:56 +0000 (16:09 -0600)]
Dockerfile: Include python3-tk for FATtools
In some cases our tests for exFAT don't run because we fail to be able
to create the underlying image. This is in turn because while creation
of the image succeeds, it seems that some way of how we invoke FATtools
wants to import tkinter, that fails and so the test stops there. Having
tkinter available (and then presumably a fallback to non-GUI because
it's not available) leads to the tests running as expected.
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 19 Nov 2025 14:32:58 +0000 (08:32 -0600)]
Docker: Update QEMU to 10.0.6
The QEMU project has the 10.0.x series as an LTS release. While we are
not doing an LTS ourselves, we can be confident in the changes between
10.0.2 and 10.0.6, so update ourselves.
Tom Rini [Wed, 19 Nov 2025 14:55:35 +0000 (08:55 -0600)]
s5p4418_nanopi2: Stop disabling device tree relocation
Remove setting of fdt_high to ~0, which disables device tree relocation,
from the default environment. Doing so prevents U-Boot from correcting
problems such as having an unaligned device tree and leads to various
failure modes in the OS.
Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Tue, 18 Nov 2025 23:21:19 +0000 (17:21 -0600)]
board: samsung: e850-96: Enter DFU automatically on USB boot
Doing USB boot on E850-96 is most useful in two cases:
1. For unbricking the board
2. During the bootloader development
In both cases a U-Boot binary is being re-flashed to eMMC. The most
convenient way to update U-Boot in eMMC is by using DFU. Implement
entering DFU flashing mode automatically when U-Boot is executed on USB
boot. That makes it easier for users to re-flash U-Boot without even
having serial console running, e.g.:
$ ./smdk-usbdl
$ dfu-util -D u-boot.bin -a bootloader
See [1,2] for details.
Entering DFU mode is implemented by setting corresponding environment
variables:
bootcmd="dfu 0 mmc 0"
bootdelay=0
Do not save the U-Boot environment though, to avoid falling through to
DFU mode on a regular eMMC boot.
Sam Protsenko [Tue, 18 Nov 2025 23:21:18 +0000 (17:21 -0600)]
board: samsung: e850-96: Load firmwares over USB on USB boot
During USB boot it's expected that the bootloader (U-Boot) should
download LDFW and TZSW firmware binaries over USB, using corresponding
SMC call. Once it's done, the Boot ROM code can release the USB block,
so that it can be used in U-Boot (e.g. for flashing images to eMMC using
DFU or fastboot). Otherwise USB wouldn't be accessible in U-Boot, and
any attempt to access USB PHY or DWC3 registers will lead to abort.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Tue, 18 Nov 2025 23:21:17 +0000 (17:21 -0600)]
board: samsung: e850-96: Add routine for loading images over USB
During USB boot U-Boot is supposed to download some firmware over USB.
It's done by EL3 software, so it has to be requested via corresponding
SMC call. Implement a routine for doing that.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
projects / thirdparty / u-boot.git / log
