Rasmus Villemoes [Tue, 28 May 2024 11:13:22 +0000 (13:13 +0200)]
sh4: move reset_cpu() from watchdog.c to cpu.c
The next patch will remove all the other code from watchdog.c, which
would leave just this function in there. It seems just as natural for
this function to be defined in cpu.c, allowing us to delete watchdog.c
completely.
Rasmus Villemoes [Tue, 28 May 2024 11:13:20 +0000 (13:13 +0200)]
wdt-uclass: watchdog_reset cleanup
watchdog_reset() is no longer called from anywhere, so we do not need
to define a dummy no-op function. Remove that definition, and update
references to say schedule() instead.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Stefan Roese <sr@denx.de>
Rasmus Villemoes [Tue, 28 May 2024 11:13:19 +0000 (13:13 +0200)]
m68k: remove dead code
There are no calls of "watchdog_reset()" anymore anywhere in the tree
since the WATCHDOG_RESET macro got removed in 942d07df0e79 ("watchdog:
Remove WATCHDOG_RESET macro").
The only places the identifiers watchdog_disable and watchdog_init are
called are in arch/arm/mach-omap2/, so those can obviously not refer
to these instances.
Hence these functions are not actually used at all and can be
removed. As a bonus, this also removes two leftover references to
WATCHDOG_RESET.
Cc: Huan Wang <alison.wang@nxp.com> Cc: Angelo Dureghello <angelo@kernel-space.org> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Stefan Roese <sr@denx.de>
Rasmus Villemoes [Tue, 21 May 2024 08:46:52 +0000 (10:46 +0200)]
cyclic: make clients embed a struct cyclic_info in their own data structure
There are of course not a whole lot of examples in-tree yet, but
before they appear, let's make this API change: Instead of separately
allocating a 'struct cyclic_info', make the users embed such an
instance in their own structure, and make the convention that the
callback simply receives the 'struct cyclic_info *', from which the
clients can get their own data using the container_of() macro.
This has a number of advantages.
First, it means cyclic_register() simply cannot fail, simplifying the
code. The necessary storage will simply be allocated automatically
when the client's own structure is allocated (often via
uclass_priv_auto or similar).
Second, code for which CONFIG_CYCLIC is just an option can more easily
be written without #ifdefs, if we just provide an empty struct
cyclic_info {}. For example, the nested CONFIG_IS_ENABLED()s in
https://lore.kernel.org/u-boot/20240316201416.211480-1-marek.vasut+renesas@mailbox.org/
are mostly due to the existence of the 'struct cyclic_info *' member
being guarded by #ifdef CONFIG_CYCLIC.
And we do probably want to avoid the extra memory overhead of that
member when !CONFIG_CYCLIC. But that is automatic if, instead of a
'struct cyclic_info *', one simply embeds a 'struct cyclic_info',
which will have size 0 when !CONFIG_CYCLIC. Also, the no-op
cyclic_register() function can just unconditionally be called, and the
compiler will see that (1) the callback is referenced, so not emit a
warning for a maybe-unused function and (2) see that it can actually
never be reached, so not emit any code for it.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Currently, the cyclic_register() done in wdt_start() is not undone in
wdt_stop(). Moreover, calling wdt_start multiple times (which is
perfectly allowed on an already started device, e.g. to change the
timeout value) will result in another struct cyclic_info being
registered, referring to the same watchdog device.
This can easily be seen on e.g. a wandboard:
=> cyclic list
function: watchdog@20bc000, cpu-time: 22 us, frequency: 1.01 times/s
=> wdt list
watchdog@20bc000 (imx_wdt)
=> wdt dev watchdog@20bc000
=> wdt start 50000
WDT: Started watchdog@20bc000 with servicing every 1000ms (50s timeout)
=> cyclic list
function: watchdog@20bc000, cpu-time: 37 us, frequency: 1.03 times/s
function: watchdog@20bc000, cpu-time: 241 us, frequency: 1.01 times/s
=> wdt start 12345
WDT: Started watchdog@20bc000 with servicing every 1000ms (12s timeout)
=> cyclic list
function: watchdog@20bc000, cpu-time: 36 us, frequency: 1.03 times/s
function: watchdog@20bc000, cpu-time: 100 us, frequency: 1.04 times/s
function: watchdog@20bc000, cpu-time: 299 us, frequency: 1.00 times/s
So properly unregister the watchdog device from the cyclic framework
in wdt_stop(). In wdt_start(), we cannot just skip the registration,
as the (new) timeout value may mean that we have to ask the cyclic
framework to call us more often. So if we're already running,
first unregister the old cyclic instance.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Rasmus Villemoes [Tue, 21 May 2024 08:46:50 +0000 (10:46 +0200)]
cyclic: stop strdup'ing name in cyclic_register()
We are not checking the return value of strdup(), nor
freeing the string in cyclic_unregister().
However, all current users either pass a string literal or the
dev->name of the client device. So in all cases the name string will
live at least as long as the cyclic_info is registered, so just make
that a requirement.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Ilias Apalodimas [Fri, 14 Jun 2024 12:09:50 +0000 (15:09 +0300)]
tpm: measure DTB in PCR1 instead of PCR0
The PC client spec [0], doesn't describe measurements for DTBs. It does
describe what do to for ACPI tables though.
There is a description for ACPI in 3.3.4.1 PCR[0] – SRTM, POST BIOS,
and Embedded Drivers and they explicitly mention ACPI in there. There's
no mention of ACPI in 3.3.4.2 PCR[1] – Host Platform Configuration.
However, in Figure 6 -- PCR Mapping of UEFI Components ACPI is shown
in PCR1. The general description also mentions PCR0 is for code and PCR1
is for data such as ACPI and SMBIOS.
So let's switch over the DTB measurements to PCR1 which seems a better
fit.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Eddie James <eajames@linux.ibm.com>
Daniel Schultz [Wed, 12 Jun 2024 16:16:38 +0000 (09:16 -0700)]
doc: board: phytec: phycore-am64x: Fix Link to Documentation
We moved our documentation to another hoster and therefore the URL
changed. Point to the latest documentation instead of release versions
to not link out-dated documentation.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Daniel Schultz [Wed, 12 Jun 2024 16:16:37 +0000 (09:16 -0700)]
doc: board: phytec: phycore-am62x: Fix Link to Documentation
We moved our documentation to another hoster and therefore the URL
changed. Point to the latest documentation instead of release versions
to not link out-dated documentation.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Add combined binaries for all Verdin AM62 variants.
These binaries can be used to flash the U-Boot via single
binary instead of few as it is done at the moment.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Tom Rini [Fri, 14 Jun 2024 16:42:50 +0000 (10:42 -0600)]
Merge patch series "introduce basic support for TI's am625-lp-sk"
Bryan Brattlof <bb@ti.com> says:
Hello Again Everyone!
The am625-lp-sk is a variant of the am625-sk showcasing the low-power
features of the am625 SoC Family. Because it's essentially a board and
package spin of the am625-sk I've inherited the am625 configuration and
overridden what was needed.
This is a new spin of Nitin's original work which has been updated
significantly since October 2023
This also works around a buildman issue not following #include
directives. To get around this I've redefined the variables it's looking
for inside the lp-sk defconfig to keep it happy for now. I made a pull
request on github and everything seems like it's happy
Tom Rini [Fri, 14 Jun 2024 16:40:26 +0000 (10:40 -0600)]
Merge patch series "arm: dts: am625/am62a7: Switch over to OF_UPSTREAM"
Nishanth Menon <nm@ti.com> says:
Cleanup am625 on by switching over the last two platforms (SK and
beagleplay) over to OF_UPSTREAM, and while at it, switch over am62a7
(last of the am62* family) over as well.
This superscedes the previous version of beagleplay only patch[1]
Dhruva Gole [Fri, 7 Jun 2024 08:56:41 +0000 (14:26 +0530)]
arm: dts: k3: binman: am62p: add support for signing TIFSStub images
Adds TIFS stub binaries, this is required for deepsleep functionality.
This implements the same change as commit 128f81290b7d ("arm: dts: k3:
binman: am625: add support for signing TIFSSTUB Images") did for TI AM62
SK board.
Dhruva Gole [Fri, 7 Jun 2024 08:56:40 +0000 (14:26 +0530)]
arm: dts: k3: binman: am62a: add support for signing TIFSStub Images
Add support for signing of TIFSSTUB images for HSSE, HSFS and GP devices
and include them in tispl.bin and tispl.bin_unsigned.
This implements the same change as commit 128f81290b7d ("arm: dts: k3:
binman: am625: add support for signing TIFSSTUB Images") did for TI AM62
SK board.
tools: Build mkeficapsule tool by default if EFI_LOADER is set
Trigger the building of the mkeficapsule tool if EFI_LOADER is enabled.
Previously it was triggered on EFI_CAPSULE_ON_DISK, but mkeficapsule is
needed when a capsule is being generated for a bootloader stage, not just
from the stage applying them. EFI_LOADER is a more accurate approximation
of when a capsule may need to be generated.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Bryan Brattlof [Fri, 7 Jun 2024 22:06:13 +0000 (17:06 -0500)]
configs: add defconfigs for the am625-lp-sk
The am62x-lp-sk is a package and reference board spin of the am62x-sk to
showcase the low-power features of the am62x SoC family. Because it so
closely resembles the am62x-sk board, use the preprocessor to inherit
its configuration making the needed changes for this board where
necessary.
Nishanth Menon [Wed, 5 Jun 2024 15:27:52 +0000 (10:27 -0500)]
arm: dts: am62a7_sk: Switch to OF_UPSTREAM
Enable OF_UPSTREAM for am62a7-sk board. Remove DT files that
are now available in dts/upstream. Update the appended files based on
version of latest OF_UPSTREAM sync point (v6.10-rc1).
Nishanth Menon [Wed, 5 Jun 2024 15:27:51 +0000 (10:27 -0500)]
arm: dts: am625_sk: Switch to OF_UPSTREAM
Enable OF_UPSTREAM for am625-sk board. Remove DT files that
are now available in dts/upstream. Update the appended files based on
version of latest OF_UPSTREAM sync point (v6.10-rc1).
Nishanth Menon [Wed, 5 Jun 2024 15:27:50 +0000 (10:27 -0500)]
arm: dts: am625_beagleplay: Switch to OF_UPSTREAM
Enable OF_UPSTREAM for AM625-beagleplay board. Remove DT files that
are now available in dts/upstream. Update the appended files based on
version of latest OF_UPSTREAM sync point (v6.10-rc1).
Tom Rini [Wed, 5 Jun 2024 01:37:42 +0000 (19:37 -0600)]
block: Update BLK to be def_bool
At this point in the DM migration, all platforms enable DM. BLK requires
DM. Make BLK "def_bool y" in the cases it had been "default y" to make
this clearer. Now remove the symbol requirement from other places as it
is redundant here.
Tom Rini [Wed, 5 Jun 2024 01:37:40 +0000 (19:37 -0600)]
efi_loader: select BLK not depends on BLK
The BLK symbol is used both for "we have a block device subsystem
enabled" and "we need to utilize the block device library functions". In
the case of efi_loader, it is the case of "we need to utilize the block
device library", so select rather than depends on it. In turn, also
disable EFI_LOADER on platforms which did not have it on previously due
to a lack of block devices. They can enable it themselves if desired.
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
board: imx8mn_s2: Update timing with production one
The timing upstream was wrong corresponding to the production.
This come evident after commit b614ddb5d33
(ddr: imx: Save the FW loading if it hasn't changed). This
change fix booting from usb
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Marek Vasut [Thu, 6 Jun 2024 13:02:46 +0000 (15:02 +0200)]
ARM: stm32: Fix livetree conversion on STM32MP15xx DHSOM
Unlike fdt_node_check_compatible() which returns 0 if node is compatible,
ofnode_device_is_compatible() return true which is non-zero if node is
compatible. The intention of the code is to exit from the function in
case the node is not compatible with "micrel,ks8851-mll". Add the missing
invert into the conditional to reinstate original behavior.
This exposes a follow up problem caused by conversion to DM based FMC2 EBI
driver, where the FMC2 EBI is not configured when accessed by this code.
Probe the KS8851 MAC, which also configures the FMC2 EBI as a dependency,
so that the KS8851 MAC CCR register can be accessed over the FMC2 EBI bus
and checked for EEPROM present bit.
Fixes: 5a605b7c8615 ("board: dhelectronics: stm32mp1: convert to livetree") Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Heiko Stuebner [Mon, 10 Jun 2024 13:13:37 +0000 (15:13 +0200)]
arm64: dts: rockchip: add dual-role usb3 hosts to rk3588 Tiger-Haikou
Apart from the host-only usb3 controller (host2) the rk3588 also provides
two dual-role controllers. On the Tiger-Haikou combination these are
connected to the lower usb3-host port in host-only mode and the micro-usb3
port for dual-role operation.
Add the necessary controllers, phys to the Tiger-Haikou board and enable
the usb-id extcon.
Heiko Stuebner [Mon, 10 Jun 2024 13:13:36 +0000 (15:13 +0200)]
arm64: dts: rockchip: add usb-id extcon on rk3588 tiger
The Q7 standard specifies a usb-id pin on the connector to distiuish
between host and device mode. Model this via the usb-id extcon binding.
While the pin is part of the Q7 standard, so part of the module, the
extcon stays disabled in the som dtsi and will only be enabled in a
baseboard using it.
Heiko Stuebner [Mon, 10 Jun 2024 13:13:32 +0000 (15:13 +0200)]
arm64: dts: rockchip: move uart2 pinmux to dtsi on rk3588-tiger
The association of uart2 to the q7-uart pins is part of the module
itself and not the baseboard used. Therefore move the pinctrl over
to the tiger dtsi.
Quentin Schulz [Thu, 6 Jun 2024 08:45:36 +0000 (10:45 +0200)]
rockchip: ringneck-px30: fix TPL_MAX_SIZE
Ringneck was mistakenly set to allow up to 128KiB for the TPL code size
while PX30 SoC only has 16KiB of SRAM.
Therefore, let's use the default value of TPL_MAX_SIZE from the SoC
(which is 10KiB) so that the max code size is actually checked and
useful.
Fixes: c925be73a0a8 ("rockchip: add support for PX30 Ringneck SoM on Haikou Devkit") Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Quentin Schulz [Thu, 6 Jun 2024 08:45:35 +0000 (10:45 +0200)]
power: rk8xx: properly print all supported PMICs name
The ID of the PMIC is stored in the 2 16b registers but the only part
that matters right now is the 3 MSB, which make the 3 digits (in hex) of
the part number.
Right now, only RK808 was properly displayed, with this all currently
supported PMICs should display the proper part number.
Additionally, when the PMIC variant is not found, print that value
instead of the masked unshifted value as all PMICs we support for now
have their LSB ignored to represent the actual part number.
Tested on RK806 (RK3588 Jaguar), RK808 (RK3399 Puma) and RK809 (PX30
Ringneck).
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
On px30-ringneck the FIT payload is located at sector 0x200 compared to
the more Rockchip common sector 0x4000 offset:
SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
Because FIT payload is located at sector 0x200 and the TPL+SPL is
located at sector 64, the combined size of TPL+SPL cannot take up more
than 224KiB:
(0x200 - 64) x 512 = 0x38000 (224 KiB)
Adjust SPL_PAD_TO to match the used 0x200 sector offset.
While at it, update the px30-ringneck-u-boot.dtsi to remove the now
unnecessary override of simple-bin:fit:offset since SPL_PAD_TO matches
with the current formula.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Since commit 6007b69d544e ("rockchip: rk3399-puma: Update SPL_PAD_TO
Kconfig option"), SPL_PAD_TO matches
(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512 and the default
value for simple-bin:fit:offset in rockchip-u-boot.dtsi is
SPL_PAD_TO, so let's remove this override.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Jianfeng Liu [Tue, 28 May 2024 17:04:06 +0000 (01:04 +0800)]
board: rockchip: add ArmSoM Sige7 Rk3588 board
ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) by
ArmSoM.
There are two variants depending on the DRAM size : 8G and 16G.
Specification:
Rockchip Rk3588 SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
8/16GB memory LPDDR4x
Mali G610MC4 GPU
2x MIPI CSI 2 multiple lanes connector
64GB/128GB on board eMMC
uSD slot
1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C
1x HDMI 2.1 output
2x 2.5 Gbps Ethernet port
40-pin IO header including UART, SPI and I2C
USB PD over USB Type-C
Size: 92mm x 62mm
Niklas Cassel [Tue, 28 May 2024 17:04:03 +0000 (01:04 +0800)]
arm64: dts: rockchip: add rk3588 pcie and php IOMMUs
The mmu600_pcie is connected with the five PCIe controllers.
The mmu600_php is connected with the USB3 controller, the GMAC
controllers, and the SATA controllers.
See 8.2 Block Diagram, in rk3588 TRM (Technical Reference Manual).
The IOMMUs are disabled by default, as further patches are needed to
program the SID/SSIDs in to the IOMMUs.
Additionally, the IOMMU correctly triggers an IOMMU fault when
a PCIe device performs a write (since the device hasn't been
assigned a SID/SSID):
arm-smmu-v3 fc900000.iommu: event 0x02 received:
arm-smmu-v3 fc900000.iommu: 0x0000010000000002
arm-smmu-v3 fc900000.iommu: 0x0000000000000000
arm-smmu-v3 fc900000.iommu: 0x0000000000000000
arm-smmu-v3 fc900000.iommu: 0x0000000000000000
While this doesn't provide much value as is, having the devices as
disabled in the device tree will allow developers to see that the rk3588
actually has IOMMUs on the SoC.
(cherry picked from commit ea9a34aa0d786cbf4b87f1ba528e69b07219738f) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit c7ed588e14f7dd04a92fb55f12680f94c7b14edf) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 5110caca9865718616cf7093ed4a9a1bc54780db) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit f6835a60a8a28ff14ffb3dd80c99ce1c137d06c5) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 5a3e4638492497ae81b9bd4a8627f4727e312ccc) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit bbf7c16f2f1208b96349f6f6648b69cfaa1a482b) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 3cd15354ea0c8668812bc0b3a4136606c10803e9) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Fri, 24 May 2024 09:23:33 +0000 (11:23 +0200)]
rockchip: px30/rk3326: migrate to OF_UPSTREAM
Migrate PX30/RK3326 boards that exists in Linux v6.8 to use OF_UPSTREAM.
firefly-px30 is not migrated to OF_UPSTREAM because there's no Device
Tree in the Linux kernel.
Differences between U-Boot's Odroid-Go2 and Linux's are now moved to the
-u-boot.dtsi, though I have a gut feeling that the existing cru
overrides aren't necessary (anymore?).
The U-Boot GPIO led-0 is on GPIO0_C1 but such is the pin of PWM3 which
is used for Linux's PWM led-2 so keep Linux's.
I also doubt vcc_cam is actually used, though the Odroid-Go2 Black
Edition uses this dcdc regulator for WiFi, so let's just move it to the
-u-boot.dtsi to play it safe.
Quentin Schulz [Fri, 24 May 2024 09:23:32 +0000 (11:23 +0200)]
rockchip: evb-px30: make UART5 the debug UART
In the Device Tree, UART5 is the system UART, but in the defconfig it
currently is UART2. Let's sync the two by making the defconfig use UART5
as well.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Quentin Schulz [Fri, 24 May 2024 09:23:30 +0000 (11:23 +0200)]
rockchip: px30: make UART pinmux accessible to TPL/SPL DTB
This adds the default pinmux for UART2 and UART5 to the TPL/SPL DTB (if
not removed through the CONFIG_OF_SPL_REMOVE_PROPS symbol) as those two
controllers are always made available to all boards.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Quentin Schulz [Fri, 24 May 2024 09:23:29 +0000 (11:23 +0200)]
rockchip: px30-core-*: Use common bss and stack addresses
U-Boot proper pre-reloc is currently running out of memory on PX30
Ringneck and it is thus impossible to boot into U-Boot CLI. It is
assumed the same problem can be seen on other PX30 boards though I
cannot guarantee it since I don't have access to them.
Fix this by migrating to the common bss and stack addresses for PX30,
which drastically increases the size of the pre-reloc allocation pool (8
times bigger now). The memory layout in SPL and U-Boot proper now
match the other SoCs' using ROCKCHIP_COMMON_STACK_ADDR.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Quentin Schulz [Fri, 24 May 2024 09:23:28 +0000 (11:23 +0200)]
rockchip: odroid-go2: Use common bss and stack addresses
U-Boot proper pre-reloc is currently running out of memory on PX30
Ringneck and it is thus impossible to boot into U-Boot CLI. It is
assumed the same problem can be seen on other PX30 boards though I
cannot guarantee it since I don't have access to them.
Fix this by migrating to the common bss and stack addresses for PX30,
which drastically increases the size of the pre-reloc allocation pool (8
times bigger now). The memory layout in SPL and U-Boot proper now
match the other SoCs' using ROCKCHIP_COMMON_STACK_ADDR.
Quentin Schulz [Fri, 24 May 2024 09:23:27 +0000 (11:23 +0200)]
rockchip: firefly-px30: Use common bss and stack addresses
U-Boot proper pre-reloc is currently running out of memory on PX30
Ringneck and it is thus impossible to boot into U-Boot CLI. It is
assumed the same problem can be seen on other PX30 boards though I
cannot guarantee it since I don't have access to them.
Fix this by migrating to the common bss and stack addresses for PX30,
which drastically increases the size of the pre-reloc allocation pool (8
times bigger now). The memory layout in SPL and U-Boot proper now
match the other SoCs' using ROCKCHIP_COMMON_STACK_ADDR.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Quentin Schulz [Fri, 24 May 2024 09:23:26 +0000 (11:23 +0200)]
rockchip: evb-px30: Use common bss and stack addresses
U-Boot proper pre-reloc is currently running out of memory on PX30
Ringneck and it is thus impossible to boot into U-Boot CLI. It is
assumed the same problem can be seen on other PX30 boards though I
cannot guarantee it since I don't have access to them.
Fix this by migrating to the common bss and stack addresses for PX30,
which drastically increases the size of the pre-reloc allocation pool (8
times bigger now). The memory layout in SPL and U-Boot proper now
match the other SoCs' using ROCKCHIP_COMMON_STACK_ADDR.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Quentin Schulz [Thu, 6 Jun 2024 11:44:04 +0000 (13:44 +0200)]
rockchip: mkimage: fix mkimage -l for header v1
There are two paths to reach this function, either through mkimage -l or
through dumpimage -l. The latter passes a NULL imagename while the
former passes an empty string. Therefore, let's make both tools behave
the same by handling the empty string the same way as for NULL.
Without this, the only way to get some information out of mkimage -l is
to provide "-n rk3399" for example, which isn't documented in the usage
of the tool.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sun, 12 May 2024 12:16:15 +0000 (12:16 +0000)]
pinctrl: rockchip: rv1126: Fix support for IOMUX_L_SOURCE_PMU flag
GPIO0_C0-C4 iomux is set using PMUGRF_GPIO0C_IOMUX_L reg on RV1126. This
is indicated using the IOMUX_L_SOURCE_PMU flag. Fix reading current mux
by fully adopting the IOMUX_L_SOURCE_PMU related code in Linux kernel.
Based on Linux commit fd4ea48688c6 ("pinctrl: rockchip: Add RV1126
pinctrl support").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sun, 12 May 2024 12:16:14 +0000 (12:16 +0000)]
pinctrl: rockchip: rk3188: Fix support for IOMUX_GPIO_ONLY flag
GPIO0_A0-A7 on RK3188 is IOMUX_GPIO_ONLY, however, trying to set gpio
mux return an -ENOTSUPP error code. Fix this by validating using the mux
function type and not the iomux flag.
Based on Linux commit c4a532dee6b6 ("pinctrl: rockchip: handle first
half of rk3188-bank0 correctly").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Wed, 5 Jun 2024 09:33:21 +0000 (11:33 +0200)]
regulator: rk8xx: fix incorrect device used for _ldo_[sg]et_suspend_value
_ldo_get_suspend_value and _ldo_set_suspend_value get passed the parent
of the regulator (so the pmic) as first argument, therefore this udevice
should be used for pmic_* callbacks instead of using the parent of the
pmic.
To avoid further confusion, let's rename the argument to pmic instead of
dev, highlighting which kind of device we expect as argument.
Fixes: f047e4ab9762 ("regulator: rk8xx: add indirection level for some ldo callbacks") Reported-by: Simon Glass <sjg@chromium.org> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> # chromebook-bob
Chris Morgan [Tue, 21 May 2024 15:45:49 +0000 (10:45 -0500)]
board: rockchip: rgxx3: Use sdmmc0 as first device
Some of the rgxx3 devices do not have a way to recover from a poor
flash of a bootloader to eMMC. Set the device to always attempt to boot
from sdmmc0 first which ensures that we can override the boot from
emmc if we have a card present with a valid fit signature. The
expectation is that this will protect from the very unlikely chance
we have a valid FIT signature on the eMMC but the U-Boot stage fails
for some other reason.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
On some of the supported devices the adc detect code always returns
that the button has been pushed, and as a result the device will
not boot normally.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Love Kumar [Wed, 5 Jun 2024 09:49:35 +0000 (15:19 +0530)]
test/py: net_boot: Add test cases for net boot
Add tests for booting image using tftpboot/pxe boot commands, tftpboot
boot case loads the FIT image into DDR and boots using bootm command
whereas pxe boot cases downloads the pxe configuration file from the
TFTP server and interprets it to boot the images mentioned in the pxe
configurations file.
This test relies on boardenv_* containing configuration values including
the parameter 'pattern'. tftpboot/pxe boot cases boots the Linux till the
boot log pattern value is matched. For example, if the parameter
'pattern' is defined as 'login:', it will boot till login prompt.
Signed-off-by: Love Kumar <love.kumar@amd.com> Tested-by: Tom Rini <trini@konsulko.com>
Love Kumar [Wed, 22 May 2024 13:15:13 +0000 (18:45 +0530)]
test/py: Add support to enable check for bad pattern
Executing a u-boot command may raise an error or extra bad pattern,
beyond the default bad patterns. Providing a way to enable the console
output error check in test.
For example, description for OS boot test:
import re
check_type = 'kernel_boot_error'
check_pattern = re.compile('ERROR -2: can't get kernel image!')
with u_boot_console.enable_check(check_type, check_pattern):
u_boot_console.run_command('<boot command>')
Allow extraction of zstd-compressed images from FIT using imxtract
command. This is especially useful when one has to load an image via
some interface (e.g. SPI) rather that just to the memory.
bcmgenet: fix Rx buffer corruption caused by lack of cache flush
When bcmgenet complete to write Rx buffer with the DMA,
some U-Boot commands write data to the buffer directly.
Those write data will become dirty in CPU cache.
After this driver calls free_pkt to the buffer,
the buffer is assigned as the future Rx buffer.
At some point, if bcmgenet writes to a buffer with DMA
and CPU cache flushes dirty data to the buffer,
the buffer is corrupted.
This patch calls flush_dcache_range in free_pkt
to immediately flush the data written by U-Boot command
and prevent data corruption.
This issue can be reproduced using wget on Raspberry Pi4.
If wget receives data larger than
RX_BUF_LENGTH * RX_DESCS = 2048 * 256 bytes,
it will timeout due to data corruption.
In addition, if LOG_DEBUG is enabled in net/tcp.c,
the following error log is output.
spl: Kconfig: ARCH_K3: Set default SPL_STACK_R_MALLOC_SIMPLE_LEN for R5 build
All ARCH_K3 platforms need about of 2MB of malloc space post
reallocation. Since, this space is allocated from SDRAM, provide a
generous 2MB space by default.
Platforms requiring more than 2MB can override in defconfig as needed.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
arm: dts: k3-*-binman: Make default DM file optional
The default DM firmware path is non-optional as of now. Make it
optional so that users that choose to provide DM via TI_DM argument
instead of BINMAN_INDIRS can do so without build errors.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
MAIN_PLL0 has a flag set in DM (Device Manager) that removes its
capability to re-initialise clock frequencies. A72 CPU clock (GTC) and
RGMII has MAIN_PLL3 as their parent which does not have this flag. While
RGMII needs re-initialization to default frequency to be able to get
250MHz with its divider, GTC can not get its required 200MHz with its
dividers. Thus move GTC clock parent on J721S2 from MAIN_PLL3_HSDIV1 to
MAIN_PLL0_HSDIV6. This was already done on CPTS node in kernel which was
similarly affected (linked).
projects / thirdparty / u-boot.git / log
