Jonas Karlman [Wed, 1 May 2024 16:22:19 +0000 (16:22 +0000)]
clk: rockchip: rk3399: Add dummy support for ACLK_VDU clock
rk3399.dtsi from linux v5.19 and newer try to set VDU clock rate to
400 MHz using an assigned-clock-rates prop of the CRU node.
U-Boot does not use or need this clock so add dummy support for getting
and setting ACLK_VDU clock rate to allow CRU driver to be loaded with an
updated rk3399.dtsi.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 30 Apr 2024 15:30:25 +0000 (15:30 +0000)]
rockchip: rk3399: Configure sdmmc regulator pinctrl in SPL
A few boards have shown to be required to properly configure pinctrl
for the fixed regulator gpio pin used by sdmmc before being able to read
from SD-cards.
Include the related gpio, regulator and pinctrl nodes and enable related
Kconfig options so that pinctrl can be configured in SPL for boards that
may be affected by such issue.
Also change to imply SPL_DM_SEQ_ALIAS for all boards because it must be
enabled for working gpio usage in SPL after a future DT sync.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 30 Apr 2024 15:30:24 +0000 (15:30 +0000)]
rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC
When RK3399 boards run SPL from eMMC and fail to load FIT from eMMC due
to it being missing or checksum validation fails there can be a fallback
to read FIT from SD-card. However, without proper pinctrl configuration
reading FIT from SD-card may fail:
U-Boot SPL 2024.04-rc4 (Mar 17 2024 - 22:54:45 +0000)
Trying to boot from MMC2
mmc_load_image_raw_sector: mmc block read error
Trying to boot from MMC2
mmc_load_image_raw_sector: mmc block read error
Trying to boot from MMC1
Card did not respond to voltage select! : -110
mmc_init: -95, time 12
spl: mmc init failed with error: -95
SPL: failed to boot from all boot devices (err=-6)
### ERROR ### Please RESET the board ###
Fix this by tagging related sdhci, sdmmc and spi flash pinctrl nodes
with bootph props. Also move bootph for common nodes shared by all
boards to the SoC u-boot.dtsi.
eMMC, SD-Card and SPI flash nodes are also changed to only be tagged
with bootph props for SPL and U-Boot pre-reloc phases.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This can be resolved by including bootph prop for U-Bood pre-reloc
phase (bootph-some-ram or bootph-all). However, this has intentionally
been excluded due to including it unnecessarily slows down boot around
200-400 ms.
Also add the clock-frequency prop similar to what has been done for
other Rockchip SoCs.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 30 Apr 2024 15:30:22 +0000 (15:30 +0000)]
rockchip: rk3399-puma: Move uart0 bootph to board u-boot.dtsi
rk3399-puma is the only supported board that use uart0 for serial
console, other RK3399 boards typically use uart2 for serial console
and may use uart0 for bluetooth.
Move setting bootph prop to board u-boot.dtsi to only include the uart0
node in TPL/SPL control FDT for the rk3399-puma target.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 30 Apr 2024 15:30:18 +0000 (15:30 +0000)]
rockchip: rk3399: Add a default spl-boot-order prop
A lot of RK3399 boards use a u-boot,spl-boot-order of "same-as-spl",
&sdhci and &sdmmc.
Move this to rk3399-u-boot.dtsi and make this default for boards
currently missing a u-boot,spl-boot-order prop.
Before commit a7e69952eb6d ("rockchip: spl: Cache boot source id for
later use") it was required to include the SPI flash node in the
u-boot,spl-boot-order prop to successfully load FIT from SPI flash.
The SPI flash node reference has been dropped from spl-boot-order from
pinebook-pro, roc-pc and rockpro64 now that "same-as-spl" also gets
resolved to the SPI flash node and loading FIT from SPI flash works
without having the node explicitly referenced in spl-boot-order prop.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 30 Apr 2024 15:30:14 +0000 (15:30 +0000)]
rockchip: rk3399: Enable random generator on all boards
The RK3399 SoC contain a crypto engine block that can generate random
numbers.
Imply DM_RNG and RNG_ROCKCHIP Kconfig options to take advantage of the
random generator on all RK3399 boards. Also remove the unnecessary use
of a status = "okay" prop.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Jonas Karlman [Tue, 30 Apr 2024 15:30:13 +0000 (15:30 +0000)]
rockchip: rk3399: Enable ARMv8 crypto and FIT checksum validation
The RK3399 SoC support the ARMv8 Cryptography Extensions, use of ARMv8
crypto can speed up FIT checksum validation in SPL.
Imply ARMV8_SET_SMPEN and ARMV8_CRYPTO to take advantage of the crypto
extensions for SHA256 when validating checksum of FIT images.
Imply SPL_FIT_SIGNATURE and LEGACY_IMAGE_FORMAT to enable FIT checksum
validation to almost all RK3399 boards.
The following boards have been excluded:
- chromebook_bob: SPL max size limitation of 120 KiB
- chromebook_kevin: SPL max size limitation of 120 KiB
Also imply OF_LIVE to help speed up init of U-Boot proper and disable
CONFIG_SPL_RAW_IMAGE_SUPPORT on leez-rk3399 to ensure SPL does not try
to jump to code that failed checksum validation.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 30 Apr 2024 15:30:11 +0000 (15:30 +0000)]
rockchip: rk3399-ficus: Enable TPL and use common bss and stack addr
The rk3399-ficus board is only using SPL and not TPL+SPL like all other
RK3399 boards, chromebook bob/kevin excluded. It does not seem to be any
technical reason why this board was left using only SPL.
Switch to use TPL+SPL and to use the common bss and stack addresses
introduced in commit 008ba0d56d00 ("rockchip: Add common default bss and
stack addresses"). Also add the missing DEFAULT_FDT_FILE option.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 30 Apr 2024 15:30:10 +0000 (15:30 +0000)]
rockchip: rk3399-puma: Use common bss and stack addresses
The rk3399-puma board is currently using SPL stack and bss addr in SRAM,
the same addr typically used by TPL, this differs from most other RK3399
boards.
Switch to use the common bss and stack addresses introduced in commit 008ba0d56d00 ("rockchip: Add common default bss and stack addresses").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
On rk3399-puma the FIT payload is located at sector 0x200 compared
to the more Rockchip common sector 0x4000 offset:
SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
Because FIT payload is located at sector 0x200 and IDBlock is located at
sector 64, the combined size of TPL+SPL (idbloader.img) cannot take up
more than 224 KiB:
(0x200 - 64) x 512 = 0x38000 (224 KiB)
Adjust SPL_PAD_TO to match the used 0x200 sector offset.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 30 Apr 2024 15:30:08 +0000 (15:30 +0000)]
rockchip: rk3399-gru: Fix max SPL size on bob and kevin
Chromebook bob and kevin typically run coreboot as the initial boot
loader, however, U-Boot proper can be used as a secondary boot loader.
It is also possible to run U-Boot SPL and proper bare metal, with SPL
and the U-Boot payload loaded from SPI flash.
Because of this chromebook bob and kevin only use SPL and not TPL+SPL
like other RK3399 boards, this mean that SPL is loaded to and run from
SRAM instead of DRAM.
The U-Boot payload is located at 0x40000 (256 KiB) offset in SPI flash
and because the BROM only read first 2 KiB for each 4 KiB page, the size
of SPL (idbloader.img) is limited to max 128 KiB.
The chosen bss start address further limits the size of SPL to 120 KiB.
Tom Rini [Wed, 1 May 2024 02:40:57 +0000 (20:40 -0600)]
board: Marvell: Remove <common.h> and add needed includes
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 1 May 2024 02:40:48 +0000 (20:40 -0600)]
global: Make <asm/global_data.h> include <asm/u-boot.h>
This follows the example of RISC-V where <asm/global_data.h> includes
<asm/u-boot.h> directly as "gd" includes a reference to bd_info already
and so the first must include the second anyhow. We then remove
<asm/u-boot.h> from all of the places which include references to "gd"
an so have <asm/global_data.h> already.
projects / thirdparty / u-boot.git / log
