Alexey Romanov [Wed, 31 May 2023 09:31:56 +0000 (12:31 +0300)]
drivers: meson: introduce secure power controller driver
This patch adds Power controller driver support for Amlogic
A1 family using secure monitor calls. The power domains register
only can access in secure world.
Import the device tree from mainline linux (v6.4-rc1) and add the
old PHY reset bindings in the PHY node, else U-Boot and linux won't
be able to use the PHY.
Bin Meng [Tue, 27 Jun 2023 01:24:56 +0000 (09:24 +0800)]
riscv: Fix alignment of RELA sections in the linker scripts
In current linker script both .efi_runtime_rel and .rela.dyn sections
are of RELA type whose entry size is either 12 (RV32) or 24 (RV64).
These two are arranged as a continuous region on purpose so that the
prelink-riscv executable can fix up the PIE addresses in one loop.
However there is an 'ALIGN(8)' between these 2 sections which might
cause a gap to be inserted between these 2 sections to satisfy the
alignment requirement on RV32. This would break the assumption of
the prelink process and generate an unbootable image.
Fixes: 9a6569a043d3 ("riscv: Update alignment for some sections in linker scripts") Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Rick Chen <rick@andestech.com>
Marek Vasut [Sun, 28 May 2023 21:00:30 +0000 (23:00 +0200)]
imx: hab: Simplify the mechanism
The current mechanism is unnecessarily complex. Simplify the whole mechanism
such that the entire fitImage is signed, IVT is placed at the end, followed
by CSF, and this entire bundle is also authenticated. This makes the signing
scripting far simpler.
Mingli Yu [Mon, 19 Jun 2023 06:22:50 +0000 (14:22 +0800)]
mkimage: Use PATH_MAX for path length
Fixed when build xilinx_zynqmp in long directory ( >256):
| /buildarea1/testtest/wr_build/wr1023test_secureboot/test1-what/test2-what/test3-what/test4-what/test5-what/test6-what/test7-what/test8-what/test9-what/test10-what/test11-what/test12-what/build/tmp-glibc/work/xilinx_zynqmp-wrs-linux/u-boot-xlnx/1_v2023.01-xilinx-v2023.1+gitAUTOINC+40a08d69e7-r0/build/fitImage-linux: Image file name (uboot-mkimage) too long, can't create tmpfile.
| Error: Bad parameters for FIT image type
Tom Rini [Tue, 20 Jun 2023 20:00:20 +0000 (16:00 -0400)]
doc: statistics: Re-generate the last 3 releases
With some changes to our mapping files in gitdm, re-generate the last
few releases worth of statistics to correctly reflect contributions. We
only go back this far to try and find a balance between highlighting
contributions and still being reviewable.
Simon Glass [Sat, 17 Jun 2023 10:49:48 +0000 (11:49 +0100)]
menu: Re-enable the ANSI codes
The intent here was to allow ANSI codes to be disabled, since it was
proving impoosible to test operation of the menu code when it kept moving
the cursor. Unfortunately this ended up in the patch.
Correct this by enabling ANSI again.
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Pali Rohár <pali@kernel.org> Reported-by: Mark Kettenis <mark.kettenis@xs4all.nl> Reported-by: Frank Wunderlich <frank-w@public-files.de> Fixes: 32bab0eae51b ("menu: Make use of CLI character processing") Tested-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Simon Glass [Fri, 23 Jun 2023 12:22:09 +0000 (13:22 +0100)]
doc: Tidy up the format docs to be more generic
Avoid reference to uImage which is the old format. Drop the historical
language at the top and rewrite a few other sections. Correct the
U-Boot filename which is now in the boot/ directory.
After "spi: spi_flash_probe_bus_cs() rely on DT for spi speed and mode"
series flash speed and mode wasn't passed to driver anymore, which
resulted in:
Loading Environment from SPIFlash... tegra20_sflash spi@7000c380: Invalid chip select 0:0 (err=-19)
*** Warning - spi_flash_probe_bus_cs() failed, using default environment
Fix it by syncing SPI node of affected device dts with Linux kernel dts.
The changed SPI bus frequency doesn't influence stability of read/write
operations.
Ref: https://patchwork.ozlabs.org/project/uboot/cover/20220518064648.1843664-1-patrice.chotard@foss.st.com Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
Tom Rini [Thu, 22 Jun 2023 13:59:43 +0000 (09:59 -0400)]
Merge branch '2023-06-21-fix-get_ram_size-with-cache-enabled' into next
To quote the author:
Ensure that every write is flushed to memory and afterward reads are
from memory.
Since the algorithm rely on the fact that accessing to not existent
memory lead to write at addr / 2 without this modification accesses to
aliased (not physically present) addresses are cached and wrong size is
returned.
This was discovered while working on a TI AM625 based board where cache
is normally enabled, see commit c02712a74849 ("arm: mach-k3: Enable
dcache in SPL").
Emanuele Ghidoli [Tue, 30 May 2023 13:33:27 +0000 (15:33 +0200)]
common/memsize.c: Fix get_ram_size() when cache is enabled
Ensure that every write is flushed to memory and afterward reads are
from memory.
Since the algorithm rely on the fact that accessing to not existent
memory lead to write at addr / 2 without this modification accesses
to aliased (not physically present) addresses are cached and
wrong size is returned.
This was discovered while working on a TI AM625 based board
where cache is normally enabled, see commit c02712a74849 ("arm: mach-k3: Enable dcache in SPL").
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Emanuele Ghidoli [Tue, 30 May 2023 13:33:26 +0000 (15:33 +0200)]
sandbox: Add a dummy dcache_status() function
This adds dcache_status() so that code using it can build
without error on sandbox. This is required in preparation
of adding cache handling into get_ram_size function.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
usb: dwc2: Fix the write to W1C fields in HPRT register
Fix the write to the HPRT register which treat W1C fields
as if they were mere RW. This leads to unintended clearing of such fields
This bug was found during the testing on Simics model. Referring to
specification DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG)
Databook (3.30a)"5.3.4.8 Host Port Control and Status Register (HPRT)", the
HPRT.PrtPwr is cleared by this mistake. In the Linux driver (contrary to
U-Boot), HPRT is always read using dwc2_read_hprt0 helper function which
clears W1C bits. So after write back those bits are zeroes.
When bootflow scan is run, this will cause a UCLASS_BOOTDEV device to
be added as sibling of those UCLASS_BLK devices found in the search
chain defined in environment variable "boot_targets", until boot
succeeds from some device. This can happen automatically as part of
the default boot process on some boards (example: Rock Pi 4) depending
on the board configuration (DISTRO_DEFAULTS, BOOTSTD, BOOTCOMMAND,
etc.) because they have bootcmd=bootflow scan.
If boot doesn't succeed from any device, and usb is in boot_targets,
and an usb storage device is plugged to some usb port at boot time,
its UCLASS_MASS_STORAGE device will have a UCLASS_BOOTDEV device as
child, besides a UCLASS_BLK child.
If once the boot fails the user enters at the U-Boot shell prompt:
usb info
or
usb tree
The code in cmd/usb.c will eventually recurse into the UCLASS_BOOTDEV
device and pass a null usb_device pointer to usb_show_tree_graph() or
usb_show_info() (because it has no parent_priv_).
This causes a reset. The expected behaviour would be to ignore the
UCLASS_BOOTDEV device, continue listing the usb information and return
to the prompt.
Minimal test:
Another way to trigger this reset as a minimal test or on boards with
a different bootcmd would be:
- make sure "usb" is in environment variable boot_targets (might need
setenv boot_targets usb; and/or saveenv and reset), then, with a usb
storage device plugged to a usb port, run:
=> usb reset ; bootflow scan ; usb info
Solution:
Fix it (twice) by checking for null parent_priv_ and adding
UCLASS_BOOTDEV to the list of ignored class ids before the recursive
call.
This prevents the current particular problem with UCLASS_BOOTDEV, even
in case it ever gets some parent_priv_ struct which is not an
usb_device, despite being the child of a usb_device->dev. And it also
prevents possible future problems if other children are added to usb
devices that don't have parent_priv_ because they are not part of the
usb tree, just abstractions of functionality (like UCLASS_BLK and
UCLASS_BOOTDEV are now).
Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de>
Masahisa Kojima [Thu, 1 Jun 2023 09:13:51 +0000 (18:13 +0900)]
configs: synquacer: increase SYS_MALLOC_F_LEN
DM_FLAG_PRE_RELOC flag is added into some drivers
by recent commits such as 1bd790bc4b ("firmware: psci: enable DM_FLAG_PRE_RELOC").
Current SYS_MALLOC_F_LEN of SynQuacer Developerbox platform
is too small, Developerbox will not boot due to lack of
heap memory.
Julien Panis [Mon, 29 May 2023 13:42:28 +0000 (15:42 +0200)]
drivers: spi: omap3_spi: Initialize mode for all channels
At first SPI transfers, multiple chip selects can be
enabled simultaneously. This is due to chip select
polarity, which is not properly initialized for all
channels. This patch fixes the issue.
Sam Edwards [Sun, 28 May 2023 00:09:42 +0000 (18:09 -0600)]
psci: fix use of clobbered registers in asm
The functions `psci_get_context_id` and `psci_get_target_pc`
are written in C, so the C compiler may clobber registers r0-r3.
Do not use these registers to save data across calls.
Tom Rini [Thu, 4 Jun 2020 20:35:15 +0000 (16:35 -0400)]
usb: eth: lan78xx: Fix logic in lan78xx_read_otp() to avoid a warning
In lan78xx_read_otp() we want to know if sig is LAN78XX_OTP_INDICATOR_1
or LAN78XX_OTP_INDICATOR_2. In the case of matching the first one we
set offset to itself, and clang warns about this. Rework the logic so
that if sig is the second indicator we adjust the offset as today and if
it does not match the first indicator we return -EINVAL
Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
Add support to load the next stage image from an NVMe disk which may
be formatted as an EXT or FAT filesystem.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
[trini: Drop hunk changing disk/part.c as that breaks other users] Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 19 Jun 2023 20:43:53 +0000 (16:43 -0400)]
Merge branch '2023-06-19-corstone1000-fwu-updates' into next
To quote the author:
Now that the nvmxip block driver is merged we can add on top
of it the platform code to use GPT and FWU metadata in the
Corstone1000.
But first, push 2 fixes that are needed to make all this work:
- move nvmxip header to include
- setup fwu metadata structures as packed (we have a 32bit
writer - Secure enclave Cortex-M0 and a 64bit reader host
Cortex-A35)
Rui Miguel Silva [Mon, 12 Jun 2023 08:09:20 +0000 (09:09 +0100)]
corstone1000: add nvmxip, fwu-mdata and gpt options
Enable the newest features: nvmxip, fwu-metadata and
gpt. Commands to print the partition info, gpt info
and fwu metadata will be available.
Adjust also env boot script the address of the
bootbank with the new gpt layout, and also remove
the not needed kernel address bank0 and bank1
and retrieve function that would test the bank flag
before and now we are getting the info from the fwu
metadata.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Rui Miguel Silva [Mon, 12 Jun 2023 08:09:19 +0000 (09:09 +0100)]
corstone1000: set kernel_addr based on boot_idx
We need to distinguish between boot banks and from which
partition to load the kernel+initramfs to memory.
For that, fetch the boot index, fetch the correspondent
partition, calculate the correct kernel address and
then set the env variable kernel_addr with that value.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Rui Miguel Silva [Mon, 12 Jun 2023 08:09:18 +0000 (09:09 +0100)]
corstone1000: add boot index
it is expected that the firmware that runs before
u-boot somehow provide the information of the bank
for now we will fetch the info from the metadata
since the Secure enclave is the one responsible for
this information.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Rui Miguel Silva [Mon, 12 Jun 2023 08:09:15 +0000 (09:09 +0100)]
fwu_metadata: make sure structures are packed
The fwu metadata in the metadata partitions
should/are packed to guarantee that the info is
correct in all platforms. Also the size of them
are used to calculate the crc32 and that is important
to get it right.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tom Rini [Fri, 16 Jun 2023 14:51:58 +0000 (10:51 -0400)]
Merge tag 'u-boot-stm32-20230616' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
serial: stm32: Fixes to avoid suprious characters
Use U-Boot device tree to configure MTD partitions stm32mp13 and stm32mp15 boards
stm32mp: stm32prog: Add support of ENV partition type
config: stm32mp15: remove CONFIG_FASTBOOT_USB_DEV and CONFIG_FASTBOOT_CMD_OEM_FORMAT
stm32: Add IWDG handling into PSCI suspend code
stm32: Fix OF_LIST on DHCOR
stm32: Add missing header for save_boot_params
stm32: Use __section(".data") with dot in the section name on DHSOM
stm32mp: soome changes and fixes for STM32MP13 and STM32MP15 boards
dts: stm32mp: alignment with v6.3
dts: stm32f769-disco: remove the dsi_host node
configs: stm32f746-disco: remove a useless comment
Patrice Chotard [Wed, 31 May 2023 06:01:30 +0000 (08:01 +0200)]
serial: stm32: Wait TC bit before performing initialization
In case there is still chars from previous bootstage to transmit, wait
for TC (Transmission Complete) bit to be set which ensure that the last
data written in the USART_TDR has been transmitted out of the shift
register.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Mon, 24 Apr 2023 14:21:09 +0000 (16:21 +0200)]
media: dt-bindings: media: Add macros for video interface bus types
Add a new dt-bindings/media/video-interfaces.h header that defines
macros corresponding to the bus types from media/video-interfaces.yaml.
This allows avoiding hardcoded constants in device tree sources.
Based on linux commit f7eeb0084593 ("media: dt-bindings: media: Add macros
for video interface bus types")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 27 Apr 2023 13:36:38 +0000 (15:36 +0200)]
pmic: stpmic1: support new prefix node name for regulator
The '_' character is discouraged in the node name, this patch adds the
new prefix of regulator subnode, with the '-' character, in STM32MP1 driver
to support the new naming rule in Linux kernel device trees.
It is a preliminary patch before Linux device tree synchronization
for STMicroelectronics boards.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 27 Apr 2023 13:36:37 +0000 (15:36 +0200)]
stm32mp: stm32prog: use the decimal format by default for offset parsing
Change the default base for offset parsing with simple_strtoull(),
so offset in flashlayout is coded in base 10 by default, even if string
start with '0'. The Octal encoding is not supported. The base 16
is still supported when the '0x' header is detected.
This patch solves an unexpected parsing result when the address,
provided by decimal value is starting by 0, for example 0x4400 = 00017408
is a invalid with current code.
...
P 0x04 fsbl1 Binary mmc0 00017408 tf-a.stm32
....
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 27 Apr 2023 13:36:35 +0000 (15:36 +0200)]
configs: stm32mp1: reduce DDR_CACHEABLE_SIZE to supported 256MB DDR
Reduces the CONFIG_DDR_CACHEABLE_SIZE, the size of DDR mapped cacheable
before relocation, to support DDR with only 256MB because the OP-TEE
reserved memory is located at end of the DDR.
By default the new size of 128MB cacheable memory is enough
in dram_bank_mmu_setup() for early_enable_caches() in arch_cpu_init()
and is correct for DDR size = 256MB.
After relocation the real size of DDR, excluding the no-map reserved
memory, is used after the U-Boot device tree parsing.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tom Rini [Fri, 5 May 2023 00:11:02 +0000 (20:11 -0400)]
ARM: stm32: Fix OF_LIST on DHCOR
The ITS file used to build the images here lists three dtb files as
being used. Today, these are built by the logic that will over-build dtb
files based on SOC/etc symbols being set. To future proof this platform
and be generally correct, we list all 3 of the device trees used here in
OF_LIST.
Cc: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Thu, 11 May 2023 19:55:45 +0000 (21:55 +0200)]
ARM: stm32: Add IWDG handling into PSCI suspend code
In case the IWDG is enabled by either U-Boot or Linux, the IWDG can never
be disabled again. That includes low power states, which means that if the
IWDG is enabled, the SoC would reset itself after a while in suspend via
the IWDG. This is not desired behavior.
It is possible to enable IWDG pre-timeout IRQ which is routed into the EXTI,
and use that IRQ to wake the CPU up before the IWDG timeout is reached and
reset is triggered. This pre-timeout IRQ can be used to reload the WDT and
then suspend the CPU again every once in a while.
Implement this functionality for both IWDG1 and IWDG2 by reading out all
the unmasked IRQs, comparing the list with currently pending IRQs in GICv3:
- If any IRQ is pending and it is NOT IWDG1 or IWDG2 pre-timeout IRQ,
wake up and let OS handle the IRQs
- If IWDG1 or IWDG2 IRQ is pending and no other IRQ is pending,
ping the respective IWDG and suspend again
This does not seem to have any adverse impact on power consumption in suspend.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
projects / thirdparty / u-boot.git / log
