Leo Yan [Thu, 4 May 2023 07:54:58 +0000 (15:54 +0800)]
arm64: Remove duplicated symbols
When build U-boot with clang with using commands:
$ make HOSTCC=clang xenguest_arm64_defconfig
$ make HOSTCC=clang CROSS_COMPILE=aarch64-linux-gnu- \
CC="clang -target aarch64-linux-gnueabi" -j8
The compiler reports error:
/tmp/start-acdf31.s:330:1: error: symbol '_start' is already defined
_start:
^
Because the symbol '_start' has been defined twice, one is defined in
arch/arm/cpu/armv8/start.S, another is defined in the header
boot0-linux-kernel-header.h.
To fix building failure, this patch removes the symbol '_start' from
boot0-linux-kernel-header.h.
Sam Edwards [Thu, 18 May 2023 19:47:07 +0000 (13:47 -0600)]
mmc: fix improper use of memset
Buffers created through DEFINE_(CACHE_)ALIGN_BUFFER are actually
pointers to the real underlying buffer. Using sizeof(...) is
not appropriate in this case.
Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ravi Gunasekaran [Thu, 18 May 2023 06:36:23 +0000 (12:06 +0530)]
common: dfu: Remove leading space characters
As per [1], dfu_alt_info is mentioned to be as semicolon separated
string of information on each alternate and the parsing logic in
the dfu.c is based on this.
Typically, the dfu_alt_info_* is defined in .h files as preprocessor
macros with 'alt' info separated by semicolon.
But when dfu_alt_info_* is added in the environment files(.env)
the script at "scripts/env2string.awk" converts a newline to space.
Thus adding a space character after semicolon. This results in
incorrect parsing in dfu.c which is based on the information that
'alt' info are only semicolon separated.
One option is to add dfu_alt_info_* variable in .env in single line.
But there is possiblity for it to exceed the line length limit.
So update the parsing logic to remove leading space characters
before adding to the dfu list.
Rasmus Villemoes [Tue, 16 May 2023 09:17:56 +0000 (11:17 +0200)]
scripts/Makefile.lib: change spelling of $(srctree)/arch/$(ARCH)/dts in dtc_cpp_flags
Currently, all in-tree .dts files (apart from some under test/ and
tools/), reside in arch/$ARCH/dts. However, in the linux kernel tree,
dts files for arm64 boards, and probably in the not too distant
future [1], arm boards as well, live in subdirectories of that.
For private forks, using a vendor or project subdirectory is also more
convenient to clearly separate private code from upstream - in the
same way that code under board/ is also split and easy to maintain.
In order to prepare for us to follow suit and do the splitting of the
in-tree .dts files, and to make life a little easier for private forks
that already place dts files not directly in arch/$ARCH/dts, change
the $(srctree)/arch/$(ARCH)/dts path to instead refer to the directory of
the .dts file being compiled. This should be a no-op for all existing
cases.
Sam Edwards [Fri, 12 May 2023 22:31:05 +0000 (16:31 -0600)]
arm: set alignment properly for asm funcs
ARM requires a 4-byte alignment on all ARM code (though this
requirement is relaxed to 2-byte for some THUMB code) and we
should be explicit about that here.
GAS has its own fix for this[1] that forces proper alignment
on any section containing assembled instructions, but this is
not universal: Clang's and other gaslike assemblers lack this
implicit alignment. Whether or not this is considered a bug in
those assemblers, it is better to ask directly for what we want.
Function b_getch() retrieves a character from the input stream. This
character may be > 0x7f. If type char is signed, static_get() will
return a negative number and in parse_stream() we will use that
negative number as an index for array map[] resulting in a buffer
overflow.
Reported-by: Harry Lockyer <harry_lockyer@tutanota.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Samuel Holland [Mon, 20 Feb 2023 06:14:58 +0000 (00:14 -0600)]
fastboot: Only call the bootm command if it is enabled
This fixes an error with trying to link against do_bootm() when
CONFIG_CMD_BOOTM is disabled.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tom Rini [Wed, 31 May 2023 20:30:16 +0000 (16:30 -0400)]
Merge branch '2023-05-31-cleanup-unaligned-access-macros' into next
To quote the author:
There are two versions of get/set_unaligned, get_unaligned_be64,
put_unaligned_le64 etc in U-Boot causing confusion (and bugs).
In this patch-set, I'm trying to fix that with a single unified version of
the access macros to be used across all archs. This work is inspired by
similar changes in this Linux kernel by Arnd Bergman,
https://lore.kernel.org/lkml/20210514100106.3404011-1-arnd@kernel.org/
Jens Wiklander [Mon, 22 May 2023 12:22:36 +0000 (14:22 +0200)]
fs/btrfs: use asm/unaligned.h
Use asm/unaligned.h instead of linux/unaligned/access_ok.h for unaligned
access. This is needed on architectures that doesn't handle unaligned
accesses directly.
Jens Wiklander [Mon, 22 May 2023 12:22:35 +0000 (14:22 +0200)]
powerpc: use asm-generic/unaligned.h
Powerpc configurations are apparently able to do unaligned accesses. But
in an attempt to clean up and handle unaligned accesses in the same way
we ignore that and use the common asm-generic/unaligned.h directly
instead.
Jens Wiklander [Mon, 22 May 2023 12:22:34 +0000 (14:22 +0200)]
m68k: use asm-generic/unaligned.h
M68k essentially duplicates the content of asm-generic/unaligned.h, with
an exception for non-Coldfire configurations. Coldfire configurations
are apparently able to do unaligned accesses. But in an attempt to clean
up and handle unaligned accesses in the same way we ignore that and use
the common asm-generic/unaligned.h directly instead.
Tom Rini [Tue, 16 May 2023 16:34:47 +0000 (12:34 -0400)]
include: Remove unused header files
As part of various code clean-ups we have on occasion missed removing
unused header files. None of these files are referenced anywhere else
at this point.
Andre Przywara [Mon, 15 May 2023 13:52:14 +0000 (14:52 +0100)]
faraday: remove orphaned header file
Commit 11232139e399 ("nds32: Remove the architecture") removed the nds32
architecture, and with it the last user of the Faraday AHB controller
header file.
Consequently remove that header file as well.
This was found because the inclusion guard was misspelled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Mark Kettenis [Tue, 2 May 2023 19:30:41 +0000 (21:30 +0200)]
pci: apple: Add support for M2 Pro/Max
The PCIe controller on the M2 Pro/Max is different from the one
found on earlier Apple SoCs. Some registers moved and te meaning
of the bits in some other registers changed. But they are still
similar enough to handle both controllers in the same driver.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Mark Kettenis [Tue, 2 May 2023 19:30:40 +0000 (21:30 +0200)]
arm: apple: Add initial Apple M2 Pro/Max support
Apple's M2 Pro/Max SoC are somewhat similar to the M1 Pro/Max but
need a tweaked memory map. USB, NVMe, UART and WDT are working
with the existing drivers.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Manorit Chawdhry [Thu, 18 May 2023 07:14:17 +0000 (12:44 +0530)]
arm: mach-k3: security: separate out validating binary logic
K3 GP devices allows booting the secure binaries on them by bypassing
the x509 header on them.
ATF and OPTEE firewalling required the rproc_load to be called before
authentication. This change caused the failure for GP devices that
strips off the headers. The boot vector had been set before the headers
were stripped off causing the runtime stripping to fail and stripping
becoming in-effective.
Separate out the secure binary check on GP/HS devices so that the
boot_vector could be stripped before calling rproc_load. This allows
keeping the authentication later when the cluster is on along with
allowing the stripping of the binaries in case of gp devices.
Dave Gerlach [Tue, 16 May 2023 04:54:37 +0000 (10:24 +0530)]
arm: mach-k3: Increase SYSFW max image size
When booting with HS silicon, the system firmware image is 278270, which
is slightly larger than currently allocated amount.
This can cause unexpected behavior if this overlap interferes with other
things in memory, so increase this with a slightly margin added as well
to avoid any boot issues that can appear after system firmware gets
loaded.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tero Kristo <kristo@kernel.org> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com>
Manorit Chawdhry [Tue, 16 May 2023 04:54:36 +0000 (10:24 +0530)]
Kconfig: j721e: Change K3_MCU_SCRATCHPAD_BASE to non firewalled region
In non-combined boot flow for K3, all the firewalls are locked by default
until sysfw comes up. Rom configures some of the firewall for its usage
along with the SRAM for R5 but the PSRAM region is still locked.
The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the
firewall exception before sysfw came up. The exception started happening
after adding multi dtb support that accesses the scratchpad for reading
EEPROM contents.
The commit changes R5 MCU scratchpad for j721e to an SRAM region.
Manorit Chawdhry [Tue, 16 May 2023 04:54:35 +0000 (10:24 +0530)]
configs: j721e: Merge the HS and non-HS defconfigs
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Reviewed-by: Bryan Brattlof <bb@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Acked-by: Andrew Davis <afd@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Andrew Davis [Tue, 16 May 2023 04:54:34 +0000 (10:24 +0530)]
arm: k3: config.mk: Add missing dependencies on tispl.bin HS
When building for secure devices using non-buildman based image generation
the signed tispl.bin file is called tispl.bin_HS. Also build the unsigned
tispl.bin file as expected.
Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Peng Fan [Fri, 28 Apr 2023 04:08:46 +0000 (12:08 +0800)]
imx9: imx93_evk: update ddr timing file
Update DDR timing file generated by DDR Config Tool
1. Dynamic refresh rate is set by default
2. The 3rd freq will be 625MTS based on power and performance better than 100MTS.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Fri, 28 Apr 2023 04:08:45 +0000 (12:08 +0800)]
imx9: Calculate DDR size from DDRC setting
To avoid using static setting for ECC enabled DDR size, switch
to calculate DDR size from DDRC setting
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Jacky Bai [Fri, 28 Apr 2023 04:08:43 +0000 (12:08 +0800)]
ddr: imx93: update the ddr init to support mult setpoints
Update the DDR init flow for multi-setpoint support on i.MX93. A new
fsp_cfg struct need to be added in the timing file to store the diff
part of the DDRC and DRAM MR register for each setpoint.
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Jacky Bai [Fri, 28 Apr 2023 04:08:41 +0000 (12:08 +0800)]
ddr: imx9: Change the saved ddr data base to 0x2051c000
change the ddr saved info to the last 16KB of the OCRAM.
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Fri, 28 Apr 2023 04:08:39 +0000 (12:08 +0800)]
ddr: imx9: Add workaround for DDRPHY rank-to-rank errata
According to DDRPHY errata, the Rank-to-Rank Spacing and tphy_rdcsgap
specification does not include the Critical Delay Difference (CDD) to
properly define the required rank-to-rank read command spacing after
executing PHY training firmware.
Following the errata workaround, at the end of data training, we get
all CDD values through the MessageBlock, then re-configure the DDRC
timing of WWT/WRT/RRT/RWT with comparing MAX CDD values.
Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Fri, 28 Apr 2023 04:08:36 +0000 (12:08 +0800)]
imx9: allow to bootaux Mcore with input address
Currently bootaux only supports to boot M33 core from TCM. Since ATF
has changed to use x2 parameter for M33 image address, update the
bootaux command to use input address, so we can support boot from
any possilbe address like TCM, DDR, Flexspi NOR.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 28 Apr 2023 04:08:35 +0000 (12:08 +0800)]
imx9: imx93_evk: add low drive mode support on 11x11 EVK
Add a static u-boot config for i.MX93 low drive mode support. When
low drive mode is enabled, VDD_SOC is set to 0.75V. Bus clocks,
A55 core clock (900Mhz), DDR clock (1866MTS), and some peripherals
clocks (USDHC/FLEXSPI/PDM/DISP_PIX/CAM_PIX) must decrease to meet
max frequencies in low drive mode.
Also set standby voltage for buck1
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 28 Apr 2023 04:08:32 +0000 (12:08 +0800)]
imx9: add i.MX93 variants support
According to datasheet, iMX93 has fused parts with CORE1 or NPU or
both disabled. So update code to support it, the kernel device tree
runtime update will be added in future patches.
Peng Fan [Fri, 28 Apr 2023 04:08:31 +0000 (12:08 +0800)]
imx9: clock: config arm alt root to 500mhz
Config the A55 alt root clock to 500MHz(LD mode frequency)
by default. Normally, this clock root is only used as an
intermediate clock soure for A55 core/dsu when change the
ARM PLL frequency.
Peng Fan [Fri, 28 Apr 2023 04:08:20 +0000 (12:08 +0800)]
imx9: cut off OPTEE memory region from U-Boot
OPTEE memory region is set secure access only in ATF with configuration
to TRDC, and need to remove it from U-Boot, otherwise U-Boot and Kernel
may crash when accessing the memory
Peng Fan [Fri, 28 Apr 2023 04:08:09 +0000 (12:08 +0800)]
imx: move imx8 sci header file to include/firmware/imx
Move imx8 sci header file to include/firmware/imx, then we could
use build macro to reuse some i.MX8 drivers for i.MX9, such as
drivers/cpu/imx8_cpu.c.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Stefano Babic <sbabic@denx.de>
Ye Li [Fri, 28 Apr 2023 04:08:07 +0000 (12:08 +0800)]
thermal: imx_tmu: Update TMU driver to support iMX93
The TMU used on iMX93 is IP revision 2.1 which is different with previous
revision used on iMX8MQ. So add a new FLAG V4 for this revision to
distinguish the operations.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
CPU: Freescale i.MX7D rev1.0 1000 MHz (running at 792 MHz)
CPU: Commercial temperature grade (0C to 95C) at 35C
Reset cause: POR
Model: Freescale i.MX7 SabreSD Board
Board: i.MX7D SABRESD in non-secure mode
DRAM: 1 GiB
Core: 100 devices, 19 uclasses, devicetree: separate
PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x10
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... Card did not respond to voltage
select! : -110
*** Warning - No block device, using default environment
The reason of the problem, as explained by Ye Li:
"When UHS is enabled in defconfig, the usdhc1 node in imx7d-sdb.dts does
not configure pad for VSELECT, also the data pad should be set to
100Mhz/200Mhz pin states."
Apply these changes into u-boot.dtsi for now. When these changes
reach the Linux mainline imx7d-sdb, they can be dropped from u-boot.dtsi.
This fixes UHS mode on the imx7d-sdb board.
Suggested-by: Ye Li <ye.li@nxp.com> Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Marek Vasut [Tue, 4 Apr 2023 19:25:10 +0000 (21:25 +0200)]
thermal: imx_tmu: Move architecture code into driver
Stop polluting the architecture directory with driver specific code,
move it into driver where it should be. Split the code slightly so
the MX8MM/MX8MN fuse readout and programming and MX8MP fuse readout
and programming are in their separate functions, and called in case
of matching SoC.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Fedor Ross [Thu, 14 Apr 2022 16:36:23 +0000 (18:36 +0200)]
ARM: imx: Fix parsing of ROM log event IDs on iMX8M
It seems like the ROM log events for the iMX8M are not fully covered by
AN12853 i.MX ROMs Log Events, Rev. 0, May 2020. On iMX8M the ROM event
ID 0x82 seems to use parameter0 which stops the parsing because the end
of list is detected too early.
This patch adds ROM event ID 0x82 and skips the next word if ID 0x82 is
parsed.
Fixes: a5ee05cf71 ("ARM: imx: Pick correct eMMC boot partition from ROM log") Signed-off-by: Fedor Ross <fedor.ross@ifm.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Fri, 19 May 2023 14:13:33 +0000 (10:13 -0400)]
Merge tag 'u-boot-rockchip-20230519' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
rk3588 driver:
- Sync the reset driver with kernel code;
- Enable pcie controller and phy support;
- Enable USB controller and phy support;
Board level dts and config update:
- boost eMMC performance for some of rk3399 boards;
- boot from SPI NOR flash for rk356x boards;
- Other board level updates;
Jonas Karlman [Thu, 18 May 2023 15:39:30 +0000 (15:39 +0000)]
rockchip: rk3588-rock-5b: Enable boot from SPI NOR flash
Add sfc and flash node to device tree and config options to enable
support for booting from SPI NOR flash on Radxa ROCK 5 Model B.
Similar to RK3568 the BootRom in RK3588 can read all data and look for
idbloader at 0x8000, same as on SD and eMMC.
Use the rksd format and modify the mkimage offset to generate a bootable
u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash. The
FIT image is loaded from 0x60000.
=> sf probe
SF: Detected mx25u12835f with page size 256 Bytes, erase size 4 KiB, total 16 MiB
=> load mmc 1:1 10000000 u-boot-rockchip-spi.bin 1492992 bytes read in 129 ms (11 MiB/s)
The BROM_BOOTSOURCE_ID value read back when booting from SPI flash does
not match the expected value of 3 (SPINOR) used by other SoCs. Instead a
value of 6 is read back, add a new enum value to handle this new
bootsource id.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
Wadim Egorov [Tue, 13 Dec 2022 10:38:09 +0000 (11:38 +0100)]
configs: phycore-rk3288: Enable CONFIG_LTO
The phycore-rk3288 SPL binary is reaching the limits of 32KB very often.
Enable CONFIG_LTO to reduce the size of the SPL and make the board more
future proof for changes increasing the SPL size.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>