power: domain: ti: fix ti_pd_get() to return after verifying transition
The helper function "ti_pd_get()" is responsible for powering on a
domain if it is powered off. In the current implementation, if a power
domain is determined to be powered off - no prior users and the PDCTL
register indicates that the user desired state is OFF, then powering on
the domain constitutes setting 'PDCTL_STATE_ON' field of the PDCTL
register.
While the current implementation indeed requests the power domain to be
transition to the ON state, the helper function "ti_pd_get()" doesn't
verify that the power domain has 'transitioned' to the ON state before
returning to its caller. As a result, it is possible that the device(s)
belonging to the power domain may be accessed before it is truly powered
on, leading to a bus abort.
Fix this by waiting for the power domain to transition to the ON state
by using "ti_pd_wait()" before returning from "ti_pd_get()".
Fixes: 144464bd2c67 ("power: domain: Introduce driver for raw TI K3 PDs") Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Tested-by: Hrushikesh Salunke <h-salunke@ti.com>
Tom Rini [Wed, 26 Nov 2025 16:30:24 +0000 (10:30 -0600)]
CI: Update to latest container
- Move to jammy-20251013 tag
- Bring in tkinter so that FATtools should run and more tests should be
run.
- Update to QEMU 10.0.6
- Pick tags for (most of) trace-cmd
Tom Rini [Wed, 26 Nov 2025 16:21:54 +0000 (10:21 -0600)]
Dockerfile: Update building trace tools slightly
We have not been picking a tag for the trace-cmd build process.
Currently the tip of libtraceevent fails to build. Address both problems
here by picking recent stable tags for libtraceevent and libtracefs
(trace-cmd has no recent tags). Further, as it is often reported that
this fails to build due to a race, stop using "make -j$(nproc)" as this
is also small enough of a set of builds to not be an issue.
Tom Rini [Thu, 13 Nov 2025 22:09:56 +0000 (16:09 -0600)]
Dockerfile: Include python3-tk for FATtools
In some cases our tests for exFAT don't run because we fail to be able
to create the underlying image. This is in turn because while creation
of the image succeeds, it seems that some way of how we invoke FATtools
wants to import tkinter, that fails and so the test stops there. Having
tkinter available (and then presumably a fallback to non-GUI because
it's not available) leads to the tests running as expected.
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 19 Nov 2025 14:32:58 +0000 (08:32 -0600)]
Docker: Update QEMU to 10.0.6
The QEMU project has the 10.0.x series as an LTS release. While we are
not doing an LTS ourselves, we can be confident in the changes between
10.0.2 and 10.0.6, so update ourselves.
Tom Rini [Wed, 19 Nov 2025 14:55:35 +0000 (08:55 -0600)]
s5p4418_nanopi2: Stop disabling device tree relocation
Remove setting of fdt_high to ~0, which disables device tree relocation,
from the default environment. Doing so prevents U-Boot from correcting
problems such as having an unaligned device tree and leads to various
failure modes in the OS.
Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Tue, 18 Nov 2025 23:21:19 +0000 (17:21 -0600)]
board: samsung: e850-96: Enter DFU automatically on USB boot
Doing USB boot on E850-96 is most useful in two cases:
1. For unbricking the board
2. During the bootloader development
In both cases a U-Boot binary is being re-flashed to eMMC. The most
convenient way to update U-Boot in eMMC is by using DFU. Implement
entering DFU flashing mode automatically when U-Boot is executed on USB
boot. That makes it easier for users to re-flash U-Boot without even
having serial console running, e.g.:
$ ./smdk-usbdl
$ dfu-util -D u-boot.bin -a bootloader
See [1,2] for details.
Entering DFU mode is implemented by setting corresponding environment
variables:
bootcmd="dfu 0 mmc 0"
bootdelay=0
Do not save the U-Boot environment though, to avoid falling through to
DFU mode on a regular eMMC boot.
Sam Protsenko [Tue, 18 Nov 2025 23:21:18 +0000 (17:21 -0600)]
board: samsung: e850-96: Load firmwares over USB on USB boot
During USB boot it's expected that the bootloader (U-Boot) should
download LDFW and TZSW firmware binaries over USB, using corresponding
SMC call. Once it's done, the Boot ROM code can release the USB block,
so that it can be used in U-Boot (e.g. for flashing images to eMMC using
DFU or fastboot). Otherwise USB wouldn't be accessible in U-Boot, and
any attempt to access USB PHY or DWC3 registers will lead to abort.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Tue, 18 Nov 2025 23:21:17 +0000 (17:21 -0600)]
board: samsung: e850-96: Add routine for loading images over USB
During USB boot U-Boot is supposed to download some firmware over USB.
It's done by EL3 software, so it has to be requested via corresponding
SMC call. Implement a routine for doing that.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Tue, 18 Nov 2025 23:21:16 +0000 (17:21 -0600)]
board: samsung: e850-96: Split LDFW loading and init
The LDFW firmware loading is done in two steps:
1. Read the firmware binary from some block device
2. Provide it to EL3 monitor software via an SMC call, so it can copy
it to a Secure World memory and start using it
Let's split the load_ldfw() function by two functions correspondingly,
to reflect that process better:
- load_ldfw_from_blk()
- init_ldfw()
It can be useful in case when the LDFW binary should be obtained from
some different media, e.g. downloaded over USB during USB boot.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Tue, 18 Nov 2025 23:21:15 +0000 (17:21 -0600)]
board: samsung: e850-96: Add routines for checking boot dev
Implement functionality to check the current boot device (a device where
the SoC ROM code is loading the bootloaders from). The boot device order
can be changed using the SW1 DIP switch on the E850-96 board (which
controls XOM SoC lines), as stated in [1].
The boot device information is requested from EL3 software using the
corresponding SMC call, which in turn reads it from iRAM memory, which
was written by the ROM code. New routines decode that data and allow the
user to check the current boot device, boot order, etc. That API can be
used further to implement different code flows depending on the current
boot device, e.g.:
- on eMMC boot: obtain the firmware binaries from eMMC
- on USB boot: download the firmware over USB instead
No functional change; this patch only adds new functionality but it's
not used yet.
[1] doc/board/samsung/e850-96.rst
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Alice Guo [Thu, 20 Nov 2025 11:22:59 +0000 (19:22 +0800)]
arm: dts: imx8ulp: Ensure mu@27020000 and lpuart5 availability during all boot phases
mu@27020000 is required for communication with ELE firmware, and
lpuart5 is the standard output device. Both peripherals must be
available before U-Boot relocation. Use bootph-all instead of
bootph-pre-ram so these nodes are retained across all boot phases.
configs: colibri-imx7*: set 'fdtfile' generically in PREBOOT
In TEZI (Toradex Easy Installer), we use one U-Boot binary for both our
NAND and eMMC Colibri iMX7 modules. Currently, CONFIG_PREBOOT sets the
environment variable 'fdtfile' depending on which defconfig was used,
adding the '-emmc' variant for the emmc defconfig. Since we always build
the TEZI recovery U-Boot with the standard (non-emmc) defconfig, fdtfile
has to be overwritten later or it will be wrong there.
By using '$variant', the fdtfile var is properly constructed at run time
for both the NAND and eMMC variants, and we do not have to worry about
setting fdtfile again when building the recovery TEZI U-Boot.
This also synchronizes these configs with how we handle the iMX6ULL.
Fixes: 327381e8b57c ("colibri_imx7: use preboot for fdtfile evaluation") Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
gpio: s5p: increment bank base address only if bank is initialized
There is a condition guard which ensures that the GPIO node, indeed
describes a GPIO controller.
if (!fdtdec_get_bool(blob, node, "gpio-controller"))
continue;
Since the bank base is being incremented in the loop, it is done so
irrespective of whether the node is a GPIO controller or not. This leads
to the incorrect resolution of bank base addresses.
Move it out of the loop, and instead increment the bank base address
only if the driver successfully binds a GPIO controller.
Reviewed-by: Henrik Grimler <henrik@grimler.se> Fixes: b8809e60cdb5 ("dm: exynos: gpio: Convert to driver model") Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Sat, 27 Sep 2025 11:30:15 +0000 (05:30 -0600)]
rpi: Use the U-Boot control FDT for fdt_addr
The fdt_addr variable is used in extlinux as a fallback devicetree if
none is provided by the boot command. Otherwise the only use in U-Boot
seems to me efi_install_fdt() when the internal FDT is required.
The existing mechanism uses the devicetree provided to U-Boot, but in
its original, unrelocated position. In my testing on an rpi_4, this ends
up at 2b35ef00 which is not a convenient place in memory, if the ramdisk
is large.
U-Boot already deals with this sort of problem by relocating the FDT
to a safe address.
So use the control-FDT address instead.
Remove the existing comment, which is confusing, since the FDT is not
actually passed unmodified to the kernel: U-Boot adds various things
using its FDT-fixup mechanism.
Note that board_get_usable_ram_top() reduces the RAM top for boards with
less RAM. This behaviour is left unchanged as there is no other
mechanism for U-Boot to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> Tested-by: Christopher Obbard <christopher.obbard@linaro.org> # CM4 1G
Cibil Pankiras [Thu, 13 Nov 2025 23:45:32 +0000 (00:45 +0100)]
pinctrl: bcm283x: Add GPIO pull-up/down control for BCM2835 and BCM2711
This patch adds support for configuring GPIO pull-up and pull-down
resistors in the BCM283x pinctrl driver. It implements the brcm,pull
device tree property to control pin bias settings.
The implementation follows the hardware-specific pull control
mechanisms:
- BCM2835: two-step GPPUD register sequence
- BCM2711: direct per-pin control registers
This enables device tree configurations to specify pull-up, pull-down,
or no bias for individual GPIO pins.
Tested on Raspberry Pi boards with both BCM2835 and BCM2711 SoCs.
Ilias Apalodimas [Sat, 15 Nov 2025 07:33:29 +0000 (09:33 +0200)]
rpi: Fix compilation with larger configs
Tom reports that adding more Kconfig options fails with
board/raspberrypi/rpi/lowlevel_init.o: in function `save_boot_params':
board/raspberrypi/rpi/lowlevel_init.S:20:(.text+0x0):
relocation truncated to fit: R_AARCH64_ADR_PREL_LO21
against symbol `fw_dtb_pointer' defined in .data section
in board/raspberrypi/rpi/rpi.o
make: *** [Makefile:2029: u-boot] Error 1
Since fw_dtb_pointer lives in .data it might end up above the
+-1MB that adr can reach.
So switch over to adrp+add which has a +-4gb reach.
Reported-by: Tom Rini <trini@konsulko.com> Closes: https://source.denx.de/u-boot/custodians/u-boot-raspberrypi/-/issues/2 Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Jonas Karlman [Sun, 16 Nov 2025 01:45:29 +0000 (01:45 +0000)]
rockchip: rk3588: Map SCMI shared memory area as non-cacheable
The SCMI shared memory area is no longer automatically marked as
non-cacheable after the commit a5a0134570c8 ("firmware: scmi: Drop
mmu_set_region_dcache_behaviour() misuse").
This change in behavior cause Rockchip RK3588 boards to fail boot with:
SoC: RK3588
DRAM: 8 GiB
scmi-over-smccc scmi: Channel unexpectedly busy
scmi_base_drv scmi-base.0: getting protocol version failed
scmi-over-smccc scmi: failed to probe base protocol
initcall_run_r(): initcall initr_dm() failed
### ERROR ### Please RESET the board ###
Update the memory mapping on RK3588 to mark the SCMI shared memory area
as non-cacheable to fix the SCMI shared memory based transport issue
that prevented RK3588 boards from booting.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Dmitrii Merkurev [Fri, 21 Nov 2025 10:53:31 +0000 (11:53 +0100)]
fastboot: blk: introduce fastboot block flashing support
Introduce fastboot block flashing functions and helpers
to be shared with the MMC implementation.
The write logic comes from the mmc implementation, while
the partition lookup is much simpler and could be extended.
For the erase logic, allmost no block drivers exposes the
erase operation, except mmc & virtio, so in order to allow
erasiong any partition a soft-erase logic has been added
to write zero-ed buffers in a loop.
boot: pxe_utils: Fix memory allocation issues in overlay_dir handling
Fix two memory allocation bugs in label_boot_extension():
1. When label->fdtdir is not set, overlay_dir was used without any
memory allocation.
2. When label->fdtdir is set, the allocation size was incorrect,
using 'len' (just the fdtdir length) instead of 'dir_len' (which
includes the trailing slash and null terminator).
Resolve both issues by moving the memory allocation and string
formatting outside the conditional block, resulting in clearer code
flow and correct sizing in all cases.
Francois Berder [Tue, 11 Nov 2025 10:37:35 +0000 (11:37 +0100)]
upl: Fix buf array size
Size of array buf was incorrect due to sizeof returning the
size of an integer (typically 32 bits) instead of a u64 type
(64 bits). Hence, buf array was shorter than expected.
Signed-off-by: Francois Berder <fberder@outlook.fr> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: ti: am6254atl_sk: correct value of PRELOADED_BL33_BASE
* pytest: fix u-boot-test-flash typo
* samsung: Fix PXE description for the E850-96 board
* board: ti: k3: Update TI firmware repository URL to GitHub
* add missing macro descriptions to include/test/ut.h and add it to
the API documenation
* rearrange the description of DM tests and describe return values
Testing:
* Enable CI testing ACPI on qemu-riscv64_smode_acpi_defconfig
* Add qemu-riscv64_smode_defconfig to the CI tests
* Generalize tests such that they can run on RISC-V QEMU
- fdt_test_apply requires CONFIG_OF_LIBFDT_OVERLAY
- cmd/fdt: do not assume RNG device exists
- cmd/bdinfo: make no flash assumption
- cmd/bdinfo: consider arch_print_bdinfo() output
- common/print: do not use fixed buffer addresses
- cmd/fdt: do not use fixed buffer addresses
- raise CONFIG_CONSOLE_RECORD_OUT_SIZE default to 0x6000
* enable CONFIG_CONSOLE_RECORD=y on qemu-riscv64_smode_acpi
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# gpg: Signature made Fri 21 Nov 2025 03:07:23 PM CST
# gpg: using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg: aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7 6D33 C481 DBBC 2C05 1AC4
Sam Protsenko [Tue, 18 Nov 2025 21:00:55 +0000 (15:00 -0600)]
doc: samsung: Fix PXE doc for E850-96 board
As stated in PXELINUX doc [1], the PXE configuration file has to be in
the format of "01-MAC-address" for Ethernet connections:
The hardware type (using its ARP "htype" code) and address, all in
lowercase hexadecimal with dash separators. For example, for an
Ethernet (i.e. ARP hardware type "1") with address
"88:99:AA:BB:CC:DD", it would search for the filename
"01-88-99-aa-bb-cc-dd".
Indeed, PXE implementation in U-Boot looks for files like that, as can
be seen from this call chain:
Mention the fact that PXE expects the configuration file to be prepended
with "01" in the PXE section of E850-96 documentation. While at it, fix
some other minor issues in PXE section.
doc: board: ti: k3: Update TI firmware repository URL to GitHub
Update the TI firmware repository URL from git.ti.com to the
GitHub mirror at github.com/TexasInstruments/ti-linux-firmware
which is much more reliable.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reported-by: Tom Rini <trini@konsulko.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
QEMU comes with its own OpenSBI. For running RISC-V virtual machine
using one of qemu-riscv64_smode_defconfig or
qemu-riscv64_smode_acpi_defconfig is the natural choice.
Add the riscv64 smode configurations to the test scope.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
configs: CONFIG_CONSOLE_RECORD=y on qemu-riscv64_smode_acpi
For testing ACPI on QEMU we need a defconfig that supports acpi command
test.
Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
On x86 commit 9b35dbc93fd4 ("x86: Show the timestamp counter with bdinfo")
has added another bdinfo output line.
On RISC-V commit 66b5ee9c558e ("riscv: add RISC-V fields to bdinfo
command") implemented arch_print_bdinfo().
Update the bdinfo test accordingly.
Fixes: 9b35dbc93fd4 ("x86: Show the timestamp counter with bdinfo") Fixes: 66b5ee9c558e ("riscv: add RISC-V fields to bdinfo command") Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
In fdt_test_chosen() currently we test if DM_RNG is configured.
CONFIG_DM_RNG=y does not imply that a RNG device actually exists.
For instance QEMU may be called with -device virtio-rng-device or not.
The current test framework evicts the virtio RNG device even if QEMU is
called with -device virtio-rng-device.
In the fdt_test_chosen() check if a RNG device exists.
Ignore 'No RNG device' messages.
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Neil Armstrong [Thu, 20 Nov 2025 08:12:55 +0000 (09:12 +0100)]
interconnect: add support for the Qualcomm RPMh helpers
The Qualcomm SoCs votes for common resources via the RPMh subsystem.
Implement the necessary helpers for Interconnect providers to add the
nodes and vote via the RPPh "BCM" voters, which are vote endpoints for
each SoC subsystems. The APPS (ARM subsystem) has a dedicated endpoint.
The BCM voter will aggregate all the bandwidth for all the nodes
associated with a BCM voter, and internally the RPMh with also
aggregate all the votes from all the SoC subsystems for the same
BCM voter.
Neil Armstrong [Thu, 20 Nov 2025 08:12:52 +0000 (09:12 +0100)]
Introduce the Generic System Interconnect Subsystem
Let's introduce the Generic System Interconnect subsystem based on
the counterpart Linux framework which is used to vote for bandwidth
across multiple SoC busses.
Documentation for the Linux Generic System Interconnect Subsystem can
be found at [1].
Each bus endpoints are materialised as "nodes" which are linked together,
and the DT will specify a pair of nodes to enable and set a bandwidth
on the route between those endpoints.
The hardware resources that provide those nodes and provides the way
to vote for the bandwidth are called "providers".
The Interconnect uclass code is heavily based on the Linux one, with
some small differences:
- nodes are allocated as udevices instead of Linux idr_alloc()
- tag management is minimal, only normal xlate is supported
- getting nodes states at probe is not implemented
- providers are probed on demand while the nodes links are traversed
- nodes are populated on bind
- id management is simplified, static IDs and dynamics IDs can be used
- identical consume API as Linux, only implementation differs
This pull request enhances NAND and SPI flash support, primarily
focusing on the Airoha EN7523 platform. The Airoha SPI driver receives
a major update, adding DMA, dual/quad-wire modes, and a critical
workaround to prevent flash damage if the UART_TXD pin shorts to Ground.
New chips supported include FudanMicro FM25S01A SPI-NAND and several
Winbond SPI NOR devices. Fixes include correcting Kconfig dependencies,
updating the mtd benchmark command to use lldiv(), and addressing minor
bugs in the generic spi-mem and SPL NAND code.
Fix compiler warnings about casting integers to pointers of different
sizes by using uintptr_t as intermediate type. This ensures proper
type conversion across 32-bit and 64-bit architectures.
Wolfgang Wallner [Wed, 29 Oct 2025 09:22:47 +0000 (10:22 +0100)]
arm: dts: brcp1: Move SPL partition to offset 0x8000 in SPI flash
The ROM code of Xilinx Zynq searches the boot flash for a "BootROM header"
at increments of 32k (0x8000), beginning with 0x0000 for a
configuration without authentication and beginning with 0x8000
for a configuration with authentication. [1]
Move the offset of the SPL partition on the brcp1 board to 0x8000
so that both cases are the same, e.g. a board that is configured
without authentication can boot an SPL partition with or without
authentication.
Quentin Schulz [Tue, 11 Nov 2025 11:52:34 +0000 (12:52 +0100)]
lib: optee: forbid OP-TEE OS loading without adding OP-TEE OS reserved-memory nodes
I've spent time trying to figure out why my board (Rockchip PX30-based)
suddenly boot loops when running a specific program in Linux userspace
after working on a U-Boot upgrade. I actually inadvertently had the TEE
environment variable set for a device which doesn't actually need to run
any TEE OS (so had OPTEE_LIB disabled).
It is currently possible to build an image with an OP-TEE OS (via the
TEE environment variable) without OPTEE_LIB. U-Boot will happily load
the TEE OS and the next OS (e.g. the Linux kernel).
This is an issue because on FDT-enabled devices, OP-TEE OS adds nodes to
the reserved-memory FDT node for the memory regions it just reserved for
itself. This updated FDT is then passed to U-Boot proper which should
know better not to use memory from there. The actual issue is that
without OPTEE_LIB and OF_LIBFDT enabled, U-Boot proper will not copy
those nodes over to the next OS's FDT before starting it. This results
in the next OS's (e.g. Linux kernel) to not be aware of reserved memory,
incurring random crashes or device reboots when it tries to access
secure reserved memory area.
On Rockchip, the U-Boot FIT image which contains both the TEE OS and
U-Boot proper is generated by binman. Unfortunately, binman doesn't seem
to have access to Kconfig symbols (grep CONFIG_ doesn't return anything
meaningful and binman is either configured through FDT nodes or via CLI
arguments, c.f. cmd_binman in the root Makefile) so we cannot try to be
smart and guide the user to the correct Kconfig option to select if TEE
is set. We could add a property based on the presence of OPTEE_LIB in
rockchip-u-boot.dtsi for example and have a custom message based on
that, the issue is that I assume all FDT-based platforms do actually
need to do this dance, and not only Rockchip.
Another option could be to add a CLI argument to binman through which
we would pass the state of OPTEE_LIB and error out the build in that
case, but that feels like opening the door to other various dirty hacks.
Another option is to propagate the TEE environment variable to the
preprocessor of the FDT (via dtc_cpp_flags) and then we can do
#if defined(TEE) && !IS_ENABLED(CONFIG_OPTEE_LIB)
#error "CONFIG_OPTEE_LIB must be enabled!"
#endif
but we have the same issue as above, it is then Rockchip-specific and
doesn't feel right to me.
Yet another option is to remove the @tee-SEQ node from the binman FIT
description when OPTEE_LIB isn't set but then we would lose the
following nice message when no TEE is provided:
Image 'simple-bin' is missing optional external blobs but is still functional: tee-os
and even worse, build without any TEE OS even though we could provide
one via the TEE environment variable.
Finally, another option could be to move this hack under
arch/arm/mach-rockchip/Kconfig to make it Rockchip-specific or add a
depends on ARCH_ROCKCHIP. However OP-TEE OS on Aarch32 Rockchip boards
doesn't actually need any of that if SPL_OPTEE_IMAGE is set because
arch/arm/mach-rockchip/sdram.c then marks some hardcoded memory regions
in RAM as holes in DRAM, which has the same effect as reserved memory
regions I guess. I assume other platforms may use something different,
so it may be casting too wide of a net.
This commit is what I could come up with as a stopgap measure to avoid
building images that simply cannot reliably work and fail randomly.
Tom Rini [Thu, 6 Nov 2025 23:28:38 +0000 (17:28 -0600)]
smbios: Fix warning when building with clang
When building with clang, we see warnings such as:
error: field max_size within 'struct smbios_type7' is less aligned than
'union cache_size_word' and is usually due to 'struct smbios_type7'
being packed, which can lead to unaligned accesses
[-Werror,-Wunaligned-access]
when building drivers/sysinfo/smbios.c. Resolve this error by packing
the unions as well after verifying they are complete (16 or 32 bits).
Reviewed-by: Raymond Mao <raymondmaoca@gmail.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 18 Nov 2025 21:53:18 +0000 (15:53 -0600)]
Merge patch series "Fixes for Clang builds for AArch64, improve CROSS_COMPILE handling"
Dmitrii Sharshakov <d3dx12.xx@gmail.com> says:
Initially fix the inconsistency reported in reply to the previous
series and also make sure AArch64 images can be built with latest
Clang versions by guarding AArch32-specific options behind extra
config checks.
Tested qemu_arm_defconfig and qemu_arm64_defconfig with Clang 21,
mainline (to be 22) ce7f9f9c and also Clang 18 (for AArch64 only, as I
have not managed to build an AArch32 image with clang-18).
build: fix prefix for Clang when CROSS_COMPILE is an absolute path
Clang cross-compilation worked when cross binutils were available
in PATH. However, when binutils are not in the PATH clang failed to
discover the assembler, falling back to host one.
Make --prefix always absolute, Clang supports this and will search for
e.g. $(prefix)-as for assembler. This makes sure user does not have to
add cross binutils to PATH for Clang build.
Fixes build for these examples (with qemu_arm(64)_defconfig):
make CC=clang-21 CROSS_COMPILE=/.../bin/arm-none-eabi-
make CC=clang-20 CROSS_COMPILE=/.../bin/aarch64-linux-gnu-
Also validated for the case when provided with cross toolchain on PATH:
PATH=/.../bin:$PATH make CC=clang-21 CROSS_COMPILE=arm-none-eabi- -j20
This patch does not affect GCC builds, and they have _not_ been
validated against regressions.
Reported-by: Tom Rini <trini@konsulko.com> Closes: https://lore.kernel.org/u-boot/20251106221355.GZ6688@bill-the-cat/ Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
spi: airoha: en7523: workaround flash damaging if UART_TXD was short to GND
We found that some serial console may pull TX line to GROUND during board
boot time. Airoha uses TX line as one of it's BOOT pins. This will lead
to booting in RESERVED boot mode.
It was found that some flashes operates incorrectly in RESERVED mode.
Micron and Skyhigh flashes are definitely affected by the issue,
Winbond flashes are NOT affected.
Details:
--------
DMA reading of odd pages on affected flashes operates incorrectly. Page
reading offset (start of the page) on hardware level is replaced by 0x10.
Thus results in incorrect data reading. Usage of UBI make things even
worse. Any attempt to access UBI leads to ubi damaging. As result OS loading
becomes impossible.
Non-DMA reading is OK.
This patch detects booting in reserved mode, turn off DMA and print big
fat warning.
spi: airoha: avoid usage of flash specific parameters
The spinand driver do 3 type of dirmap requests:
* read/write whole flash page without oob
(offs = 0, len = page_size)
* read/write whole flash page including oob
(offs = 0, len = page_size + oob_size)
* read/write oob area only
(offs = page_size, len = oob_size)
The trick is:
* read/write a single "sector"
* set a custom sector size equal to offs + len. It's a bit safer to
round up "sector size" value 64.
* set the transfer length equal to custom sector size
And it works!
Thus we can find all data directly from dirmap request, so flash specific
parameters is not needed anymore. Also
* airoha_snand_nfi_config(),
* airoha_snand_nfi_setup()
functions becomes unnecessary.
spi: airoha: set custom sector size equal to flash page size
Set custom sector size equal to flash page size including oob. Thus we
will always read a single sector. The maximum custom sector size is
8187, so all possible flash sector sizes are supported.
This patch is a necessary step to avoid usage of flash specific
parameters.
spi: airoha: buffer must be 0xff-ed before writing
During writing, the entire flash page (including OOB) will be updated
with the values from the temporary buffer, so we need to fill the
untouched areas of the buffer with 0xff value to prevent accidental
data overwriting.
spi: airoha: support of dualio/quadio flash reading commands
Airoha snfi spi controller supports acceleration of DUAL/QUAD
operations, but does not supports DUAL_IO/QUAD_IO operations.
Luckily DUAL/QUAD operations do the same as DUAL_IO/QUAD_IO ones,
so we can issue corresponding DUAL/QUAD operation instead of
DUAL_IO/QUAD_IO one.
spi: airoha: return an error for continuous mode dirmap creation cases
This driver can accelerate single page operations only, thus
continuous reading mode should not be used.
Continuous reading will use sizes up to the size of one erase block.
This size is much larger than the size of single flash page. Use this
difference to identify continuous reading and return an error.
spi: airoha: add support of dual/quad wires spi modes to exec_op() handler
Booting without this patch and disabled dirmap support results in
[ 2.980719] spi-nand spi0.0: Micron SPI NAND was found.
[ 2.986040] spi-nand spi0.0: 256 MiB, block size: 128 KiB, page size: 2048, OOB size: 128
[ 2.994709] 2 fixed-partitions partitions found on MTD device spi0.0
[ 3.001075] Creating 2 MTD partitions on "spi0.0":
[ 3.005862] 0x000000000000-0x000000020000 : "bl2"
[ 3.011272] 0x000000020000-0x000010000000 : "ubi"
...
[ 6.195594] ubi0: attaching mtd1
[ 13.338398] ubi0: scanning is finished
[ 13.342188] ubi0 error: ubi_read_volume_table: the layout volume was not found
[ 13.349784] ubi0 error: ubi_attach_mtd_dev: failed to attach mtd1, error -22
[ 13.356897] UBI error: cannot attach mtd1
If dirmap is disabled or not supported in the spi driver, the dirmap requests
will be executed via exec_op() handler. Thus, if the hardware supports
dual/quad spi modes, then corresponding requests will be sent to exec_op()
handler. Current driver does not support such requests, so error is arrised.
As result the flash can't be read/write.
This patch adds support of dual and quad wires spi modes to exec_op() handler.
This operation is not needed because airoha_snand_write_data() and
airoha_snand_read_data() will properly handle data transfers above
SPI_MAX_TRANSFER_SIZE.
A quick analysis shows that the only caller of the suspicious code is the
spinand_select_op_variant() function from the drivers/mtd/nand/spi/core.c
file.
According to the code the value of op->data.nbytes is equal to
Therefore it's maximum value a bit larger than 4Kb (I never seen flashes
with page size large than 4Kb). So op->data.nbytes always fits within
13 bits. As result an overflow will never happen.
Anyway it's better fix an issue to eliminate the error message.