- Add support for Samsung Exynos 7870 DW-MMC device
- Add support for Samsung S2MPU05 PMIC device
- Add compatible string for Exynos5250 in Exynos DW-MMC driver
- Add support for handling UHS-I voltage signaling without power-cycle
- Minor misc cleanup
Peng Fan [Thu, 23 Oct 2025 13:11:04 +0000 (21:11 +0800)]
mmc: exynos_dw_mmc: guard execute_tuning
Guard execute_tuning with MMC_SUPPORTS_TUNING, otherwise there will be
build failure:
drivers/mmc/exynos_dw_mmc.c:484:10: error: 'struct dm_mmc_ops' has no member
named 'execute_tuning'
.execute_tuning = exynos_dwmmc_execute_tuning,
^~~~~~~~~~~~~~
Tanmay Kathpalia [Tue, 21 Oct 2025 20:54:10 +0000 (13:54 -0700)]
sdhci: Reorder interrupt flags in SDHCI_INT_DATA_MASK definition
Reorder the SDHCI_INT_SPACE_AVAIL and SDHCI_INT_DATA_AVAIL flags in the
SDHCI_INT_DATA_MASK definition to match the bit order as defined in the
SDHCI specification and maintain consistency with the register layout.
The functional behavior remains unchanged as this only affects the
order of OR operations in the mask definition.
Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tanmay Kathpalia [Tue, 21 Oct 2025 20:45:26 +0000 (13:45 -0700)]
mmc: sd: Handle UHS-I voltage signaling without power cycle
Some boards have SD card connectors where the power rail cannot be switched
off by the driver. However there are various circumstances when a card
might be re-initialized, such as after system resume, warm re-boot, or
error handling. However, a UHS card will continue to use 1.8V signaling
unless it is power cycled.
If the card has not been power cycled, it may still be using 1.8V
signaling. According to the SD spec., the Bus Speed Mode (function group 1)
bits 2 to 4 are zero if the card is initialized at 3.3V signal level. Thus
they can be used to determine if the card has already switched to 1.8V
signaling. Detect that situation and try to initialize a UHS-I (1.8V)
transfer mode.
Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
power: pmic: s2mps11: add support for Samsung S2MPU05 PMIC
Samsung S2MPU05 PMIC is used in devices with the Exynos7870 SoC, it
houses voltage regulators and an RTC module. Add support for this device
variant in the driver, which also binds the corresponding voltage
regulator driver.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
The functions s2mps11_{buck,ldo}_mode use the s2mps11_{buck,ldo}_modes
arrays directly in order to extract the mode of a certain register.
This approach does not allow similar devices of other variants (which
may support a different set of modes) to work with the same driver.
Instead of using these arrays hardcoded, extract them from the device's
uclass platform data. Now the responsibility of setting these arrays
properly is done by functions s2mps11_{buck,ldo}_probe, by implementing
a switch-case block which can support modes of multiple variants if and
when added.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
power: regulator: s2mps11: declaratively define LDOs and BUCKs
In the Linux kernel driver, all information related to LDO and BUCK
regulators are stored in descriptive arrays. This also allows multiple
variants to be supported by the same driver.
Define a struct sec_regulator_desc which holds all values required by a
regulator. Create an array of said struct containing all regulators. The
descriptors are designed to follow a style similar to what's seen in the
Linux driver, so comparing one with the other is simple.
In functions such as s2mps11_{buck,ldo}_{val,mode} these values are to
be used, make necessary modifications to pull them from the descriptors.
Since multiple variants have varying descriptors, select them from
within a switch-case block.
Functions s2mps11_{buck,ldo}_{volt2hex,hex2volt} and arrays
s2mps11_buck_{ctrl,out} are phased out as the calculations are now
hardcoded in descriptors, thusly, it reduces clutter and enhances
readability.
Two macros in s2mps11.h, S2MPS11_LDO_NUM and S2MPS11_BUCK_NUM are
removed as they are no longer being used.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
power: pmic: s2mps11: add support for allowing multiple device variants
There are multiple PMICs by Samsung which are similar in architecture
(register layout, interface, etc.) and is possible to be driven by a
single driver. Variant specific code and data should be managed properly
in the driver.
And an enum which describes all supported variants. Pass the enum as the
device driver data. Introduce a switch-case block on the enum for any
variant specific code.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
power: pmic: s2mps11: change the probe function to bind
The probe function, s2mps11_probe() is responsible for binding its PMIC
children. The driver doesn't have any functionality directly, but has
sub-devices which are parts of the device. Therefore, this should be a
bind function. This is the case in the Samsung S5M8767 PMIC driver.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
mmc: exynos_dw_mmc: add compatible for exynos7870-dw-mshc-smu
Exynos7870 is documented in upstream dt-schema. Add it in the U-Boot
driver.
Note that here it seems that Exynos7 DW MMC is perfectly compatible with
Exynos7870 DW MMC. It's not always true, especially in SDIO cards where
data from a 64-bit FIFO is read in two 32-bit halves [1]. Since SDIO
isn't used or implemented here, it's oblivious. But upstream's schema
considers that quirk, so that compatible is followed.
SD UHS mode is already supported by the Exynos DW-MMC driver in mainline
Linux. Using that as reference, add support in the U-Boot driver.
The maximum frequency was capped to 200000000, increase it to 208000000,
which is the required frequency for UHS_SDR104, which has the highest
frequency of all UHS modes. Moreover, add UHS_CAPS to host capailities.
These changes allow both host and card to recognize support for all UHS
modes.
SDR104, SDR50, and DDR50 have their own CLKSEL timing values, which
requires the CIU div value to be set in bits 18:16. Move the function
exynos_dwmci_clksel() below exynos_dwmmc_get_ciu_div() so that the
latter is accessible from the former, and add cases for said timing
modes.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
mmc: exynos_dw_mmc: add support for MMC HS200 and HS400 modes
MMC HS200 and HS400 modes are already supported by the Exynos DW-MMC
driver in mainline Linux. Using that as reference, add support in the
U-Boot driver.
The maximum frequency was capped to 50000000, increase it to 200000000,
which is the required frequency for HS200/HS400. Moreover, add
MMC_MODE_HS200 and MMC_MODE_HS400 to host capailities. These changes
allow both host and card to recognize support for HS200/HS400.
This change also includes a new ops function, namely execute_tuning.
Implementing it would mean that we can no longer rely on the default ops
provided by dw_mmc.c, thus a new ops instance is created with proper
fields. The execute_tuning function is modeled after the one available
in the Linux driver.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
mmc: enable/disable VQMMC regulator only during MMC power cycle
Disrupting the regulator voltage during ios configuration messes with
the MMC initialization sequence. Move the VQMMC regulator enable/disable
functions to the MMC power cycle function, similar to how its done for
the VMMC regulator.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
mmc: dw_mmc: return error for invalid voltage setting
In certain cases, the VQMMC regulator may not support certain voltages.
For instance, a VQMMC regulator which supports only up to 2.7V will not
accept 3.3V as an argument. This is unaccounted for, and thus the driver
incorrectly assumes that the voltage is set successfully.
Fetch the return value in a variable and return if it's non-zero.
(-ENOSYS is exempted as it implies that the voltage adjustment
functionality as a whole isn't supported).
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
During a voltage switch command (CMD11, opcode: SD_CMD_SWITCH_UHS18V),
certain hosts tend to stop responding to subsequent commands. This is
addressed by introducing an additional command flag,
DWMCI_CMD_VOLT_SWITCH.
The associated interrupt bit is defined as DWMCI_INTMSK_VOLTSW. This is
set high when a voltage switch is issued, this needs to be waited for
and set to low. Implement the same in the timeout loop. Do note that
since DWMCI_INTMSK_VOLTSW shares the same bit as DWMCI_INTMSK_HTO (bit
10), the interrupt bit needs to be polled for only if the volt switch
command is issued.
DWMCI_CMD_VOLT_SWITCH also needs to be set for subsequent clken commands
after the volt switch. To ensure this, add a boolean member in the host
private struct (herein named volt_switching), which informs if the last
command issued was for volt switching or not.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
mmc: dw_mmc: properly address command completion in dwmci_control_clken()
The current implementation polls for the DWMCI_CMD register, for the
DWMCI_CMD_START bit to turn off, which indicates that the command has
been completed. The problem with this approach is that it doesn't
address the DWMCI_INTMSK_CDONE bit in the interrupt register,
DWMCI_RINTSTS. As a result, subsequent commands result in timeout errors.
Re-implement the waiting logic by polling for said interrupt status bit
and setting it low if raised.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
mmc: dw_mmc: do not skip dwmci_setup_bus() for same non-zero clock frequency
In dwmci_setup_bus(), if the requested frequency is equal to the current
frequency, the function is returned, assuming no changes are required in
associated registers.
On certain SD cards, skipping in such situations may result in a timeout
errors during MMC initialization. Due to the lack of documentation, the
cause is unknown, but removing said check seems to fix the issue.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
mmc: dw_mmc: export dwmci_send_cmd() and dwmci_set_ios()
These commands are required by struct dm_mmc_ops. Any platform specific
driver may use some or all of the functions in their own ops. Make them
accessible by moving the prototype to the dwmmc.h header.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Lukas Timmermann [Tue, 14 Oct 2025 11:40:32 +0000 (13:40 +0200)]
mmc: exynos_dw_mmc: Add compatible string for Exynos5250
This driver got successfully tested with an upstream device tree
and an Exynos5250. The board in question is samsung-manta
(Google Nexus 10) which we are getting ready for upstream.
For the u-boot port was just this additional compatible string needed.
Signed-off-by: Lukas Timmermann <uboot@timmermann.space> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
- riscv: dts: starfive: cherry-pick jh7110 updates from v6.18-rc1-dts
- riscv: Add upstream boards Milk-V Mars CM and Mars CM Lite
- timer: sifive_clint: Add GHRTv2 compaible string
Stephan Gerhold [Mon, 8 Sep 2025 11:31:26 +0000 (13:31 +0200)]
serial: msm: Use single character mode
The UART DM controller supports different channel data packing modes,
either the 4-character packing mode (where 32-bit are read/written at once)
or the single-character mode (where only a single character is read/written
at a time). The 4-character mode can be more efficient, but the
single-character mode is much easier to implement.
At the moment, serial_msm uses the 4-character mode. Since the
dm_serial_ops operate on one character at the time, the code goes through
quite some hoops in order to break this down to single characters. This
code is prone to race conditions (e.g. priv->chars_cnt is read from the
registers, then a command is issued, what if another char came in
inbetween?). It also seems to cause another subtle issue with autoboot:
Unlike the previous autoboot failures that happened when UART was
disconnected, this problem occurs when UART is connected and open in a
terminal: For EFI boot, the console size is queried in efi_console.c
query_console_serial() by sending an ANSI escape code via UART. For some
reason, with the current driver we get yet another 0x00 byte (UART break
event?) when reading the reply from serial input. Because of that, reading
the console size fails in efi_console.c, the actual reply remains in the
UART buffer, and later the boot flow aborts because it detects input after
printing a prompt.
Rather than trying to fix the issue in the current complicated approach,
switch the driver to use the single-character mode. This is simple and
straightforward to implement without race conditions:
- We write one character at a time to UARTDM_TF, as long as the TX FIFO
has space available (TX_READY). To flush the console before starting
Linux, we wait for TX_EMPTY.
- We read one character at a time from UARTDM_RF and strip off the
additional error information (assuming there is something in the
RX FIFO, as indicated by RX_READY).
In this mode, querying the serial console size works and autoboot is no
longer interrupted. The overall code is also much shorter.
Stephan Gerhold [Mon, 8 Sep 2025 11:31:25 +0000 (13:31 +0200)]
serial: msm: Re-enable after resetting
The documentation for the UART controller in the APQ8016E specifies that
both RESET and ENABLE commands must be issued to set up the receiver and
transmitter, but at the moment we only issue RESET. This doesn't seem to
cause issues in practice (looks like the reset already re-enables the
receiver/transmitter), but let's add the two writes to RX_ENABLE/TX_ENABLE
to better match the recommendations in the documentation.
Stephan Gerhold [Mon, 8 Sep 2025 11:31:24 +0000 (13:31 +0200)]
serial: msm: Reset after writing to DMEN
According to the documentation of the UART controller in the APQ8016E TRM,
clearing bits inside UARTDM_DMEN requires resetting the transmitter and/or
receiver. We do reset inside uart_dm_init(), but before writing to
UARTDM_DMEN. This doesn't seem to cause problems in practice, but let's
move the reset to the end of uart_dm_init() to better match the
recommendations in the documentation.
Stephan Gerhold [Mon, 8 Sep 2025 11:31:23 +0000 (13:31 +0200)]
serial: msm: Cleanup register naming
Some of the register definitions are inconsistently named (likely copied
as-is from Qualcomm's Little Kernel/LK bootloader, which uses the
MSM_BOOT_UART naming scheme). Rename them to be in line with the other
register definitions and move them up to be next to the related register.
Stephan Gerhold [Mon, 8 Sep 2025 11:31:22 +0000 (13:31 +0200)]
Revert "serial: serial_msm: Delay initialization to let pins stabilize"
There have been issues with autoboot on DB410c for years, where autoboot
gets interrupted by spurious input on the UART console. Back in 2021, I've
tried to fix this by inserting a delay before UART initialization, but it
has turned out this is not working reliably either.
It looks like the root cause has always been the lack of bias-pull-up,
which was causing the RX line to be floating when UART is disconnected.
The delay does not seem to be needed anymore when applying bias-pull-up,
so drop it again in favor of the proper fix.
qcom_defconfig: Enable pinctrl driver for SDM630/660
Pin controller driver for SDM630/636/660 SoCs was added in b4420a0c9ed ("drivers: pinctrl: Add Qualcomm SDM630/660 TLMM driver"),
but not enabled in qcom_defconfig. Correct that omission.
regulator: qcom-rpmh-regulator: add support for pm6150l regulators
Add the pm6150l regulator data found on the Qualcomm SM6350 platform.
The tables are imported from the Linux driver. The SMPS regulators were
not added now.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
U-Boot and Linux pet the watchdog by default,
but it's helpful to also have the command to control the watchdog,
(CONFIG_CMD_WDT)
so it can be manually disabled by the user, for example, if the kernel
is expected to stall during debugging with kgdb.
serial: msm-geni: Update kconfig name for DEBUG_UART_MSM_GENI
The previous description "Qualcomm snapdragon" barely tells the user
anything, update the name so that it's clear which configs the user can
choose between, namely the older QUP driver, or the newer GENI driver.
Tom Rini [Fri, 3 Oct 2025 20:39:27 +0000 (14:39 -0600)]
phy: qcom: Rework Kconfig logic around MSM8916_USB_PHY
This PHY driver is required by USB_EHCI_MSM and not useful on its own.
Rather than have it be a prompted option, it should (and currently is)
select'd by USB_EHCI_MSM. Remove the prompt for this option and then
correct the dependency chain (it must select PHY).
Tom Rini [Fri, 11 Jul 2025 15:16:01 +0000 (09:16 -0600)]
mtd: nvmxip: Make use of LBAF for printing lbaint_t
When printing the contents of an lbaint_t variable we need to use LBAF
to print it in order to get the correct format type depending on 32 or
64bit-ness.
Tom Rini [Fri, 11 Jul 2025 15:15:57 +0000 (09:15 -0600)]
mtd: spi: sf_dataflash.c: Make use of 'z' for printing size_t
When printing the contents of an size_t variable we need to use z prefix
to the format character in order to get the correct format type
depending on 32 or 64bit-ness.
Tom Rini [Fri, 4 Jul 2025 21:45:56 +0000 (15:45 -0600)]
mtd: Correct dependency on SYS_FLASH_CHECKSUM
This feature requires that CFG_SYS_FLASH_BASE is defined and this in
turn is only done in the case of FLASH_CFI_DRIVER && !CFI_FLASH or in
other words, when DM_MTD is not enabled.
Tom Rini [Wed, 2 Jul 2025 01:06:09 +0000 (19:06 -0600)]
mtd: Add function prototype for mtd_read_oob_bf(...)
The function mtd_read_oob_bf is called by cmd/nand.c but does not have a
prototype in any header. Add this to include/linux/mtd/mtd.h as that is
the most logical place currently.
Fixes: 1fac57720719 ("nand: Add a watch command") Signed-off-by: Tom Rini <trini@konsulko.com>
Andrew Goodbody [Tue, 1 Jul 2025 16:12:44 +0000 (17:12 +0100)]
mtd: nand: Prevent dereference of NULL pointer
In nand_wait_ready there is a loop that includes a NULL check for
chip->dev_ready before it is dereferenced. Use a NULL check once the
loop is exited as well to cover the case where it exits due to a timeout
and it is therefore not known if chip->dev_ready is NULL or not.
This issue found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Andrew Goodbody [Thu, 26 Jun 2025 10:49:32 +0000 (11:49 +0100)]
cmd: mtd: Prevent use of uninitialised variable
ret maybe used uninitialised in some cases so instead
initialise it first to prevent this.
This issue was found by Smatch.
Fixes: 9671243e8d10 (cmd: mtd: Use the subcmd infrastructure to declare mtd sub-commands) Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Tom Rini [Sat, 15 Mar 2025 01:29:11 +0000 (19:29 -0600)]
ARM: renesas: Drop 'imply MULTI_DTB_FIT_USER_DEFINED_AREA' lines
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. This is why for all of the boards
which had an 'imply MULTI_DTB_FIT_USER_DEFINED_AREA' they then also had
to set the option in the defconfig. Drop the imply lines here.
Tuyen Dang [Tue, 28 Oct 2025 14:22:27 +0000 (15:22 +0100)]
ufs: Add UFS driver for Renesas R-Car X5H
Add UFS driver for UFS controller present on Renesas R-Car X5H R8A78000.
The controller uses different initialization code compared to previous
generation UFS controller present in Renesas R-Car S4 R8A779F0, and the
majority of the driver is the initialization, hence a new driver.
[Marek: Clean driver up, add SCMI reset handling, use read_poll_timeout(),
pass error values out of ufs_renesas_pre_init(), change the
compatible string to "renesas,r8a78000-ufs" to align with
previous generation "renesas,r8a779f0-ufs"]
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Tuyen Dang <tuyen.dang.xa@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20251028142335.18125-7-marek.vasut+renesas@mailbox.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Marek Vasut [Tue, 28 Oct 2025 14:22:26 +0000 (15:22 +0100)]
ufs: renesas: Update Kconfig entry help text
The current Renesas UFS driver contains initialization code
that is specific to R-Car S4 R8A779F0. The upcoming R-Car X5H
initialization code is different and contained in a separate
driver. Update the Kconfig entry help text for the current
driver to help discern it from the X5H driver. No functional
change.
Marek Vasut [Tue, 28 Oct 2025 14:22:25 +0000 (15:22 +0100)]
ufs: Call ufs_scsi_bind() from uclass .post_bind
Instead of duplicating the ufs_scsi_bind() call in every driver,
call it from UFS uclass .post_bind callback for every driver in
one place. While doing so, inline ufs_scsi_bind() directly into
ufs_post_bind() as trivial device_bind_driver() call.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Link: https://patch.msgid.link/20251028142335.18125-5-marek.vasut+renesas@mailbox.org
[narmstrong: also updated the rockchip and mediatek drivers] Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Andrew Goodbody [Mon, 6 Oct 2025 15:09:25 +0000 (16:09 +0100)]
spi: spi-uclass: Use unwind goto
In _spi_get_bus_and_cs the check for stacked parallel support needing
multiple chip select support does a direct return on error. Instead it
should set the error code in ret and then use the unwind goto.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Tue, 12 Aug 2025 16:42:59 +0000 (17:42 +0100)]
spi: fspi: Logical or used instead of logical and
In erratum_err050568 the test for apllicability uses logical or to check
multiple chip IDs but this means the test will always evaluate to true
as at least 1 term will always be true. Logical and should have been
used so that the expression evaluates to true if all terms are true
which would mean that no chip ID of interest was in use.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Tue, 12 Aug 2025 13:31:16 +0000 (14:31 +0100)]
spi: ich: Do not use uninitialised value
In ich_spi_exec_op_swseq the variable with_address is only assigned a
value in the case of op->addr.nbytes being non-zero.
Initialise with_address to zero. so that it is always valid.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Thu, 3 Jul 2025 14:40:46 +0000 (15:40 +0100)]
clk: Return value calculated by ERR_PTR
In clk_set_default_get_by_id ret is passed to ERR_PTR but nothing is
done with the value that this calculates which is obviously not the
intention of the code. This is confirmed by the code around where this
function is called.
Instead return the value from ERR_PTR.
This issue found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Tom Rini [Tue, 28 Oct 2025 15:59:55 +0000 (09:59 -0600)]
Merge patch series "clk: versaclock: Fix two issues found by Smatch"
Andrew Goodbody <andrew.goodbody@linaro.org> says:
Should return value calculated by ERR_PTR as calling code attempts to
check for it.
Also do not dereference a pointer that could be an error pointer before
checking it with IS_ERR.
Andrew Goodbody [Thu, 31 Jul 2025 11:11:47 +0000 (12:11 +0100)]
mmc: owl_mmc: Do not dereference data before NULL check
In owl_mmc_prepare_data there is a NULL check for the pointer data but
it happens after data has already been dereferenced. Refactor the code
so that the NULL check happens before any code dereferences data.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Fri, 25 Jul 2025 12:04:26 +0000 (13:04 +0100)]
gpio: intel_gpio: Initialise or0 and or1
In intel_gpio_set_flags the two variables or0 and or1 may be used
uninitialised. Correct this by setting initial values in the
declaration.
Also there is no need to use '|=' when the initial value is 0 and there
is only one assignment performed to each variable so just use '='
instead.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Marek Vasut [Tue, 28 Oct 2025 14:22:23 +0000 (15:22 +0100)]
ufs: core: Rename ufs.c to ufs-uclass.c
Previous commit folded existing ufs-uclass.c into ufs.c ,
which produced a nice and reviewable change , but also broke
the UCLASS should be in *-uclass.c pattern. Fix it. Keep the
change separate from the previous one to make this reviewable.
Andrew Goodbody [Tue, 12 Aug 2025 11:34:39 +0000 (12:34 +0100)]
spi: cadence_qspi: Do not return unset error code
In spi_calibration if the low range fails to calibrate then the code
attempted to return the variable err but this has not been set in this
case. Instead just return -EIO.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Tue, 12 Aug 2025 11:34:38 +0000 (12:34 +0100)]
spi: cadence_qspi: Off by 1 in test for timeout
In cadence_qspi_apb_exec_flash_cmd the test for a timeout uses a
post-decrement on the variable retry which will result in a value of -1
after the loop exit, or it would if the variable were signed.
To fix this make retry a signed variable and test its value for being
equal to -1.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Igor Belwon [Sat, 11 Oct 2025 19:10:06 +0000 (21:10 +0200)]
ufs: Add MediaTek UFS driver
Add the UFS driver for MediaTek platforms.
Loosely based on the Linux driver, this UFS driver can successfully get a
link and R/W access to the UFS chip on the MediaTek MT6878 mobile SoC,
when U-Boot is running as lk, or as the kernel (Secure world access is
not tested)
Jared McArthur [Fri, 10 Oct 2025 19:55:56 +0000 (14:55 -0500)]
ufs: Add bRefClkFreq attribute setting
A UFS device needs its bRefClkFreq attribute set to the correct value
before switching to high speed. If bRefClkFreq is set to the wrong
value, all transactions after the power mode change will fail.
The bRefClkFreq depends on the host controller and the device.
Query the device's current bRefClkFreq and compare with the ref_clk
specified in the device-tree. If the two differ, set the bRefClkFreq
to the device-tree's ref_clk frequency.
Taken from Linux kernel v6.17 (drivers/ufs/core/ufshcd.c and
include/ufs/ufs.h) and ported to U-Boot.
Signed-off-by: Jared McArthur <j-mcarthur@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Link: https://patch.msgid.link/20251010195556.1772611-3-j-mcarthur@ti.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
However, the U-Boot code still uses these values directly without shifting,
and resulting in wrong bitfield placement in the Transfer Request
Descriptor.
This fixes the issue by applying the necessary shift to align the value.
Fixes: d232d7fdbf6f ("ufs: core: sync ufshci.h with Linux v6.12") Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20251010024557.673787-1-hayashi.kunihiko@socionext.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Andrew Goodbody [Tue, 7 Oct 2025 11:42:12 +0000 (12:42 +0100)]
ufs: ti-j721e: Correct error detection
In ti_j721e_ufs_probe there is a call to clk_get_rate but the code after
that attempts to detect an error from that call incorrectly uses
IS_ERR_VALUE. Instead the test should just be for regular error codes.
The call returns an unsigned long so that needs to be cast to a signed type
first of all.
projects / thirdparty / u-boot.git / log
