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14 months agotest: Drop the function for running pci_mps tests
Simon Glass [Mon, 20 Jan 2025 21:25:53 +0000 (14:25 -0700)] 
test: Drop the function for running pci_mps tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running loadm tests
Simon Glass [Mon, 20 Jan 2025 21:25:52 +0000 (14:25 -0700)] 
test: Drop the function for running loadm tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running hush tests
Simon Glass [Mon, 20 Jan 2025 21:25:51 +0000 (14:25 -0700)] 
test: Drop the function for running hush tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running addrmap tests
Simon Glass [Mon, 20 Jan 2025 21:25:50 +0000 (14:25 -0700)] 
test: Drop the function for running addrmap tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running bootm tests
Simon Glass [Mon, 20 Jan 2025 21:25:49 +0000 (14:25 -0700)] 
test: Drop the function for running bootm tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running bloblist tests
Simon Glass [Mon, 20 Jan 2025 21:25:48 +0000 (14:25 -0700)] 
test: Drop the function for running bloblist tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running measurement tests
Simon Glass [Mon, 20 Jan 2025 21:25:47 +0000 (14:25 -0700)] 
test: Drop the function for running measurement tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running setexpr tests
Simon Glass [Mon, 20 Jan 2025 21:25:46 +0000 (14:25 -0700)] 
test: Drop the function for running setexpr tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running mem tests
Simon Glass [Mon, 20 Jan 2025 21:25:45 +0000 (14:25 -0700)] 
test: Drop the function for running mem tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running mbr tests
Simon Glass [Mon, 20 Jan 2025 21:25:44 +0000 (14:25 -0700)] 
test: Drop the function for running mbr tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running log tests
Simon Glass [Mon, 20 Jan 2025 21:25:43 +0000 (14:25 -0700)] 
test: Drop the function for running log tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running lib tests
Simon Glass [Mon, 20 Jan 2025 21:25:42 +0000 (14:25 -0700)] 
test: Drop the function for running lib tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running font tests
Simon Glass [Mon, 20 Jan 2025 21:25:41 +0000 (14:25 -0700)] 
test: Drop the function for running font tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running fdt tests
Simon Glass [Mon, 20 Jan 2025 21:25:40 +0000 (14:25 -0700)] 
test: Drop the function for running fdt tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running exit tests
Simon Glass [Mon, 20 Jan 2025 21:25:39 +0000 (14:25 -0700)] 
test: Drop the function for running exit tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running env tests
Simon Glass [Mon, 20 Jan 2025 21:25:38 +0000 (14:25 -0700)] 
test: Drop the function for running env tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running dm tests
Simon Glass [Mon, 20 Jan 2025 21:25:37 +0000 (14:25 -0700)] 
test: Drop the function for running dm tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running common tests
Simon Glass [Mon, 20 Jan 2025 21:25:36 +0000 (14:25 -0700)] 
test: Drop the function for running common tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running cmd tests
Simon Glass [Mon, 20 Jan 2025 21:25:35 +0000 (14:25 -0700)] 
test: Drop the function for running cmd tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the function for running bdinfo tests
Simon Glass [Mon, 20 Jan 2025 21:25:34 +0000 (14:25 -0700)] 
test: Drop the function for running bdinfo tests

Use the new suite-runner to run these tests instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Introduce a better array of test suites
Simon Glass [Mon, 20 Jan 2025 21:25:33 +0000 (14:25 -0700)] 
test: Introduce a better array of test suites

The current cmd_ut_sub[] array was fine when there were only a few test
suites. But is quite unwieldy now:

- it requires a separate do_ut_xxx for each suite, even though the code
  for most is almost identical
- running more than one suite requires running multiple commands, and
  there is no record of which suites passed or failed
- 'ut all' runs all suites but reports their results individually
- we need lots of #ifdefs in the array, mirroring those in the makefile
  but maintained in a separate place

In fact the tests are all in the same linker list. The suites are
grouped, so it is possible to access the information without a command.

Introduce a 'suite' array, which holds the cmd_ut_...() function to
call, but can also support running a suite without that function. This
means that the array of struct cmd_tbl is transformed into an array of
'struct suite'.

This will allow removal of many of the functions, particularly those
without test-specific init.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop the _test suffix on linker lists
Simon Glass [Mon, 20 Jan 2025 21:25:32 +0000 (14:25 -0700)] 
test: Drop the _test suffix on linker lists

Most test suites have a _test suffix. This is not necessary as there is
also a ut_ prefix.

Drop the suffix so that (with future work) the suite name can be used as
the linker-list name.

Remove the suffix from the pytest regex as well, moving it to the top of
the file, as it is a constant.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest/py: Add a test which runs all unit tests
Simon Glass [Mon, 20 Jan 2025 21:25:31 +0000 (14:25 -0700)] 
test/py: Add a test which runs all unit tests

Add a Python test which runs 'ut all' and then checks that the expected
suites are present and all tests in each suite are run.

This can help to check that nothing is missing.

Update 'ut info' to ignore the 'all' suite when counting the number of
suites, since that is really just a combination of all the other suites.

Adjust the message for skipped tests so that appears even if no
particular test was selected. This helps the new 'test_suite' test see
what is going on.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Update ut info to show suites
Simon Glass [Mon, 20 Jan 2025 21:25:30 +0000 (14:25 -0700)] 
test: Update ut info to show suites

It is helpful to see a list of available suites. At present this is
handled by the longhelp for the 'ut' command, but this is not in a
format which can be easily parsed by python tests.

Add a -s option to show this. At present it is not possible to show the
number of tests in each suite, but future work will address this. For
now, show a ?

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Rename test suites to match their linker-list name
Simon Glass [Mon, 20 Jan 2025 21:25:29 +0000 (14:25 -0700)] 
test: Rename test suites to match their linker-list name

Some suites have a different name from that used in the linker list.
That makes it hard to programmatically match the name printed when the
suite runs to the linker-list name it has.

Update the names so they are the same.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Add newlines to hush-test messages
Simon Glass [Mon, 20 Jan 2025 21:25:28 +0000 (14:25 -0700)] 
test: Add newlines to hush-test messages

A few messages lack a newline so the test output shows the next
test-name on the same line. For example:

   Beware: this test sets local variable dollar_bar and dollar_quux
      and they cannot be unset!Test: hush_test_env_dollar: dollar.c

This is confusing, so fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agoImprove support for linker lists in data structures
Simon Glass [Mon, 20 Jan 2025 21:25:27 +0000 (14:25 -0700)] 
Improve support for linker lists in data structures

A limitation of most linker_list macros is that they cannot easily be
used in data structures. This is because they include code inside their
expressions.

Provide a way to support this, with new ll_start_decl() and
ll_end_decl() macros.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Pass the test-state into ut_run_list()
Simon Glass [Mon, 20 Jan 2025 21:25:26 +0000 (14:25 -0700)] 
test: Pass the test-state into ut_run_list()

Pass this into the function so that callers can inspect the state
afterwards.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Add functions to init and uninit the test state
Simon Glass [Mon, 20 Jan 2025 21:25:25 +0000 (14:25 -0700)] 
test: Add functions to init and uninit the test state

Move these operations into separate functions so that it is clearer what
is needed. These functions can also be called from somewhere other than
ut_run_list().

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Rename test_get_state() to ut_get_state()
Simon Glass [Mon, 20 Jan 2025 21:25:24 +0000 (14:25 -0700)] 
test: Rename test_get_state() to ut_get_state()

Rename this function and test_set_state() so use the same ut_ prefix as
other functions in ut.h

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: Drop unused suite prototypes
Simon Glass [Mon, 20 Jan 2025 21:25:23 +0000 (14:25 -0700)] 
test: Drop unused suite prototypes

Drop some the prototypes for functions which were removed in earlier
series.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agotest: str_ut.c depends on CONFIG_STRTO
Heinrich Schuchardt [Mon, 20 Jan 2025 08:29:32 +0000 (09:29 +0100)] 
test: str_ut.c depends on CONFIG_STRTO

The string conversion functions are implemented in lib/strto.c which is
only compiled if CONFIG_STRTO=y.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
14 months agoarm64: configs: Remove obsolete TI config
Aashvij Shenai [Mon, 20 Jan 2025 08:50:42 +0000 (14:20 +0530)] 
arm64: configs: Remove obsolete TI config

This config is causing conflicts with how fdtfile variable is
initialized.
For K3 devices, CONFIG_DEFAULT_DEVICE_TREE= "ti/k3-<board>.dtb".
With CONFIG_TI_FDT_FOLDER_PATH also prefixing "ti", fdtfile is then
"ti/ti/k3-<board>.dtb". This variable is updated when fitImage is
booted and fails to boot due to the parsing error "ti/ti/".

Given that there are no other users of this config other than K3 for
now, it is being removed.

Since am64x, j721e and j721s2 also define a DEFAULT_FDT_FILE, update
them to conform to the DEFAULT_DEVICE_TREE standard.

Signed-off-by: Aashvij Shenai <a-shenai@ti.com>
14 months agotreewide: Replace Maximumm with Maximum in Kconfig symbol description
Marek Vasut [Tue, 21 Jan 2025 15:36:11 +0000 (16:36 +0100)] 
treewide: Replace Maximumm with Maximum in Kconfig symbol description

Replace Maximumm with Maximum in Kconfig symbol description, fix a typo.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Michal Simek <michal.simek@amd.com>
14 months agoMerge tag 'u-boot-dfu-20250124' of https://source.denx.de/u-boot/custodians/u-boot-dfu
Tom Rini [Fri, 24 Jan 2025 14:48:48 +0000 (08:48 -0600)] 
Merge tag 'u-boot-dfu-20250124' of https://source.denx.de/u-boot/custodians/u-boot-dfu

CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/24323

Android:
- Fix kcmdline null pointer dereference (reported by coverity and
  multiple users)
- Move Igor to reviewers instead of maintainers for avb/ab
- Fix booting Android with AVB built-in, but disabled via
  fastboot flash --disable-verity vbmeta vbmeta.img

14 months agoMerge tag 'u-boot-socfpga-next-20250124' of https://source.denx.de/u-boot/custodians...
Tom Rini [Fri, 24 Jan 2025 04:40:25 +0000 (22:40 -0600)] 
Merge tag 'u-boot-socfpga-next-20250124' of https://source.denx.de/u-boot/custodians/u-boot-socfpga

1.  Bug fixed for doorbell in secure device manager mailbox driver
2.  Enhancement on SoCFPGA dwc_eth_xgmac driver
3.  Enhancement on DW MAC driver
4.  Improved the error message and status for SoC64 device FPGA
    configuration driver
5.  Updated existing watchdog in system manager to support new SM device

14 months agofpga: intel_sdm_mb: add support for query SDM config error and status
Boon Khai Ng [Fri, 17 Jan 2025 06:33:31 +0000 (14:33 +0800)] 
fpga: intel_sdm_mb: add support for query SDM config error and status

Currently the FPGA reconfig status only return a single error status
which make the debugging of FPGA reconfiguration hard.

This patch is to expose the error status, major error code and
minor error code, for the FPGA reconfig to upper layer app.

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
14 months agonet: dwc_eth_xgmac_socfpga: Add support for distinct mac-mode and phy mode.
Boon Khai Ng [Fri, 17 Jan 2025 06:14:02 +0000 (14:14 +0800)] 
net: dwc_eth_xgmac_socfpga: Add support for distinct mac-mode and phy mode.

This patch adds support for configuring the ethernet MAC mode independently
from the PHY mode on our SoC FPGA board. Specifically, this is necessary
for a scenario where the ethernet controller MAC is connected to the
FPGA HVIO with a different GMII interface, and the FPGA output is routed
to the PHY using a RGMII interface.

To support this configuration, a mechanism is introduced to handle
separate MAC mode settings, ensuring that the MAC controller and PHY
can operate correctly with their respective interface modes.

If mac-mode is not defined, the MAC mode will default to the PHY mode,
ensuring compatibility and proper operation between the MAC and PHY.

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
14 months agonet: dwc_eth_xgmac: Add device name for the error message.
Boon Khai Ng [Fri, 17 Jan 2025 06:48:23 +0000 (14:48 +0800)] 
net: dwc_eth_xgmac: Add device name for the error message.

Agilex5 having several ethernet instance, adding the device
name at the error message to differentiate between which
instance is having issue.

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
14 months agonet: dwc_eth_xgmac_socfpga: Add support for rgmii-id mode.
Boon Khai Ng [Fri, 17 Jan 2025 06:56:25 +0000 (14:56 +0800)] 
net: dwc_eth_xgmac_socfpga: Add support for rgmii-id mode.

An issue was identified where selecting the phy-mode as
rgmii-id in the device tree source (DTS) would cause the
`dwc_eth_xgmac_socfpga` driver to raise an unsupported phy mode error.

From the MAC controller's perspective, the rgmii and rgmii-id
phy modes are effectively identical. To address this, both
modes will now be configured to rgmii in the MAC controller.

This change ensures that the rgmii-id phy mode is properly
supported without error.

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
14 months agonet: designware: socfpga: Add RGMII-ID support
Rufus Segar [Wed, 4 Dec 2024 11:21:27 +0000 (11:21 +0000)] 
net: designware: socfpga: Add RGMII-ID support

This patch adds support for the "rgmii-id", "rgmii-rxid", and
"rgmii-txid" modes for the dwmac_socfpga driver.

Signed-off-by: Rufus Segar <rhs@riseup.net>
14 months agoarch: arm: mach-socfpga: Mailbox buffer and SDM doorbell improvement
Alif Zakuan Yuslaimi [Wed, 22 Jan 2025 02:21:02 +0000 (10:21 +0800)] 
arch: arm: mach-socfpga: Mailbox buffer and SDM doorbell improvement

The current write and notify SDM to read mechanism has a flaw where
SDM is not notified enough to be able to read all the data in the buffer.

This is caused by SDM doorbell will only be sent out once the command
buffer overflow check is satisfied. If the command buffer does not reach
overflow status, no SDM doorbell will be sent out, which may cause a
timeout as the mailbox driver will be waiting for the SDM to read the
buffer to empty even though SDM is not notified to do so.

The solution is to remove the command buffer overflow check
and set the SDM doorbell to always trigger at the end of the command
buffer.

This will ensure that the SDM is able to read all of the data.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
14 months agoarm: socfpga:agilex5: Fix system manager watchdog mode setting
Muhammad Hazim Izzat Zamri [Mon, 13 Jan 2025 02:08:07 +0000 (10:08 +0800)] 
arm: socfpga:agilex5: Fix system manager watchdog mode setting

This commit is to fix the system manager watchdog mode setting to support
until mode_4 for Agilex5. This changes can refer to system manager register
map on wddbg fields.

In Agilex7 it is not detected as an issue because Agilex7 only have 4 watchdog
until mode_3 and it is already been set correctly for it to halt on any CPU in
debug mode. However, in Agilex5 this fix is needed in order to enable the watchdog
pause feature for mode_4 when entering debug mode. If 0xF is not been set on mode_4,
the Watchdog Timers will not halt on any CPU. As by default value, the pause signal
does not assert when any CPU is in debug mode and the watchdog continue to count.

Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
14 months agoMerge patch series "MediaTek ethernet driver refactor and updates"
Tom Rini [Fri, 24 Jan 2025 00:50:23 +0000 (18:50 -0600)] 
Merge patch series "MediaTek ethernet driver refactor and updates"

Weijie Gao <weijie.gao@mediatek.com> says:

This patch series will split the switch initialization code from mtk_eth
driver into their own files and then add new SoC and switch support.

Link: https://lore.kernel.org/r/cover.1736498083.git.weijie.gao@mediatek.com
14 months agoMerge patch series "Add bitbang feature for npcm8xx and driver"
Tom Rini [Fri, 24 Jan 2025 00:45:56 +0000 (18:45 -0600)] 
Merge patch series "Add bitbang feature for npcm8xx and driver"

Michael Chang <zhang971090220@gmail.com> says:

I am resubmitting the patch titled "Add bitbang feature for npcm8xx
and driver" for review and inclusion in the upstream project.

Driver didn't support bitbang feature.
Add bb_miiphy_bus function for driver and open feature for npcm8xx

the log is as below:
-------------------------------------------------
U-Boot 2024.10-g30b9cdaf2df5-dirty (Jan 09 2025 - 00:57:37 +0000)

CPU-0: NPCM845 A1 @ Model: Nuvoton npcm845 Development Board (Device Tree)
DRAM:  1 GiB
RNG: NPCM RNG module bind OK
OTP: NPCM OTP module bind OK
AES: NPCM AES module bind OK
SHA: NPCM SHA module bind OK
I/TC: Reserved shared memory is enabled
I/TC: Dynamic shared memory is enabled
I/TC: Normal World virtualization support is disabled
I/TC: Asynchronous notifications are disabled
Core:  649 devices, 28 uclasses, devicetree: separate
WDT:   Not starting watchdog@901c
MMC:   sdhci@f0842000: 0
Loading Environment from SPIFlash... SF:
Detected w25q512jvq with page size 256 Bytes, erase size 64 KiB,
total 64 MiB
OK
In:    serial@0
Out:   serial@0
Err:   serial@0
Net:   eth0: eth@f0802000, eth1: eth@f0804000, eth3: eth@f0808000
Hit any key to stop autoboot:  0
U-Boot>
U-Boot>
U-Boot>setenv ipaddr 192.168.16.3
U-Boot>ping 192.168.16.12
eth@f0802000 Waiting for PHY auto negotiation to complete
......... TIMEOUT !
Could not initialize PHY eth@f0802000
eth@f0804000 Waiting for PHY auto negotiation to complete
......... TIMEOUT !
Could not initialize PHY eth@f0804000
Speed: 100, full duplex
Using eth@f0808000 device
host 192.168.16.12 is alive

Link: https://lore.kernel.org/r/20250117104540.1580343-1-zhang971090220@gmail.com
14 months agonet: designware: Add bitbang feature for designware driver.
Michael Chang [Fri, 17 Jan 2025 10:45:40 +0000 (18:45 +0800)] 
net: designware: Add bitbang feature for designware driver.

Add bb_miiphy_bus function for designware bitbang feature.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Michael Chang <zhang971090220@gmail.com>
14 months agoARM: configs: nuvoton: add bitbang feature for npcm8xx.
Michael Chang [Fri, 17 Jan 2025 10:45:39 +0000 (18:45 +0800)] 
ARM: configs: nuvoton: add bitbang feature for npcm8xx.

Enable bitbang and multiple bitbang feature for npcm8xx platform.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Michael Chang <zhang971090220@gmail.com>
14 months agoARM: dts: nuvoton: Add bitbang delay through dts properties.
Michael Chang [Fri, 17 Jan 2025 10:45:38 +0000 (18:45 +0800)] 
ARM: dts: nuvoton: Add bitbang delay through dts properties.

Add bitbang delay through dts properties.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Michael Chang <zhang971090220@gmail.com>
14 months agonet: mediatek: add support for Airoha AN8855 ethernet switch
Weijie Gao [Fri, 10 Jan 2025 08:41:24 +0000 (16:41 +0800)] 
net: mediatek: add support for Airoha AN8855 ethernet switch

Airoha AN8855 is a 5-port gigabit switch with a 2.5G HSGMII CPU port

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agonet: mediatek: add support for MediaTek MT7987 SoC
Weijie Gao [Fri, 10 Jan 2025 08:41:20 +0000 (16:41 +0800)] 
net: mediatek: add support for MediaTek MT7987 SoC

This patch adds support for MediaTek MT7987.

MT7987 features MediaTek NETSYS v3, similar to MT7988, features three GMACs
which support 2.5Gb HSGMII. One 2.5Gb PHY is also embedded an can be
connected to a dedicated GMAC.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agonet: mediatek: split ethernet switch code from mtk_eth.c
Weijie Gao [Fri, 10 Jan 2025 08:41:13 +0000 (16:41 +0800)] 
net: mediatek: split ethernet switch code from mtk_eth.c

mtk_eth.c contains not only the ethernet GMAC/DMA driver, but also
some ethernet switch initialization code. As we may add more switch
support in the future, it's better to move them out of mtk_eth.c to
avoid increasing the code complexity.

Since not all switches are supported for a particular board, Kconfig
options are added to allow user to select which switch should be
built into u-boot. If multiple switches are selected, auto-detecting
can also be enabled.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agoconfigs: phycore_am64x_a53_defconfig: Fix environment
Daniel Schultz [Thu, 16 Jan 2025 11:29:32 +0000 (03:29 -0800)] 
configs: phycore_am64x_a53_defconfig: Fix environment

Enable ENV_OVERWRITE to allow environment variables to be
overwritten within the board code. This is required to add
MAC addresses during SOM detection.

Additionally, set ENV_IS_NOWHERE for boot sources other than MMC.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
14 months agoconfigs: phycore_am64x_a53_defconfig: Enable GPIO command
Daniel Schultz [Thu, 16 Jan 2025 11:29:31 +0000 (03:29 -0800)] 
configs: phycore_am64x_a53_defconfig: Enable GPIO command

Enable the GPIO command to allow access to the GPIO pins.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
14 months agoconfigs: phycore_am64x_a53_defconfig: Fix GPIO controllers
Daniel Schultz [Thu, 16 Jan 2025 11:29:30 +0000 (03:29 -0800)] 
configs: phycore_am64x_a53_defconfig: Fix GPIO controllers

The phyBOARD-Electra does not include a PCA953x I2C GPIO multiplexer.
Remove this configuration as it is a remnant from another
defconfig, and enable CONFIG_DA8XX_GPIO for the DA8XX DaVinci GPIO
controller instead.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
14 months agoboard: phytec: common: k3: Add missing boot source to env
Daniel Schultz [Thu, 16 Jan 2025 11:29:29 +0000 (03:29 -0800)] 
board: phytec: common: k3: Add missing boot source to env

We set the boot source as environment variable 'boot'.
Also include 'uart' and 'usbdfu' as possible boot sources.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
14 months agoconfigs: phycore_am62x_r5_defconfig: Increase SPL Malloc Pool
Daniel Schultz [Wed, 15 Jan 2025 10:38:13 +0000 (02:38 -0800)] 
configs: phycore_am62x_r5_defconfig: Increase SPL Malloc Pool

Increase the malloc pool size for the SPL by additional 4kB from
0x7000 to 0x8000.

This fixes following error message:
  ...
  alloc space exhausted ptr 7028 limit 7000
  DRAM init failed: -12

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
14 months agoboard: phytec: phycore-am62x: Add DDR size fixups if ECC is enabled
Wadim Egorov [Wed, 15 Jan 2025 09:41:29 +0000 (10:41 +0100)] 
board: phytec: phycore-am62x: Add DDR size fixups if ECC is enabled

With commit 22ce56a3ebdb ("ram: k3-ddrss: Add k3_ddrss_ddr_bank_base_size_calc()
to solve 'calculations restricted to 32 bits' issue") we need to provide the
detected RAM size in the device tree node prio to K3 DDRSS driver probe.
This is done by calling fdt_fixup_memory_banks() in do_board_detect().

After probing, call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.

A third fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
14 months agoMerge patch series "Cumulative fixes and updates for MediaTek platform"
Tom Rini [Thu, 23 Jan 2025 14:20:42 +0000 (08:20 -0600)] 
Merge patch series "Cumulative fixes and updates for MediaTek platform"

Weijie Gao <weijie.gao@mediatek.com> says:

This patch series contains fixes and updates for MediaTek platform,
including drivers, board and arch files.

Link: https://lore.kernel.org/r/cover.1737104723.git.weijie.gao@mediatek.com
14 months agoMAINTAINERS: update file list for MediaTek ARM platform
Weijie Gao [Fri, 17 Jan 2025 09:18:59 +0000 (17:18 +0800)] 
MAINTAINERS: update file list for MediaTek ARM platform

Add driver files for MediaTek ARM platform

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agoarm: dts: mediatek: update mt7981 mmc node
Weijie Gao [Fri, 17 Jan 2025 09:18:55 +0000 (17:18 +0800)] 
arm: dts: mediatek: update mt7981 mmc node

1. Fix mmc clock order of mt7981 to match the clock name
2. Limit the max clock of SD to 50MHz to meet SD Card Spec 2.0
3. Increase the CLK pin driving strength to 8mA

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agoarm: dts: medaitek: add flash interface driving settings for mt7988
Weijie Gao [Fri, 17 Jan 2025 09:18:41 +0000 (17:18 +0800)] 
arm: dts: medaitek: add flash interface driving settings for mt7988

Add driving settings for both SPI and SD/eMMC interfaces to support ensure
flash devices is accessible for ram-booting.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agoarm: dts: mediatek: add support for all three GMACs for mt7988
Weijie Gao [Fri, 17 Jan 2025 09:18:27 +0000 (17:18 +0800)] 
arm: dts: mediatek: add support for all three GMACs for mt7988

This patch add all three GMACs nodes for mt7988. Each GMAC can be
configured to connect to different ethernet switches/PHYs.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agoarm: dts: medaitek: fix internal switch link speed of mt7988
Weijie Gao [Fri, 17 Jan 2025 09:18:22 +0000 (17:18 +0800)] 
arm: dts: medaitek: fix internal switch link speed of mt7988

The CPU port of mt7988 internal switch uses 10Gb link speed.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agoarm: dts: mediatek: add pcie support for mt7988
Weijie Gao [Fri, 17 Jan 2025 09:18:17 +0000 (17:18 +0800)] 
arm: dts: mediatek: add pcie support for mt7988

This patch adds PCIe support for mt7988

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agopci: mediatek: add support for multiple ports in mediatek pcie gen3 driver
Weijie Gao [Fri, 17 Jan 2025 09:18:11 +0000 (17:18 +0800)] 
pci: mediatek: add support for multiple ports in mediatek pcie gen3 driver

One MediaTek PCIe Gen3 controller has only one port, where PCI bus 0
on this port represents the controller itself and bus 1 represents
the external PCIe device.

If multiple PCIe controllers are probed in U-Boot, U-Boot will use
bus numbers greater than 2 as input parameters. Therefore, we should
convert the BDF bus number to either 0 or 1 by subtracting the
offset by controller->seq_.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agopwm: mediatek: add pwm3 support for mt7981
Weijie Gao [Fri, 17 Jan 2025 09:18:06 +0000 (17:18 +0800)] 
pwm: mediatek: add pwm3 support for mt7981

This patch adds pwm channel 2 (pwm3) support for mt7981

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agoarm: dts: mediatek: add quad mode capabilities for SPI flashes
Weijie Gao [Fri, 17 Jan 2025 09:18:01 +0000 (17:18 +0800)] 
arm: dts: mediatek: add quad mode capabilities for SPI flashes

Explicitly add quad mode capabilities or the SPI controller may
start transfer in single mode.

Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agospi: mtk_spim: check slave device mode in spi-mem's supports_op
Weijie Gao [Fri, 17 Jan 2025 09:17:55 +0000 (17:17 +0800)] 
spi: mtk_spim: check slave device mode in spi-mem's supports_op

Call spi_mem_default_supports_op() in supports_op to honor the
slave's supported single/dual/quad mode settings.

Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agospi: mtk_spim: add support to use DT live tree
Weijie Gao [Fri, 17 Jan 2025 09:17:51 +0000 (17:17 +0800)] 
spi: mtk_spim: add support to use DT live tree

Change devfdt_get_addr_ptr to dev_read_addr_ptr to support DT live tree.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agoconfigs: mt7988: move image load address to 0x44000000
Weijie Gao [Fri, 17 Jan 2025 09:17:44 +0000 (17:17 +0800)] 
configs: mt7988: move image load address to 0x44000000

This patch sets mt7988 image load address to 0x44000000 to support loading
larger images.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agoconfigs: mt7629: move image load address to 0x42000000
Weijie Gao [Fri, 17 Jan 2025 09:17:38 +0000 (17:17 +0800)] 
configs: mt7629: move image load address to 0x42000000

Update the image load address to ensure it matches the mt7629 NOR
controller's DMA alignment requirements.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agoclk: mediatek: fix uninitialized fields issue in INFRA_MUX struct
Weijie Gao [Fri, 17 Jan 2025 09:16:38 +0000 (17:16 +0800)] 
clk: mediatek: fix uninitialized fields issue in INFRA_MUX struct

This patch adds missing initialization of fields in INFRA_MUX struct
which caused uart broken after any other infra mux being enabled by
'clk_prepare_enable'

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agoboard: mediatek: mt7622: remove board_late_init
Weijie Gao [Fri, 17 Jan 2025 09:16:33 +0000 (17:16 +0800)] 
board: mediatek: mt7622: remove board_late_init

The function board_late_init defined for mt7622 is useless now. Just
remove it.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 months agobootstd: android: Allow boot with AVB failures when unlocked
Mattijs Korpershoek [Wed, 8 Jan 2025 14:38:42 +0000 (15:38 +0100)] 
bootstd: android: Allow boot with AVB failures when unlocked

When the bootloader is UNLOCKED, it should be possible to boot Android
even if AVB reports verification errors [1].

This allows developers to flash modified partitions on
userdebug/engineering builds.

Developers can do so on unlocked devices with:
$ fastboot flash --disable-verity --disable-verification vbmeta vbmeta.img

In such case, bootmeth_android refuses to boot.

Allow the boot to continue when the device is UNLOCKED and AVB reports
verification errors.

[1] https://source.android.com/docs/security/features/verifiedboot/boot-flow#unlocked-devices

Fixes: 125d9f3306ea ("bootstd: Add a bootmeth for Android")
Reviewed-by: Julien Masson <jmasson@baylibre.com>
Link: https://lore.kernel.org/r/20250108-avb-disable-verif-v2-2-ba7d3b0d5b6a@baylibre.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
14 months agobootstd: android: Add missing NULL in the avb partition list
Mattijs Korpershoek [Wed, 8 Jan 2025 14:38:41 +0000 (15:38 +0100)] 
bootstd: android: Add missing NULL in the avb partition list

When booting an Android build with AVB enabled, it's still possible to
deactivate the check for development purposes if the bootloader state is
UNLOCKED.

This is very useful for development and can be done at flashing time via:
$ fastboot flash --disable-verity --disable-verification vbmeta vbmeta.img

However, with bootmeth_android, we cannot boot this way:

    Scanning bootdev 'mmc@fa10000.bootdev':
      0  android      ready   mmc          0  mmc@fa10000.bootdev.whole
    ** Booting bootflow 'mmc@fa10000.bootdev.whole' with android
    avb_vbmeta_image.c:188: ERROR: Hash does not match!
    avb_slot_verify.c:732: ERROR: vbmeta_a: Error verifying vbmeta image: HASH_MISMATCH
    get_partition: can't find partition '_a'
    avb_slot_verify.c:496: ERROR: _a: Error determining partition size.
    Verification failed, reason: I/O error occurred while trying to load data
    Boot failed (err=-5)
    No more bootdevs

From the logs we can see that avb tries to read a partition named '_a'.
It's doing so because the last element of requested_partitions implicitly is
'\0', but the doc explicitly request it to be NULL instead.

Add NULL as last element to requested_partitions to avoid this problem.

Fixes: 125d9f3306ea ("bootstd: Add a bootmeth for Android")
Reviewed-by: Julien Masson <jmasson@baylibre.com>
Link: https://lore.kernel.org/r/20250108-avb-disable-verif-v2-1-ba7d3b0d5b6a@baylibre.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
14 months agoMAINTAINERS: move myself to reviewers for avb/ab
Igor Opaniuk [Thu, 9 Jan 2025 11:28:22 +0000 (12:28 +0100)] 
MAINTAINERS: move myself to reviewers for avb/ab

As Mattijs Korpershoek is in fact doing overall
maintenance of AVB/AB code, move myself to reviewers.

CC: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20250109112854.825204-1-igor.opaniuk@gmail.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
14 months agoboot: android: Check kcmdline's for NULL in android_image_get_kernel()
Aaron Kling [Mon, 13 Jan 2025 09:11:45 +0000 (10:11 +0100)] 
boot: android: Check kcmdline's for NULL in android_image_get_kernel()

kcmdline and kcmdline_extra strings can be NULL. In that case, we still
read the content from 0x00000 and pass that to the kernel, which is
completely wrong.

Fix android_image_get_kernel() to check for NULL before checking if
they are empty strings.

Fixes: 53a0ddb6d3be ("boot: android: fix extra command line support")
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Reviewed-by: Nicolas Belin <nbelin@baylibre.com>
Reviewed-by: Julien Masson <jmasson@baylibre.com>
Tested-by: Sam Day <me@samcday.com>
Link: https://lore.kernel.org/r/20250113-kcmdline-extra-fix-v1-1-03cc9c039159@baylibre.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
14 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Tom Rini [Thu, 23 Jan 2025 14:16:15 +0000 (08:16 -0600)] 
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi

Following the move of the H616 family to OF_UPSTREAM in the last cycle,
now some older SoCs with identical DTs follow the lead: the F1C100s, A10,
A10s, A13. The remaining SoCs suffer from that IRQ cells incompatiblity,
breaking support for Linux < v5.13, so I am holding their move back still.

Otherwise we get proper support for the PinePhone v1.2, and PSTORE support
for all revisions of that device.

This is rounded up by a PMIC related fix for some A80 boards, and two
cleanup patches that are preparations for two new SoCs families, being
worked on as we speak. But they have to wait for the next cycle.

Gitlab CI passed, and I booted that briefly on some boards.

15 months agoMerge patch series "upl: Prerequite patches for updated spec"
Tom Rini [Wed, 22 Jan 2025 22:08:34 +0000 (16:08 -0600)] 
Merge patch series "upl: Prerequite patches for updated spec"

Simon Glass <sjg@chromium.org> says:

The current UPL spec[1] has been tidied up and improved over the last
year, since U-Boot's original UPL support was written.

This series includes some prerequisite patches needed for the real UPL
patches. It is split from [2]

[1] https://github.com/UniversalPayload/spec/tree/3f1450d
[2] https://patchwork.ozlabs.org/project/uboot/list/?series=438574&state=*

Link: https://lore.kernel.org/r/20250111000029.245022-1-sjg@chromium.org
15 months agodm: core: Provide ofnode_find_subnode_unit()
Simon Glass [Sat, 11 Jan 2025 00:00:29 +0000 (17:00 -0700)] 
dm: core: Provide ofnode_find_subnode_unit()

The ofnode_find_subnode() function currently processes things two
different ways, so the treatment of unit addresses differs depending on
whether OF_LIVE is enabled or not.

Add a new version which uses the ofnode API and add a test to check that
unit addresses can be matched correctly. Leave the old function in place
for the !OF_LIVE case, to avoid a code-size increase, e.g. on
firefly-rk3288

Signed-off-by: Simon Glass <sjg@chromium.org>
15 months agodm: core: Provide ofnode_name_eq_unit() to accept a unit address
Simon Glass [Sat, 11 Jan 2025 00:00:28 +0000 (17:00 -0700)] 
dm: core: Provide ofnode_name_eq_unit() to accept a unit address

When a unit-address is provided, use it to match against the node
name.

Since this increases code size, put it into a separate function.

Signed-off-by: Simon Glass <sjg@chromium.org>
15 months agodm: core: Clarify behaviour of ofnode_name_eq()
Simon Glass [Sat, 11 Jan 2025 00:00:27 +0000 (17:00 -0700)] 
dm: core: Clarify behaviour of ofnode_name_eq()

This function is somewhat ambiguous, so expand the comments and add a
test for the undefined behaviour.

Signed-off-by: Simon Glass <sjg@chromium.org>
15 months agox86: emulation: Enable bloblist
Simon Glass [Sat, 11 Jan 2025 00:00:26 +0000 (17:00 -0700)] 
x86: emulation: Enable bloblist

Add bloblist support so that tables can be generated and placed in a
bloblist, then passed to a payload using UPL

Signed-off-by: Simon Glass <sjg@chromium.org>
15 months agoefi_loader: Avoid mapping the ACPI tables twice
Simon Glass [Sat, 11 Jan 2025 00:00:25 +0000 (17:00 -0700)] 
efi_loader: Avoid mapping the ACPI tables twice

The add_u_boot_and_runtime() function paints with a broad brush,
considering all of the memory from the top of U-Boot stack to
gd->ram_top as EFI_RUNTIME_SERVICES_CODE

This is fine, but we need to make sure we don't add a separate entry for
any ACPI tables in this region (which happens when bloblist is used for
tables). Otherwise the memory map looks strange and we get a test
failure on qemu-x86 (only) for the 'virtual address map' test.

Good map:

   Type             Start            End              Attributes
   ================ ================ ================ ==========
   CONVENTIONAL     0000000000000000-00000000000a0000 WB
   RESERVED         00000000000a0000-00000000000f0000 WB
   RUNTIME DATA     00000000000f0000-00000000000f2000 WB|RT
   RESERVED         00000000000f2000-0000000000100000 WB
   CONVENTIONAL     0000000000100000-0000000005cc7000 WB
   BOOT DATA        0000000005cc7000-0000000005ccc000 WB
   RUNTIME DATA     0000000005ccc000-0000000005ccd000 WB|RT
   BOOT DATA        0000000005ccd000-0000000005cce000 WB
   RUNTIME DATA     0000000005cce000-0000000005cf0000 WB|RT
   BOOT DATA        0000000005cf0000-0000000006cf5000 WB
   RESERVED         0000000006cf5000-0000000006cfa000 WB
   ACPI RECLAIM MEM 0000000006cfa000-0000000006d1c000 WB
   RESERVED         0000000006d1c000-0000000006f35000 WB
   RUNTIME CODE     0000000006f35000-0000000006f37000 WB|RT
   RESERVED         0000000006f37000-0000000008000000 WB
   RESERVED         00000000e0000000-00000000f0000000 WB

Bad map: (with BLOBLIST_TABLES but without this patch):

   Type             Start            End              Attributes
   ================ ================ ================ ==========
   CONVENTIONAL     0000000000000000-00000000000a0000 WB
   RESERVED         00000000000a0000-00000000000f0000 WB
   ACPI RECLAIM MEM 00000000000f0000-00000000000f1000 WB
   RESERVED         00000000000f1000-0000000000100000 WB
   CONVENTIONAL     0000000000100000-0000000005ca5000 WB
   BOOT DATA        0000000005ca5000-0000000005caa000 WB
   RUNTIME DATA     0000000005caa000-0000000005cab000 WB|RT
   BOOT DATA        0000000005cab000-0000000005cac000 WB
   RUNTIME DATA     0000000005cac000-0000000005cce000 WB|RT
   BOOT DATA        0000000005cce000-0000000006cd3000 WB
   RUNTIME DATA     0000000006cd3000-0000000006cd5000 WB|RT
   BOOT DATA        0000000006cd5000-0000000006cf4000 WB
   RESERVED         0000000006cf4000-0000000006cf9000 WB
   ACPI RECLAIM MEM 0000000006cf9000-0000000006ce6000 WB

Signed-off-by: Simon Glass <sjg@chromium.org>
15 months agox86: Align the SMBIOS table to a 4K boundary
Simon Glass [Sat, 11 Jan 2025 00:00:24 +0000 (17:00 -0700)] 
x86: Align the SMBIOS table to a 4K boundary

This isn't strictly needed, but with UPL we use the reserved-memory
nodes to indicate where the SMBIOS table is. Tianocore requires 4KB
alignment on these regions, so it is easier to adjust the alignment
to match.

Signed-off-by: Simon Glass <sjg@chromium.org>
15 months agox86: Move tables to use SZ macros
Simon Glass [Sat, 11 Jan 2025 00:00:23 +0000 (17:00 -0700)] 
x86: Move tables to use SZ macros

Update the tables to use linux/sizes rather than open-coped values.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
15 months agox86: Enable UPL handoff for SPL
Simon Glass [Sat, 11 Jan 2025 00:00:22 +0000 (17:00 -0700)] 
x86: Enable UPL handoff for SPL

Add the GD_FLG_UPL so that a UPL-handoff is created.

Signed-off-by: Simon Glass <sjg@chromium.org>
15 months agox86: Support jumping to a UPL image
Simon Glass [Sat, 11 Jan 2025 00:00:21 +0000 (17:00 -0700)] 
x86: Support jumping to a UPL image

Add a function to allow x86 boards to jump to a UPL images. Currently
only 32-bit entry is supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
15 months agox86: Show an error if video fails
Simon Glass [Sat, 11 Jan 2025 00:00:20 +0000 (17:00 -0700)] 
x86: Show an error if video fails

If video is enabled we expect it to work. Avoid silent failure by adding
a panic if things go wrong.

Expand the SPL malloc-area for qemu-x86_64 to avoid a panic.

Signed-off-by: Simon Glass <sjg@chromium.org>
15 months agopci: video: Set up the pixel-format field
Simon Glass [Sat, 11 Jan 2025 00:00:19 +0000 (17:00 -0700)] 
pci: video: Set up the pixel-format field

Add this information to the handoff structure so that it is available to
U-Boot proper. Update bochs and the video handoff.

Signed-off-by: Simon Glass <sjg@chromium.org>
15 months agox86: Create more space for SPL with qemu-x86_64
Simon Glass [Sat, 11 Jan 2025 00:00:18 +0000 (17:00 -0700)] 
x86: Create more space for SPL with qemu-x86_64

The space here is quite tight and there is plenty of room in the ROM.
Move SPL earlier to allow for expansion.

Signed-off-by: Simon Glass <sjg@chromium.org>
15 months agoemulation: Use bloblist to hold tables
Simon Glass [Sat, 11 Jan 2025 00:00:17 +0000 (17:00 -0700)] 
emulation: Use bloblist to hold tables

QEMU can have its own internal ACPI and SMBIOS tables. At present U-Boot
copies out the SMBIOS tables but points directly to the ACPI ones.

The ACPI tables are not aligned on a 4KB boundary, which means that UPL
cannot use them directly, since it uses a reserved-memory node for the
tables and that it assumed (by EDK2) to be 4KB-aligned.

On x86, QEMU provides the tables in a mapped memory region and U-Boot
makes use of these directly, thus making it difficult to use any common
code.

Adjust the logic to fit within the existing table-generation code. Use a
bloblist always and ensure that the ACPI tables is placed in an aligned
region. Set a size of 8K for QEMU. This does not actually put all the
tables in one place, for QEMU, since it currently adds a pointer to the
tables in QFW.

On ARM, enable bloblist so that SMBIOS tables can be added to the
bloblist.

Signed-off-by: Simon Glass <sjg@chromium.org>
15 months agoemulation: fdt: Relax condition for OF_HAS_PRIOR_STAGE
Simon Glass [Sat, 11 Jan 2025 00:00:16 +0000 (17:00 -0700)] 
emulation: fdt: Relax condition for OF_HAS_PRIOR_STAGE

QEMU always gets its devicetree from the OF_BOARD mechanism so we should
not depend on !BLOBLIST here.

It's not clear why we need to have any relationship with BLOBLIST so
let's remove the entire condition.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 2b71470628c dts: OF_HAS_PRIOR_STAGE should depend on !BLOBLIST
Reviewed-by: Tom Rini <trini@konsulko.com>
15 months agosunxi: switch Allwinner A10s/A13 boards to OF_UPSTREAM
Andre Przywara [Wed, 8 Jan 2025 00:17:55 +0000 (00:17 +0000)] 
sunxi: switch Allwinner A10s/A13 boards to OF_UPSTREAM

In contrast to some other Allwinner SoCs, there is no difference between
the DTs for the Allwinner A10s/A13 SoCs (sun5i) between the U-Boot and the
Linux kernel repository.

Remove the old copies of the A10s/A13 related .dts and .dtsi files, and
switch most of sun5i boards over to use OF_UPSTREAM.

There are two boards for which we don't have DTs in the kernel tree.
Keep those two .dts files in the legacy U-Boot DT directory, and let
their defconfig opt out of OF_UPSTREAM.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
15 months agosunxi: switch Allwinner A10 boards to OF_UPSTREAM
Andre Przywara [Wed, 8 Jan 2025 00:17:55 +0000 (00:17 +0000)] 
sunxi: switch Allwinner A10 boards to OF_UPSTREAM

In contrast to some other Allwinner SoCs, there is no difference between
the DTs for the Allwinner A10 SoCs (sun4i) between the U-Boot and the
Linux kernel repository.

Remove the old copies of the A10 related .dts and .dtsi files, and switch
most of sun4i boards over to use OF_UPSTREAM.

There are two boards for which we don't have DTs in the kernel tree.
Keep those two .dts files in the legacy U-Boot DT directory, and let
their defconfig opt out of OF_UPSTREAM.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
15 months agosuniv: switch Allwinner F1Cx00 boards to OF_UPSTREAM
Andre Przywara [Tue, 7 Jan 2025 22:49:56 +0000 (22:49 +0000)] 
suniv: switch Allwinner F1Cx00 boards to OF_UPSTREAM

In contrast to some other Allwinner SoCs, there is no difference between
the DTs for the Allwinner F1C100/F1C200 SoCs (sunvi) between the U-Boot
and the Linux kernel repository.

Remove the old copies of the F1Cx00 related .dts and .dtsi files, and
switch the whole suniv SoC over to use OF_UPSTREAM.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
15 months agosunxi: pinephone: detect existed magnetometer and fixup dtb
Andrey Skvortsov [Wed, 13 Nov 2024 22:28:48 +0000 (01:28 +0300)] 
sunxi: pinephone: detect existed magnetometer and fixup dtb

In newer 1.2 PinePhone board revisions LIS3MDL magnetometer was replaced by
AF8133J. They use the same PB1 pin in different modes.

LIS3MDL uses it as an gpio input to handle interrupt.
AF8133J uses it as an gpio output as a reset signal.

It wasn't possible at runtime to enable both device tree
nodes and detect supported sensor at probe time.

AF8133J has reset pin (PB1) connected to the SoC. By default AF8133J
is in a reset state and don't respond to probe request on I2C
bus. Extra code would be needed to handle reset signal. Therefore this
code uses LIS3MDL magnetometer instead of AF8133J.

Introducing new dts 1.2b with AF8133J sensor would require probing in
SPL. That would lead to pulling in into SPL I2C controller driver,
RSB controller driver, introducing new AXP803 driver to power-up
sensors for probe. It's working, but SPL is pretty size-constrained on
A64 and doesn't have much space. Therefore fdt fixup is done in U-Boot
proper without introducing new board revision and new dts.

Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Link: https://lore.kernel.org/all/20240908214718.36316-1-andrej.skvortzov@gmail.com/
Link: https://lists.denx.de/pipermail/u-boot/2024-February/545700.html
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: fix formatting]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
15 months agosunxi: defconfig: Add pstore support for pinephone
Andrey Skvortsov [Wed, 6 Nov 2024 07:49:47 +0000 (10:49 +0300)] 
sunxi: defconfig: Add pstore support for pinephone

pstore will allow users to catch kernel crashes and report them to
developers. Modern (Android) phones have pstore usually enabled to get
information about kernel crash, since it's the simplest way to get
kernel backtrace on mobile device without serial console. Usually it's
enabled by default in distribution kernels like Debian.

CONFIG_PSTORE=y
CONFIG_PSTORE_RAM=m

systemd has service that automatically handles pstore and saves them
in /var/lib/pstore for later usage.

In general any DRAM address, that isn't overwritten during a boot is
suitable for pstore.

Range from 0x40000000 - 0x50000000 is heavily used by u-boot for
internal use and to load kernel, fdt, fdto, scripts, pxefile and ramdisk
later in the boot process. Ramdisk start address is 0x4FF00000,
initramfs for kernel with some hacking features and debug info enabled
can take more than 100Mb and final address will be around 0x58000000.
Address 0x61000000 will most likely not overlap with that.

Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
15 months agopower: pmic: sunxi: guard DCDC5 separately
Andre Przywara [Sun, 15 Dec 2024 00:22:48 +0000 (00:22 +0000)] 
power: pmic: sunxi: guard DCDC5 separately

So far all sunxi boards programming the DCDC1 power rail on the AXP PMIC
also set the DCDC5 rail, so we could handle both with the same DCDC1
guard.
Some boards using the AXP313 will need to set DCDC1 now as well, and
since the AXP313 only has three buck converters, there will be no DCDC5,
so this trick is not going to work anymore.

Don't try to be too clever, and just protect programming the two DCDC
rails with two separate guards.

This has the interesting side effect of fixing operation on A80 boards,
using the AXP809 PMIC. Apparently programming DCDC5 right after DCDC1,
but before the other three rails caused some glitch, which made the board
hang during Linux boot, during the PSCI handler in U-Boot. Just keeping
the old setup order (DCDC1,2,3,4,5) will make those boards boot to the
Linux prompt again.

Fixes: ffb02942fab024d4a9b6a ("sunxi: board: simplify early PMIC setup conditions")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
15 months agosunxi: H616: DRAM: rename Kconfig parameters to be more generic
Andre Przywara [Mon, 21 Oct 2024 11:47:28 +0000 (12:47 +0100)] 
sunxi: H616: DRAM: rename Kconfig parameters to be more generic

The H616 DRAM controller requires some board specific parameters, which
we declare in Kconfig, let each board specify in their defconfig, and
then use in the DRAM init code.

Other DRAM controllers now require a very similar, if not identical
parameter set, with so far the same parameter names used.

To help keep the Kconfig file at bay, rename the existing parameter
names to drop the H616_ part in there, to make them more naturally
reusable for other SoCs.

No functional change, just a rename.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>