Julian Seward [Fri, 29 Nov 2013 23:08:28 +0000 (23:08 +0000)]
Merge the following revisions from 3_9_BRANCH to trunk:
r13682 Initial cut at 3.9.0 release notes.
r13683 Remove duplicate NEWS entries for 3.9.0.
r13689 Minor docs/NEWS fixes
r13690 Documentation updates for 3.9.0.
r13691 More documentation updates, re leak-checker changes
r13692 NEWS: Note increased max mem size.
Bart Van Assche [Sun, 24 Nov 2013 17:48:13 +0000 (17:48 +0000)]
Merge mc_replace_strmem.c, hg_intercepts.c and drd_strmem_intercepts.c
Move memcheck/mc_replace_strmem.c to shared/vg_replace_strmem.c and
add several intercepts for SSE-variants. Include that source file from
drd/drd_strmem_intercepts.c, helgrind/hg_intercepts.c and
memcheck/mc_replace_strmem.c.
Merge memcheck/tests/filter_memcpy into tests/filter_stderr_basic.
Mark Wielaard [Sun, 24 Nov 2013 17:19:35 +0000 (17:19 +0000)]
Bug 327916 - DW_TAG_typedef may have no name
We already accepted DW_TAG_typedef without a name for Ada. But g++ for
OpenMP can also emit such nameless DW_TAG_typedefs. Just accept them.
Also fix up anonymous enum and typedef printing in tytypes.c.
Mark Wielaard [Wed, 20 Nov 2013 11:54:38 +0000 (11:54 +0000)]
dwz compressed alternate .debug_info and .debug_str not read correctly.
Bug #327837. The buildid from the .gnu_debugaltlink section was parsed
incorrectly (from the wrong offset). Causing the debug alt file not to
be found.
Background:
We want to detect the jump behavior of code, that is, the side exit
from a SB, as there can be many. For that, instrumented code writes
the exit number into a global variable (jmps_passed) before an eventual
exit.
With an exception happening in the first few instructions of an SB,
jmps_passed never was written, and still contained an old value. This
got saved/restored around the exception handler, and resulted in the
failed assertion.
Solution: always initialize jmps_passed to zero in setup_bbcc(), which
is called at the beginning of every SB.
Fix Bug 327284. The condition code of risbg was not correct.
This instruction might be used by by gcc for masking out bits,
e.g. code like
n &= 3;
if (n == 0)
might result in
risbg %r4,%r4,62,128+63,0
je <target>
The old code set the condition code depending on the operand before
masking. Fix it. This patch also indicates that we need test suite
coverage for risbg and friends.
Dejan Jevtic [Thu, 31 Oct 2013 16:58:31 +0000 (16:58 +0000)]
mips32/64: Fix the problem with cacheflush on mips platforms.
On mips platforms the second cacheflush parameter is the number
of bytes in cache that needs to be flushed. When we are discarding
translation we need to use this number instead of:
((ULong) ARG2) - ((ULong) ARG1) + 1ULL
This patch also include syscall wrapper for __NR_sigaction on mips32.
We need to have the host code close to the generated code to improve
branch prediction performance on some s390 systems. This change will
move valgrind text close to the initial aspace start for valgrind
allocations.
In an inner valgrind, register the interim stack earlier
The "late" registration of the interim stack is causing false
positive non addressable memcheck errors in x86.
Registering the interim stack earlier avoids these false positive.
Note however that this is just a bypass for the problem.
I believe there is a more fundamental problem in m_stacks.c stack handling:
In case a thread is switching of stack while the new stack is not yet
registered, the stack switching code will keep the old stack as current stack,
as the stack corresponding to the new sp cannot be found.
In such a case, the zone between the old and new SP in this unknown stack
can be marked either as addressable (if unknown stack is growing)
or unaddressable (if unknown stack is shrinking).
Then at some point in time, the new stack is registered.
If just after that, the sp is changed so as to grow the stack
by nr of bytes not determinable at translation time, VG_(unknown_SP_update)
will be called, will detect the stack switch and will do nothing.
This leaves a certain zone of the stack (the grown zone) in a not
addressable state, as the stack switch code has in fact wrongly
guessed a stack switch, while in fact what should have been detected
is just a sp change in a stack previously unknown.
Proper fixes might be:
1. in "IF_STACK_SWITCH_SET_current_stack_AND_RETURN", do not return
if old and new sp are in the stack stack.
rather continue so as to execute correctly the sp change in
the newly discovered stack.
and/or
2. in the stack registration code (client request), if the current SP
is inside the stack being registered, also set the current stack
to the just registered stack pointer
None of these fixes are being looked at currently, as such changes looks
too adventurous close to 3.9.0
Julian Seward [Mon, 21 Oct 2013 10:07:43 +0000 (10:07 +0000)]
Enable sys_rt_sigsuspend on ppc64-linux. Not sure why this is
necessary, but I found it lying around in a ppc64 tree, so there
was probably some use case at some point.
Julian Seward [Mon, 21 Oct 2013 10:05:33 +0000 (10:05 +0000)]
In 64 bit mode, allow 64 bit return values from clean helper calls.
This makes SMC checking calls work (even though they are irrelevant
on PPC targets). Fixes #309430.
Mark Wielaard [Fri, 18 Oct 2013 13:11:05 +0000 (13:11 +0000)]
Don't report BMI support when AVX support is missing.
Bug #326113. This is a bit conservative, but it is what the linux kernel
also seems to be doing. If AVX support is missing (because the OS doesn't
save the wide registers), then also don't report supporting BMI.
Julian Seward [Fri, 18 Oct 2013 11:18:45 +0000 (11:18 +0000)]
Followup to r13652 (make the translation cache size be command-line
controllable): reduce MAX_N_SECTORS to 24, speed up Sector
initialisation, wording tweaks.
Carl Love [Fri, 18 Oct 2013 01:20:11 +0000 (01:20 +0000)]
This commit adds testing support for the following instructions:
vaddcuq, vadduqm, vaddecuq, vaddeuqm,
vsubcuq, vsubuqm, vsubecuq, vsubeuqm,
vbpermq and vgbbd.
Carl Love [Fri, 18 Oct 2013 01:19:06 +0000 (01:19 +0000)]
This commit adds support for the following instructions:
vaddcuq, vadduqm, vaddecuq, vaddeuqm,
vsubcuq, vsubuqm, vsubecuq, vsubeuqm,
vbpermq and vgbbd.
The vgbbd instruction required a new Iop -- Iop_PwBitMtxXpose64x2.
All other instructions were emulated using existing Iops.
Allow the user to dimension the translation cache
A previous commit had decreased to 6 (on android) and increased to 16
(other platforms) the nr of sectors in the translation cache.
This patch adds a command line option to let the user specify
the nr of sectors as e.g. 16 sectors might be a lot and cause
an out of memory for some workloads or might be too small for
huge executable or executables using a lot of shared libs.
Allow tools to provide some statistics in suppression list produced at the end
Option -v outputs a list of used suppressions. This only gives
the nr of times a suppression was used.
For a leak search, this only gives the nr of loss records that
have been suppressed, but it does not give additional needed details
to understand more precisely what has been suppressed
(i.e. nr of blocks and nr of bytes).
=> Add in the tool interface update_extra_suppression_use and
print_extra_suppression_info functions to allow the tool to record
additioonal use statistics for a suppression. These statistics
can be done depending on the error (and its data) which is suppressed.
Use this in memcheck for the leak suppressions, to maintain and output
the nr of blocks and bytes suppressed by a suppression during
the last leak search.
Julian Seward [Wed, 16 Oct 2013 08:53:07 +0000 (08:53 +0000)]
Connect up the xacq_xrel test to the build system. Also, make the
TSX configure test check for that the assembler can deal with
xacquire and xrelease prefixes.
SIGSEGV/SIGBUS specific handling on s390, to cope with kernel peculiarity
On s390, the linux kernel does not deliver the exact address that
caused a SEGV but rather this address rounded down to a page boundary.
Also, old kernels do not deliver the address that caused a SIGBUS,
but deliver 0.
So, on s390, handle SIGSEGV and SIGBUG by always skipping one page
starting from the current value of the ptr scanning position.
As we need a correct value of ptr on this platform in the longjmp-ed
code, ptr is marked as volatile.
The following Iops were added to support the above instructions:
Iop_BCDAdd, Iop_BCDSub,
Iop_PolynomialMulAdd8x16, Iop_PolynomialMulAdd16x8,
Iop_PolynomialMulAdd32x4, Iop_PolynomialMulAdd64x2,
Iop_CipherV128, Iop_CipherLV128, Iop_CipherSV128,
Iop_NCipherV128, Iop_NCipherLV128,
Iop_SHA512, Iop_SHA256, Iop_Clz64x2
Julian Seward [Mon, 14 Oct 2013 14:09:35 +0000 (14:09 +0000)]
Update expected output following r13642, which fixes #323432
(When calling pthread_cond_destroy or pthread_mutex_destroy
with initializers as argument Helgrind (incorrectly)
reports errors.)
This introduces a new race report (but no new race) in
some conditions. I think this is OK because the race only
occurs in the case where the program is buggy (racey) anyway.
Julian Seward [Mon, 14 Oct 2013 13:51:25 +0000 (13:51 +0000)]
Fix #323432: When calling pthread_cond_destroy or pthread_mutex_destroy
with initializers as argument Helgrind (incorrectly) reports errors.
(Peter Boström, valgrind@pbos.me)
Julian Seward [Mon, 14 Oct 2013 12:13:52 +0000 (12:13 +0000)]
For pthread_cond_destroy, don't report a false it's-still-waited-on
error if in fact the last wait finished with ETIMEDOUT.
Fixes #324149. (Peter Boström, valgrind@pbos.me)
Fix use of uninit heuristic set for monitor command
* initialise leak_check heuristic parameter in the leak_check monitor command
* show the default value (none heuristic) in the monitor help command
(none value chosen as default as this gives a backward compatible
behaviour).
* document the heuristic leak check parameter in memcheck manual
monitor command section
Carl Love [Wed, 9 Oct 2013 17:56:34 +0000 (17:56 +0000)]
Power PC, add the two privileged Transactional Memory instructions.
The initial Transactional Memory instruction patch did not include the two
privileged (OS) instructions treclaim and trechkpt. VEX commit 2784 added
the support for these two instructions.
This patch adds a touch test to make sure all of the POWER Transactional
memory instrutions are recognized by Valgrind. All of the the Transactional
Memory instructions, with the exception of tbegin, are treated as NOPs in the
first implementation. The tbegin instruction causes the transaction to fail
thus no additional Transactional Memory instructions on the successful
transaction path would be executed in a real program. This test just makes
sure each instruction is actually recognized by Valgrind.
Carl Love [Wed, 9 Oct 2013 17:52:01 +0000 (17:52 +0000)]
Power PC, add the two privileged Transactional Memory instructions.
The initial Transactional Memory instruction patch did not include the two
privileged (OS) instructions. This patch adds support for the two
instructions, treclaim and trechkpt.
projects / thirdparty / valgrind.git / log
