Bart Van Assche [Sun, 15 May 2011 07:04:03 +0000 (07:04 +0000)]
Get rid of the remaining "set but not used" warnings reported by gcc 4.6 by
swapping the roles of the VALGRIND_DO_CLIENT_REQUEST() and
VALGRIND_DO_CLIENT_REQUEST_EXPR() macros. Also, many __attribute__((unused))
declarations on variables have been eliminated. Closes #269778.
Note: so far this patch has been tested on x86/Linux, amd64/Linux and
ppc64/Linux but not yet on any other supported CPU/OS combination.
Julian Seward [Wed, 11 May 2011 15:31:24 +0000 (15:31 +0000)]
When reading Dwarf3 variable type and location information, print a
line showing the number of variables read for each object. Currently
disabled -- is a sanity-check mechanism for exp-sgcheck.
Julian Seward [Tue, 10 May 2011 11:01:07 +0000 (11:01 +0000)]
Improvements for testing and compilation breakage for the GDB server
on various platforms:
* In all gdbserver_tests using gdb:
Made a more general way to remove the initial start message.
* tests using threads burning cpu modified to have only 1 thread.
This makes them independent of the scheduler fairness.
* filter_gdb and filter_vgdb enhanced to anonymise
some debian 6.0/ppc specific things
some s390x/gdb 7.0, gdb 7.1 specific things
* vgdb.c: added an #include <linux/ptrace.h> to fix compilation
on s390x fedora and suse. (Christian Boerntrager)
* fixed a bug in valgrind-low.c debug log :
when a register size is 0, its image cannot be output (and register
should not be transferred).
* added a parameter --keep-unfiltered to vg_regtest.in
This will make it easier to update filter_gdb:
in case gdbserver_tests are failing due to "artificial"
differences to be filtered, re-run the tests using:
perl tests/vg_regtest --keep-unfiltered gdbserver_tests
Then a tar file with all the *.out in gdbserver_tests
will allow me to better/faster update the filter_gdb.
* made a better detection of a working PTRACE_GETREGS at compile time
and/or at run-time.
This is the patch on bug 214909 comment 69.
(Philippe Waroquiers, philippe.waroquiers@skynet.be)
Julian Seward [Mon, 9 May 2011 22:51:14 +0000 (22:51 +0000)]
Back out r11705, which was an attempt to make reading of line number
info created by LLVM 2.9 work properly. As per long discussion in
#272189, this isn't actually possible -- LLVM 2.9 creates bogus line
number info, and the bogusness can't be worked around at the Valgrind
end.
Julian Seward [Mon, 9 May 2011 09:15:28 +0000 (09:15 +0000)]
ppc{32,64}-linux: mark VG_MINIMAL_LONGJMP as noreturn, since it is,
and not doing so leads to compiler warnings for functions that tail
call this one, which themselves are marked "attribute noreturn".
Julian Seward [Wed, 4 May 2011 09:50:48 +0000 (09:50 +0000)]
Tighten up condition code handling in the back end, so as to placate
IBM's BEAM checker. There is no error in the existing code. However
BEAM doesn't know that when PPCCondCode::test == Pct_ALWAYS then the
::flag field is irrelevant, and so it believes it is being used
uninitialised. Add a Pcf_NONE ::flag value for use in that case, and
add assertions to match. (Untested!)
Julian Seward [Wed, 4 May 2011 09:07:38 +0000 (09:07 +0000)]
setup_client_stack: use have_exename to consistently guard uses
of VG_(args_the_exename), thereby avoiding a potential segfault.
Spotted by IBM's BEAM checker.
Julian Seward [Wed, 4 May 2011 09:06:17 +0000 (09:06 +0000)]
calling format_message: when passing frameNo == -1, also pass
tid == VG_INVALID_THREADID rather than an uninitialised ThreadId.
Also in format_message, improve precondition assertions for
frameNo and tid.
There's no error in the current code since if frameNo == -1 then
tid is unused, but it caused IBM's BEAM checker to complain.
Julian Seward [Wed, 4 May 2011 09:01:58 +0000 (09:01 +0000)]
VG_(env_unsetenv), VG_(env_clone): add assertions so as to cause
assertions instead of segfaults. Potential segfaults were detected by
IBM's BEAM checker.
Julian Seward [Mon, 2 May 2011 07:21:04 +0000 (07:21 +0000)]
Split up armg_calculate_flags_nzcv into four functions that compute
the flags individually. This seems to be a net performance win,
because often only one or two of the flags computed by
armg_calculate_flags_nzcv, so time was wasted computing the other
ones.
Julian Seward [Sun, 1 May 2011 18:47:10 +0000 (18:47 +0000)]
Improvements to condition code handling on ARM.
(1) guest_arm_spechelper: add another spec rule for
armg_calculate_condition. Add a spec rules for
armg_calculate_flag_c and armg_calculate_flag_v.
(2) guest_arm_toIR.c: when storing oldC (shifter carry out) and
oldV values in the thunk, be sure to ensure the top 31 bits
are zero. This improves the effectiveness of the new spec
rules (1) by avoiding getting into situations where we have
Mux0X(c, x, And32(x,1)), where in fact x has bits 31:1 as
zero. iropt can't fold that out. So make sure the spec
rules don't generate any unnecessary And32(x,1); hence the
above becomes Mux0X(c, x, x) which iropt can reduce simply
to "x".
Julian Seward [Sun, 1 May 2011 18:36:51 +0000 (18:36 +0000)]
When simplifying (improving) the IR generated by the ARM front end, do
CSE by default. This significantly improves performance for ARM (not
Thumb) code that leans heavily on predicated instructions by commoning
up duplicate condition code evaluations within a single IRSB.
Handle Iop_Not64 when doing 32-bit code generation. Also, assert that
iselWordExpr_R is not asked to handle Iop_Not64 in 32-bit mode.
Fixes #270856. (Maynard Johnson, maynardj@us.ibm.com)
- Remove fixs390 regarding storing the instruction address in the
IP_AT_SYSCALL slot in the guest state. I'm not sure this is used
but it certainly makes sense.
- Remove fixs390 in function s390_irgen_XONC. This was missed in
VEX r2113.
Partial fix for #271501. (Florian Krohm, britzel@acm.org)
s390x: Implement Ist_MBE
VEX IR provides the statement Ist_MBE which is used to implement memory
barriers (Imbe_Fence). We use this statement to implement serialization which
is similar.
Fixes #271385. (Florian Krohm, britzel@acm.org)
Change the TT_FAST hash function for from "insn_address >> 2" to
"insn_address >> 1". The former is appropriate for ARM code, where
all insns are 4-sized and 4-aligned, but not for Thumb code, where the
minimum size and alignment is 2. The old scheme happened to work for
Thumb (indeed, any hash function would), but caused huge amounts of
conflict misses in the fast cache for some programs.
The change has been observed to reduce conflict misses by up to 100
times, and in some cases, improves performance significantly for Thumb
code. Performance of ARM code is unchanged or possibly a bit worse.
Change the default (minimum) client malloc alignment from 8 to 16
on ppc32-linux. This is needed to make Altivec-using code work
correctly. Noticed when running ./auxprogs/gsl16test with gcc-4.6
with args -mcpu=970 -g -O3 -ftree-vectorize on Memcheck, in
which case a few of the tests failed because malloc() returns
8 byte aligned memory when it should return 16-aligned memory.
s390x: invalid use of R0 as base register
When emitting code for a shift operation with the shift amount operand being in
memory we load the shift amount into R0 and use that register in SLAG etc..
That won't work because the contents of R0 will be ignored when used as a base
reg.
So, let's choose some other register and save/restore it.
s390x: fpr - gpr transfer facility
We need to introduce a new hwcap to model the presence of the fpr - gpr
transfer facility. If it is not available, we cannot use the LDGR and LGDR
insns and need to use a trick similar to what ppc does (write/read stack
location).
Fixes #268619 (vex side).
(Florian Krohm, britzel@acm.org)
Add alternative expected output cases for more recent glibcs (eg,
2.12), which print a minus sign for NaNs. Fixes #262989.
(Maynard Johnson, maynardj@us.ibm.com)
Fix up some enum confusion to do with ARMNeonUnOp and ARMNeonUnOpS, as
found by "the IBM checker", and also by clang-2.9. Fixes #271820.
(Florian Krohm, britzel@acm.org)
Fix up enum confusion between PPCAvOp and PPCAvFpOp, as found by
"the IBM checker", and also by clang-2.9. Fixes #271579.
(Florian Krohm, britzel@acm.org)
Add support for IBM Power ISA 2.06 -- stage 1. Valgrind-side changes
and test cases. Bug #267630 and followup fix #270794.
(Maynard Johnson, maynardj@us.ibm.com)
s390x: reconsider "long displacement" requirement. We currently
require that the host supports accessing memory using long
displacement. On older machines e.g. z900 that is an expensive
operation, because it is millicoded. It would be a performance win to
relax that requirement. (VEX side changes.) See #268620.
(Florian Krohm, britzel@acm.org)
s390x: rewrite some testcases. To make my testing and debugging life
simpler, I've rewritten those testcases from none/tests/s390x that
require binutils to recognize opcodes defined in the
extended-immediate and general-instruction-extension facilities. As a
side effect this change removes the special casing in
none/tests/s390x/Makefile.am and the configury bits to support it.
Fixes #270115. (Florian Krohm, britzel@acm.org)
s390x: minor code generation tweaks. There were a few loose ends
(identified by fixs390) in code generation that are fixed by the
attached patch:
- use of SLFI insn if available
- unnecessary vpanic
An out-of-date comment is also removed.
Add an alternative implementation of VG_MINIMAL_{SET,LONG}JMP
for ppc32-linux, that works for gcc >= 4.4. Related to #259977.
(modified version of patch from Maynard Johnson <maynardj@us.ibm.com>)
Create new module m_libcsetjmp, which wraps up uses of
__builtin_setjmp and __builtin_longjmp so that they can be selectively
replaced, on a platform by platform basis. Does not change any
functionality. Related to #259977.
On OSX, post-process the tool executables to adjust the Mach-O headers
in certain circumstances. This works around a bug in the linker that
ships in Xcode 4.0.0 and 4.0.1 causing the 64-bit tool executables to
segfault at startup. Fixes #267997.
projects / thirdparty / valgrind.git / log
