AVX10.2 ymm rounding: Support vcvtdq2p{s,h} and vcvtpd2p{s,h} intrins

AVX10.2 ymm rounding: Support vcvtdq2p{s,h} and vcvtpd2p{s,h} intrins

gcc/ChangeLog:

	* config/i386/avx10_2roundingintrin.h: Add new intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V8SF_FTYPE_V8SI_V8SF_UQI_INT, V4SF_FTYPE_V4DF_V4SF_UQI_INT,
	V8HF_FTYPE_V8SI_V8HF_UQI_INT, V8HF_FTYPE_V4DF_V8HF_UQI_INT.
	* config/i386/sse.md:
	(avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode><mask_name><round_name>):
	Add condition check.
	(avx512fp16_vcvtpd2ph_v4df_mask_round): New expand.
	(*avx512fp16_vcvt<castmode>2ph_<mode>_mask): Change name to
	avx512fp16_vcvt<castmode>2ph_<mode>_mask<round_name>_1
	and extend pattern to generate 256bit insns.
	(avx_cvtpd2ps256<mask_name>): Change name to
	avx_cvtpd2ps256<mask_name><round_name> and extend pattern to
	generate 256bit insns.
	* config/i386/subst.md (round_applied): New condition.
	(round_suff): New iterator.
	(round_mode_condition): Add V32HI check for 512bit.
	(round_saeonly_mode_condition): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx-1.c: Add new builtin test.
	* gcc.target/i386/sse-13.c: Ditto.
	* gcc.target/i386/sse-23.c: Ditto.
	* gcc.target/i386/sse-14.c: Add new macro test.
	* gcc.target/i386/sse-22.c: Ditto.
	* gcc.target/i386/avx10_2-rounding-1.c: Add test.