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ARM: dts: microchip: sama7g5: Fix RTT clock
authorClaudiu Beznea <claudiu.beznea@tuxon.dev>
Mon, 26 Aug 2024 16:53:20 +0000 (19:53 +0300)
committerClaudiu Beznea <claudiu.beznea@tuxon.dev>
Sat, 31 Aug 2024 12:17:04 +0000 (15:17 +0300)
commit867bf1923200e6ad82bad0289f43bf20b4ac7ff9
tree89d20b305c7a5b9a0bdce56181b9987cf2554087tree
parentd355c895fa4ddd8bec15569eee540baeed7df8c5commit | diff
ARM: dts: microchip: sama7g5: Fix RTT clock

According to datasheet, Chapter 34. Clock Generator, section 34.2,
Embedded characteristics, source clock for RTT is the TD_SLCK, registered
with ID 1 by the slow clock controller driver. Fix RTT clock.

Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Link: https://lore.kernel.org/r/20240826165320.3068359-1-claudiu.beznea@tuxon.dev
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
arch/arm/boot/dts/microchip/sama7g5.dtsi diff | blob | blame | history
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