arm: vld1_types_x2 ACLE intrinsics

arm: vld1_types_x2 ACLE intrinsics

This patch is part of a series of patches implementing the _xN
variants of the vld1 intrinsic for the arm port. This patch adds the
_x2 variants of the vld1 intrinsic.

The previous vld1_x2 has been updated to vld1q_x2 to take into
account that it works with 4-word-length types. vld1_x2 is now
only for 2-word-length types.

ACLE documents:
https://developer.arm.com/documentation/ihi0053/latest/

ISA documents:
https://developer.arm.com/documentation/ddi0487/latest/

gcc/ChangeLog:
	* config/arm/arm_neon.h
	(vld1_u8_x2, vld1_u16_x2, vld1_u32_x2, vld1_u64_x2): New
	(vld1_s8_x2, vld1_s16_x2, vld1_s32_x2, vld1_s64_x2): New.
	(vld1_f16_x2, vld1_f32_x2): New.
	(vld1_p8_x2, vld1_p16_x2, vld1_p64_x2): New.
	(vld1_bf16_x2): New.
	(vld1q_types_x2): Updated to use vld1q_x2 from
	arm_neon_builtins.def
	* config/arm/arm_neon_builtins.def
	(vld1_x2): Updated entries.
	(vld1q_x2): New entries, but comes from the old vld1_x2
	* config/arm/neon.md
	(neon_vld1<VMEMX2_q>_x2<VDQX:mode>): Updated
	from neon_vld1_x2<mode>.

gcc/testsuite/ChangeLog:
	* gcc.target/arm/simd/vld1_base_xN_1.c: Add new tests.
	* gcc.target/arm/simd/vld1_bf16_xN_1.c: Add new tests.
	* gcc.target/arm/simd/vld1_fp16_xN_1.c: Add new tests.
	* gcc.target/arm/simd/vld1_p64_xN_1.c: Add new tests.